1 // SPDX-License-Identifier: GPL-2.0-only
3 * Pin controller and GPIO driver for Amlogic Meson SoCs
5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
9 * The available pins are organized in banks (A,B,C,D,E,X,Y,Z,AO,
10 * BOOT,CARD for meson6, X,Y,DV,H,Z,AO,BOOT,CARD for meson8 and
11 * X,Y,DV,H,AO,BOOT,CARD,DIF for meson8b) and each bank has a
12 * variable number of pins.
14 * The AO bank is special because it belongs to the Always-On power
15 * domain which can't be powered off; the bank also uses a set of
16 * registers different from the other banks.
18 * For each pin controller there are 4 different register ranges that
19 * control the following properties of the pins:
21 * 2) pull enable/disable
23 * 4) GPIO direction, output value, input value
25 * In some cases the register ranges for pull enable and pull
26 * direction are the same and thus there are only 3 register ranges.
28 * Since Meson G12A SoC, the ao register ranges for gpio, pull enable
29 * and pull direction are the same, so there are only 2 register ranges.
31 * For the pull and GPIO configuration every bank uses a contiguous
32 * set of bits in the register sets described above; the same register
33 * can be shared by more banks with different offsets.
35 * In addition to this there are some registers shared between all
36 * banks that control the IRQ functionality. This feature is not
37 * supported at the moment by the driver.
40 #include <linux/device.h>
41 #include <linux/gpio/driver.h>
42 #include <linux/init.h>
45 #include <linux/of_address.h>
46 #include <linux/of_device.h>
47 #include <linux/pinctrl/pinconf-generic.h>
48 #include <linux/pinctrl/pinconf.h>
49 #include <linux/pinctrl/pinctrl.h>
50 #include <linux/pinctrl/pinmux.h>
51 #include <linux/platform_device.h>
52 #include <linux/regmap.h>
53 #include <linux/seq_file.h>
56 #include "../pinctrl-utils.h"
57 #include "pinctrl-meson.h"
60 * meson_get_bank() - find the bank containing a given pin
62 * @pc: the pinctrl instance
63 * @pin: the pin number
64 * @bank: the found bank
66 * Return: 0 on success, a negative value on error
68 static int meson_get_bank(struct meson_pinctrl *pc, unsigned int pin,
69 struct meson_bank **bank)
73 for (i = 0; i < pc->data->num_banks; i++) {
74 if (pin >= pc->data->banks[i].first &&
75 pin <= pc->data->banks[i].last) {
76 *bank = &pc->data->banks[i];
85 * meson_calc_reg_and_bit() - calculate register and bit for a pin
87 * @bank: the bank containing the pin
88 * @pin: the pin number
89 * @reg_type: the type of register needed (pull-enable, pull, etc...)
90 * @reg: the computed register offset
91 * @bit: the computed bit
93 static void meson_calc_reg_and_bit(struct meson_bank *bank, unsigned int pin,
94 enum meson_reg_type reg_type,
95 unsigned int *reg, unsigned int *bit)
97 struct meson_reg_desc *desc = &bank->regs[reg_type];
100 *bit = desc->bit + pin - bank->first;
103 static int meson_get_groups_count(struct pinctrl_dev *pcdev)
105 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
107 return pc->data->num_groups;
110 static const char *meson_get_group_name(struct pinctrl_dev *pcdev,
113 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
115 return pc->data->groups[selector].name;
118 static int meson_get_group_pins(struct pinctrl_dev *pcdev, unsigned selector,
119 const unsigned **pins, unsigned *num_pins)
121 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
123 *pins = pc->data->groups[selector].pins;
124 *num_pins = pc->data->groups[selector].num_pins;
129 static void meson_pin_dbg_show(struct pinctrl_dev *pcdev, struct seq_file *s,
132 seq_printf(s, " %s", dev_name(pcdev->dev));
135 static const struct pinctrl_ops meson_pctrl_ops = {
136 .get_groups_count = meson_get_groups_count,
137 .get_group_name = meson_get_group_name,
138 .get_group_pins = meson_get_group_pins,
139 .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
140 .dt_free_map = pinctrl_utils_free_map,
141 .pin_dbg_show = meson_pin_dbg_show,
144 int meson_pmx_get_funcs_count(struct pinctrl_dev *pcdev)
146 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
148 return pc->data->num_funcs;
151 const char *meson_pmx_get_func_name(struct pinctrl_dev *pcdev,
154 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
156 return pc->data->funcs[selector].name;
159 int meson_pmx_get_groups(struct pinctrl_dev *pcdev, unsigned selector,
160 const char * const **groups,
161 unsigned * const num_groups)
163 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
165 *groups = pc->data->funcs[selector].groups;
166 *num_groups = pc->data->funcs[selector].num_groups;
171 static int meson_pinconf_set_gpio_bit(struct meson_pinctrl *pc,
173 unsigned int reg_type,
176 struct meson_bank *bank;
177 unsigned int reg, bit;
180 ret = meson_get_bank(pc, pin, &bank);
184 meson_calc_reg_and_bit(bank, pin, reg_type, ®, &bit);
185 return regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
189 static int meson_pinconf_get_gpio_bit(struct meson_pinctrl *pc,
191 unsigned int reg_type)
193 struct meson_bank *bank;
194 unsigned int reg, bit, val;
197 ret = meson_get_bank(pc, pin, &bank);
201 meson_calc_reg_and_bit(bank, pin, reg_type, ®, &bit);
202 ret = regmap_read(pc->reg_gpio, reg, &val);
206 return BIT(bit) & val ? 1 : 0;
209 static int meson_pinconf_set_output(struct meson_pinctrl *pc,
213 return meson_pinconf_set_gpio_bit(pc, pin, REG_DIR, !out);
216 static int meson_pinconf_get_output(struct meson_pinctrl *pc,
219 int ret = meson_pinconf_get_gpio_bit(pc, pin, REG_DIR);
227 static int meson_pinconf_set_drive(struct meson_pinctrl *pc,
231 return meson_pinconf_set_gpio_bit(pc, pin, REG_OUT, high);
234 static int meson_pinconf_get_drive(struct meson_pinctrl *pc,
237 return meson_pinconf_get_gpio_bit(pc, pin, REG_OUT);
240 static int meson_pinconf_set_output_drive(struct meson_pinctrl *pc,
246 ret = meson_pinconf_set_output(pc, pin, true);
250 return meson_pinconf_set_drive(pc, pin, high);
253 static int meson_pinconf_disable_bias(struct meson_pinctrl *pc,
256 struct meson_bank *bank;
257 unsigned int reg, bit = 0;
260 ret = meson_get_bank(pc, pin, &bank);
264 meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit);
265 ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), 0);
272 static int meson_pinconf_enable_bias(struct meson_pinctrl *pc, unsigned int pin,
275 struct meson_bank *bank;
276 unsigned int reg, bit, val = 0;
279 ret = meson_get_bank(pc, pin, &bank);
283 meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit);
287 ret = regmap_update_bits(pc->reg_pull, reg, BIT(bit), val);
291 meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit);
292 ret = regmap_update_bits(pc->reg_pullen, reg, BIT(bit), BIT(bit));
299 static int meson_pinconf_set_drive_strength(struct meson_pinctrl *pc,
301 u16 drive_strength_ua)
303 struct meson_bank *bank;
304 unsigned int reg, bit, ds_val;
308 dev_err(pc->dev, "drive-strength not supported\n");
312 ret = meson_get_bank(pc, pin, &bank);
316 meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit);
319 if (drive_strength_ua <= 500) {
320 ds_val = MESON_PINCONF_DRV_500UA;
321 } else if (drive_strength_ua <= 2500) {
322 ds_val = MESON_PINCONF_DRV_2500UA;
323 } else if (drive_strength_ua <= 3000) {
324 ds_val = MESON_PINCONF_DRV_3000UA;
325 } else if (drive_strength_ua <= 4000) {
326 ds_val = MESON_PINCONF_DRV_4000UA;
328 dev_warn_once(pc->dev,
329 "pin %u: invalid drive-strength : %d , default to 4mA\n",
330 pin, drive_strength_ua);
331 ds_val = MESON_PINCONF_DRV_4000UA;
334 ret = regmap_update_bits(pc->reg_ds, reg, 0x3 << bit, ds_val << bit);
341 static int meson_pinconf_set(struct pinctrl_dev *pcdev, unsigned int pin,
342 unsigned long *configs, unsigned num_configs)
344 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
345 enum pin_config_param param;
346 unsigned int arg = 0;
349 for (i = 0; i < num_configs; i++) {
350 param = pinconf_to_config_param(configs[i]);
353 case PIN_CONFIG_DRIVE_STRENGTH_UA:
354 case PIN_CONFIG_OUTPUT_ENABLE:
355 case PIN_CONFIG_OUTPUT:
356 arg = pinconf_to_config_argument(configs[i]);
364 case PIN_CONFIG_BIAS_DISABLE:
365 ret = meson_pinconf_disable_bias(pc, pin);
367 case PIN_CONFIG_BIAS_PULL_UP:
368 ret = meson_pinconf_enable_bias(pc, pin, true);
370 case PIN_CONFIG_BIAS_PULL_DOWN:
371 ret = meson_pinconf_enable_bias(pc, pin, false);
373 case PIN_CONFIG_DRIVE_STRENGTH_UA:
374 ret = meson_pinconf_set_drive_strength(pc, pin, arg);
376 case PIN_CONFIG_OUTPUT_ENABLE:
377 ret = meson_pinconf_set_output(pc, pin, arg);
379 case PIN_CONFIG_OUTPUT:
380 ret = meson_pinconf_set_output_drive(pc, pin, arg);
393 static int meson_pinconf_get_pull(struct meson_pinctrl *pc, unsigned int pin)
395 struct meson_bank *bank;
396 unsigned int reg, bit, val;
399 ret = meson_get_bank(pc, pin, &bank);
403 meson_calc_reg_and_bit(bank, pin, REG_PULLEN, ®, &bit);
405 ret = regmap_read(pc->reg_pullen, reg, &val);
409 if (!(val & BIT(bit))) {
410 conf = PIN_CONFIG_BIAS_DISABLE;
412 meson_calc_reg_and_bit(bank, pin, REG_PULL, ®, &bit);
414 ret = regmap_read(pc->reg_pull, reg, &val);
419 conf = PIN_CONFIG_BIAS_PULL_UP;
421 conf = PIN_CONFIG_BIAS_PULL_DOWN;
427 static int meson_pinconf_get_drive_strength(struct meson_pinctrl *pc,
429 u16 *drive_strength_ua)
431 struct meson_bank *bank;
432 unsigned int reg, bit;
439 ret = meson_get_bank(pc, pin, &bank);
443 meson_calc_reg_and_bit(bank, pin, REG_DS, ®, &bit);
445 ret = regmap_read(pc->reg_ds, reg, &val);
449 switch ((val >> bit) & 0x3) {
450 case MESON_PINCONF_DRV_500UA:
451 *drive_strength_ua = 500;
453 case MESON_PINCONF_DRV_2500UA:
454 *drive_strength_ua = 2500;
456 case MESON_PINCONF_DRV_3000UA:
457 *drive_strength_ua = 3000;
459 case MESON_PINCONF_DRV_4000UA:
460 *drive_strength_ua = 4000;
469 static int meson_pinconf_get(struct pinctrl_dev *pcdev, unsigned int pin,
470 unsigned long *config)
472 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
473 enum pin_config_param param = pinconf_to_config_param(*config);
478 case PIN_CONFIG_BIAS_DISABLE:
479 case PIN_CONFIG_BIAS_PULL_DOWN:
480 case PIN_CONFIG_BIAS_PULL_UP:
481 if (meson_pinconf_get_pull(pc, pin) == param)
486 case PIN_CONFIG_DRIVE_STRENGTH_UA:
487 ret = meson_pinconf_get_drive_strength(pc, pin, &arg);
491 case PIN_CONFIG_OUTPUT_ENABLE:
492 ret = meson_pinconf_get_output(pc, pin);
497 case PIN_CONFIG_OUTPUT:
498 ret = meson_pinconf_get_output(pc, pin);
502 ret = meson_pinconf_get_drive(pc, pin);
513 *config = pinconf_to_config_packed(param, arg);
514 dev_dbg(pc->dev, "pinconf for pin %u is %lu\n", pin, *config);
519 static int meson_pinconf_group_set(struct pinctrl_dev *pcdev,
520 unsigned int num_group,
521 unsigned long *configs, unsigned num_configs)
523 struct meson_pinctrl *pc = pinctrl_dev_get_drvdata(pcdev);
524 struct meson_pmx_group *group = &pc->data->groups[num_group];
527 dev_dbg(pc->dev, "set pinconf for group %s\n", group->name);
529 for (i = 0; i < group->num_pins; i++) {
530 meson_pinconf_set(pcdev, group->pins[i], configs,
537 static int meson_pinconf_group_get(struct pinctrl_dev *pcdev,
538 unsigned int group, unsigned long *config)
543 static const struct pinconf_ops meson_pinconf_ops = {
544 .pin_config_get = meson_pinconf_get,
545 .pin_config_set = meson_pinconf_set,
546 .pin_config_group_get = meson_pinconf_group_get,
547 .pin_config_group_set = meson_pinconf_group_set,
551 static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
553 return meson_pinconf_set_output(gpiochip_get_data(chip), gpio, false);
556 static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,
559 return meson_pinconf_set_output_drive(gpiochip_get_data(chip),
563 static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)
565 meson_pinconf_set_drive(gpiochip_get_data(chip), gpio, value);
568 static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)
570 struct meson_pinctrl *pc = gpiochip_get_data(chip);
571 unsigned int reg, bit, val;
572 struct meson_bank *bank;
575 ret = meson_get_bank(pc, gpio, &bank);
579 meson_calc_reg_and_bit(bank, gpio, REG_IN, ®, &bit);
580 regmap_read(pc->reg_gpio, reg, &val);
582 return !!(val & BIT(bit));
585 static int meson_gpiolib_register(struct meson_pinctrl *pc)
589 pc->chip.label = pc->data->name;
590 pc->chip.parent = pc->dev;
591 pc->chip.request = gpiochip_generic_request;
592 pc->chip.free = gpiochip_generic_free;
593 pc->chip.direction_input = meson_gpio_direction_input;
594 pc->chip.direction_output = meson_gpio_direction_output;
595 pc->chip.get = meson_gpio_get;
596 pc->chip.set = meson_gpio_set;
598 pc->chip.ngpio = pc->data->num_pins;
599 pc->chip.can_sleep = false;
600 pc->chip.of_node = pc->of_node;
601 pc->chip.of_gpio_n_cells = 2;
603 ret = gpiochip_add_data(&pc->chip, pc);
605 dev_err(pc->dev, "can't add gpio chip %s\n",
613 static struct regmap_config meson_regmap_config = {
619 static struct regmap *meson_map_resource(struct meson_pinctrl *pc,
620 struct device_node *node, char *name)
626 i = of_property_match_string(node, "reg-names", name);
627 if (of_address_to_resource(node, i, &res))
628 return ERR_PTR(-ENOENT);
630 base = devm_ioremap_resource(pc->dev, &res);
632 return ERR_CAST(base);
634 meson_regmap_config.max_register = resource_size(&res) - 4;
635 meson_regmap_config.name = devm_kasprintf(pc->dev, GFP_KERNEL,
638 if (!meson_regmap_config.name)
639 return ERR_PTR(-ENOMEM);
641 return devm_regmap_init_mmio(pc->dev, base, &meson_regmap_config);
644 static int meson_pinctrl_parse_dt(struct meson_pinctrl *pc,
645 struct device_node *node)
647 struct device_node *np, *gpio_np = NULL;
649 for_each_child_of_node(node, np) {
650 if (!of_find_property(np, "gpio-controller", NULL))
653 dev_err(pc->dev, "multiple gpio nodes\n");
661 dev_err(pc->dev, "no gpio node found\n");
665 pc->of_node = gpio_np;
667 pc->reg_mux = meson_map_resource(pc, gpio_np, "mux");
668 if (IS_ERR(pc->reg_mux)) {
669 dev_err(pc->dev, "mux registers not found\n");
670 return PTR_ERR(pc->reg_mux);
673 pc->reg_gpio = meson_map_resource(pc, gpio_np, "gpio");
674 if (IS_ERR(pc->reg_gpio)) {
675 dev_err(pc->dev, "gpio registers not found\n");
676 return PTR_ERR(pc->reg_gpio);
679 pc->reg_pull = meson_map_resource(pc, gpio_np, "pull");
680 /* Use gpio region if pull one is not present */
681 if (IS_ERR(pc->reg_pull))
682 pc->reg_pull = pc->reg_gpio;
684 pc->reg_pullen = meson_map_resource(pc, gpio_np, "pull-enable");
685 /* Use pull region if pull-enable one is not present */
686 if (IS_ERR(pc->reg_pullen))
687 pc->reg_pullen = pc->reg_pull;
689 pc->reg_ds = meson_map_resource(pc, gpio_np, "ds");
690 if (IS_ERR(pc->reg_ds)) {
691 dev_dbg(pc->dev, "ds registers not found - skipping\n");
698 int meson_pinctrl_probe(struct platform_device *pdev)
700 struct device *dev = &pdev->dev;
701 struct meson_pinctrl *pc;
704 pc = devm_kzalloc(dev, sizeof(struct meson_pinctrl), GFP_KERNEL);
709 pc->data = (struct meson_pinctrl_data *) of_device_get_match_data(dev);
711 ret = meson_pinctrl_parse_dt(pc, dev->of_node);
715 pc->desc.name = "pinctrl-meson";
716 pc->desc.owner = THIS_MODULE;
717 pc->desc.pctlops = &meson_pctrl_ops;
718 pc->desc.pmxops = pc->data->pmx_ops;
719 pc->desc.confops = &meson_pinconf_ops;
720 pc->desc.pins = pc->data->pins;
721 pc->desc.npins = pc->data->num_pins;
723 pc->pcdev = devm_pinctrl_register(pc->dev, &pc->desc, pc);
724 if (IS_ERR(pc->pcdev)) {
725 dev_err(pc->dev, "can't register pinctrl device");
726 return PTR_ERR(pc->pcdev);
729 return meson_gpiolib_register(pc);