drivers/pinctrl/pinctrl-tz1090-pdc.c

   1 /*
   2  * Pinctrl driver for the Toumaz Xenif TZ1090 PowerDown Controller pins
   3  *
   4  * Copyright (c) 2013, Imagination Technologies Ltd.
   5  *
   6  * Derived from Tegra code:
   7  * Copyright (c) 2011-2012, NVIDIA CORPORATION.  All rights reserved.
   8  *
   9  * Derived from code:
  10  * Copyright (C) 2010 Google, Inc.
  11  * Copyright (C) 2010 NVIDIA Corporation
  12  * Copyright (C) 2009-2011 ST-Ericsson AB
  13  *
  14  * This program is free software; you can redistribute it and/or modify it
  15  * under the terms and conditions of the GNU General Public License,
  16  * version 2, as published by the Free Software Foundation.
  17  *
  18  * This program is distributed in the hope it will be useful, but WITHOUT
  19  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  20  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  21  * more details.
  22  */
  23
  24 #include <linux/bitops.h>
  25 #include <linux/io.h>
  26 #include <linux/module.h>
  27 #include <linux/of.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/pinctrl/machine.h>
  30 #include <linux/pinctrl/pinconf-generic.h>
  31 #include <linux/pinctrl/pinctrl.h>
  32 #include <linux/pinctrl/pinmux.h>
  33 #include <linux/slab.h>
  34
  35 /*
  36  * The registers may be shared with other threads/cores, so we need to use the
  37  * metag global lock2 for atomicity.
  38  */
  39 #include <asm/global_lock.h>
  40
  41 #include "core.h"
  42 #include "pinconf.h"
  43
  44 /* Register offsets from bank base address */
  45 #define REG_GPIO_CONTROL0       0x00
  46 #define REG_GPIO_CONTROL2       0x08
  47
  48 /* Register field information */
  49 #define REG_GPIO_CONTROL2_PU_PD_S       16
  50 #define REG_GPIO_CONTROL2_PDC_POS_S      4
  51 #define REG_GPIO_CONTROL2_PDC_DR_S       2
  52 #define REG_GPIO_CONTROL2_PDC_SR_S       1
  53 #define REG_GPIO_CONTROL2_PDC_SCHMITT_S  0
  54
  55 /* PU_PD field values */
  56 #define REG_PU_PD_TRISTATE      0
  57 #define REG_PU_PD_UP            1
  58 #define REG_PU_PD_DOWN          2
  59 #define REG_PU_PD_REPEATER      3
  60
  61 /* DR field values */
  62 #define REG_DR_2mA              0
  63 #define REG_DR_4mA              1
  64 #define REG_DR_8mA              2
  65 #define REG_DR_12mA             3
  66
  67 /**
  68  * struct tz1090_pdc_function - TZ1090 PDC pinctrl mux function
  69  * @name:       The name of the function, exported to pinctrl core.
  70  * @groups:     An array of pin groups that may select this function.
  71  * @ngroups:    The number of entries in @groups.
  72  */
  73 struct tz1090_pdc_function {
  74         const char              *name;
  75         const char * const      *groups;
  76         unsigned int            ngroups;
  77 };
  78
  79 /**
  80  * struct tz1090_pdc_pingroup - TZ1090 PDC pin group
  81  * @name:       Name of pin group.
  82  * @pins:       Array of pin numbers in this pin group.
  83  * @npins:      Number of pins in this pin group.
  84  * @func:       Function enabled by the mux.
  85  * @reg:        Mux register offset.
  86  * @bit:        Mux register bit.
  87  * @drv:        Drive control supported, otherwise it's a mux.
  88  *              This means Schmitt, Slew, and Drive strength.
  89  *
  90  * A representation of a group of pins (possibly just one pin) in the TZ1090
  91  * PDC pin controller. Each group allows some parameter or parameters to be
  92  * configured. The most common is mux function selection.
  93  */
  94 struct tz1090_pdc_pingroup {
  95         const char              *name;
  96         const unsigned int      *pins;
  97         unsigned int            npins;
  98         int                     func;
  99         u16                     reg;
 100         u8                      bit;
 101         bool                    drv;
 102 };
 103
 104 /*
 105  * All PDC pins can be GPIOs. Define these first to match how the GPIO driver
 106  * names/numbers its pins.
 107  */
 108
 109 enum tz1090_pdc_pin {
 110         TZ1090_PDC_PIN_GPIO0,
 111         TZ1090_PDC_PIN_GPIO1,
 112         TZ1090_PDC_PIN_SYS_WAKE0,
 113         TZ1090_PDC_PIN_SYS_WAKE1,
 114         TZ1090_PDC_PIN_SYS_WAKE2,
 115         TZ1090_PDC_PIN_IR_DATA,
 116         TZ1090_PDC_PIN_EXT_POWER,
 117 };
 118
 119 /* Pin names */
 120
 121 static const struct pinctrl_pin_desc tz1090_pdc_pins[] = {
 122         /* PDC GPIOs */
 123         PINCTRL_PIN(TZ1090_PDC_PIN_GPIO0,       "gpio0"),
 124         PINCTRL_PIN(TZ1090_PDC_PIN_GPIO1,       "gpio1"),
 125         PINCTRL_PIN(TZ1090_PDC_PIN_SYS_WAKE0,   "sys_wake0"),
 126         PINCTRL_PIN(TZ1090_PDC_PIN_SYS_WAKE1,   "sys_wake1"),
 127         PINCTRL_PIN(TZ1090_PDC_PIN_SYS_WAKE2,   "sys_wake2"),
 128         PINCTRL_PIN(TZ1090_PDC_PIN_IR_DATA,     "ir_data"),
 129         PINCTRL_PIN(TZ1090_PDC_PIN_EXT_POWER,   "ext_power"),
 130 };
 131
 132 /* Pin group pins */
 133
 134 static const unsigned int gpio0_pins[] = {
 135         TZ1090_PDC_PIN_GPIO0,
 136 };
 137
 138 static const unsigned int gpio1_pins[] = {
 139         TZ1090_PDC_PIN_GPIO1,
 140 };
 141
 142 static const unsigned int pdc_pins[] = {
 143         TZ1090_PDC_PIN_GPIO0,
 144         TZ1090_PDC_PIN_GPIO1,
 145         TZ1090_PDC_PIN_SYS_WAKE0,
 146         TZ1090_PDC_PIN_SYS_WAKE1,
 147         TZ1090_PDC_PIN_SYS_WAKE2,
 148         TZ1090_PDC_PIN_IR_DATA,
 149         TZ1090_PDC_PIN_EXT_POWER,
 150 };
 151
 152 /* Mux functions */
 153
 154 enum tz1090_pdc_mux {
 155         /* PDC_GPIO0 mux */
 156         TZ1090_PDC_MUX_IR_MOD_STABLE_OUT,
 157         /* PDC_GPIO1 mux */
 158         TZ1090_PDC_MUX_IR_MOD_POWER_OUT,
 159 };
 160
 161 /* Pin groups a function can be muxed to */
 162
 163 static const char * const gpio0_groups[] = {
 164         "gpio0",
 165 };
 166
 167 static const char * const gpio1_groups[] = {
 168         "gpio1",
 169 };
 170
 171 #define FUNCTION(mux, fname, group)                     \
 172         [(TZ1090_PDC_MUX_ ## mux)] = {                  \
 173                 .name = #fname,                         \
 174                 .groups = group##_groups,               \
 175                 .ngroups = ARRAY_SIZE(group##_groups),  \
 176         }
 177
 178 /* Must correlate with enum tz1090_pdc_mux */
 179 static const struct tz1090_pdc_function tz1090_pdc_functions[] = {
 180         /*       MUX                    fn                      pingroups */
 181         FUNCTION(IR_MOD_STABLE_OUT,     ir_mod_stable_out,      gpio0),
 182         FUNCTION(IR_MOD_POWER_OUT,      ir_mod_power_out,       gpio1),
 183 };
 184
 185 /**
 186  * MUX_PG() - Initialise a pin group with mux control
 187  * @pg_name:    Pin group name (stringified, _pins appended to get pins array)
 188  * @f0:         Function 0 (TZ1090_PDC_MUX_ is prepended)
 189  * @mux_r:      Mux register (REG_PINCTRL_ is prepended)
 190  * @mux_b:      Bit number in register of mux field
 191  */
 192 #define MUX_PG(pg_name, f0, mux_r, mux_b)                       \
 193         {                                                       \
 194                 .name = #pg_name,                               \
 195                 .pins = pg_name##_pins,                         \
 196                 .npins = ARRAY_SIZE(pg_name##_pins),            \
 197                 .func = TZ1090_PDC_MUX_ ## f0,                  \
 198                 .reg = (REG_ ## mux_r),                         \
 199                 .bit = (mux_b),                                 \
 200         }
 201
 202 /**
 203  * DRV_PG() - Initialise a pin group with drive control
 204  * @pg_name:    Pin group name (stringified, _pins appended to get pins array)
 205  */
 206 #define DRV_PG(pg_name)                         \
 207         {                                                       \
 208                 .name = #pg_name,                               \
 209                 .pins = pg_name##_pins,                         \
 210                 .npins = ARRAY_SIZE(pg_name##_pins),            \
 211                 .drv = true,                                    \
 212         }
 213
 214 static const struct tz1090_pdc_pingroup tz1090_pdc_groups[] = {
 215         /* Muxing pin groups */
 216         /*     pg_name, f0,                 mux register,  mux bit */
 217         MUX_PG(gpio0,   IR_MOD_STABLE_OUT,  GPIO_CONTROL0, 7),
 218         MUX_PG(gpio1,   IR_MOD_POWER_OUT,   GPIO_CONTROL0, 6),
 219
 220         /* Drive pin groups */
 221         /*     pg_name */
 222         DRV_PG(pdc),
 223 };
 224
 225 /**
 226  * struct tz1090_pdc_pmx - Private pinctrl data
 227  * @dev:        Platform device
 228  * @pctl:       Pin control device
 229  * @regs:       Register region
 230  * @lock:       Lock protecting coherency of mux_en and gpio_en
 231  * @mux_en:     Muxes that have been enabled
 232  * @gpio_en:    Muxable GPIOs that have been enabled
 233  */
 234 struct tz1090_pdc_pmx {
 235         struct device           *dev;
 236         struct pinctrl_dev      *pctl;
 237         void __iomem            *regs;
 238         spinlock_t              lock;
 239         u32                     mux_en;
 240         u32                     gpio_en;
 241 };
 242
 243 static inline u32 pmx_read(struct tz1090_pdc_pmx *pmx, u32 reg)
 244 {
 245         return ioread32(pmx->regs + reg);
 246 }
 247
 248 static inline void pmx_write(struct tz1090_pdc_pmx *pmx, u32 val, u32 reg)
 249 {
 250         iowrite32(val, pmx->regs + reg);
 251 }
 252
 253 /*
 254  * Pin control operations
 255  */
 256
 257 static int tz1090_pdc_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
 258 {
 259         return ARRAY_SIZE(tz1090_pdc_groups);
 260 }
 261
 262 static const char *tz1090_pdc_pinctrl_get_group_name(struct pinctrl_dev *pctl,
 263                                                      unsigned int group)
 264 {
 265         return tz1090_pdc_groups[group].name;
 266 }
 267
 268 static int tz1090_pdc_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
 269                                              unsigned int group,
 270                                              const unsigned int **pins,
 271                                              unsigned int *num_pins)
 272 {
 273         *pins = tz1090_pdc_groups[group].pins;
 274         *num_pins = tz1090_pdc_groups[group].npins;
 275
 276         return 0;
 277 }
 278
 279 #ifdef CONFIG_DEBUG_FS
 280 static void tz1090_pdc_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
 281                                             struct seq_file *s,
 282                                             unsigned int offset)
 283 {
 284         seq_printf(s, " %s", dev_name(pctldev->dev));
 285 }
 286 #endif
 287
 288 static int reserve_map(struct device *dev, struct pinctrl_map **map,
 289                        unsigned int *reserved_maps, unsigned int *num_maps,
 290                        unsigned int reserve)
 291 {
 292         unsigned int old_num = *reserved_maps;
 293         unsigned int new_num = *num_maps + reserve;
 294         struct pinctrl_map *new_map;
 295
 296         if (old_num >= new_num)
 297                 return 0;
 298
 299         new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
 300         if (!new_map) {
 301                 dev_err(dev, "krealloc(map) failed\n");
 302                 return -ENOMEM;
 303         }
 304
 305         memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
 306
 307         *map = new_map;
 308         *reserved_maps = new_num;
 309
 310         return 0;
 311 }
 312
 313 static int add_map_mux(struct pinctrl_map **map, unsigned int *reserved_maps,
 314                        unsigned int *num_maps, const char *group,
 315                        const char *function)
 316 {
 317         if (WARN_ON(*num_maps == *reserved_maps))
 318                 return -ENOSPC;
 319
 320         (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
 321         (*map)[*num_maps].data.mux.group = group;
 322         (*map)[*num_maps].data.mux.function = function;
 323         (*num_maps)++;
 324
 325         return 0;
 326 }
 327
 328 /**
 329  * get_group_selector() - returns the group selector for a group
 330  * @pin_group: the pin group to look up
 331  *
 332  * This is the same as pinctrl_get_group_selector except it doesn't produce an
 333  * error message if the group isn't found or debug messages.
 334  */
 335 static int get_group_selector(const char *pin_group)
 336 {
 337         unsigned int group;
 338
 339         for (group = 0; group < ARRAY_SIZE(tz1090_pdc_groups); ++group)
 340                 if (!strcmp(tz1090_pdc_groups[group].name, pin_group))
 341                         return group;
 342
 343         return -EINVAL;
 344 }
 345
 346 static int add_map_configs(struct device *dev,
 347                            struct pinctrl_map **map,
 348                            unsigned int *reserved_maps, unsigned int *num_maps,
 349                            const char *group, unsigned long *configs,
 350                            unsigned int num_configs)
 351 {
 352         unsigned long *dup_configs;
 353         enum pinctrl_map_type type;
 354
 355         if (WARN_ON(*num_maps == *reserved_maps))
 356                 return -ENOSPC;
 357
 358         dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
 359                               GFP_KERNEL);
 360         if (!dup_configs)
 361                 return -ENOMEM;
 362
 363         /*
 364          * We support both pins and pin groups, but we need to figure out which
 365          * one we have.
 366          */
 367         if (get_group_selector(group) >= 0)
 368                 type = PIN_MAP_TYPE_CONFIGS_GROUP;
 369         else
 370                 type = PIN_MAP_TYPE_CONFIGS_PIN;
 371         (*map)[*num_maps].type = type;
 372         (*map)[*num_maps].data.configs.group_or_pin = group;
 373         (*map)[*num_maps].data.configs.configs = dup_configs;
 374         (*map)[*num_maps].data.configs.num_configs = num_configs;
 375         (*num_maps)++;
 376
 377         return 0;
 378 }
 379
 380 static void tz1090_pdc_pinctrl_dt_free_map(struct pinctrl_dev *pctldev,
 381                                            struct pinctrl_map *map,
 382                                            unsigned int num_maps)
 383 {
 384         int i;
 385
 386         for (i = 0; i < num_maps; i++)
 387                 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
 388                         kfree(map[i].data.configs.configs);
 389
 390         kfree(map);
 391 }
 392
 393 static int tz1090_pdc_pinctrl_dt_subnode_to_map(struct device *dev,
 394                                                 struct device_node *np,
 395                                                 struct pinctrl_map **map,
 396                                                 unsigned int *reserved_maps,
 397                                                 unsigned int *num_maps)
 398 {
 399         int ret;
 400         const char *function;
 401         unsigned long *configs = NULL;
 402         unsigned int num_configs = 0;
 403         unsigned int reserve;
 404         struct property *prop;
 405         const char *group;
 406
 407         ret = of_property_read_string(np, "tz1090,function", &function);
 408         if (ret < 0) {
 409                 /* EINVAL=missing, which is fine since it's optional */
 410                 if (ret != -EINVAL)
 411                         dev_err(dev,
 412                                 "could not parse property function\n");
 413                 function = NULL;
 414         }
 415
 416         ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &num_configs);
 417         if (ret)
 418                 return ret;
 419
 420         reserve = 0;
 421         if (function != NULL)
 422                 reserve++;
 423         if (num_configs)
 424                 reserve++;
 425         ret = of_property_count_strings(np, "tz1090,pins");
 426         if (ret < 0) {
 427                 dev_err(dev, "could not parse property pins\n");
 428                 goto exit;
 429         }
 430         reserve *= ret;
 431
 432         ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
 433         if (ret < 0)
 434                 goto exit;
 435
 436         of_property_for_each_string(np, "tz1090,pins", prop, group) {
 437                 if (function) {
 438                         ret = add_map_mux(map, reserved_maps, num_maps,
 439                                           group, function);
 440                         if (ret < 0)
 441                                 goto exit;
 442                 }
 443
 444                 if (num_configs) {
 445                         ret = add_map_configs(dev, map, reserved_maps,
 446                                               num_maps, group, configs,
 447                                               num_configs);
 448                         if (ret < 0)
 449                                 goto exit;
 450                 }
 451         }
 452
 453         ret = 0;
 454
 455 exit:
 456         kfree(configs);
 457         return ret;
 458 }
 459
 460 static int tz1090_pdc_pinctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
 461                                              struct device_node *np_config,
 462                                              struct pinctrl_map **map,
 463                                              unsigned int *num_maps)
 464 {
 465         unsigned int reserved_maps;
 466         struct device_node *np;
 467         int ret;
 468
 469         reserved_maps = 0;
 470         *map = NULL;
 471         *num_maps = 0;
 472
 473         for_each_child_of_node(np_config, np) {
 474                 ret = tz1090_pdc_pinctrl_dt_subnode_to_map(pctldev->dev, np,
 475                                                            map, &reserved_maps,
 476                                                            num_maps);
 477                 if (ret < 0) {
 478                         tz1090_pdc_pinctrl_dt_free_map(pctldev, *map,
 479                                                        *num_maps);
 480                         return ret;
 481                 }
 482         }
 483
 484         return 0;
 485 }
 486
 487 static const struct pinctrl_ops tz1090_pdc_pinctrl_ops = {
 488         .get_groups_count       = tz1090_pdc_pinctrl_get_groups_count,
 489         .get_group_name         = tz1090_pdc_pinctrl_get_group_name,
 490         .get_group_pins         = tz1090_pdc_pinctrl_get_group_pins,
 491 #ifdef CONFIG_DEBUG_FS
 492         .pin_dbg_show           = tz1090_pdc_pinctrl_pin_dbg_show,
 493 #endif
 494         .dt_node_to_map         = tz1090_pdc_pinctrl_dt_node_to_map,
 495         .dt_free_map            = tz1090_pdc_pinctrl_dt_free_map,
 496 };
 497
 498 /*
 499  * Pin mux operations
 500  */
 501
 502 static int tz1090_pdc_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
 503 {
 504         return ARRAY_SIZE(tz1090_pdc_functions);
 505 }
 506
 507 static const char *tz1090_pdc_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
 508                                                     unsigned int function)
 509 {
 510         return tz1090_pdc_functions[function].name;
 511 }
 512
 513 static int tz1090_pdc_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
 514                                               unsigned int function,
 515                                               const char * const **groups,
 516                                               unsigned int * const num_groups)
 517 {
 518         *groups = tz1090_pdc_functions[function].groups;
 519         *num_groups = tz1090_pdc_functions[function].ngroups;
 520
 521         return 0;
 522 }
 523
 524 /**
 525  * tz1090_pdc_pinctrl_mux() - update mux bit
 526  * @pmx:                Pinmux data
 527  * @grp:                Pin mux group
 528  */
 529 static void tz1090_pdc_pinctrl_mux(struct tz1090_pdc_pmx *pmx,
 530                                    const struct tz1090_pdc_pingroup *grp)
 531 {
 532         u32 reg, select;
 533         unsigned int pin_shift = grp->pins[0];
 534         unsigned long flags;
 535
 536         /* select = mux && !gpio */
 537         select = ((pmx->mux_en & ~pmx->gpio_en) >> pin_shift) & 1;
 538
 539         /* set up the mux */
 540         __global_lock2(flags);
 541         reg = pmx_read(pmx, grp->reg);
 542         reg &= ~BIT(grp->bit);
 543         reg |= select << grp->bit;
 544         pmx_write(pmx, reg, grp->reg);
 545         __global_unlock2(flags);
 546 }
 547
 548 static int tz1090_pdc_pinctrl_set_mux(struct pinctrl_dev *pctldev,
 549                                       unsigned int function,
 550                                       unsigned int group)
 551 {
 552         struct tz1090_pdc_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 553         const struct tz1090_pdc_pingroup *grp = &tz1090_pdc_groups[group];
 554
 555         dev_dbg(pctldev->dev, "%s(func=%u (%s), group=%u (%s))\n",
 556                 __func__,
 557                 function, tz1090_pdc_functions[function].name,
 558                 group, tz1090_pdc_groups[group].name);
 559
 560         /* is it even a mux? */
 561         if (grp->drv)
 562                 return -EINVAL;
 563
 564         /* does this group even control the function? */
 565         if (function != grp->func)
 566                 return -EINVAL;
 567
 568         /* record the pin being muxed and update mux bit */
 569         spin_lock(&pmx->lock);
 570         pmx->mux_en |= BIT(grp->pins[0]);
 571         tz1090_pdc_pinctrl_mux(pmx, grp);
 572         spin_unlock(&pmx->lock);
 573         return 0;
 574 }
 575
 576 static const struct tz1090_pdc_pingroup *find_mux_group(
 577                                                 struct tz1090_pdc_pmx *pmx,
 578                                                 unsigned int pin)
 579 {
 580         const struct tz1090_pdc_pingroup *grp;
 581         unsigned int group;
 582
 583         grp = tz1090_pdc_groups;
 584         for (group = 0; group < ARRAY_SIZE(tz1090_pdc_groups); ++group, ++grp) {
 585                 /* only match muxes */
 586                 if (grp->drv)
 587                         continue;
 588
 589                 /* with a matching pin */
 590                 if (grp->pins[0] == pin)
 591                         return grp;
 592         }
 593
 594         return NULL;
 595 }
 596
 597 static int tz1090_pdc_pinctrl_gpio_request_enable(
 598                                         struct pinctrl_dev *pctldev,
 599                                         struct pinctrl_gpio_range *range,
 600                                         unsigned int pin)
 601 {
 602         struct tz1090_pdc_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 603         const struct tz1090_pdc_pingroup *grp = find_mux_group(pmx, pin);
 604
 605         if (grp) {
 606                 /* record the pin in GPIO use and update mux bit */
 607                 spin_lock(&pmx->lock);
 608                 pmx->gpio_en |= BIT(pin);
 609                 tz1090_pdc_pinctrl_mux(pmx, grp);
 610                 spin_unlock(&pmx->lock);
 611         }
 612         return 0;
 613 }
 614
 615 static void tz1090_pdc_pinctrl_gpio_disable_free(
 616                                         struct pinctrl_dev *pctldev,
 617                                         struct pinctrl_gpio_range *range,
 618                                         unsigned int pin)
 619 {
 620         struct tz1090_pdc_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 621         const struct tz1090_pdc_pingroup *grp = find_mux_group(pmx, pin);
 622
 623         if (grp) {
 624                 /* record the pin not in GPIO use and update mux bit */
 625                 spin_lock(&pmx->lock);
 626                 pmx->gpio_en &= ~BIT(pin);
 627                 tz1090_pdc_pinctrl_mux(pmx, grp);
 628                 spin_unlock(&pmx->lock);
 629         }
 630 }
 631
 632 static const struct pinmux_ops tz1090_pdc_pinmux_ops = {
 633         .get_functions_count    = tz1090_pdc_pinctrl_get_funcs_count,
 634         .get_function_name      = tz1090_pdc_pinctrl_get_func_name,
 635         .get_function_groups    = tz1090_pdc_pinctrl_get_func_groups,
 636         .set_mux                = tz1090_pdc_pinctrl_set_mux,
 637         .gpio_request_enable    = tz1090_pdc_pinctrl_gpio_request_enable,
 638         .gpio_disable_free      = tz1090_pdc_pinctrl_gpio_disable_free,
 639 };
 640
 641 /*
 642  * Pin config operations
 643  */
 644
 645 static int tz1090_pdc_pinconf_reg(struct pinctrl_dev *pctldev,
 646                                   unsigned int pin,
 647                                   enum pin_config_param param,
 648                                   bool report_err,
 649                                   u32 *reg, u32 *width, u32 *mask, u32 *shift,
 650                                   u32 *val)
 651 {
 652         /* Find information about parameter's register */
 653         switch (param) {
 654         case PIN_CONFIG_BIAS_DISABLE:
 655         case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
 656                 *val = REG_PU_PD_TRISTATE;
 657                 break;
 658         case PIN_CONFIG_BIAS_PULL_UP:
 659                 *val = REG_PU_PD_UP;
 660                 break;
 661         case PIN_CONFIG_BIAS_PULL_DOWN:
 662                 *val = REG_PU_PD_DOWN;
 663                 break;
 664         case PIN_CONFIG_BIAS_BUS_HOLD:
 665                 *val = REG_PU_PD_REPEATER;
 666                 break;
 667         default:
 668                 return -ENOTSUPP;
 669         }
 670
 671         /* Only input bias parameters supported */
 672         *reg = REG_GPIO_CONTROL2;
 673         *shift = REG_GPIO_CONTROL2_PU_PD_S + pin*2;
 674         *width = 2;
 675
 676         /* Calculate field information */
 677         *mask = (BIT(*width) - 1) << *shift;
 678
 679         return 0;
 680 }
 681
 682 static int tz1090_pdc_pinconf_get(struct pinctrl_dev *pctldev,
 683                                   unsigned int pin, unsigned long *config)
 684 {
 685         struct tz1090_pdc_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 686         enum pin_config_param param = pinconf_to_config_param(*config);
 687         int ret;
 688         u32 reg, width, mask, shift, val, tmp, arg;
 689
 690         /* Get register information */
 691         ret = tz1090_pdc_pinconf_reg(pctldev, pin, param, true,
 692                                      &reg, &width, &mask, &shift, &val);
 693         if (ret < 0)
 694                 return ret;
 695
 696         /* Extract field from register */
 697         tmp = pmx_read(pmx, reg);
 698         arg = ((tmp & mask) >> shift) == val;
 699
 700         /* Config not active */
 701         if (!arg)
 702                 return -EINVAL;
 703
 704         /* And pack config */
 705         *config = pinconf_to_config_packed(param, arg);
 706
 707         return 0;
 708 }
 709
 710 static int tz1090_pdc_pinconf_set(struct pinctrl_dev *pctldev,
 711                                   unsigned int pin, unsigned long *configs,
 712                                   unsigned num_configs)
 713 {
 714         struct tz1090_pdc_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 715         enum pin_config_param param;
 716         unsigned int arg;
 717         int ret;
 718         u32 reg, width, mask, shift, val, tmp;
 719         unsigned long flags;
 720         int i;
 721
 722         for (i = 0; i < num_configs; i++) {
 723                 param = pinconf_to_config_param(configs[i]);
 724                 arg = pinconf_to_config_argument(configs[i]);
 725
 726                 dev_dbg(pctldev->dev, "%s(pin=%s, config=%#lx)\n",
 727                         __func__, tz1090_pdc_pins[pin].name, configs[i]);
 728
 729                 /* Get register information */
 730                 ret = tz1090_pdc_pinconf_reg(pctldev, pin, param, true,
 731                                              &reg, &width, &mask, &shift, &val);
 732                 if (ret < 0)
 733                         return ret;
 734
 735                 /* Unpack argument and range check it */
 736                 if (arg > 1) {
 737                         dev_dbg(pctldev->dev, "%s: arg %u out of range\n",
 738                                 __func__, arg);
 739                         return -EINVAL;
 740                 }
 741
 742                 /* Write register field */
 743                 __global_lock2(flags);
 744                 tmp = pmx_read(pmx, reg);
 745                 tmp &= ~mask;
 746                 if (arg)
 747                         tmp |= val << shift;
 748                 pmx_write(pmx, tmp, reg);
 749                 __global_unlock2(flags);
 750         } /* for each config */
 751
 752         return 0;
 753 }
 754
 755 static const int tz1090_pdc_boolean_map[] = {
 756         [0]             = -EINVAL,
 757         [1]             = 1,
 758 };
 759
 760 static const int tz1090_pdc_dr_map[] = {
 761         [REG_DR_2mA]    = 2,
 762         [REG_DR_4mA]    = 4,
 763         [REG_DR_8mA]    = 8,
 764         [REG_DR_12mA]   = 12,
 765 };
 766
 767 static int tz1090_pdc_pinconf_group_reg(struct pinctrl_dev *pctldev,
 768                                         const struct tz1090_pdc_pingroup *g,
 769                                         enum pin_config_param param,
 770                                         bool report_err, u32 *reg, u32 *width,
 771                                         u32 *mask, u32 *shift, const int **map)
 772 {
 773         /* Drive configuration applies in groups, but not to all groups. */
 774         if (!g->drv) {
 775                 if (report_err)
 776                         dev_dbg(pctldev->dev,
 777                                 "%s: group %s has no drive control\n",
 778                                 __func__, g->name);
 779                 return -ENOTSUPP;
 780         }
 781
 782         /* Find information about drive parameter's register */
 783         *reg = REG_GPIO_CONTROL2;
 784         switch (param) {
 785         case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
 786                 *shift = REG_GPIO_CONTROL2_PDC_SCHMITT_S;
 787                 *width = 1;
 788                 *map = tz1090_pdc_boolean_map;
 789                 break;
 790         case PIN_CONFIG_DRIVE_STRENGTH:
 791                 *shift = REG_GPIO_CONTROL2_PDC_DR_S;
 792                 *width = 2;
 793                 *map = tz1090_pdc_dr_map;
 794                 break;
 795         case PIN_CONFIG_LOW_POWER_MODE:
 796                 *shift = REG_GPIO_CONTROL2_PDC_POS_S;
 797                 *width = 1;
 798                 *map = tz1090_pdc_boolean_map;
 799                 break;
 800         default:
 801                 return -ENOTSUPP;
 802         }
 803
 804         /* Calculate field information */
 805         *mask = (BIT(*width) - 1) << *shift;
 806
 807         return 0;
 808 }
 809
 810 static int tz1090_pdc_pinconf_group_get(struct pinctrl_dev *pctldev,
 811                                         unsigned int group,
 812                                         unsigned long *config)
 813 {
 814         struct tz1090_pdc_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 815         const struct tz1090_pdc_pingroup *g = &tz1090_pdc_groups[group];
 816         enum pin_config_param param = pinconf_to_config_param(*config);
 817         int ret, arg;
 818         u32 reg, width, mask, shift, val;
 819         const int *map;
 820
 821         /* Get register information */
 822         ret = tz1090_pdc_pinconf_group_reg(pctldev, g, param, true,
 823                                            &reg, &width, &mask, &shift, &map);
 824         if (ret < 0)
 825                 return ret;
 826
 827         /* Extract field from register */
 828         val = pmx_read(pmx, reg);
 829         arg = map[(val & mask) >> shift];
 830         if (arg < 0)
 831                 return arg;
 832
 833         /* And pack config */
 834         *config = pinconf_to_config_packed(param, arg);
 835
 836         return 0;
 837 }
 838
 839 static int tz1090_pdc_pinconf_group_set(struct pinctrl_dev *pctldev,
 840                                         unsigned int group,
 841                                         unsigned long *configs,
 842                                         unsigned num_configs)
 843 {
 844         struct tz1090_pdc_pmx *pmx = pinctrl_dev_get_drvdata(pctldev);
 845         const struct tz1090_pdc_pingroup *g = &tz1090_pdc_groups[group];
 846         enum pin_config_param param;
 847         const unsigned int *pit;
 848         unsigned int i;
 849         int ret, arg;
 850         u32 reg, width, mask, shift, val;
 851         unsigned long flags;
 852         const int *map;
 853         int j;
 854
 855         for (j = 0; j < num_configs; j++) {
 856                 param = pinconf_to_config_param(configs[j]);
 857
 858                 dev_dbg(pctldev->dev, "%s(group=%s, config=%#lx)\n",
 859                         __func__, g->name, configs[j]);
 860
 861                 /* Get register information */
 862                 ret = tz1090_pdc_pinconf_group_reg(pctldev, g, param, true,
 863                                                    &reg, &width, &mask, &shift,
 864                                                    &map);
 865                 if (ret < 0) {
 866                         /*
 867                          * Maybe we're trying to set a per-pin configuration
 868                          * of a group, so do the pins one by one. This is
 869                          * mainly as a convenience.
 870                          */
 871                         for (i = 0, pit = g->pins; i < g->npins; ++i, ++pit) {
 872                                 ret = tz1090_pdc_pinconf_set(pctldev, *pit,
 873                                         configs, num_configs);
 874                                 if (ret)
 875                                         return ret;
 876                         }
 877                         return 0;
 878                 }
 879
 880                 /* Unpack argument and map it to register value */
 881                 arg = pinconf_to_config_argument(configs[j]);
 882                 for (i = 0; i < BIT(width); ++i) {
 883                         if (map[i] == arg || (map[i] == -EINVAL && !arg)) {
 884                                 /* Write register field */
 885                                 __global_lock2(flags);
 886                                 val = pmx_read(pmx, reg);
 887                                 val &= ~mask;
 888                                 val |= i << shift;
 889                                 pmx_write(pmx, val, reg);
 890                                 __global_unlock2(flags);
 891                                 goto next_config;
 892                         }
 893                 }
 894
 895                 dev_dbg(pctldev->dev, "%s: arg %u not supported\n",
 896                         __func__, arg);
 897                 return 0;
 898
 899 next_config:
 900                 ;
 901         } /* for each config */
 902
 903         return 0;
 904 }
 905
 906 static const struct pinconf_ops tz1090_pdc_pinconf_ops = {
 907         .is_generic                     = true,
 908         .pin_config_get                 = tz1090_pdc_pinconf_get,
 909         .pin_config_set                 = tz1090_pdc_pinconf_set,
 910         .pin_config_group_get           = tz1090_pdc_pinconf_group_get,
 911         .pin_config_group_set           = tz1090_pdc_pinconf_group_set,
 912         .pin_config_config_dbg_show     = pinconf_generic_dump_config,
 913 };
 914
 915 /*
 916  * Pin control driver setup
 917  */
 918
 919 static struct pinctrl_desc tz1090_pdc_pinctrl_desc = {
 920         .pctlops        = &tz1090_pdc_pinctrl_ops,
 921         .pmxops         = &tz1090_pdc_pinmux_ops,
 922         .confops        = &tz1090_pdc_pinconf_ops,
 923         .owner          = THIS_MODULE,
 924 };
 925
 926 static int tz1090_pdc_pinctrl_probe(struct platform_device *pdev)
 927 {
 928         struct tz1090_pdc_pmx *pmx;
 929         struct resource *res;
 930
 931         pmx = devm_kzalloc(&pdev->dev, sizeof(*pmx), GFP_KERNEL);
 932         if (!pmx)
 933                 return -ENOMEM;
 934
 935         pmx->dev = &pdev->dev;
 936         spin_lock_init(&pmx->lock);
 937
 938         tz1090_pdc_pinctrl_desc.name = dev_name(&pdev->dev);
 939         tz1090_pdc_pinctrl_desc.pins = tz1090_pdc_pins;
 940         tz1090_pdc_pinctrl_desc.npins = ARRAY_SIZE(tz1090_pdc_pins);
 941
 942         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 943         pmx->regs = devm_ioremap_resource(&pdev->dev, res);
 944         if (IS_ERR(pmx->regs))
 945                 return PTR_ERR(pmx->regs);
 946
 947         pmx->pctl = devm_pinctrl_register(&pdev->dev, &tz1090_pdc_pinctrl_desc,
 948                                           pmx);
 949         if (IS_ERR(pmx->pctl)) {
 950                 dev_err(&pdev->dev, "Couldn't register pinctrl driver\n");
 951                 return PTR_ERR(pmx->pctl);
 952         }
 953
 954         platform_set_drvdata(pdev, pmx);
 955
 956         dev_info(&pdev->dev, "TZ1090 PDC pinctrl driver initialised\n");
 957
 958         return 0;
 959 }
 960
 961 static const struct of_device_id tz1090_pdc_pinctrl_of_match[] = {
 962         { .compatible = "img,tz1090-pdc-pinctrl", },
 963         { },
 964 };
 965
 966 static struct platform_driver tz1090_pdc_pinctrl_driver = {
 967         .driver = {
 968                 .name           = "tz1090-pdc-pinctrl",
 969                 .of_match_table = tz1090_pdc_pinctrl_of_match,
 970         },
 971         .probe  = tz1090_pdc_pinctrl_probe,
 972 };
 973
 974 static int __init tz1090_pdc_pinctrl_init(void)
 975 {
 976         return platform_driver_register(&tz1090_pdc_pinctrl_driver);
 977 }
 978 arch_initcall(tz1090_pdc_pinctrl_init);
 979
 980 static void __exit tz1090_pdc_pinctrl_exit(void)
 981 {
 982         platform_driver_unregister(&tz1090_pdc_pinctrl_driver);
 983 }
 984 module_exit(tz1090_pdc_pinctrl_exit);
 985
 986 MODULE_AUTHOR("Imagination Technologies Ltd.");
 987 MODULE_DESCRIPTION("Toumaz Xenif TZ1090 PDC pinctrl driver");
 988 MODULE_LICENSE("GPL v2");
 989 MODULE_DEVICE_TABLE(of, tz1090_pdc_pinctrl_of_match);