1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * pinmux driver shared headfile for CSR SiRFsoc
5 * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
8 #ifndef __PINMUX_SIRF_H__
9 #define __PINMUX_SIRF_H__
11 #define SIRFSOC_NUM_PADS 622
12 #define SIRFSOC_RSC_USB_UART_SHARE 0
13 #define SIRFSOC_RSC_PIN_MUX 0x4
15 #define SIRFSOC_GPIO_PAD_EN(g) ((g)*0x100 + 0x84)
16 #define SIRFSOC_GPIO_PAD_EN_CLR(g) ((g)*0x100 + 0x90)
17 #define SIRFSOC_GPIO_CTRL(g, i) ((g)*0x100 + (i)*4)
18 #define SIRFSOC_GPIO_DSP_EN0 (0x80)
19 #define SIRFSOC_GPIO_INT_STATUS(g) ((g)*0x100 + 0x8C)
21 #define SIRFSOC_GPIO_CTL_INTR_LOW_MASK 0x1
22 #define SIRFSOC_GPIO_CTL_INTR_HIGH_MASK 0x2
23 #define SIRFSOC_GPIO_CTL_INTR_TYPE_MASK 0x4
24 #define SIRFSOC_GPIO_CTL_INTR_EN_MASK 0x8
25 #define SIRFSOC_GPIO_CTL_INTR_STS_MASK 0x10
26 #define SIRFSOC_GPIO_CTL_OUT_EN_MASK 0x20
27 #define SIRFSOC_GPIO_CTL_DATAOUT_MASK 0x40
28 #define SIRFSOC_GPIO_CTL_DATAIN_MASK 0x80
29 #define SIRFSOC_GPIO_CTL_PULL_MASK 0x100
30 #define SIRFSOC_GPIO_CTL_PULL_HIGH 0x200
31 #define SIRFSOC_GPIO_CTL_DSP_INT 0x400
33 #define SIRFSOC_GPIO_NO_OF_BANKS 5
34 #define SIRFSOC_GPIO_BANK_SIZE 32
35 #define SIRFSOC_GPIO_NUM(bank, index) (((bank)*(32)) + (index))
38 * @dev: a pointer back to containing device
39 * @virtbase: the offset to the controller in virtual memory
43 struct pinctrl_dev *pmx;
44 void __iomem *gpio_virtbase;
45 void __iomem *rsc_virtbase;
46 u32 gpio_regs[SIRFSOC_GPIO_NO_OF_BANKS][SIRFSOC_GPIO_BANK_SIZE];
47 u32 ints_regs[SIRFSOC_GPIO_NO_OF_BANKS];
48 u32 paden_regs[SIRFSOC_GPIO_NO_OF_BANKS];
53 /* SIRFSOC_GPIO_PAD_EN set */
54 struct sirfsoc_muxmask {
59 struct sirfsoc_padmux {
60 unsigned long muxmask_counts;
61 const struct sirfsoc_muxmask *muxmask;
63 unsigned long ctrlreg;
64 unsigned long funcmask;
65 unsigned long funcval;
69 * struct sirfsoc_pin_group - describes a SiRFprimaII pin group
70 * @name: the name of this specific pin group
71 * @pins: an array of discrete physical pins used in this group, taken
72 * from the driver-local pin enumeration space
73 * @num_pins: the number of pins in this group array, i.e. the number of
74 * elements in .pins so we can iterate over that array
76 struct sirfsoc_pin_group {
78 const unsigned int *pins;
79 const unsigned num_pins;
82 #define SIRFSOC_PIN_GROUP(n, p) \
86 .num_pins = ARRAY_SIZE(p), \
89 struct sirfsoc_pmx_func {
91 const char * const *groups;
92 const unsigned num_groups;
93 const struct sirfsoc_padmux *padmux;
96 #define SIRFSOC_PMX_FUNCTION(n, g, m) \
100 .num_groups = ARRAY_SIZE(g), \
104 struct sirfsoc_pinctrl_data {
105 struct pinctrl_pin_desc *pads;
107 struct sirfsoc_pin_group *grps;
109 struct sirfsoc_pmx_func *funcs;
113 extern struct sirfsoc_pinctrl_data prima2_pinctrl_data;
114 extern struct sirfsoc_pinctrl_data atlas6_pinctrl_data;