1 // SPDX-License-Identifier: GPL-2.0-only
3 * Spreadtrum pin controller driver
4 * Copyright (C) 2017 Spreadtrum - http://www.spreadtrum.com
7 #include <linux/debugfs.h>
9 #include <linux/init.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pinctrl/machine.h>
17 #include <linux/pinctrl/pinconf.h>
18 #include <linux/pinctrl/pinconf-generic.h>
19 #include <linux/pinctrl/pinctrl.h>
20 #include <linux/pinctrl/pinmux.h>
21 #include <linux/slab.h>
24 #include "../pinmux.h"
25 #include "../pinconf.h"
26 #include "../pinctrl-utils.h"
27 #include "pinctrl-sprd.h"
29 #define PINCTRL_BIT_MASK(width) (~(~0UL << (width)))
30 #define PINCTRL_REG_OFFSET 0x20
31 #define PINCTRL_REG_MISC_OFFSET 0x4020
32 #define PINCTRL_REG_LEN 0x4
34 #define PIN_FUNC_MASK (BIT(4) | BIT(5))
35 #define PIN_FUNC_SEL_1 ~PIN_FUNC_MASK
36 #define PIN_FUNC_SEL_2 BIT(4)
37 #define PIN_FUNC_SEL_3 BIT(5)
38 #define PIN_FUNC_SEL_4 PIN_FUNC_MASK
40 #define AP_SLEEP_MODE BIT(13)
41 #define PUBCP_SLEEP_MODE BIT(14)
42 #define TGLDSP_SLEEP_MODE BIT(15)
43 #define AGDSP_SLEEP_MODE BIT(16)
44 #define SLEEP_MODE_MASK GENMASK(3, 0)
45 #define SLEEP_MODE_SHIFT 13
47 #define SLEEP_INPUT BIT(1)
48 #define SLEEP_INPUT_MASK 0x1
49 #define SLEEP_INPUT_SHIFT 1
51 #define SLEEP_OUTPUT BIT(0)
52 #define SLEEP_OUTPUT_MASK 0x1
53 #define SLEEP_OUTPUT_SHIFT 0
55 #define DRIVE_STRENGTH_MASK GENMASK(3, 0)
56 #define DRIVE_STRENGTH_SHIFT 19
58 #define SLEEP_PULL_DOWN BIT(2)
59 #define SLEEP_PULL_DOWN_MASK 0x1
60 #define SLEEP_PULL_DOWN_SHIFT 2
62 #define PULL_DOWN BIT(6)
63 #define PULL_DOWN_MASK 0x1
64 #define PULL_DOWN_SHIFT 6
66 #define SLEEP_PULL_UP BIT(3)
67 #define SLEEP_PULL_UP_MASK 0x1
68 #define SLEEP_PULL_UP_SHIFT 3
70 #define PULL_UP_20K (BIT(12) | BIT(7))
71 #define PULL_UP_4_7K BIT(12)
72 #define PULL_UP_MASK 0x21
73 #define PULL_UP_SHIFT 7
75 #define INPUT_SCHMITT BIT(11)
76 #define INPUT_SCHMITT_MASK 0x1
77 #define INPUT_SCHMITT_SHIFT 11
82 TGLDSP_SLEEP = BIT(2),
95 * struct sprd_pin: represent one pin's description
98 * @type: pin type, can be GLOBAL_CTRL_PIN/COMMON_PIN/MISC_PIN
99 * @reg: pin register address
100 * @bit_offset: bit offset in pin register
101 * @bit_width: bit width in pin register
108 unsigned long bit_offset;
109 unsigned long bit_width;
113 * struct sprd_pin_group: represent one group's description
115 * @npins: pin numbers of this group
116 * @pins: pointer to pins array
118 struct sprd_pin_group {
125 * struct sprd_pinctrl_soc_info: represent the SoC's pins description
126 * @groups: pointer to groups of pins
127 * @ngroups: group numbers of the whole SoC
128 * @pins: pointer to pins description
129 * @npins: pin numbers of the whole SoC
130 * @grp_names: pointer to group names array
132 struct sprd_pinctrl_soc_info {
133 struct sprd_pin_group *groups;
134 unsigned int ngroups;
135 struct sprd_pin *pins;
137 const char **grp_names;
141 * struct sprd_pinctrl: represent the pin controller device
142 * @dev: pointer to the device structure
143 * @pctl: pointer to the pinctrl handle
144 * @base: base address of the controller
145 * @info: pointer to SoC's pins description information
147 struct sprd_pinctrl {
149 struct pinctrl_dev *pctl;
151 struct sprd_pinctrl_soc_info *info;
154 #define SPRD_PIN_CONFIG_CONTROL (PIN_CONFIG_END + 1)
155 #define SPRD_PIN_CONFIG_SLEEP_MODE (PIN_CONFIG_END + 2)
157 static int sprd_pinctrl_get_id_by_name(struct sprd_pinctrl *sprd_pctl,
160 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
163 for (i = 0; i < info->npins; i++) {
164 if (!strcmp(info->pins[i].name, name))
165 return info->pins[i].number;
171 static struct sprd_pin *
172 sprd_pinctrl_get_pin_by_id(struct sprd_pinctrl *sprd_pctl, unsigned int id)
174 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
175 struct sprd_pin *pin = NULL;
178 for (i = 0; i < info->npins; i++) {
179 if (info->pins[i].number == id) {
180 pin = &info->pins[i];
188 static const struct sprd_pin_group *
189 sprd_pinctrl_find_group_by_name(struct sprd_pinctrl *sprd_pctl,
192 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
193 const struct sprd_pin_group *grp = NULL;
196 for (i = 0; i < info->ngroups; i++) {
197 if (!strcmp(info->groups[i].name, name)) {
198 grp = &info->groups[i];
206 static int sprd_pctrl_group_count(struct pinctrl_dev *pctldev)
208 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
209 struct sprd_pinctrl_soc_info *info = pctl->info;
211 return info->ngroups;
214 static const char *sprd_pctrl_group_name(struct pinctrl_dev *pctldev,
215 unsigned int selector)
217 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
218 struct sprd_pinctrl_soc_info *info = pctl->info;
220 return info->groups[selector].name;
223 static int sprd_pctrl_group_pins(struct pinctrl_dev *pctldev,
224 unsigned int selector,
225 const unsigned int **pins,
228 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
229 struct sprd_pinctrl_soc_info *info = pctl->info;
231 if (selector >= info->ngroups)
234 *pins = info->groups[selector].pins;
235 *npins = info->groups[selector].npins;
240 static int sprd_dt_node_to_map(struct pinctrl_dev *pctldev,
241 struct device_node *np,
242 struct pinctrl_map **map,
243 unsigned int *num_maps)
245 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
246 const struct sprd_pin_group *grp;
247 unsigned long *configs = NULL;
248 unsigned int num_configs = 0;
249 unsigned int reserved_maps = 0;
250 unsigned int reserve = 0;
251 const char *function;
252 enum pinctrl_map_type type;
255 grp = sprd_pinctrl_find_group_by_name(pctl, np->name);
257 dev_err(pctl->dev, "unable to find group for node %s\n",
258 of_node_full_name(np));
262 ret = of_property_count_strings(np, "pins");
267 type = PIN_MAP_TYPE_CONFIGS_PIN;
269 type = PIN_MAP_TYPE_CONFIGS_GROUP;
271 ret = of_property_read_string(np, "function", &function);
275 "%s: could not parse property function\n",
276 of_node_full_name(np));
280 ret = pinconf_generic_parse_dt_config(np, pctldev, &configs,
283 dev_err(pctl->dev, "%s: could not parse node property\n",
284 of_node_full_name(np));
291 if (function != NULL)
296 ret = pinctrl_utils_reserve_map(pctldev, map, &reserved_maps,
302 ret = pinctrl_utils_add_map_mux(pctldev, map,
303 &reserved_maps, num_maps,
304 grp->name, function);
310 const char *group_or_pin;
313 if (type == PIN_MAP_TYPE_CONFIGS_PIN) {
314 pin_id = grp->pins[0];
315 group_or_pin = pin_get_name(pctldev, pin_id);
317 group_or_pin = grp->name;
320 ret = pinctrl_utils_add_map_configs(pctldev, map,
321 &reserved_maps, num_maps,
322 group_or_pin, configs,
331 static void sprd_pctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
334 seq_printf(s, "%s", dev_name(pctldev->dev));
337 static const struct pinctrl_ops sprd_pctrl_ops = {
338 .get_groups_count = sprd_pctrl_group_count,
339 .get_group_name = sprd_pctrl_group_name,
340 .get_group_pins = sprd_pctrl_group_pins,
341 .pin_dbg_show = sprd_pctrl_dbg_show,
342 .dt_node_to_map = sprd_dt_node_to_map,
343 .dt_free_map = pinctrl_utils_free_map,
346 static int sprd_pmx_get_function_count(struct pinctrl_dev *pctldev)
351 static const char *sprd_pmx_get_function_name(struct pinctrl_dev *pctldev,
352 unsigned int selector)
368 static int sprd_pmx_get_function_groups(struct pinctrl_dev *pctldev,
369 unsigned int selector,
370 const char * const **groups,
371 unsigned int * const num_groups)
373 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
374 struct sprd_pinctrl_soc_info *info = pctl->info;
376 *groups = info->grp_names;
377 *num_groups = info->ngroups;
382 static int sprd_pmx_set_mux(struct pinctrl_dev *pctldev,
383 unsigned int func_selector,
384 unsigned int group_selector)
386 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
387 struct sprd_pinctrl_soc_info *info = pctl->info;
388 struct sprd_pin_group *grp = &info->groups[group_selector];
389 unsigned int i, grp_pins = grp->npins;
391 unsigned int val = 0;
393 if (group_selector >= info->ngroups)
396 switch (func_selector) {
398 val &= PIN_FUNC_SEL_1;
401 val |= PIN_FUNC_SEL_2;
404 val |= PIN_FUNC_SEL_3;
407 val |= PIN_FUNC_SEL_4;
413 for (i = 0; i < grp_pins; i++) {
414 unsigned int pin_id = grp->pins[i];
415 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
417 if (!pin || pin->type != COMMON_PIN)
420 reg = readl((void __iomem *)pin->reg);
421 reg &= ~PIN_FUNC_MASK;
423 writel(reg, (void __iomem *)pin->reg);
429 static const struct pinmux_ops sprd_pmx_ops = {
430 .get_functions_count = sprd_pmx_get_function_count,
431 .get_function_name = sprd_pmx_get_function_name,
432 .get_function_groups = sprd_pmx_get_function_groups,
433 .set_mux = sprd_pmx_set_mux,
436 static int sprd_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin_id,
437 unsigned long *config)
439 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
440 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
441 unsigned int param = pinconf_to_config_param(*config);
442 unsigned int reg, arg;
447 if (pin->type == GLOBAL_CTRL_PIN) {
448 reg = (readl((void __iomem *)pin->reg) >>
449 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
451 reg = readl((void __iomem *)pin->reg);
454 if (pin->type == GLOBAL_CTRL_PIN &&
455 param == SPRD_PIN_CONFIG_CONTROL) {
457 } else if (pin->type == COMMON_PIN) {
459 case SPRD_PIN_CONFIG_SLEEP_MODE:
460 arg = (reg >> SLEEP_MODE_SHIFT) & SLEEP_MODE_MASK;
462 case PIN_CONFIG_INPUT_ENABLE:
463 arg = (reg >> SLEEP_INPUT_SHIFT) & SLEEP_INPUT_MASK;
465 case PIN_CONFIG_OUTPUT:
466 arg = reg & SLEEP_OUTPUT_MASK;
468 case PIN_CONFIG_SLEEP_HARDWARE_STATE:
474 } else if (pin->type == MISC_PIN) {
476 case PIN_CONFIG_DRIVE_STRENGTH:
477 arg = (reg >> DRIVE_STRENGTH_SHIFT) &
480 case PIN_CONFIG_BIAS_PULL_DOWN:
481 /* combine sleep pull down and pull down config */
482 arg = ((reg >> SLEEP_PULL_DOWN_SHIFT) &
483 SLEEP_PULL_DOWN_MASK) << 16;
484 arg |= (reg >> PULL_DOWN_SHIFT) & PULL_DOWN_MASK;
486 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
487 arg = (reg >> INPUT_SCHMITT_SHIFT) & INPUT_SCHMITT_MASK;
489 case PIN_CONFIG_BIAS_PULL_UP:
490 /* combine sleep pull up and pull up config */
491 arg = ((reg >> SLEEP_PULL_UP_SHIFT) &
492 SLEEP_PULL_UP_MASK) << 16;
493 arg |= (reg >> PULL_UP_SHIFT) & PULL_UP_MASK;
495 case PIN_CONFIG_SLEEP_HARDWARE_STATE:
505 *config = pinconf_to_config_packed(param, arg);
509 static unsigned int sprd_pinconf_drive(unsigned int mA)
511 unsigned int val = 0;
523 val |= BIT(19) | BIT(20);
529 val |= BIT(21) | BIT(19);
532 val |= BIT(21) | BIT(20);
535 val |= BIT(19) | BIT(20) | BIT(21);
541 val |= BIT(22) | BIT(19);
544 val |= BIT(22) | BIT(20);
547 val |= BIT(22) | BIT(20) | BIT(19);
550 val |= BIT(22) | BIT(21);
553 val |= BIT(22) | BIT(21) | BIT(19);
556 val |= BIT(22) | BIT(21) | BIT(20);
559 val |= BIT(22) | BIT(21) | BIT(20) | BIT(19);
568 static bool sprd_pinctrl_check_sleep_config(unsigned long *configs,
569 unsigned int num_configs)
574 for (i = 0; i < num_configs; i++) {
575 param = pinconf_to_config_param(configs[i]);
576 if (param == PIN_CONFIG_SLEEP_HARDWARE_STATE)
583 static int sprd_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin_id,
584 unsigned long *configs, unsigned int num_configs)
586 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
587 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
588 bool is_sleep_config;
595 is_sleep_config = sprd_pinctrl_check_sleep_config(configs, num_configs);
597 for (i = 0; i < num_configs; i++) {
598 unsigned int param, arg, shift, mask, val;
600 param = pinconf_to_config_param(configs[i]);
601 arg = pinconf_to_config_argument(configs[i]);
606 if (pin->type == GLOBAL_CTRL_PIN &&
607 param == SPRD_PIN_CONFIG_CONTROL) {
609 } else if (pin->type == COMMON_PIN) {
611 case SPRD_PIN_CONFIG_SLEEP_MODE:
613 val |= AP_SLEEP_MODE;
614 if (arg & PUBCP_SLEEP)
615 val |= PUBCP_SLEEP_MODE;
616 if (arg & TGLDSP_SLEEP)
617 val |= TGLDSP_SLEEP_MODE;
618 if (arg & AGDSP_SLEEP)
619 val |= AGDSP_SLEEP_MODE;
621 mask = SLEEP_MODE_MASK;
622 shift = SLEEP_MODE_SHIFT;
624 case PIN_CONFIG_INPUT_ENABLE:
625 if (is_sleep_config == true) {
631 mask = SLEEP_INPUT_MASK;
632 shift = SLEEP_INPUT_SHIFT;
635 case PIN_CONFIG_OUTPUT:
636 if (is_sleep_config == true) {
638 mask = SLEEP_OUTPUT_MASK;
639 shift = SLEEP_OUTPUT_SHIFT;
642 case PIN_CONFIG_SLEEP_HARDWARE_STATE:
647 } else if (pin->type == MISC_PIN) {
649 case PIN_CONFIG_DRIVE_STRENGTH:
650 if (arg < 2 || arg > 60)
653 val = sprd_pinconf_drive(arg);
654 mask = DRIVE_STRENGTH_MASK;
655 shift = DRIVE_STRENGTH_SHIFT;
657 case PIN_CONFIG_BIAS_PULL_DOWN:
658 if (is_sleep_config == true) {
659 val |= SLEEP_PULL_DOWN;
660 mask = SLEEP_PULL_DOWN_MASK;
661 shift = SLEEP_PULL_DOWN_SHIFT;
664 mask = PULL_DOWN_MASK;
665 shift = PULL_DOWN_SHIFT;
668 case PIN_CONFIG_INPUT_SCHMITT_ENABLE:
670 val |= INPUT_SCHMITT;
672 val &= ~INPUT_SCHMITT;
674 mask = INPUT_SCHMITT_MASK;
675 shift = INPUT_SCHMITT_SHIFT;
677 case PIN_CONFIG_BIAS_PULL_UP:
678 if (is_sleep_config == true) {
679 val |= SLEEP_PULL_UP;
680 mask = SLEEP_PULL_UP_MASK;
681 shift = SLEEP_PULL_UP_SHIFT;
685 else if (arg == 4700)
689 shift = PULL_UP_SHIFT;
692 case PIN_CONFIG_SLEEP_HARDWARE_STATE:
701 if (pin->type == GLOBAL_CTRL_PIN) {
702 reg = readl((void __iomem *)pin->reg);
703 reg &= ~(PINCTRL_BIT_MASK(pin->bit_width)
705 reg |= (val & PINCTRL_BIT_MASK(pin->bit_width))
707 writel(reg, (void __iomem *)pin->reg);
709 reg = readl((void __iomem *)pin->reg);
710 reg &= ~(mask << shift);
712 writel(reg, (void __iomem *)pin->reg);
719 static int sprd_pinconf_group_get(struct pinctrl_dev *pctldev,
720 unsigned int selector, unsigned long *config)
722 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
723 struct sprd_pinctrl_soc_info *info = pctl->info;
724 struct sprd_pin_group *grp;
727 if (selector >= info->ngroups)
730 grp = &info->groups[selector];
731 pin_id = grp->pins[0];
733 return sprd_pinconf_get(pctldev, pin_id, config);
736 static int sprd_pinconf_group_set(struct pinctrl_dev *pctldev,
737 unsigned int selector,
738 unsigned long *configs,
739 unsigned int num_configs)
741 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
742 struct sprd_pinctrl_soc_info *info = pctl->info;
743 struct sprd_pin_group *grp;
746 if (selector >= info->ngroups)
749 grp = &info->groups[selector];
751 for (i = 0; i < grp->npins; i++) {
752 unsigned int pin_id = grp->pins[i];
754 ret = sprd_pinconf_set(pctldev, pin_id, configs, num_configs);
762 static int sprd_pinconf_get_config(struct pinctrl_dev *pctldev,
764 unsigned long *config)
766 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
767 struct sprd_pin *pin = sprd_pinctrl_get_pin_by_id(pctl, pin_id);
772 if (pin->type == GLOBAL_CTRL_PIN) {
773 *config = (readl((void __iomem *)pin->reg) >>
774 pin->bit_offset) & PINCTRL_BIT_MASK(pin->bit_width);
776 *config = readl((void __iomem *)pin->reg);
782 static void sprd_pinconf_dbg_show(struct pinctrl_dev *pctldev,
783 struct seq_file *s, unsigned int pin_id)
785 unsigned long config;
788 ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
792 seq_printf(s, "0x%lx", config);
795 static void sprd_pinconf_group_dbg_show(struct pinctrl_dev *pctldev,
797 unsigned int selector)
799 struct sprd_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
800 struct sprd_pinctrl_soc_info *info = pctl->info;
801 struct sprd_pin_group *grp;
802 unsigned long config;
806 if (selector >= info->ngroups)
809 grp = &info->groups[selector];
812 for (i = 0; i < grp->npins; i++, config++) {
813 unsigned int pin_id = grp->pins[i];
815 name = pin_get_name(pctldev, pin_id);
816 ret = sprd_pinconf_get_config(pctldev, pin_id, &config);
820 seq_printf(s, "%s: 0x%lx ", name, config);
824 static const struct pinconf_ops sprd_pinconf_ops = {
826 .pin_config_get = sprd_pinconf_get,
827 .pin_config_set = sprd_pinconf_set,
828 .pin_config_group_get = sprd_pinconf_group_get,
829 .pin_config_group_set = sprd_pinconf_group_set,
830 .pin_config_dbg_show = sprd_pinconf_dbg_show,
831 .pin_config_group_dbg_show = sprd_pinconf_group_dbg_show,
834 static const struct pinconf_generic_params sprd_dt_params[] = {
835 {"sprd,control", SPRD_PIN_CONFIG_CONTROL, 0},
836 {"sprd,sleep-mode", SPRD_PIN_CONFIG_SLEEP_MODE, 0},
839 #ifdef CONFIG_DEBUG_FS
840 static const struct pin_config_item sprd_conf_items[] = {
841 PCONFDUMP(SPRD_PIN_CONFIG_CONTROL, "global control", NULL, true),
842 PCONFDUMP(SPRD_PIN_CONFIG_SLEEP_MODE, "sleep mode", NULL, true),
846 static struct pinctrl_desc sprd_pinctrl_desc = {
847 .pctlops = &sprd_pctrl_ops,
848 .pmxops = &sprd_pmx_ops,
849 .confops = &sprd_pinconf_ops,
850 .num_custom_params = ARRAY_SIZE(sprd_dt_params),
851 .custom_params = sprd_dt_params,
852 #ifdef CONFIG_DEBUG_FS
853 .custom_conf_items = sprd_conf_items,
855 .owner = THIS_MODULE,
858 static int sprd_pinctrl_parse_groups(struct device_node *np,
859 struct sprd_pinctrl *sprd_pctl,
860 struct sprd_pin_group *grp)
862 struct property *prop;
863 const char *pin_name;
866 ret = of_property_count_strings(np, "pins");
870 grp->name = np->name;
872 grp->pins = devm_kcalloc(sprd_pctl->dev,
873 grp->npins, sizeof(unsigned int),
878 of_property_for_each_string(np, "pins", prop, pin_name) {
879 ret = sprd_pinctrl_get_id_by_name(sprd_pctl, pin_name);
881 grp->pins[i++] = ret;
884 for (i = 0; i < grp->npins; i++) {
885 dev_dbg(sprd_pctl->dev,
886 "Group[%s] contains [%d] pins: id = %d\n",
887 grp->name, grp->npins, grp->pins[i]);
893 static unsigned int sprd_pinctrl_get_groups(struct device_node *np)
895 struct device_node *child;
896 unsigned int group_cnt, cnt;
898 group_cnt = of_get_child_count(np);
900 for_each_child_of_node(np, child) {
901 cnt = of_get_child_count(child);
909 static int sprd_pinctrl_parse_dt(struct sprd_pinctrl *sprd_pctl)
911 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
912 struct device_node *np = sprd_pctl->dev->of_node;
913 struct device_node *child, *sub_child;
914 struct sprd_pin_group *grp;
921 info->ngroups = sprd_pinctrl_get_groups(np);
925 info->groups = devm_kcalloc(sprd_pctl->dev,
927 sizeof(struct sprd_pin_group),
932 info->grp_names = devm_kcalloc(sprd_pctl->dev,
933 info->ngroups, sizeof(char *),
935 if (!info->grp_names)
938 temp = info->grp_names;
941 for_each_child_of_node(np, child) {
942 ret = sprd_pinctrl_parse_groups(child, sprd_pctl, grp);
949 if (of_get_child_count(child) > 0) {
950 for_each_child_of_node(child, sub_child) {
951 ret = sprd_pinctrl_parse_groups(sub_child,
965 static int sprd_pinctrl_add_pins(struct sprd_pinctrl *sprd_pctl,
966 struct sprd_pins_info *sprd_soc_pin_info,
969 struct sprd_pinctrl_soc_info *info = sprd_pctl->info;
970 unsigned int ctrl_pin = 0, com_pin = 0;
971 struct sprd_pin *pin;
974 info->npins = pins_cnt;
975 info->pins = devm_kcalloc(sprd_pctl->dev,
976 info->npins, sizeof(struct sprd_pin),
981 for (i = 0, pin = info->pins; i < info->npins; i++, pin++) {
984 pin->name = sprd_soc_pin_info[i].name;
985 pin->type = sprd_soc_pin_info[i].type;
986 pin->number = sprd_soc_pin_info[i].num;
987 reg = sprd_soc_pin_info[i].reg;
988 if (pin->type == GLOBAL_CTRL_PIN) {
989 pin->reg = (unsigned long)sprd_pctl->base +
990 PINCTRL_REG_LEN * reg;
991 pin->bit_offset = sprd_soc_pin_info[i].bit_offset;
992 pin->bit_width = sprd_soc_pin_info[i].bit_width;
994 } else if (pin->type == COMMON_PIN) {
995 pin->reg = (unsigned long)sprd_pctl->base +
996 PINCTRL_REG_OFFSET + PINCTRL_REG_LEN *
999 } else if (pin->type == MISC_PIN) {
1000 pin->reg = (unsigned long)sprd_pctl->base +
1001 PINCTRL_REG_MISC_OFFSET + PINCTRL_REG_LEN *
1002 (i - ctrl_pin - com_pin);
1006 for (i = 0, pin = info->pins; i < info->npins; pin++, i++) {
1007 dev_dbg(sprd_pctl->dev, "pin name[%s-%d], type = %d, "
1008 "bit offset = %ld, bit width = %ld, reg = 0x%lx\n",
1009 pin->name, pin->number, pin->type,
1010 pin->bit_offset, pin->bit_width, pin->reg);
1016 int sprd_pinctrl_core_probe(struct platform_device *pdev,
1017 struct sprd_pins_info *sprd_soc_pin_info,
1020 struct sprd_pinctrl *sprd_pctl;
1021 struct sprd_pinctrl_soc_info *pinctrl_info;
1022 struct pinctrl_pin_desc *pin_desc;
1023 struct resource *res;
1026 sprd_pctl = devm_kzalloc(&pdev->dev, sizeof(struct sprd_pinctrl),
1031 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1032 sprd_pctl->base = devm_ioremap_resource(&pdev->dev, res);
1033 if (IS_ERR(sprd_pctl->base))
1034 return PTR_ERR(sprd_pctl->base);
1036 pinctrl_info = devm_kzalloc(&pdev->dev,
1037 sizeof(struct sprd_pinctrl_soc_info),
1042 sprd_pctl->info = pinctrl_info;
1043 sprd_pctl->dev = &pdev->dev;
1044 platform_set_drvdata(pdev, sprd_pctl);
1046 ret = sprd_pinctrl_add_pins(sprd_pctl, sprd_soc_pin_info, pins_cnt);
1048 dev_err(&pdev->dev, "fail to add pins information\n");
1052 ret = sprd_pinctrl_parse_dt(sprd_pctl);
1054 dev_err(&pdev->dev, "fail to parse dt properties\n");
1058 pin_desc = devm_kcalloc(&pdev->dev,
1059 pinctrl_info->npins,
1060 sizeof(struct pinctrl_pin_desc),
1065 for (i = 0; i < pinctrl_info->npins; i++) {
1066 pin_desc[i].number = pinctrl_info->pins[i].number;
1067 pin_desc[i].name = pinctrl_info->pins[i].name;
1068 pin_desc[i].drv_data = pinctrl_info;
1071 sprd_pinctrl_desc.pins = pin_desc;
1072 sprd_pinctrl_desc.name = dev_name(&pdev->dev);
1073 sprd_pinctrl_desc.npins = pinctrl_info->npins;
1075 sprd_pctl->pctl = pinctrl_register(&sprd_pinctrl_desc,
1076 &pdev->dev, (void *)sprd_pctl);
1077 if (IS_ERR(sprd_pctl->pctl)) {
1078 dev_err(&pdev->dev, "could not register pinctrl driver\n");
1079 return PTR_ERR(sprd_pctl->pctl);
1085 int sprd_pinctrl_remove(struct platform_device *pdev)
1087 struct sprd_pinctrl *sprd_pctl = platform_get_drvdata(pdev);
1089 pinctrl_unregister(sprd_pctl->pctl);
1093 void sprd_pinctrl_shutdown(struct platform_device *pdev)
1095 struct pinctrl *pinctl;
1096 struct pinctrl_state *state;
1098 pinctl = devm_pinctrl_get(&pdev->dev);
1101 state = pinctrl_lookup_state(pinctl, "shutdown");
1104 pinctrl_select_state(pinctl, state);
1107 MODULE_DESCRIPTION("SPREADTRUM Pin Controller Driver");
1108 MODULE_AUTHOR("Baolin Wang <baolin.wang@spreadtrum.com>");
1109 MODULE_LICENSE("GPL v2");