1 // SPDX-License-Identifier: GPL-2.0
2 // SPI interface for ChromeOS Embedded Controller
4 // Copyright (C) 2012 Google, Inc
6 #include <linux/delay.h>
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/mfd/cros_ec.h>
10 #include <linux/mfd/cros_ec_commands.h>
12 #include <linux/platform_device.h>
13 #include <linux/slab.h>
14 #include <linux/spi/spi.h>
17 /* The header byte, which follows the preamble */
18 #define EC_MSG_HEADER 0xec
21 * Number of EC preamble bytes we read at a time. Since it takes
22 * about 400-500us for the EC to respond there is not a lot of
23 * point in tuning this. If the EC could respond faster then
24 * we could increase this so that might expect the preamble and
25 * message to occur in a single transaction. However, the maximum
26 * SPI transfer size is 256 bytes, so at 5MHz we need a response
27 * time of perhaps <320us (200 bytes / 1600 bits).
29 #define EC_MSG_PREAMBLE_COUNT 32
32 * Allow for a long time for the EC to respond. We support i2c
33 * tunneling and support fairly long messages for the tunnel (249
34 * bytes long at the moment). If we're talking to a 100 kHz device
35 * on the other end and need to transfer ~256 bytes, then we need:
36 * 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
38 * We'll wait 8 times that to handle clock stretching and other
39 * paranoia. Note that some battery gas gauge ICs claim to have a
40 * clock stretch of 144ms in rare situations. That's incentive for
41 * not directly passing i2c through, but it's too late for that for
44 * It's pretty unlikely that we'll really see a 249 byte tunnel in
45 * anything other than testing. If this was more common we might
46 * consider having slow commands like this require a GET_STATUS
47 * wait loop. The 'flash write' command would be another candidate
48 * for this, clocking in at 2-3ms.
50 #define EC_MSG_DEADLINE_MS 200
53 * Time between raising the SPI chip select (for the end of a
54 * transaction) and dropping it again (for the next transaction).
55 * If we go too fast, the EC will miss the transaction. We know that we
56 * need at least 70 us with the 16 MHz STM32 EC, so go with 200 us to be
59 #define EC_SPI_RECOVERY_TIME_NS (200 * 1000)
62 * struct cros_ec_spi - information about a SPI-connected EC
64 * @spi: SPI device we are connected to
65 * @last_transfer_ns: time that we last finished a transfer.
66 * @start_of_msg_delay: used to set the delay_usecs on the spi_transfer that
67 * is sent when we want to turn on CS at the start of a transaction.
68 * @end_of_msg_delay: used to set the delay_usecs on the spi_transfer that
69 * is sent when we want to turn off CS at the end of a transaction.
72 struct spi_device *spi;
74 unsigned int start_of_msg_delay;
75 unsigned int end_of_msg_delay;
78 static void debug_packet(struct device *dev, const char *name, u8 *ptr,
84 dev_dbg(dev, "%s: ", name);
85 for (i = 0; i < len; i++)
86 pr_cont(" %02x", ptr[i]);
92 static int terminate_request(struct cros_ec_device *ec_dev)
94 struct cros_ec_spi *ec_spi = ec_dev->priv;
95 struct spi_message msg;
96 struct spi_transfer trans;
100 * Turn off CS, possibly adding a delay to ensure the rising edge
101 * doesn't come too soon after the end of the data.
103 spi_message_init(&msg);
104 memset(&trans, 0, sizeof(trans));
105 trans.delay_usecs = ec_spi->end_of_msg_delay;
106 spi_message_add_tail(&trans, &msg);
108 ret = spi_sync_locked(ec_spi->spi, &msg);
110 /* Reset end-of-response timer */
111 ec_spi->last_transfer_ns = ktime_get_ns();
114 "cs-deassert spi transfer failed: %d\n",
122 * receive_n_bytes - receive n bytes from the EC.
124 * Assumes buf is a pointer into the ec_dev->din buffer
126 static int receive_n_bytes(struct cros_ec_device *ec_dev, u8 *buf, int n)
128 struct cros_ec_spi *ec_spi = ec_dev->priv;
129 struct spi_transfer trans;
130 struct spi_message msg;
133 BUG_ON(buf - ec_dev->din + n > ec_dev->din_size);
135 memset(&trans, 0, sizeof(trans));
140 spi_message_init(&msg);
141 spi_message_add_tail(&trans, &msg);
142 ret = spi_sync_locked(ec_spi->spi, &msg);
144 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
150 * cros_ec_spi_receive_packet - Receive a packet from the EC.
152 * This function has two phases: reading the preamble bytes (since if we read
153 * data from the EC before it is ready to send, we just get preamble) and
154 * reading the actual message.
156 * The received data is placed into ec_dev->din.
158 * @ec_dev: ChromeOS EC device
159 * @need_len: Number of message bytes we need to read
161 static int cros_ec_spi_receive_packet(struct cros_ec_device *ec_dev,
164 struct ec_host_response *response;
167 unsigned long deadline;
170 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
172 /* Receive data until we see the header byte */
173 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
175 unsigned long start_jiffies = jiffies;
177 ret = receive_n_bytes(ec_dev,
179 EC_MSG_PREAMBLE_COUNT);
184 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
185 if (*ptr == EC_SPI_FRAME_START) {
186 dev_dbg(ec_dev->dev, "msg found at %zd\n",
195 * Use the time at the start of the loop as a timeout. This
196 * gives us one last shot at getting the transfer and is useful
197 * in case we got context switched out for a while.
199 if (time_after(start_jiffies, deadline)) {
200 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
206 * ptr now points to the header byte. Copy any valid data to the
207 * start of our buffer
210 BUG_ON(todo < 0 || todo > ec_dev->din_size);
211 todo = min(todo, need_len);
212 memmove(ec_dev->din, ptr, todo);
213 ptr = ec_dev->din + todo;
214 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
218 /* If the entire response struct wasn't read, get the rest of it. */
219 if (todo < sizeof(*response)) {
220 ret = receive_n_bytes(ec_dev, ptr, sizeof(*response) - todo);
223 ptr += (sizeof(*response) - todo);
224 todo = sizeof(*response);
227 response = (struct ec_host_response *)ec_dev->din;
229 /* Abort if data_len is too large. */
230 if (response->data_len > ec_dev->din_size)
233 /* Receive data until we have it all */
234 while (need_len > 0) {
236 * We can't support transfers larger than the SPI FIFO size
237 * unless we have DMA. We don't have DMA on the ISP SPI ports
238 * for Exynos. We need a way of asking SPI driver for
239 * maximum-supported transfer size.
241 todo = min(need_len, 256);
242 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
243 todo, need_len, ptr - ec_dev->din);
245 ret = receive_n_bytes(ec_dev, ptr, todo);
253 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
259 * cros_ec_spi_receive_response - Receive a response from the EC.
261 * This function has two phases: reading the preamble bytes (since if we read
262 * data from the EC before it is ready to send, we just get preamble) and
263 * reading the actual message.
265 * The received data is placed into ec_dev->din.
267 * @ec_dev: ChromeOS EC device
268 * @need_len: Number of message bytes we need to read
270 static int cros_ec_spi_receive_response(struct cros_ec_device *ec_dev,
275 unsigned long deadline;
278 BUG_ON(ec_dev->din_size < EC_MSG_PREAMBLE_COUNT);
280 /* Receive data until we see the header byte */
281 deadline = jiffies + msecs_to_jiffies(EC_MSG_DEADLINE_MS);
283 unsigned long start_jiffies = jiffies;
285 ret = receive_n_bytes(ec_dev,
287 EC_MSG_PREAMBLE_COUNT);
292 for (end = ptr + EC_MSG_PREAMBLE_COUNT; ptr != end; ptr++) {
293 if (*ptr == EC_SPI_FRAME_START) {
294 dev_dbg(ec_dev->dev, "msg found at %zd\n",
303 * Use the time at the start of the loop as a timeout. This
304 * gives us one last shot at getting the transfer and is useful
305 * in case we got context switched out for a while.
307 if (time_after(start_jiffies, deadline)) {
308 dev_warn(ec_dev->dev, "EC failed to respond in time\n");
314 * ptr now points to the header byte. Copy any valid data to the
315 * start of our buffer
318 BUG_ON(todo < 0 || todo > ec_dev->din_size);
319 todo = min(todo, need_len);
320 memmove(ec_dev->din, ptr, todo);
321 ptr = ec_dev->din + todo;
322 dev_dbg(ec_dev->dev, "need %d, got %d bytes from preamble\n",
326 /* Receive data until we have it all */
327 while (need_len > 0) {
329 * We can't support transfers larger than the SPI FIFO size
330 * unless we have DMA. We don't have DMA on the ISP SPI ports
331 * for Exynos. We need a way of asking SPI driver for
332 * maximum-supported transfer size.
334 todo = min(need_len, 256);
335 dev_dbg(ec_dev->dev, "loop, todo=%d, need_len=%d, ptr=%zd\n",
336 todo, need_len, ptr - ec_dev->din);
338 ret = receive_n_bytes(ec_dev, ptr, todo);
342 debug_packet(ec_dev->dev, "interim", ptr, todo);
347 dev_dbg(ec_dev->dev, "loop done, ptr=%zd\n", ptr - ec_dev->din);
353 * cros_ec_pkt_xfer_spi - Transfer a packet over SPI and receive the reply
355 * @ec_dev: ChromeOS EC device
356 * @ec_msg: Message to transfer
358 static int cros_ec_pkt_xfer_spi(struct cros_ec_device *ec_dev,
359 struct cros_ec_command *ec_msg)
361 struct ec_host_response *response;
362 struct cros_ec_spi *ec_spi = ec_dev->priv;
363 struct spi_transfer trans, trans_delay;
364 struct spi_message msg;
370 int ret = 0, final_ret;
373 len = cros_ec_prepare_tx(ec_dev, ec_msg);
374 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
376 /* If it's too soon to do another transaction, wait */
377 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
378 if (delay < EC_SPI_RECOVERY_TIME_NS)
379 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
381 rx_buf = kzalloc(len, GFP_KERNEL);
385 spi_bus_lock(ec_spi->spi->master);
388 * Leave a gap between CS assertion and clocking of data to allow the
391 spi_message_init(&msg);
392 if (ec_spi->start_of_msg_delay) {
393 memset(&trans_delay, 0, sizeof(trans_delay));
394 trans_delay.delay_usecs = ec_spi->start_of_msg_delay;
395 spi_message_add_tail(&trans_delay, &msg);
398 /* Transmit phase - send our message */
399 memset(&trans, 0, sizeof(trans));
400 trans.tx_buf = ec_dev->dout;
401 trans.rx_buf = rx_buf;
404 spi_message_add_tail(&trans, &msg);
405 ret = spi_sync_locked(ec_spi->spi, &msg);
407 /* Get the response */
409 /* Verify that EC can process command */
410 for (i = 0; i < len; i++) {
413 * Seeing the PAST_END, RX_BAD_DATA, or NOT_READY
414 * markers are all signs that the EC didn't fully
415 * receive our command. e.g., if the EC is flashing
416 * itself, it can't respond to any commands and instead
417 * clocks out EC_SPI_PAST_END from its SPI hardware
418 * buffer. Similar occurrences can happen if the AP is
419 * too slow to clock out data after asserting CS -- the
420 * EC will abort and fill its buffer with
421 * EC_SPI_RX_BAD_DATA.
423 * In all cases, these errors should be safe to retry.
424 * Report -EAGAIN and let the caller decide what to do
427 if (rx_byte == EC_SPI_PAST_END ||
428 rx_byte == EC_SPI_RX_BAD_DATA ||
429 rx_byte == EC_SPI_NOT_READY) {
437 ret = cros_ec_spi_receive_packet(ec_dev,
438 ec_msg->insize + sizeof(*response));
439 else if (ret != -EAGAIN)
440 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
442 final_ret = terminate_request(ec_dev);
444 spi_bus_unlock(ec_spi->spi->master);
453 /* check response error code */
454 response = (struct ec_host_response *)ptr;
455 ec_msg->result = response->result;
457 ret = cros_ec_check_result(ec_dev, ec_msg);
461 len = response->data_len;
463 if (len > ec_msg->insize) {
464 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
465 len, ec_msg->insize);
470 for (i = 0; i < sizeof(*response); i++)
473 /* copy response packet payload and compute checksum */
474 memcpy(ec_msg->data, ptr + sizeof(*response), len);
475 for (i = 0; i < len; i++)
476 sum += ec_msg->data[i];
480 "bad packet checksum, calculated %x\n",
489 if (ec_msg->command == EC_CMD_REBOOT_EC)
490 msleep(EC_REBOOT_DELAY_MS);
496 * cros_ec_cmd_xfer_spi - Transfer a message over SPI and receive the reply
498 * @ec_dev: ChromeOS EC device
499 * @ec_msg: Message to transfer
501 static int cros_ec_cmd_xfer_spi(struct cros_ec_device *ec_dev,
502 struct cros_ec_command *ec_msg)
504 struct cros_ec_spi *ec_spi = ec_dev->priv;
505 struct spi_transfer trans;
506 struct spi_message msg;
512 int ret = 0, final_ret;
515 len = cros_ec_prepare_tx(ec_dev, ec_msg);
516 dev_dbg(ec_dev->dev, "prepared, len=%d\n", len);
518 /* If it's too soon to do another transaction, wait */
519 delay = ktime_get_ns() - ec_spi->last_transfer_ns;
520 if (delay < EC_SPI_RECOVERY_TIME_NS)
521 ndelay(EC_SPI_RECOVERY_TIME_NS - delay);
523 rx_buf = kzalloc(len, GFP_KERNEL);
527 spi_bus_lock(ec_spi->spi->master);
529 /* Transmit phase - send our message */
530 debug_packet(ec_dev->dev, "out", ec_dev->dout, len);
531 memset(&trans, 0, sizeof(trans));
532 trans.tx_buf = ec_dev->dout;
533 trans.rx_buf = rx_buf;
536 spi_message_init(&msg);
537 spi_message_add_tail(&trans, &msg);
538 ret = spi_sync_locked(ec_spi->spi, &msg);
540 /* Get the response */
542 /* Verify that EC can process command */
543 for (i = 0; i < len; i++) {
545 /* See comments in cros_ec_pkt_xfer_spi() */
546 if (rx_byte == EC_SPI_PAST_END ||
547 rx_byte == EC_SPI_RX_BAD_DATA ||
548 rx_byte == EC_SPI_NOT_READY) {
556 ret = cros_ec_spi_receive_response(ec_dev,
557 ec_msg->insize + EC_MSG_TX_PROTO_BYTES);
558 else if (ret != -EAGAIN)
559 dev_err(ec_dev->dev, "spi transfer failed: %d\n", ret);
561 final_ret = terminate_request(ec_dev);
563 spi_bus_unlock(ec_spi->spi->master);
572 /* check response error code */
573 ec_msg->result = ptr[0];
574 ret = cros_ec_check_result(ec_dev, ec_msg);
579 sum = ptr[0] + ptr[1];
580 if (len > ec_msg->insize) {
581 dev_err(ec_dev->dev, "packet too long (%d bytes, expected %d)",
582 len, ec_msg->insize);
587 /* copy response packet payload and compute checksum */
588 for (i = 0; i < len; i++) {
591 ec_msg->data[i] = ptr[i + 2];
595 debug_packet(ec_dev->dev, "in", ptr, len + 3);
597 if (sum != ptr[len + 2]) {
599 "bad packet checksum, expected %02x, got %02x\n",
608 if (ec_msg->command == EC_CMD_REBOOT_EC)
609 msleep(EC_REBOOT_DELAY_MS);
614 static void cros_ec_spi_dt_probe(struct cros_ec_spi *ec_spi, struct device *dev)
616 struct device_node *np = dev->of_node;
620 ret = of_property_read_u32(np, "google,cros-ec-spi-pre-delay", &val);
622 ec_spi->start_of_msg_delay = val;
624 ret = of_property_read_u32(np, "google,cros-ec-spi-msg-delay", &val);
626 ec_spi->end_of_msg_delay = val;
629 static int cros_ec_spi_probe(struct spi_device *spi)
631 struct device *dev = &spi->dev;
632 struct cros_ec_device *ec_dev;
633 struct cros_ec_spi *ec_spi;
636 spi->bits_per_word = 8;
637 spi->mode = SPI_MODE_0;
638 err = spi_setup(spi);
642 ec_spi = devm_kzalloc(dev, sizeof(*ec_spi), GFP_KERNEL);
646 ec_dev = devm_kzalloc(dev, sizeof(*ec_dev), GFP_KERNEL);
650 /* Check for any DT properties */
651 cros_ec_spi_dt_probe(ec_spi, dev);
653 spi_set_drvdata(spi, ec_dev);
655 ec_dev->priv = ec_spi;
656 ec_dev->irq = spi->irq;
657 ec_dev->cmd_xfer = cros_ec_cmd_xfer_spi;
658 ec_dev->pkt_xfer = cros_ec_pkt_xfer_spi;
659 ec_dev->phys_name = dev_name(&ec_spi->spi->dev);
660 ec_dev->din_size = EC_MSG_PREAMBLE_COUNT +
661 sizeof(struct ec_host_response) +
662 sizeof(struct ec_response_get_protocol_info);
663 ec_dev->dout_size = sizeof(struct ec_host_request);
665 ec_spi->last_transfer_ns = ktime_get_ns();
667 err = cros_ec_register(ec_dev);
669 dev_err(dev, "cannot register EC\n");
673 device_init_wakeup(&spi->dev, true);
678 #ifdef CONFIG_PM_SLEEP
679 static int cros_ec_spi_suspend(struct device *dev)
681 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
683 return cros_ec_suspend(ec_dev);
686 static int cros_ec_spi_resume(struct device *dev)
688 struct cros_ec_device *ec_dev = dev_get_drvdata(dev);
690 return cros_ec_resume(ec_dev);
694 static SIMPLE_DEV_PM_OPS(cros_ec_spi_pm_ops, cros_ec_spi_suspend,
697 static const struct of_device_id cros_ec_spi_of_match[] = {
698 { .compatible = "google,cros-ec-spi", },
701 MODULE_DEVICE_TABLE(of, cros_ec_spi_of_match);
703 static const struct spi_device_id cros_ec_spi_id[] = {
704 { "cros-ec-spi", 0 },
707 MODULE_DEVICE_TABLE(spi, cros_ec_spi_id);
709 static struct spi_driver cros_ec_driver_spi = {
711 .name = "cros-ec-spi",
712 .of_match_table = of_match_ptr(cros_ec_spi_of_match),
713 .pm = &cros_ec_spi_pm_ops,
715 .probe = cros_ec_spi_probe,
716 .id_table = cros_ec_spi_id,
719 module_spi_driver(cros_ec_driver_spi);
721 MODULE_LICENSE("GPL v2");
722 MODULE_DESCRIPTION("SPI interface for ChromeOS Embedded Controller");