1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PTP 1588 clock using the IXP46X
5 * Copyright (C) 2010 OMICRON electronics GmbH
7 #include <linux/device.h>
9 #include <linux/gpio.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
13 #include <linux/irq.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
17 #include <linux/ptp_clock_kernel.h>
18 #include <mach/ixp46x_ts.h>
20 #define DRIVER "ptp_ixp46x"
28 struct ixp46x_ts_regs *regs;
29 struct ptp_clock *ptp_clock;
30 struct ptp_clock_info caps;
35 DEFINE_SPINLOCK(register_lock);
38 * Register access functions
41 static u64 ixp_systime_read(struct ixp46x_ts_regs *regs)
46 lo = __raw_readl(®s->systime_lo);
47 hi = __raw_readl(®s->systime_hi);
49 ns = ((u64) hi) << 32;
51 ns <<= TICKS_NS_SHIFT;
56 static void ixp_systime_write(struct ixp46x_ts_regs *regs, u64 ns)
60 ns >>= TICKS_NS_SHIFT;
64 __raw_writel(lo, ®s->systime_lo);
65 __raw_writel(hi, ®s->systime_hi);
69 * Interrupt service routine
72 static irqreturn_t isr(int irq, void *priv)
74 struct ixp_clock *ixp_clock = priv;
75 struct ixp46x_ts_regs *regs = ixp_clock->regs;
76 struct ptp_clock_event event;
77 u32 ack = 0, lo, hi, val;
79 val = __raw_readl(®s->event);
83 if (ixp_clock->exts0_enabled) {
84 hi = __raw_readl(®s->asms_hi);
85 lo = __raw_readl(®s->asms_lo);
86 event.type = PTP_CLOCK_EXTTS;
88 event.timestamp = ((u64) hi) << 32;
89 event.timestamp |= lo;
90 event.timestamp <<= TICKS_NS_SHIFT;
91 ptp_clock_event(ixp_clock->ptp_clock, &event);
97 if (ixp_clock->exts1_enabled) {
98 hi = __raw_readl(®s->amms_hi);
99 lo = __raw_readl(®s->amms_lo);
100 event.type = PTP_CLOCK_EXTTS;
102 event.timestamp = ((u64) hi) << 32;
103 event.timestamp |= lo;
104 event.timestamp <<= TICKS_NS_SHIFT;
105 ptp_clock_event(ixp_clock->ptp_clock, &event);
110 ack |= TTIPEND; /* this bit seems to be always set */
113 __raw_writel(ack, ®s->event);
120 * PTP clock operations
123 static int ptp_ixp_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
128 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
129 struct ixp46x_ts_regs *regs = ixp_clock->regs;
135 addend = DEFAULT_ADDEND;
138 diff = div_u64(adj, 1000000000ULL);
140 addend = neg_adj ? addend - diff : addend + diff;
142 __raw_writel(addend, ®s->addend);
147 static int ptp_ixp_adjtime(struct ptp_clock_info *ptp, s64 delta)
151 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
152 struct ixp46x_ts_regs *regs = ixp_clock->regs;
154 spin_lock_irqsave(®ister_lock, flags);
156 now = ixp_systime_read(regs);
158 ixp_systime_write(regs, now);
160 spin_unlock_irqrestore(®ister_lock, flags);
165 static int ptp_ixp_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts)
169 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
170 struct ixp46x_ts_regs *regs = ixp_clock->regs;
172 spin_lock_irqsave(®ister_lock, flags);
174 ns = ixp_systime_read(regs);
176 spin_unlock_irqrestore(®ister_lock, flags);
178 *ts = ns_to_timespec64(ns);
182 static int ptp_ixp_settime(struct ptp_clock_info *ptp,
183 const struct timespec64 *ts)
187 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
188 struct ixp46x_ts_regs *regs = ixp_clock->regs;
190 ns = timespec64_to_ns(ts);
192 spin_lock_irqsave(®ister_lock, flags);
194 ixp_systime_write(regs, ns);
196 spin_unlock_irqrestore(®ister_lock, flags);
201 static int ptp_ixp_enable(struct ptp_clock_info *ptp,
202 struct ptp_clock_request *rq, int on)
204 struct ixp_clock *ixp_clock = container_of(ptp, struct ixp_clock, caps);
207 case PTP_CLK_REQ_EXTTS:
208 switch (rq->extts.index) {
210 ixp_clock->exts0_enabled = on ? 1 : 0;
213 ixp_clock->exts1_enabled = on ? 1 : 0;
226 static const struct ptp_clock_info ptp_ixp_caps = {
227 .owner = THIS_MODULE,
228 .name = "IXP46X timer",
230 .n_ext_ts = N_EXT_TS,
233 .adjfreq = ptp_ixp_adjfreq,
234 .adjtime = ptp_ixp_adjtime,
235 .gettime64 = ptp_ixp_gettime,
236 .settime64 = ptp_ixp_settime,
237 .enable = ptp_ixp_enable,
240 /* module operations */
242 static struct ixp_clock ixp_clock;
244 static int setup_interrupt(int gpio)
249 err = gpio_request(gpio, "ixp4-ptp");
253 err = gpio_direction_input(gpio);
257 irq = gpio_to_irq(gpio);
261 err = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
263 pr_err("cannot set trigger type for irq %d\n", irq);
267 err = request_irq(irq, isr, 0, DRIVER, &ixp_clock);
269 pr_err("request_irq failed for irq %d\n", irq);
276 static void __exit ptp_ixp_exit(void)
278 free_irq(MASTER_IRQ, &ixp_clock);
279 free_irq(SLAVE_IRQ, &ixp_clock);
280 ixp46x_phc_index = -1;
281 ptp_clock_unregister(ixp_clock.ptp_clock);
284 static int __init ptp_ixp_init(void)
286 if (!cpu_is_ixp46x())
290 (struct ixp46x_ts_regs __iomem *) IXP4XX_TIMESYNC_BASE_VIRT;
292 ixp_clock.caps = ptp_ixp_caps;
294 ixp_clock.ptp_clock = ptp_clock_register(&ixp_clock.caps, NULL);
296 if (IS_ERR(ixp_clock.ptp_clock))
297 return PTR_ERR(ixp_clock.ptp_clock);
299 ixp46x_phc_index = ptp_clock_index(ixp_clock.ptp_clock);
301 __raw_writel(DEFAULT_ADDEND, &ixp_clock.regs->addend);
302 __raw_writel(1, &ixp_clock.regs->trgt_lo);
303 __raw_writel(0, &ixp_clock.regs->trgt_hi);
304 __raw_writel(TTIPEND, &ixp_clock.regs->event);
306 if (MASTER_IRQ != setup_interrupt(MASTER_GPIO)) {
307 pr_err("failed to setup gpio %d as irq\n", MASTER_GPIO);
310 if (SLAVE_IRQ != setup_interrupt(SLAVE_GPIO)) {
311 pr_err("failed to setup gpio %d as irq\n", SLAVE_GPIO);
317 free_irq(MASTER_IRQ, &ixp_clock);
319 ptp_clock_unregister(ixp_clock.ptp_clock);
323 module_init(ptp_ixp_init);
324 module_exit(ptp_ixp_exit);
326 MODULE_AUTHOR("Richard Cochran <richardcochran@gmail.com>");
327 MODULE_DESCRIPTION("PTP clock using the IXP46X timer");
328 MODULE_LICENSE("GPL");