drivers/regulator/ab8500.c

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2010
   3  *
   4  * License Terms: GNU General Public License v2
   5  *
   6  * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson
   7  *          Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson
   8  *          Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson
   9  *
  10  * AB8500 peripheral regulators
  11  *
  12  * AB8500 supports the following regulators:
  13  *   VAUX1/2/3, VINTCORE, VTVOUT, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  14  *
  15  * AB8505 supports the following regulators:
  16  *   VAUX1/2/3/4/5/6, VINTCORE, VADC, VUSB, VAUDIO, VAMIC1/2, VDMIC, VANA
  17  */
  18 #include <linux/init.h>
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/err.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/mfd/abx500.h>
  24 #include <linux/mfd/abx500/ab8500.h>
  25 #include <linux/of.h>
  26 #include <linux/regulator/of_regulator.h>
  27 #include <linux/regulator/driver.h>
  28 #include <linux/regulator/machine.h>
  29 #include <linux/regulator/ab8500.h>
  30 #include <linux/slab.h>
  31
  32 /**
  33  * struct ab8500_shared_mode - is used when mode is shared between
  34  * two regulators.
  35  * @shared_regulator: pointer to the other sharing regulator
  36  * @lp_mode_req: low power mode requested by this regulator
  37  */
  38 struct ab8500_shared_mode {
  39         struct ab8500_regulator_info *shared_regulator;
  40         bool lp_mode_req;
  41 };
  42
  43 /**
  44  * struct ab8500_regulator_info - ab8500 regulator information
  45  * @dev: device pointer
  46  * @desc: regulator description
  47  * @shared_mode: used when mode is shared between two regulators
  48  * @load_lp_uA: maximum load in idle (low power) mode
  49  * @update_bank: bank to control on/off
  50  * @update_reg: register to control on/off
  51  * @update_mask: mask to enable/disable and set mode of regulator
  52  * @update_val: bits holding the regulator current mode
  53  * @update_val_idle: bits to enable the regulator in idle (low power) mode
  54  * @update_val_normal: bits to enable the regulator in normal (high power) mode
  55  * @mode_bank: bank with location of mode register
  56  * @mode_reg: mode register
  57  * @mode_mask: mask for setting mode
  58  * @mode_val_idle: mode setting for low power
  59  * @mode_val_normal: mode setting for normal power
  60  * @voltage_bank: bank to control regulator voltage
  61  * @voltage_reg: register to control regulator voltage
  62  * @voltage_mask: mask to control regulator voltage
  63  */
  64 struct ab8500_regulator_info {
  65         struct device           *dev;
  66         struct regulator_desc   desc;
  67         struct ab8500_shared_mode *shared_mode;
  68         int load_lp_uA;
  69         u8 update_bank;
  70         u8 update_reg;
  71         u8 update_mask;
  72         u8 update_val;
  73         u8 update_val_idle;
  74         u8 update_val_normal;
  75         u8 mode_bank;
  76         u8 mode_reg;
  77         u8 mode_mask;
  78         u8 mode_val_idle;
  79         u8 mode_val_normal;
  80         u8 voltage_bank;
  81         u8 voltage_reg;
  82         u8 voltage_mask;
  83         struct {
  84                 u8 voltage_limit;
  85                 u8 voltage_bank;
  86                 u8 voltage_reg;
  87                 u8 voltage_mask;
  88         } expand_register;
  89 };
  90
  91 /* voltage tables for the vauxn/vintcore supplies */
  92 static const unsigned int ldo_vauxn_voltages[] = {
  93         1100000,
  94         1200000,
  95         1300000,
  96         1400000,
  97         1500000,
  98         1800000,
  99         1850000,
 100         1900000,
 101         2500000,
 102         2650000,
 103         2700000,
 104         2750000,
 105         2800000,
 106         2900000,
 107         3000000,
 108         3300000,
 109 };
 110
 111 static const unsigned int ldo_vaux3_voltages[] = {
 112         1200000,
 113         1500000,
 114         1800000,
 115         2100000,
 116         2500000,
 117         2750000,
 118         2790000,
 119         2910000,
 120 };
 121
 122 static const unsigned int ldo_vaux56_voltages[] = {
 123         1800000,
 124         1050000,
 125         1100000,
 126         1200000,
 127         1500000,
 128         2200000,
 129         2500000,
 130         2790000,
 131 };
 132
 133 static const unsigned int ldo_vintcore_voltages[] = {
 134         1200000,
 135         1225000,
 136         1250000,
 137         1275000,
 138         1300000,
 139         1325000,
 140         1350000,
 141 };
 142
 143 static const unsigned int ldo_sdio_voltages[] = {
 144         1160000,
 145         1050000,
 146         1100000,
 147         1500000,
 148         1800000,
 149         2200000,
 150         2910000,
 151         3050000,
 152 };
 153
 154 static const unsigned int fixed_1200000_voltage[] = {
 155         1200000,
 156 };
 157
 158 static const unsigned int fixed_1800000_voltage[] = {
 159         1800000,
 160 };
 161
 162 static const unsigned int fixed_2000000_voltage[] = {
 163         2000000,
 164 };
 165
 166 static const unsigned int fixed_2050000_voltage[] = {
 167         2050000,
 168 };
 169
 170 static const unsigned int fixed_3300000_voltage[] = {
 171         3300000,
 172 };
 173
 174 static const unsigned int ldo_vana_voltages[] = {
 175         1050000,
 176         1075000,
 177         1100000,
 178         1125000,
 179         1150000,
 180         1175000,
 181         1200000,
 182         1225000,
 183 };
 184
 185 static const unsigned int ldo_vaudio_voltages[] = {
 186         2000000,
 187         2100000,
 188         2200000,
 189         2300000,
 190         2400000,
 191         2500000,
 192         2600000,
 193         2600000,        /* Duplicated in Vaudio and IsoUicc Control register. */
 194 };
 195
 196 static const unsigned int ldo_vdmic_voltages[] = {
 197         1800000,
 198         1900000,
 199         2000000,
 200         2850000,
 201 };
 202
 203 static DEFINE_MUTEX(shared_mode_mutex);
 204 static struct ab8500_shared_mode ldo_anamic1_shared;
 205 static struct ab8500_shared_mode ldo_anamic2_shared;
 206
 207 static int ab8500_regulator_enable(struct regulator_dev *rdev)
 208 {
 209         int ret;
 210         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 211
 212         if (info == NULL) {
 213                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 214                 return -EINVAL;
 215         }
 216
 217         ret = abx500_mask_and_set_register_interruptible(info->dev,
 218                 info->update_bank, info->update_reg,
 219                 info->update_mask, info->update_val);
 220         if (ret < 0) {
 221                 dev_err(rdev_get_dev(rdev),
 222                         "couldn't set enable bits for regulator\n");
 223                 return ret;
 224         }
 225
 226         dev_vdbg(rdev_get_dev(rdev),
 227                 "%s-enable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 228                 info->desc.name, info->update_bank, info->update_reg,
 229                 info->update_mask, info->update_val);
 230
 231         return ret;
 232 }
 233
 234 static int ab8500_regulator_disable(struct regulator_dev *rdev)
 235 {
 236         int ret;
 237         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 238
 239         if (info == NULL) {
 240                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 241                 return -EINVAL;
 242         }
 243
 244         ret = abx500_mask_and_set_register_interruptible(info->dev,
 245                 info->update_bank, info->update_reg,
 246                 info->update_mask, 0x0);
 247         if (ret < 0) {
 248                 dev_err(rdev_get_dev(rdev),
 249                         "couldn't set disable bits for regulator\n");
 250                 return ret;
 251         }
 252
 253         dev_vdbg(rdev_get_dev(rdev),
 254                 "%s-disable (bank, reg, mask, value): 0x%x, 0x%x, 0x%x, 0x%x\n",
 255                 info->desc.name, info->update_bank, info->update_reg,
 256                 info->update_mask, 0x0);
 257
 258         return ret;
 259 }
 260
 261 static int ab8500_regulator_is_enabled(struct regulator_dev *rdev)
 262 {
 263         int ret;
 264         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 265         u8 regval;
 266
 267         if (info == NULL) {
 268                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 269                 return -EINVAL;
 270         }
 271
 272         ret = abx500_get_register_interruptible(info->dev,
 273                 info->update_bank, info->update_reg, &regval);
 274         if (ret < 0) {
 275                 dev_err(rdev_get_dev(rdev),
 276                         "couldn't read 0x%x register\n", info->update_reg);
 277                 return ret;
 278         }
 279
 280         dev_vdbg(rdev_get_dev(rdev),
 281                 "%s-is_enabled (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 282                 " 0x%x\n",
 283                 info->desc.name, info->update_bank, info->update_reg,
 284                 info->update_mask, regval);
 285
 286         if (regval & info->update_mask)
 287                 return 1;
 288         else
 289                 return 0;
 290 }
 291
 292 static unsigned int ab8500_regulator_get_optimum_mode(
 293                 struct regulator_dev *rdev, int input_uV,
 294                 int output_uV, int load_uA)
 295 {
 296         unsigned int mode;
 297
 298         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 299
 300         if (info == NULL) {
 301                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 302                 return -EINVAL;
 303         }
 304
 305         if (load_uA <= info->load_lp_uA)
 306                 mode = REGULATOR_MODE_IDLE;
 307         else
 308                 mode = REGULATOR_MODE_NORMAL;
 309
 310         return mode;
 311 }
 312
 313 static int ab8500_regulator_set_mode(struct regulator_dev *rdev,
 314                                      unsigned int mode)
 315 {
 316         int ret = 0;
 317         u8 bank, reg, mask, val;
 318         bool lp_mode_req = false;
 319         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 320
 321         if (info == NULL) {
 322                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 323                 return -EINVAL;
 324         }
 325
 326         if (info->mode_mask) {
 327                 bank = info->mode_bank;
 328                 reg = info->mode_reg;
 329                 mask = info->mode_mask;
 330         } else {
 331                 bank = info->update_bank;
 332                 reg = info->update_reg;
 333                 mask = info->update_mask;
 334         }
 335
 336         if (info->shared_mode)
 337                 mutex_lock(&shared_mode_mutex);
 338
 339         switch (mode) {
 340         case REGULATOR_MODE_NORMAL:
 341                 if (info->shared_mode)
 342                         lp_mode_req = false;
 343
 344                 if (info->mode_mask)
 345                         val = info->mode_val_normal;
 346                 else
 347                         val = info->update_val_normal;
 348                 break;
 349         case REGULATOR_MODE_IDLE:
 350                 if (info->shared_mode) {
 351                         struct ab8500_regulator_info *shared_regulator;
 352
 353                         shared_regulator = info->shared_mode->shared_regulator;
 354                         if (!shared_regulator->shared_mode->lp_mode_req) {
 355                                 /* Other regulator prevent LP mode */
 356                                 info->shared_mode->lp_mode_req = true;
 357                                 goto out_unlock;
 358                         }
 359
 360                         lp_mode_req = true;
 361                 }
 362
 363                 if (info->mode_mask)
 364                         val = info->mode_val_idle;
 365                 else
 366                         val = info->update_val_idle;
 367                 break;
 368         default:
 369                 ret = -EINVAL;
 370                 goto out_unlock;
 371         }
 372
 373         if (info->mode_mask || ab8500_regulator_is_enabled(rdev)) {
 374                 ret = abx500_mask_and_set_register_interruptible(info->dev,
 375                         bank, reg, mask, val);
 376                 if (ret < 0) {
 377                         dev_err(rdev_get_dev(rdev),
 378                                 "couldn't set regulator mode\n");
 379                         goto out_unlock;
 380                 }
 381
 382                 dev_vdbg(rdev_get_dev(rdev),
 383                         "%s-set_mode (bank, reg, mask, value): "
 384                         "0x%x, 0x%x, 0x%x, 0x%x\n",
 385                         info->desc.name, bank, reg,
 386                         mask, val);
 387         }
 388
 389         if (!info->mode_mask)
 390                 info->update_val = val;
 391
 392         if (info->shared_mode)
 393                 info->shared_mode->lp_mode_req = lp_mode_req;
 394
 395 out_unlock:
 396         if (info->shared_mode)
 397                 mutex_unlock(&shared_mode_mutex);
 398
 399         return ret;
 400 }
 401
 402 static unsigned int ab8500_regulator_get_mode(struct regulator_dev *rdev)
 403 {
 404         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 405         int ret;
 406         u8 val;
 407         u8 val_normal;
 408         u8 val_idle;
 409
 410         if (info == NULL) {
 411                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 412                 return -EINVAL;
 413         }
 414
 415         /* Need special handling for shared mode */
 416         if (info->shared_mode) {
 417                 if (info->shared_mode->lp_mode_req)
 418                         return REGULATOR_MODE_IDLE;
 419                 else
 420                         return REGULATOR_MODE_NORMAL;
 421         }
 422
 423         if (info->mode_mask) {
 424                 /* Dedicated register for handling mode */
 425                 ret = abx500_get_register_interruptible(info->dev,
 426                 info->mode_bank, info->mode_reg, &val);
 427                 val = val & info->mode_mask;
 428
 429                 val_normal = info->mode_val_normal;
 430                 val_idle = info->mode_val_idle;
 431         } else {
 432                 /* Mode register same as enable register */
 433                 val = info->update_val;
 434                 val_normal = info->update_val_normal;
 435                 val_idle = info->update_val_idle;
 436         }
 437
 438         if (val == val_normal)
 439                 ret = REGULATOR_MODE_NORMAL;
 440         else if (val == val_idle)
 441                 ret = REGULATOR_MODE_IDLE;
 442         else
 443                 ret = -EINVAL;
 444
 445         return ret;
 446 }
 447
 448 static int ab8500_regulator_get_voltage_sel(struct regulator_dev *rdev)
 449 {
 450         int ret, voltage_shift;
 451         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 452         u8 regval;
 453
 454         if (info == NULL) {
 455                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 456                 return -EINVAL;
 457         }
 458
 459         voltage_shift = ffs(info->voltage_mask) - 1;
 460
 461         ret = abx500_get_register_interruptible(info->dev,
 462                         info->voltage_bank, info->voltage_reg, &regval);
 463         if (ret < 0) {
 464                 dev_err(rdev_get_dev(rdev),
 465                         "couldn't read voltage reg for regulator\n");
 466                 return ret;
 467         }
 468
 469         dev_vdbg(rdev_get_dev(rdev),
 470                 "%s-get_voltage (bank, reg, mask, shift, value): "
 471                 "0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n",
 472                 info->desc.name, info->voltage_bank,
 473                 info->voltage_reg, info->voltage_mask,
 474                 voltage_shift, regval);
 475
 476         return (regval & info->voltage_mask) >> voltage_shift;
 477 }
 478
 479 static int ab8500_regulator_set_voltage_sel(struct regulator_dev *rdev,
 480                                             unsigned selector)
 481 {
 482         int ret, voltage_shift;
 483         struct ab8500_regulator_info *info = rdev_get_drvdata(rdev);
 484         u8 regval;
 485
 486         if (info == NULL) {
 487                 dev_err(rdev_get_dev(rdev), "regulator info null pointer\n");
 488                 return -EINVAL;
 489         }
 490
 491         voltage_shift = ffs(info->voltage_mask) - 1;
 492
 493         /* set the registers for the request */
 494         regval = (u8)selector << voltage_shift;
 495         ret = abx500_mask_and_set_register_interruptible(info->dev,
 496                         info->voltage_bank, info->voltage_reg,
 497                         info->voltage_mask, regval);
 498         if (ret < 0)
 499                 dev_err(rdev_get_dev(rdev),
 500                 "couldn't set voltage reg for regulator\n");
 501
 502         dev_vdbg(rdev_get_dev(rdev),
 503                 "%s-set_voltage (bank, reg, mask, value): 0x%x, 0x%x, 0x%x,"
 504                 " 0x%x\n",
 505                 info->desc.name, info->voltage_bank, info->voltage_reg,
 506                 info->voltage_mask, regval);
 507
 508         return ret;
 509 }
 510
 511 static const struct regulator_ops ab8500_regulator_volt_mode_ops = {
 512         .enable                 = ab8500_regulator_enable,
 513         .disable                = ab8500_regulator_disable,
 514         .is_enabled             = ab8500_regulator_is_enabled,
 515         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 516         .set_mode               = ab8500_regulator_set_mode,
 517         .get_mode               = ab8500_regulator_get_mode,
 518         .get_voltage_sel        = ab8500_regulator_get_voltage_sel,
 519         .set_voltage_sel        = ab8500_regulator_set_voltage_sel,
 520         .list_voltage           = regulator_list_voltage_table,
 521 };
 522
 523 static const struct regulator_ops ab8500_regulator_volt_ops = {
 524         .enable         = ab8500_regulator_enable,
 525         .disable        = ab8500_regulator_disable,
 526         .is_enabled     = ab8500_regulator_is_enabled,
 527         .get_voltage_sel = ab8500_regulator_get_voltage_sel,
 528         .set_voltage_sel = ab8500_regulator_set_voltage_sel,
 529         .list_voltage   = regulator_list_voltage_table,
 530 };
 531
 532 static const struct regulator_ops ab8500_regulator_mode_ops = {
 533         .enable                 = ab8500_regulator_enable,
 534         .disable                = ab8500_regulator_disable,
 535         .is_enabled             = ab8500_regulator_is_enabled,
 536         .get_optimum_mode       = ab8500_regulator_get_optimum_mode,
 537         .set_mode               = ab8500_regulator_set_mode,
 538         .get_mode               = ab8500_regulator_get_mode,
 539         .list_voltage           = regulator_list_voltage_table,
 540 };
 541
 542 static const struct regulator_ops ab8500_regulator_ops = {
 543         .enable                 = ab8500_regulator_enable,
 544         .disable                = ab8500_regulator_disable,
 545         .is_enabled             = ab8500_regulator_is_enabled,
 546         .list_voltage           = regulator_list_voltage_table,
 547 };
 548
 549 static const struct regulator_ops ab8500_regulator_anamic_mode_ops = {
 550         .enable         = ab8500_regulator_enable,
 551         .disable        = ab8500_regulator_disable,
 552         .is_enabled     = ab8500_regulator_is_enabled,
 553         .set_mode       = ab8500_regulator_set_mode,
 554         .get_mode       = ab8500_regulator_get_mode,
 555         .list_voltage   = regulator_list_voltage_table,
 556 };
 557
 558 /* AB8500 regulator information */
 559 static struct ab8500_regulator_info
 560                 ab8500_regulator_info[AB8500_NUM_REGULATORS] = {
 561         /*
 562          * Variable Voltage Regulators
 563          *   name, min mV, max mV,
 564          *   update bank, reg, mask, enable val
 565          *   volt bank, reg, mask
 566          */
 567         [AB8500_LDO_AUX1] = {
 568                 .desc = {
 569                         .name           = "LDO-AUX1",
 570                         .ops            = &ab8500_regulator_volt_mode_ops,
 571                         .type           = REGULATOR_VOLTAGE,
 572                         .id             = AB8500_LDO_AUX1,
 573                         .owner          = THIS_MODULE,
 574                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 575                         .volt_table     = ldo_vauxn_voltages,
 576                         .enable_time    = 200,
 577                         .supply_name    = "vin",
 578                 },
 579                 .load_lp_uA             = 5000,
 580                 .update_bank            = 0x04,
 581                 .update_reg             = 0x09,
 582                 .update_mask            = 0x03,
 583                 .update_val             = 0x01,
 584                 .update_val_idle        = 0x03,
 585                 .update_val_normal      = 0x01,
 586                 .voltage_bank           = 0x04,
 587                 .voltage_reg            = 0x1f,
 588                 .voltage_mask           = 0x0f,
 589         },
 590         [AB8500_LDO_AUX2] = {
 591                 .desc = {
 592                         .name           = "LDO-AUX2",
 593                         .ops            = &ab8500_regulator_volt_mode_ops,
 594                         .type           = REGULATOR_VOLTAGE,
 595                         .id             = AB8500_LDO_AUX2,
 596                         .owner          = THIS_MODULE,
 597                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 598                         .volt_table     = ldo_vauxn_voltages,
 599                         .enable_time    = 200,
 600                         .supply_name    = "vin",
 601                 },
 602                 .load_lp_uA             = 5000,
 603                 .update_bank            = 0x04,
 604                 .update_reg             = 0x09,
 605                 .update_mask            = 0x0c,
 606                 .update_val             = 0x04,
 607                 .update_val_idle        = 0x0c,
 608                 .update_val_normal      = 0x04,
 609                 .voltage_bank           = 0x04,
 610                 .voltage_reg            = 0x20,
 611                 .voltage_mask           = 0x0f,
 612         },
 613         [AB8500_LDO_AUX3] = {
 614                 .desc = {
 615                         .name           = "LDO-AUX3",
 616                         .ops            = &ab8500_regulator_volt_mode_ops,
 617                         .type           = REGULATOR_VOLTAGE,
 618                         .id             = AB8500_LDO_AUX3,
 619                         .owner          = THIS_MODULE,
 620                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 621                         .volt_table     = ldo_vaux3_voltages,
 622                         .enable_time    = 450,
 623                         .supply_name    = "vin",
 624                 },
 625                 .load_lp_uA             = 5000,
 626                 .update_bank            = 0x04,
 627                 .update_reg             = 0x0a,
 628                 .update_mask            = 0x03,
 629                 .update_val             = 0x01,
 630                 .update_val_idle        = 0x03,
 631                 .update_val_normal      = 0x01,
 632                 .voltage_bank           = 0x04,
 633                 .voltage_reg            = 0x21,
 634                 .voltage_mask           = 0x07,
 635         },
 636         [AB8500_LDO_INTCORE] = {
 637                 .desc = {
 638                         .name           = "LDO-INTCORE",
 639                         .ops            = &ab8500_regulator_volt_mode_ops,
 640                         .type           = REGULATOR_VOLTAGE,
 641                         .id             = AB8500_LDO_INTCORE,
 642                         .owner          = THIS_MODULE,
 643                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 644                         .volt_table     = ldo_vintcore_voltages,
 645                         .enable_time    = 750,
 646                 },
 647                 .load_lp_uA             = 5000,
 648                 .update_bank            = 0x03,
 649                 .update_reg             = 0x80,
 650                 .update_mask            = 0x44,
 651                 .update_val             = 0x44,
 652                 .update_val_idle        = 0x44,
 653                 .update_val_normal      = 0x04,
 654                 .voltage_bank           = 0x03,
 655                 .voltage_reg            = 0x80,
 656                 .voltage_mask           = 0x38,
 657         },
 658
 659         /*
 660          * Fixed Voltage Regulators
 661          *   name, fixed mV,
 662          *   update bank, reg, mask, enable val
 663          */
 664         [AB8500_LDO_TVOUT] = {
 665                 .desc = {
 666                         .name           = "LDO-TVOUT",
 667                         .ops            = &ab8500_regulator_mode_ops,
 668                         .type           = REGULATOR_VOLTAGE,
 669                         .id             = AB8500_LDO_TVOUT,
 670                         .owner          = THIS_MODULE,
 671                         .n_voltages     = 1,
 672                         .volt_table     = fixed_2000000_voltage,
 673                         .enable_time    = 500,
 674                 },
 675                 .load_lp_uA             = 1000,
 676                 .update_bank            = 0x03,
 677                 .update_reg             = 0x80,
 678                 .update_mask            = 0x82,
 679                 .update_val             = 0x02,
 680                 .update_val_idle        = 0x82,
 681                 .update_val_normal      = 0x02,
 682         },
 683         [AB8500_LDO_AUDIO] = {
 684                 .desc = {
 685                         .name           = "LDO-AUDIO",
 686                         .ops            = &ab8500_regulator_ops,
 687                         .type           = REGULATOR_VOLTAGE,
 688                         .id             = AB8500_LDO_AUDIO,
 689                         .owner          = THIS_MODULE,
 690                         .n_voltages     = 1,
 691                         .enable_time    = 140,
 692                         .volt_table     = fixed_2000000_voltage,
 693                 },
 694                 .update_bank            = 0x03,
 695                 .update_reg             = 0x83,
 696                 .update_mask            = 0x02,
 697                 .update_val             = 0x02,
 698         },
 699         [AB8500_LDO_ANAMIC1] = {
 700                 .desc = {
 701                         .name           = "LDO-ANAMIC1",
 702                         .ops            = &ab8500_regulator_ops,
 703                         .type           = REGULATOR_VOLTAGE,
 704                         .id             = AB8500_LDO_ANAMIC1,
 705                         .owner          = THIS_MODULE,
 706                         .n_voltages     = 1,
 707                         .enable_time    = 500,
 708                         .volt_table     = fixed_2050000_voltage,
 709                 },
 710                 .update_bank            = 0x03,
 711                 .update_reg             = 0x83,
 712                 .update_mask            = 0x08,
 713                 .update_val             = 0x08,
 714         },
 715         [AB8500_LDO_ANAMIC2] = {
 716                 .desc = {
 717                         .name           = "LDO-ANAMIC2",
 718                         .ops            = &ab8500_regulator_ops,
 719                         .type           = REGULATOR_VOLTAGE,
 720                         .id             = AB8500_LDO_ANAMIC2,
 721                         .owner          = THIS_MODULE,
 722                         .n_voltages     = 1,
 723                         .enable_time    = 500,
 724                         .volt_table     = fixed_2050000_voltage,
 725                 },
 726                 .update_bank            = 0x03,
 727                 .update_reg             = 0x83,
 728                 .update_mask            = 0x10,
 729                 .update_val             = 0x10,
 730         },
 731         [AB8500_LDO_DMIC] = {
 732                 .desc = {
 733                         .name           = "LDO-DMIC",
 734                         .ops            = &ab8500_regulator_ops,
 735                         .type           = REGULATOR_VOLTAGE,
 736                         .id             = AB8500_LDO_DMIC,
 737                         .owner          = THIS_MODULE,
 738                         .n_voltages     = 1,
 739                         .enable_time    = 420,
 740                         .volt_table     = fixed_1800000_voltage,
 741                 },
 742                 .update_bank            = 0x03,
 743                 .update_reg             = 0x83,
 744                 .update_mask            = 0x04,
 745                 .update_val             = 0x04,
 746         },
 747
 748         /*
 749          * Regulators with fixed voltage and normal/idle modes
 750          */
 751         [AB8500_LDO_ANA] = {
 752                 .desc = {
 753                         .name           = "LDO-ANA",
 754                         .ops            = &ab8500_regulator_mode_ops,
 755                         .type           = REGULATOR_VOLTAGE,
 756                         .id             = AB8500_LDO_ANA,
 757                         .owner          = THIS_MODULE,
 758                         .n_voltages     = 1,
 759                         .enable_time    = 140,
 760                         .volt_table     = fixed_1200000_voltage,
 761                 },
 762                 .load_lp_uA             = 1000,
 763                 .update_bank            = 0x04,
 764                 .update_reg             = 0x06,
 765                 .update_mask            = 0x0c,
 766                 .update_val             = 0x04,
 767                 .update_val_idle        = 0x0c,
 768                 .update_val_normal      = 0x04,
 769         },
 770 };
 771
 772 /* AB8505 regulator information */
 773 static struct ab8500_regulator_info
 774                 ab8505_regulator_info[AB8505_NUM_REGULATORS] = {
 775         /*
 776          * Variable Voltage Regulators
 777          *   name, min mV, max mV,
 778          *   update bank, reg, mask, enable val
 779          *   volt bank, reg, mask
 780          */
 781         [AB8505_LDO_AUX1] = {
 782                 .desc = {
 783                         .name           = "LDO-AUX1",
 784                         .ops            = &ab8500_regulator_volt_mode_ops,
 785                         .type           = REGULATOR_VOLTAGE,
 786                         .id             = AB8505_LDO_AUX1,
 787                         .owner          = THIS_MODULE,
 788                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 789                         .volt_table     = ldo_vauxn_voltages,
 790                 },
 791                 .load_lp_uA             = 5000,
 792                 .update_bank            = 0x04,
 793                 .update_reg             = 0x09,
 794                 .update_mask            = 0x03,
 795                 .update_val             = 0x01,
 796                 .update_val_idle        = 0x03,
 797                 .update_val_normal      = 0x01,
 798                 .voltage_bank           = 0x04,
 799                 .voltage_reg            = 0x1f,
 800                 .voltage_mask           = 0x0f,
 801         },
 802         [AB8505_LDO_AUX2] = {
 803                 .desc = {
 804                         .name           = "LDO-AUX2",
 805                         .ops            = &ab8500_regulator_volt_mode_ops,
 806                         .type           = REGULATOR_VOLTAGE,
 807                         .id             = AB8505_LDO_AUX2,
 808                         .owner          = THIS_MODULE,
 809                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 810                         .volt_table     = ldo_vauxn_voltages,
 811                 },
 812                 .load_lp_uA             = 5000,
 813                 .update_bank            = 0x04,
 814                 .update_reg             = 0x09,
 815                 .update_mask            = 0x0c,
 816                 .update_val             = 0x04,
 817                 .update_val_idle        = 0x0c,
 818                 .update_val_normal      = 0x04,
 819                 .voltage_bank           = 0x04,
 820                 .voltage_reg            = 0x20,
 821                 .voltage_mask           = 0x0f,
 822         },
 823         [AB8505_LDO_AUX3] = {
 824                 .desc = {
 825                         .name           = "LDO-AUX3",
 826                         .ops            = &ab8500_regulator_volt_mode_ops,
 827                         .type           = REGULATOR_VOLTAGE,
 828                         .id             = AB8505_LDO_AUX3,
 829                         .owner          = THIS_MODULE,
 830                         .n_voltages     = ARRAY_SIZE(ldo_vaux3_voltages),
 831                         .volt_table     = ldo_vaux3_voltages,
 832                 },
 833                 .load_lp_uA             = 5000,
 834                 .update_bank            = 0x04,
 835                 .update_reg             = 0x0a,
 836                 .update_mask            = 0x03,
 837                 .update_val             = 0x01,
 838                 .update_val_idle        = 0x03,
 839                 .update_val_normal      = 0x01,
 840                 .voltage_bank           = 0x04,
 841                 .voltage_reg            = 0x21,
 842                 .voltage_mask           = 0x07,
 843         },
 844         [AB8505_LDO_AUX4] = {
 845                 .desc = {
 846                         .name           = "LDO-AUX4",
 847                         .ops            = &ab8500_regulator_volt_mode_ops,
 848                         .type           = REGULATOR_VOLTAGE,
 849                         .id             = AB8505_LDO_AUX4,
 850                         .owner          = THIS_MODULE,
 851                         .n_voltages     = ARRAY_SIZE(ldo_vauxn_voltages),
 852                         .volt_table     = ldo_vauxn_voltages,
 853                 },
 854                 .load_lp_uA             = 5000,
 855                 /* values for Vaux4Regu register */
 856                 .update_bank            = 0x04,
 857                 .update_reg             = 0x2e,
 858                 .update_mask            = 0x03,
 859                 .update_val             = 0x01,
 860                 .update_val_idle        = 0x03,
 861                 .update_val_normal      = 0x01,
 862                 /* values for Vaux4SEL register */
 863                 .voltage_bank           = 0x04,
 864                 .voltage_reg            = 0x2f,
 865                 .voltage_mask           = 0x0f,
 866         },
 867         [AB8505_LDO_AUX5] = {
 868                 .desc = {
 869                         .name           = "LDO-AUX5",
 870                         .ops            = &ab8500_regulator_volt_mode_ops,
 871                         .type           = REGULATOR_VOLTAGE,
 872                         .id             = AB8505_LDO_AUX5,
 873                         .owner          = THIS_MODULE,
 874                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 875                         .volt_table     = ldo_vaux56_voltages,
 876                 },
 877                 .load_lp_uA             = 2000,
 878                 /* values for CtrlVaux5 register */
 879                 .update_bank            = 0x01,
 880                 .update_reg             = 0x55,
 881                 .update_mask            = 0x18,
 882                 .update_val             = 0x10,
 883                 .update_val_idle        = 0x18,
 884                 .update_val_normal      = 0x10,
 885                 .voltage_bank           = 0x01,
 886                 .voltage_reg            = 0x55,
 887                 .voltage_mask           = 0x07,
 888         },
 889         [AB8505_LDO_AUX6] = {
 890                 .desc = {
 891                         .name           = "LDO-AUX6",
 892                         .ops            = &ab8500_regulator_volt_mode_ops,
 893                         .type           = REGULATOR_VOLTAGE,
 894                         .id             = AB8505_LDO_AUX6,
 895                         .owner          = THIS_MODULE,
 896                         .n_voltages     = ARRAY_SIZE(ldo_vaux56_voltages),
 897                         .volt_table     = ldo_vaux56_voltages,
 898                 },
 899                 .load_lp_uA             = 2000,
 900                 /* values for CtrlVaux6 register */
 901                 .update_bank            = 0x01,
 902                 .update_reg             = 0x56,
 903                 .update_mask            = 0x18,
 904                 .update_val             = 0x10,
 905                 .update_val_idle        = 0x18,
 906                 .update_val_normal      = 0x10,
 907                 .voltage_bank           = 0x01,
 908                 .voltage_reg            = 0x56,
 909                 .voltage_mask           = 0x07,
 910         },
 911         [AB8505_LDO_INTCORE] = {
 912                 .desc = {
 913                         .name           = "LDO-INTCORE",
 914                         .ops            = &ab8500_regulator_volt_mode_ops,
 915                         .type           = REGULATOR_VOLTAGE,
 916                         .id             = AB8505_LDO_INTCORE,
 917                         .owner          = THIS_MODULE,
 918                         .n_voltages     = ARRAY_SIZE(ldo_vintcore_voltages),
 919                         .volt_table     = ldo_vintcore_voltages,
 920                 },
 921                 .load_lp_uA             = 5000,
 922                 .update_bank            = 0x03,
 923                 .update_reg             = 0x80,
 924                 .update_mask            = 0x44,
 925                 .update_val             = 0x04,
 926                 .update_val_idle        = 0x44,
 927                 .update_val_normal      = 0x04,
 928                 .voltage_bank           = 0x03,
 929                 .voltage_reg            = 0x80,
 930                 .voltage_mask           = 0x38,
 931         },
 932
 933         /*
 934          * Fixed Voltage Regulators
 935          *   name, fixed mV,
 936          *   update bank, reg, mask, enable val
 937          */
 938         [AB8505_LDO_ADC] = {
 939                 .desc = {
 940                         .name           = "LDO-ADC",
 941                         .ops            = &ab8500_regulator_mode_ops,
 942                         .type           = REGULATOR_VOLTAGE,
 943                         .id             = AB8505_LDO_ADC,
 944                         .owner          = THIS_MODULE,
 945                         .n_voltages     = 1,
 946                         .volt_table     = fixed_2000000_voltage,
 947                         .enable_time    = 10000,
 948                 },
 949                 .load_lp_uA             = 1000,
 950                 .update_bank            = 0x03,
 951                 .update_reg             = 0x80,
 952                 .update_mask            = 0x82,
 953                 .update_val             = 0x02,
 954                 .update_val_idle        = 0x82,
 955                 .update_val_normal      = 0x02,
 956         },
 957         [AB8505_LDO_USB] = {
 958                 .desc = {
 959                         .name           = "LDO-USB",
 960                         .ops            = &ab8500_regulator_mode_ops,
 961                         .type           = REGULATOR_VOLTAGE,
 962                         .id             = AB8505_LDO_USB,
 963                         .owner          = THIS_MODULE,
 964                         .n_voltages     = 1,
 965                         .volt_table     = fixed_3300000_voltage,
 966                 },
 967                 .update_bank            = 0x03,
 968                 .update_reg             = 0x82,
 969                 .update_mask            = 0x03,
 970                 .update_val             = 0x01,
 971                 .update_val_idle        = 0x03,
 972                 .update_val_normal      = 0x01,
 973         },
 974         [AB8505_LDO_AUDIO] = {
 975                 .desc = {
 976                         .name           = "LDO-AUDIO",
 977                         .ops            = &ab8500_regulator_volt_ops,
 978                         .type           = REGULATOR_VOLTAGE,
 979                         .id             = AB8505_LDO_AUDIO,
 980                         .owner          = THIS_MODULE,
 981                         .n_voltages     = ARRAY_SIZE(ldo_vaudio_voltages),
 982                         .volt_table     = ldo_vaudio_voltages,
 983                 },
 984                 .update_bank            = 0x03,
 985                 .update_reg             = 0x83,
 986                 .update_mask            = 0x02,
 987                 .update_val             = 0x02,
 988                 .voltage_bank           = 0x01,
 989                 .voltage_reg            = 0x57,
 990                 .voltage_mask           = 0x70,
 991         },
 992         [AB8505_LDO_ANAMIC1] = {
 993                 .desc = {
 994                         .name           = "LDO-ANAMIC1",
 995                         .ops            = &ab8500_regulator_anamic_mode_ops,
 996                         .type           = REGULATOR_VOLTAGE,
 997                         .id             = AB8505_LDO_ANAMIC1,
 998                         .owner          = THIS_MODULE,
 999                         .n_voltages     = 1,
1000                         .volt_table     = fixed_2050000_voltage,
1001                 },
1002                 .shared_mode            = &ldo_anamic1_shared,
1003                 .update_bank            = 0x03,
1004                 .update_reg             = 0x83,
1005                 .update_mask            = 0x08,
1006                 .update_val             = 0x08,
1007                 .mode_bank              = 0x01,
1008                 .mode_reg               = 0x54,
1009                 .mode_mask              = 0x04,
1010                 .mode_val_idle          = 0x04,
1011                 .mode_val_normal        = 0x00,
1012         },
1013         [AB8505_LDO_ANAMIC2] = {
1014                 .desc = {
1015                         .name           = "LDO-ANAMIC2",
1016                         .ops            = &ab8500_regulator_anamic_mode_ops,
1017                         .type           = REGULATOR_VOLTAGE,
1018                         .id             = AB8505_LDO_ANAMIC2,
1019                         .owner          = THIS_MODULE,
1020                         .n_voltages     = 1,
1021                         .volt_table     = fixed_2050000_voltage,
1022                 },
1023                 .shared_mode            = &ldo_anamic2_shared,
1024                 .update_bank            = 0x03,
1025                 .update_reg             = 0x83,
1026                 .update_mask            = 0x10,
1027                 .update_val             = 0x10,
1028                 .mode_bank              = 0x01,
1029                 .mode_reg               = 0x54,
1030                 .mode_mask              = 0x04,
1031                 .mode_val_idle          = 0x04,
1032                 .mode_val_normal        = 0x00,
1033         },
1034         [AB8505_LDO_AUX8] = {
1035                 .desc = {
1036                         .name           = "LDO-AUX8",
1037                         .ops            = &ab8500_regulator_ops,
1038                         .type           = REGULATOR_VOLTAGE,
1039                         .id             = AB8505_LDO_AUX8,
1040                         .owner          = THIS_MODULE,
1041                         .n_voltages     = 1,
1042                         .volt_table     = fixed_1800000_voltage,
1043                 },
1044                 .update_bank            = 0x03,
1045                 .update_reg             = 0x83,
1046                 .update_mask            = 0x04,
1047                 .update_val             = 0x04,
1048         },
1049         /*
1050          * Regulators with fixed voltage and normal/idle modes
1051          */
1052         [AB8505_LDO_ANA] = {
1053                 .desc = {
1054                         .name           = "LDO-ANA",
1055                         .ops            = &ab8500_regulator_volt_mode_ops,
1056                         .type           = REGULATOR_VOLTAGE,
1057                         .id             = AB8505_LDO_ANA,
1058                         .owner          = THIS_MODULE,
1059                         .n_voltages     = ARRAY_SIZE(ldo_vana_voltages),
1060                         .volt_table     = ldo_vana_voltages,
1061                 },
1062                 .load_lp_uA             = 1000,
1063                 .update_bank            = 0x04,
1064                 .update_reg             = 0x06,
1065                 .update_mask            = 0x0c,
1066                 .update_val             = 0x04,
1067                 .update_val_idle        = 0x0c,
1068                 .update_val_normal      = 0x04,
1069                 .voltage_bank           = 0x04,
1070                 .voltage_reg            = 0x29,
1071                 .voltage_mask           = 0x7,
1072         },
1073 };
1074
1075 static struct ab8500_shared_mode ldo_anamic1_shared = {
1076         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC2],
1077 };
1078
1079 static struct ab8500_shared_mode ldo_anamic2_shared = {
1080         .shared_regulator = &ab8505_regulator_info[AB8505_LDO_ANAMIC1],
1081 };
1082
1083 struct ab8500_reg_init {
1084         u8 bank;
1085         u8 addr;
1086         u8 mask;
1087 };
1088
1089 #define REG_INIT(_id, _bank, _addr, _mask)      \
1090         [_id] = {                               \
1091                 .bank = _bank,                  \
1092                 .addr = _addr,                  \
1093                 .mask = _mask,                  \
1094         }
1095
1096 /* AB8500 register init */
1097 static struct ab8500_reg_init ab8500_reg_init[] = {
1098         /*
1099          * 0x30, VanaRequestCtrl
1100          * 0xc0, VextSupply1RequestCtrl
1101          */
1102         REG_INIT(AB8500_REGUREQUESTCTRL2,       0x03, 0x04, 0xf0),
1103         /*
1104          * 0x03, VextSupply2RequestCtrl
1105          * 0x0c, VextSupply3RequestCtrl
1106          * 0x30, Vaux1RequestCtrl
1107          * 0xc0, Vaux2RequestCtrl
1108          */
1109         REG_INIT(AB8500_REGUREQUESTCTRL3,       0x03, 0x05, 0xff),
1110         /*
1111          * 0x03, Vaux3RequestCtrl
1112          * 0x04, SwHPReq
1113          */
1114         REG_INIT(AB8500_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1115         /*
1116          * 0x08, VanaSysClkReq1HPValid
1117          * 0x20, Vaux1SysClkReq1HPValid
1118          * 0x40, Vaux2SysClkReq1HPValid
1119          * 0x80, Vaux3SysClkReq1HPValid
1120          */
1121         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xe8),
1122         /*
1123          * 0x10, VextSupply1SysClkReq1HPValid
1124          * 0x20, VextSupply2SysClkReq1HPValid
1125          * 0x40, VextSupply3SysClkReq1HPValid
1126          */
1127         REG_INIT(AB8500_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x70),
1128         /*
1129          * 0x08, VanaHwHPReq1Valid
1130          * 0x20, Vaux1HwHPReq1Valid
1131          * 0x40, Vaux2HwHPReq1Valid
1132          * 0x80, Vaux3HwHPReq1Valid
1133          */
1134         REG_INIT(AB8500_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xe8),
1135         /*
1136          * 0x01, VextSupply1HwHPReq1Valid
1137          * 0x02, VextSupply2HwHPReq1Valid
1138          * 0x04, VextSupply3HwHPReq1Valid
1139          */
1140         REG_INIT(AB8500_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x07),
1141         /*
1142          * 0x08, VanaHwHPReq2Valid
1143          * 0x20, Vaux1HwHPReq2Valid
1144          * 0x40, Vaux2HwHPReq2Valid
1145          * 0x80, Vaux3HwHPReq2Valid
1146          */
1147         REG_INIT(AB8500_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xe8),
1148         /*
1149          * 0x01, VextSupply1HwHPReq2Valid
1150          * 0x02, VextSupply2HwHPReq2Valid
1151          * 0x04, VextSupply3HwHPReq2Valid
1152          */
1153         REG_INIT(AB8500_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x07),
1154         /*
1155          * 0x20, VanaSwHPReqValid
1156          * 0x80, Vaux1SwHPReqValid
1157          */
1158         REG_INIT(AB8500_REGUSWHPREQVALID1,      0x03, 0x0d, 0xa0),
1159         /*
1160          * 0x01, Vaux2SwHPReqValid
1161          * 0x02, Vaux3SwHPReqValid
1162          * 0x04, VextSupply1SwHPReqValid
1163          * 0x08, VextSupply2SwHPReqValid
1164          * 0x10, VextSupply3SwHPReqValid
1165          */
1166         REG_INIT(AB8500_REGUSWHPREQVALID2,      0x03, 0x0e, 0x1f),
1167         /*
1168          * 0x02, SysClkReq2Valid1
1169          * 0x04, SysClkReq3Valid1
1170          * 0x08, SysClkReq4Valid1
1171          * 0x10, SysClkReq5Valid1
1172          * 0x20, SysClkReq6Valid1
1173          * 0x40, SysClkReq7Valid1
1174          * 0x80, SysClkReq8Valid1
1175          */
1176         REG_INIT(AB8500_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0xfe),
1177         /*
1178          * 0x02, SysClkReq2Valid2
1179          * 0x04, SysClkReq3Valid2
1180          * 0x08, SysClkReq4Valid2
1181          * 0x10, SysClkReq5Valid2
1182          * 0x20, SysClkReq6Valid2
1183          * 0x40, SysClkReq7Valid2
1184          * 0x80, SysClkReq8Valid2
1185          */
1186         REG_INIT(AB8500_REGUSYSCLKREQVALID2,    0x03, 0x10, 0xfe),
1187         /*
1188          * 0x02, VTVoutEna
1189          * 0x04, Vintcore12Ena
1190          * 0x38, Vintcore12Sel
1191          * 0x40, Vintcore12LP
1192          * 0x80, VTVoutLP
1193          */
1194         REG_INIT(AB8500_REGUMISC1,              0x03, 0x80, 0xfe),
1195         /*
1196          * 0x02, VaudioEna
1197          * 0x04, VdmicEna
1198          * 0x08, Vamic1Ena
1199          * 0x10, Vamic2Ena
1200          */
1201         REG_INIT(AB8500_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1202         /*
1203          * 0x01, Vamic1_dzout
1204          * 0x02, Vamic2_dzout
1205          */
1206         REG_INIT(AB8500_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1207         /*
1208          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1209          * 0x0c, VanaRegu
1210          */
1211         REG_INIT(AB8500_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1212         /*
1213          * 0x01, VrefDDREna
1214          * 0x02, VrefDDRSleepMode
1215          */
1216         REG_INIT(AB8500_VREFDDR,                0x04, 0x07, 0x03),
1217         /*
1218          * 0x03, VextSupply1Regu
1219          * 0x0c, VextSupply2Regu
1220          * 0x30, VextSupply3Regu
1221          * 0x40, ExtSupply2Bypass
1222          * 0x80, ExtSupply3Bypass
1223          */
1224         REG_INIT(AB8500_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1225         /*
1226          * 0x03, Vaux1Regu
1227          * 0x0c, Vaux2Regu
1228          */
1229         REG_INIT(AB8500_VAUX12REGU,             0x04, 0x09, 0x0f),
1230         /*
1231          * 0x03, Vaux3Regu
1232          */
1233         REG_INIT(AB8500_VRF1VAUX3REGU,          0x04, 0x0a, 0x03),
1234         /*
1235          * 0x0f, Vaux1Sel
1236          */
1237         REG_INIT(AB8500_VAUX1SEL,               0x04, 0x1f, 0x0f),
1238         /*
1239          * 0x0f, Vaux2Sel
1240          */
1241         REG_INIT(AB8500_VAUX2SEL,               0x04, 0x20, 0x0f),
1242         /*
1243          * 0x07, Vaux3Sel
1244          */
1245         REG_INIT(AB8500_VRF1VAUX3SEL,           0x04, 0x21, 0x07),
1246         /*
1247          * 0x01, VextSupply12LP
1248          */
1249         REG_INIT(AB8500_REGUCTRL2SPARE,         0x04, 0x22, 0x01),
1250         /*
1251          * 0x04, Vaux1Disch
1252          * 0x08, Vaux2Disch
1253          * 0x10, Vaux3Disch
1254          * 0x20, Vintcore12Disch
1255          * 0x40, VTVoutDisch
1256          * 0x80, VaudioDisch
1257          */
1258         REG_INIT(AB8500_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1259         /*
1260          * 0x02, VanaDisch
1261          * 0x04, VdmicPullDownEna
1262          * 0x10, VdmicDisch
1263          */
1264         REG_INIT(AB8500_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1265 };
1266
1267 /* AB8505 register init */
1268 static struct ab8500_reg_init ab8505_reg_init[] = {
1269         /*
1270          * 0x03, VarmRequestCtrl
1271          * 0x0c, VsmpsCRequestCtrl
1272          * 0x30, VsmpsARequestCtrl
1273          * 0xc0, VsmpsBRequestCtrl
1274          */
1275         REG_INIT(AB8505_REGUREQUESTCTRL1,       0x03, 0x03, 0xff),
1276         /*
1277          * 0x03, VsafeRequestCtrl
1278          * 0x0c, VpllRequestCtrl
1279          * 0x30, VanaRequestCtrl
1280          */
1281         REG_INIT(AB8505_REGUREQUESTCTRL2,       0x03, 0x04, 0x3f),
1282         /*
1283          * 0x30, Vaux1RequestCtrl
1284          * 0xc0, Vaux2RequestCtrl
1285          */
1286         REG_INIT(AB8505_REGUREQUESTCTRL3,       0x03, 0x05, 0xf0),
1287         /*
1288          * 0x03, Vaux3RequestCtrl
1289          * 0x04, SwHPReq
1290          */
1291         REG_INIT(AB8505_REGUREQUESTCTRL4,       0x03, 0x06, 0x07),
1292         /*
1293          * 0x01, VsmpsASysClkReq1HPValid
1294          * 0x02, VsmpsBSysClkReq1HPValid
1295          * 0x04, VsafeSysClkReq1HPValid
1296          * 0x08, VanaSysClkReq1HPValid
1297          * 0x10, VpllSysClkReq1HPValid
1298          * 0x20, Vaux1SysClkReq1HPValid
1299          * 0x40, Vaux2SysClkReq1HPValid
1300          * 0x80, Vaux3SysClkReq1HPValid
1301          */
1302         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID1, 0x03, 0x07, 0xff),
1303         /*
1304          * 0x01, VsmpsCSysClkReq1HPValid
1305          * 0x02, VarmSysClkReq1HPValid
1306          * 0x04, VbbSysClkReq1HPValid
1307          * 0x08, VsmpsMSysClkReq1HPValid
1308          */
1309         REG_INIT(AB8505_REGUSYSCLKREQ1HPVALID2, 0x03, 0x08, 0x0f),
1310         /*
1311          * 0x01, VsmpsAHwHPReq1Valid
1312          * 0x02, VsmpsBHwHPReq1Valid
1313          * 0x04, VsafeHwHPReq1Valid
1314          * 0x08, VanaHwHPReq1Valid
1315          * 0x10, VpllHwHPReq1Valid
1316          * 0x20, Vaux1HwHPReq1Valid
1317          * 0x40, Vaux2HwHPReq1Valid
1318          * 0x80, Vaux3HwHPReq1Valid
1319          */
1320         REG_INIT(AB8505_REGUHWHPREQ1VALID1,     0x03, 0x09, 0xff),
1321         /*
1322          * 0x08, VsmpsMHwHPReq1Valid
1323          */
1324         REG_INIT(AB8505_REGUHWHPREQ1VALID2,     0x03, 0x0a, 0x08),
1325         /*
1326          * 0x01, VsmpsAHwHPReq2Valid
1327          * 0x02, VsmpsBHwHPReq2Valid
1328          * 0x04, VsafeHwHPReq2Valid
1329          * 0x08, VanaHwHPReq2Valid
1330          * 0x10, VpllHwHPReq2Valid
1331          * 0x20, Vaux1HwHPReq2Valid
1332          * 0x40, Vaux2HwHPReq2Valid
1333          * 0x80, Vaux3HwHPReq2Valid
1334          */
1335         REG_INIT(AB8505_REGUHWHPREQ2VALID1,     0x03, 0x0b, 0xff),
1336         /*
1337          * 0x08, VsmpsMHwHPReq2Valid
1338          */
1339         REG_INIT(AB8505_REGUHWHPREQ2VALID2,     0x03, 0x0c, 0x08),
1340         /*
1341          * 0x01, VsmpsCSwHPReqValid
1342          * 0x02, VarmSwHPReqValid
1343          * 0x04, VsmpsASwHPReqValid
1344          * 0x08, VsmpsBSwHPReqValid
1345          * 0x10, VsafeSwHPReqValid
1346          * 0x20, VanaSwHPReqValid
1347          * 0x40, VpllSwHPReqValid
1348          * 0x80, Vaux1SwHPReqValid
1349          */
1350         REG_INIT(AB8505_REGUSWHPREQVALID1,      0x03, 0x0d, 0xff),
1351         /*
1352          * 0x01, Vaux2SwHPReqValid
1353          * 0x02, Vaux3SwHPReqValid
1354          * 0x20, VsmpsMSwHPReqValid
1355          */
1356         REG_INIT(AB8505_REGUSWHPREQVALID2,      0x03, 0x0e, 0x23),
1357         /*
1358          * 0x02, SysClkReq2Valid1
1359          * 0x04, SysClkReq3Valid1
1360          * 0x08, SysClkReq4Valid1
1361          */
1362         REG_INIT(AB8505_REGUSYSCLKREQVALID1,    0x03, 0x0f, 0x0e),
1363         /*
1364          * 0x02, SysClkReq2Valid2
1365          * 0x04, SysClkReq3Valid2
1366          * 0x08, SysClkReq4Valid2
1367          */
1368         REG_INIT(AB8505_REGUSYSCLKREQVALID2,    0x03, 0x10, 0x0e),
1369         /*
1370          * 0x01, Vaux4SwHPReqValid
1371          * 0x02, Vaux4HwHPReq2Valid
1372          * 0x04, Vaux4HwHPReq1Valid
1373          * 0x08, Vaux4SysClkReq1HPValid
1374          */
1375         REG_INIT(AB8505_REGUVAUX4REQVALID,      0x03, 0x11, 0x0f),
1376         /*
1377          * 0x02, VadcEna
1378          * 0x04, VintCore12Ena
1379          * 0x38, VintCore12Sel
1380          * 0x40, VintCore12LP
1381          * 0x80, VadcLP
1382          */
1383         REG_INIT(AB8505_REGUMISC1,              0x03, 0x80, 0xfe),
1384         /*
1385          * 0x02, VaudioEna
1386          * 0x04, VdmicEna
1387          * 0x08, Vamic1Ena
1388          * 0x10, Vamic2Ena
1389          */
1390         REG_INIT(AB8505_VAUDIOSUPPLY,           0x03, 0x83, 0x1e),
1391         /*
1392          * 0x01, Vamic1_dzout
1393          * 0x02, Vamic2_dzout
1394          */
1395         REG_INIT(AB8505_REGUCTRL1VAMIC,         0x03, 0x84, 0x03),
1396         /*
1397          * 0x03, VsmpsARegu
1398          * 0x0c, VsmpsASelCtrl
1399          * 0x10, VsmpsAAutoMode
1400          * 0x20, VsmpsAPWMMode
1401          */
1402         REG_INIT(AB8505_VSMPSAREGU,             0x04, 0x03, 0x3f),
1403         /*
1404          * 0x03, VsmpsBRegu
1405          * 0x0c, VsmpsBSelCtrl
1406          * 0x10, VsmpsBAutoMode
1407          * 0x20, VsmpsBPWMMode
1408          */
1409         REG_INIT(AB8505_VSMPSBREGU,             0x04, 0x04, 0x3f),
1410         /*
1411          * 0x03, VsafeRegu
1412          * 0x0c, VsafeSelCtrl
1413          * 0x10, VsafeAutoMode
1414          * 0x20, VsafePWMMode
1415          */
1416         REG_INIT(AB8505_VSAFEREGU,              0x04, 0x05, 0x3f),
1417         /*
1418          * 0x03, VpllRegu (NOTE! PRCMU register bits)
1419          * 0x0c, VanaRegu
1420          */
1421         REG_INIT(AB8505_VPLLVANAREGU,           0x04, 0x06, 0x0f),
1422         /*
1423          * 0x03, VextSupply1Regu
1424          * 0x0c, VextSupply2Regu
1425          * 0x30, VextSupply3Regu
1426          * 0x40, ExtSupply2Bypass
1427          * 0x80, ExtSupply3Bypass
1428          */
1429         REG_INIT(AB8505_EXTSUPPLYREGU,          0x04, 0x08, 0xff),
1430         /*
1431          * 0x03, Vaux1Regu
1432          * 0x0c, Vaux2Regu
1433          */
1434         REG_INIT(AB8505_VAUX12REGU,             0x04, 0x09, 0x0f),
1435         /*
1436          * 0x0f, Vaux3Regu
1437          */
1438         REG_INIT(AB8505_VRF1VAUX3REGU,          0x04, 0x0a, 0x0f),
1439         /*
1440          * 0x3f, VsmpsASel1
1441          */
1442         REG_INIT(AB8505_VSMPSASEL1,             0x04, 0x13, 0x3f),
1443         /*
1444          * 0x3f, VsmpsASel2
1445          */
1446         REG_INIT(AB8505_VSMPSASEL2,             0x04, 0x14, 0x3f),
1447         /*
1448          * 0x3f, VsmpsASel3
1449          */
1450         REG_INIT(AB8505_VSMPSASEL3,             0x04, 0x15, 0x3f),
1451         /*
1452          * 0x3f, VsmpsBSel1
1453          */
1454         REG_INIT(AB8505_VSMPSBSEL1,             0x04, 0x17, 0x3f),
1455         /*
1456          * 0x3f, VsmpsBSel2
1457          */
1458         REG_INIT(AB8505_VSMPSBSEL2,             0x04, 0x18, 0x3f),
1459         /*
1460          * 0x3f, VsmpsBSel3
1461          */
1462         REG_INIT(AB8505_VSMPSBSEL3,             0x04, 0x19, 0x3f),
1463         /*
1464          * 0x7f, VsafeSel1
1465          */
1466         REG_INIT(AB8505_VSAFESEL1,              0x04, 0x1b, 0x7f),
1467         /*
1468          * 0x3f, VsafeSel2
1469          */
1470         REG_INIT(AB8505_VSAFESEL2,              0x04, 0x1c, 0x7f),
1471         /*
1472          * 0x3f, VsafeSel3
1473          */
1474         REG_INIT(AB8505_VSAFESEL3,              0x04, 0x1d, 0x7f),
1475         /*
1476          * 0x0f, Vaux1Sel
1477          */
1478         REG_INIT(AB8505_VAUX1SEL,               0x04, 0x1f, 0x0f),
1479         /*
1480          * 0x0f, Vaux2Sel
1481          */
1482         REG_INIT(AB8505_VAUX2SEL,               0x04, 0x20, 0x0f),
1483         /*
1484          * 0x07, Vaux3Sel
1485          * 0x30, VRF1Sel
1486          */
1487         REG_INIT(AB8505_VRF1VAUX3SEL,           0x04, 0x21, 0x37),
1488         /*
1489          * 0x03, Vaux4RequestCtrl
1490          */
1491         REG_INIT(AB8505_VAUX4REQCTRL,           0x04, 0x2d, 0x03),
1492         /*
1493          * 0x03, Vaux4Regu
1494          */
1495         REG_INIT(AB8505_VAUX4REGU,              0x04, 0x2e, 0x03),
1496         /*
1497          * 0x0f, Vaux4Sel
1498          */
1499         REG_INIT(AB8505_VAUX4SEL,               0x04, 0x2f, 0x0f),
1500         /*
1501          * 0x04, Vaux1Disch
1502          * 0x08, Vaux2Disch
1503          * 0x10, Vaux3Disch
1504          * 0x20, Vintcore12Disch
1505          * 0x40, VTVoutDisch
1506          * 0x80, VaudioDisch
1507          */
1508         REG_INIT(AB8505_REGUCTRLDISCH,          0x04, 0x43, 0xfc),
1509         /*
1510          * 0x02, VanaDisch
1511          * 0x04, VdmicPullDownEna
1512          * 0x10, VdmicDisch
1513          */
1514         REG_INIT(AB8505_REGUCTRLDISCH2,         0x04, 0x44, 0x16),
1515         /*
1516          * 0x01, Vaux4Disch
1517          */
1518         REG_INIT(AB8505_REGUCTRLDISCH3,         0x04, 0x48, 0x01),
1519         /*
1520          * 0x07, Vaux5Sel
1521          * 0x08, Vaux5LP
1522          * 0x10, Vaux5Ena
1523          * 0x20, Vaux5Disch
1524          * 0x40, Vaux5DisSfst
1525          * 0x80, Vaux5DisPulld
1526          */
1527         REG_INIT(AB8505_CTRLVAUX5,              0x01, 0x55, 0xff),
1528         /*
1529          * 0x07, Vaux6Sel
1530          * 0x08, Vaux6LP
1531          * 0x10, Vaux6Ena
1532          * 0x80, Vaux6DisPulld
1533          */
1534         REG_INIT(AB8505_CTRLVAUX6,              0x01, 0x56, 0x9f),
1535 };
1536
1537 static struct of_regulator_match ab8500_regulator_match[] = {
1538         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8500_LDO_AUX1, },
1539         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8500_LDO_AUX2, },
1540         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8500_LDO_AUX3, },
1541         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8500_LDO_INTCORE, },
1542         { .name = "ab8500_ldo_tvout",   .driver_data = (void *) AB8500_LDO_TVOUT, },
1543         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8500_LDO_AUDIO, },
1544         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8500_LDO_ANAMIC1, },
1545         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8500_LDO_ANAMIC2, },
1546         { .name = "ab8500_ldo_dmic",    .driver_data = (void *) AB8500_LDO_DMIC, },
1547         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8500_LDO_ANA, },
1548 };
1549
1550 static struct of_regulator_match ab8505_regulator_match[] = {
1551         { .name = "ab8500_ldo_aux1",    .driver_data = (void *) AB8505_LDO_AUX1, },
1552         { .name = "ab8500_ldo_aux2",    .driver_data = (void *) AB8505_LDO_AUX2, },
1553         { .name = "ab8500_ldo_aux3",    .driver_data = (void *) AB8505_LDO_AUX3, },
1554         { .name = "ab8500_ldo_aux4",    .driver_data = (void *) AB8505_LDO_AUX4, },
1555         { .name = "ab8500_ldo_aux5",    .driver_data = (void *) AB8505_LDO_AUX5, },
1556         { .name = "ab8500_ldo_aux6",    .driver_data = (void *) AB8505_LDO_AUX6, },
1557         { .name = "ab8500_ldo_intcore", .driver_data = (void *) AB8505_LDO_INTCORE, },
1558         { .name = "ab8500_ldo_adc",     .driver_data = (void *) AB8505_LDO_ADC, },
1559         { .name = "ab8500_ldo_audio",   .driver_data = (void *) AB8505_LDO_AUDIO, },
1560         { .name = "ab8500_ldo_anamic1", .driver_data = (void *) AB8505_LDO_ANAMIC1, },
1561         { .name = "ab8500_ldo_anamic2", .driver_data = (void *) AB8505_LDO_ANAMIC2, },
1562         { .name = "ab8500_ldo_aux8",    .driver_data = (void *) AB8505_LDO_AUX8, },
1563         { .name = "ab8500_ldo_ana",     .driver_data = (void *) AB8505_LDO_ANA, },
1564 };
1565
1566 static struct {
1567         struct ab8500_regulator_info *info;
1568         int info_size;
1569         struct ab8500_reg_init *init;
1570         int init_size;
1571         struct of_regulator_match *match;
1572         int match_size;
1573 } abx500_regulator;
1574
1575 static void abx500_get_regulator_info(struct ab8500 *ab8500)
1576 {
1577         if (is_ab8505(ab8500)) {
1578                 abx500_regulator.info = ab8505_regulator_info;
1579                 abx500_regulator.info_size = ARRAY_SIZE(ab8505_regulator_info);
1580                 abx500_regulator.init = ab8505_reg_init;
1581                 abx500_regulator.init_size = AB8505_NUM_REGULATOR_REGISTERS;
1582                 abx500_regulator.match = ab8505_regulator_match;
1583                 abx500_regulator.match_size = ARRAY_SIZE(ab8505_regulator_match);
1584         } else {
1585                 abx500_regulator.info = ab8500_regulator_info;
1586                 abx500_regulator.info_size = ARRAY_SIZE(ab8500_regulator_info);
1587                 abx500_regulator.init = ab8500_reg_init;
1588                 abx500_regulator.init_size = AB8500_NUM_REGULATOR_REGISTERS;
1589                 abx500_regulator.match = ab8500_regulator_match;
1590                 abx500_regulator.match_size = ARRAY_SIZE(ab8500_regulator_match);
1591         }
1592 }
1593
1594 static int ab8500_regulator_register(struct platform_device *pdev,
1595                                      struct regulator_init_data *init_data,
1596                                      int id, struct device_node *np)
1597 {
1598         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1599         struct ab8500_regulator_info *info = NULL;
1600         struct regulator_config config = { };
1601         struct regulator_dev *rdev;
1602
1603         /* assign per-regulator data */
1604         info = &abx500_regulator.info[id];
1605         info->dev = &pdev->dev;
1606
1607         config.dev = &pdev->dev;
1608         config.init_data = init_data;
1609         config.driver_data = info;
1610         config.of_node = np;
1611
1612         /* fix for hardware before ab8500v2.0 */
1613         if (is_ab8500_1p1_or_earlier(ab8500)) {
1614                 if (info->desc.id == AB8500_LDO_AUX3) {
1615                         info->desc.n_voltages =
1616                                 ARRAY_SIZE(ldo_vauxn_voltages);
1617                         info->desc.volt_table = ldo_vauxn_voltages;
1618                         info->voltage_mask = 0xf;
1619                 }
1620         }
1621
1622         /* register regulator with framework */
1623         rdev = devm_regulator_register(&pdev->dev, &info->desc, &config);
1624         if (IS_ERR(rdev)) {
1625                 dev_err(&pdev->dev, "failed to register regulator %s\n",
1626                         info->desc.name);
1627                 return PTR_ERR(rdev);
1628         }
1629
1630         return 0;
1631 }
1632
1633 static int ab8500_regulator_probe(struct platform_device *pdev)
1634 {
1635         struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent);
1636         struct device_node *np = pdev->dev.of_node;
1637         struct of_regulator_match *match;
1638         int err, i;
1639
1640         if (!ab8500) {
1641                 dev_err(&pdev->dev, "null mfd parent\n");
1642                 return -EINVAL;
1643         }
1644
1645         abx500_get_regulator_info(ab8500);
1646
1647         err = of_regulator_match(&pdev->dev, np,
1648                                  abx500_regulator.match,
1649                                  abx500_regulator.match_size);
1650         if (err < 0) {
1651                 dev_err(&pdev->dev,
1652                         "Error parsing regulator init data: %d\n", err);
1653                 return err;
1654         }
1655
1656         match = abx500_regulator.match;
1657         for (i = 0; i < abx500_regulator.info_size; i++) {
1658                 err = ab8500_regulator_register(pdev, match[i].init_data, i,
1659                                                 match[i].of_node);
1660                 if (err)
1661                         return err;
1662         }
1663
1664         return 0;
1665 }
1666
1667 static struct platform_driver ab8500_regulator_driver = {
1668         .probe = ab8500_regulator_probe,
1669         .driver         = {
1670                 .name   = "ab8500-regulator",
1671         },
1672 };
1673
1674 static int __init ab8500_regulator_init(void)
1675 {
1676         int ret;
1677
1678         ret = platform_driver_register(&ab8500_regulator_driver);
1679         if (ret != 0)
1680                 pr_err("Failed to register ab8500 regulator: %d\n", ret);
1681
1682         return ret;
1683 }
1684 subsys_initcall(ab8500_regulator_init);
1685
1686 static void __exit ab8500_regulator_exit(void)
1687 {
1688         platform_driver_unregister(&ab8500_regulator_driver);
1689 }
1690 module_exit(ab8500_regulator_exit);
1691
1692 MODULE_LICENSE("GPL v2");
1693 MODULE_AUTHOR("Sundar Iyer <sundar.iyer@stericsson.com>");
1694 MODULE_AUTHOR("Bengt Jonsson <bengt.g.jonsson@stericsson.com>");
1695 MODULE_AUTHOR("Daniel Willerud <daniel.willerud@stericsson.com>");
1696 MODULE_DESCRIPTION("Regulator Driver for ST-Ericsson AB8500 Mixed-Sig PMIC");
1697 MODULE_ALIAS("platform:ab8500-regulator");