2 * Qualcomm Wireless Connectivity Subsystem Peripheral Image Loader
4 * Copyright (C) 2016 Linaro Ltd
5 * Copyright (C) 2014 Sony Mobile Communications AB
6 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/clk.h>
19 #include <linux/delay.h>
20 #include <linux/firmware.h>
21 #include <linux/interrupt.h>
22 #include <linux/kernel.h>
23 #include <linux/module.h>
25 #include <linux/of_address.h>
26 #include <linux/of_device.h>
27 #include <linux/platform_device.h>
28 #include <linux/qcom_scm.h>
29 #include <linux/regulator/consumer.h>
30 #include <linux/remoteproc.h>
31 #include <linux/soc/qcom/mdt_loader.h>
32 #include <linux/soc/qcom/smem.h>
33 #include <linux/soc/qcom/smem_state.h>
34 #include <linux/rpmsg/qcom_smd.h>
36 #include "qcom_common.h"
37 #include "remoteproc_internal.h"
38 #include "qcom_wcnss.h"
40 #define WCNSS_CRASH_REASON_SMEM 422
41 #define WCNSS_FIRMWARE_NAME "wcnss.mdt"
42 #define WCNSS_PAS_ID 6
44 #define WCNSS_SPARE_NVBIN_DLND BIT(25)
46 #define WCNSS_PMU_IRIS_XO_CFG BIT(3)
47 #define WCNSS_PMU_IRIS_XO_EN BIT(4)
48 #define WCNSS_PMU_GC_BUS_MUX_SEL_TOP BIT(5)
49 #define WCNSS_PMU_IRIS_XO_CFG_STS BIT(6) /* 1: in progress, 0: done */
51 #define WCNSS_PMU_IRIS_RESET BIT(7)
52 #define WCNSS_PMU_IRIS_RESET_STS BIT(8) /* 1: in progress, 0: done */
53 #define WCNSS_PMU_IRIS_XO_READ BIT(9)
54 #define WCNSS_PMU_IRIS_XO_READ_STS BIT(10)
56 #define WCNSS_PMU_XO_MODE_MASK GENMASK(2, 1)
57 #define WCNSS_PMU_XO_MODE_19p2 0
58 #define WCNSS_PMU_XO_MODE_48 3
64 const struct wcnss_vreg_info *vregs;
72 void __iomem *pmu_cfg;
73 void __iomem *spare_out;
83 struct qcom_smem_state *state;
86 struct mutex iris_lock;
87 struct qcom_iris *iris;
89 struct regulator_bulk_data *vregs;
92 struct completion start_done;
93 struct completion stop_done;
96 phys_addr_t mem_reloc;
100 struct qcom_rproc_subdev smd_subdev;
103 static const struct wcnss_data riva_data = {
105 .spare_offset = 0xb4,
107 .vregs = (struct wcnss_vreg_info[]) {
108 { "vddmx", 1050000, 1150000, 0 },
109 { "vddcx", 1050000, 1150000, 0 },
110 { "vddpx", 1800000, 1800000, 0 },
115 static const struct wcnss_data pronto_v1_data = {
116 .pmu_offset = 0x1004,
117 .spare_offset = 0x1088,
119 .vregs = (struct wcnss_vreg_info[]) {
120 { "vddmx", 950000, 1150000, 0 },
121 { "vddcx", .super_turbo = true},
122 { "vddpx", 1800000, 1800000, 0 },
127 static const struct wcnss_data pronto_v2_data = {
128 .pmu_offset = 0x1004,
129 .spare_offset = 0x1088,
131 .vregs = (struct wcnss_vreg_info[]) {
132 { "vddmx", 1287500, 1287500, 0 },
133 { "vddcx", .super_turbo = true },
134 { "vddpx", 1800000, 1800000, 0 },
139 void qcom_wcnss_assign_iris(struct qcom_wcnss *wcnss,
140 struct qcom_iris *iris,
143 mutex_lock(&wcnss->iris_lock);
146 wcnss->use_48mhz_xo = use_48mhz_xo;
148 mutex_unlock(&wcnss->iris_lock);
151 static int wcnss_load(struct rproc *rproc, const struct firmware *fw)
153 struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
155 return qcom_mdt_load(wcnss->dev, fw, rproc->firmware, WCNSS_PAS_ID,
156 wcnss->mem_region, wcnss->mem_phys, wcnss->mem_size);
159 static void wcnss_indicate_nv_download(struct qcom_wcnss *wcnss)
163 /* Indicate NV download capability */
164 val = readl(wcnss->spare_out);
165 val |= WCNSS_SPARE_NVBIN_DLND;
166 writel(val, wcnss->spare_out);
169 static void wcnss_configure_iris(struct qcom_wcnss *wcnss)
173 /* Clear PMU cfg register */
174 writel(0, wcnss->pmu_cfg);
176 val = WCNSS_PMU_GC_BUS_MUX_SEL_TOP | WCNSS_PMU_IRIS_XO_EN;
177 writel(val, wcnss->pmu_cfg);
180 val &= ~WCNSS_PMU_XO_MODE_MASK;
181 if (wcnss->use_48mhz_xo)
182 val |= WCNSS_PMU_XO_MODE_48 << 1;
184 val |= WCNSS_PMU_XO_MODE_19p2 << 1;
185 writel(val, wcnss->pmu_cfg);
188 val |= WCNSS_PMU_IRIS_RESET;
189 writel(val, wcnss->pmu_cfg);
191 /* Wait for PMU.iris_reg_reset_sts */
192 while (readl(wcnss->pmu_cfg) & WCNSS_PMU_IRIS_RESET_STS)
195 /* Clear IRIS reset */
196 val &= ~WCNSS_PMU_IRIS_RESET;
197 writel(val, wcnss->pmu_cfg);
199 /* Start IRIS XO configuration */
200 val |= WCNSS_PMU_IRIS_XO_CFG;
201 writel(val, wcnss->pmu_cfg);
203 /* Wait for XO configuration to finish */
204 while (readl(wcnss->pmu_cfg) & WCNSS_PMU_IRIS_XO_CFG_STS)
207 /* Stop IRIS XO configuration */
208 val &= ~WCNSS_PMU_GC_BUS_MUX_SEL_TOP;
209 val &= ~WCNSS_PMU_IRIS_XO_CFG;
210 writel(val, wcnss->pmu_cfg);
212 /* Add some delay for XO to settle */
216 static int wcnss_start(struct rproc *rproc)
218 struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
221 mutex_lock(&wcnss->iris_lock);
223 dev_err(wcnss->dev, "no iris registered\n");
225 goto release_iris_lock;
228 ret = regulator_bulk_enable(wcnss->num_vregs, wcnss->vregs);
230 goto release_iris_lock;
232 ret = qcom_iris_enable(wcnss->iris);
234 goto disable_regulators;
236 wcnss_indicate_nv_download(wcnss);
237 wcnss_configure_iris(wcnss);
239 ret = qcom_scm_pas_auth_and_reset(WCNSS_PAS_ID);
242 "failed to authenticate image and release reset\n");
246 ret = wait_for_completion_timeout(&wcnss->start_done,
247 msecs_to_jiffies(5000));
248 if (wcnss->ready_irq > 0 && ret == 0) {
249 /* We have a ready_irq, but it didn't fire in time. */
250 dev_err(wcnss->dev, "start timed out\n");
251 qcom_scm_pas_shutdown(WCNSS_PAS_ID);
259 qcom_iris_disable(wcnss->iris);
261 regulator_bulk_disable(wcnss->num_vregs, wcnss->vregs);
263 mutex_unlock(&wcnss->iris_lock);
268 static int wcnss_stop(struct rproc *rproc)
270 struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
274 qcom_smem_state_update_bits(wcnss->state,
275 BIT(wcnss->stop_bit),
276 BIT(wcnss->stop_bit));
278 ret = wait_for_completion_timeout(&wcnss->stop_done,
279 msecs_to_jiffies(5000));
281 dev_err(wcnss->dev, "timed out on wait\n");
283 qcom_smem_state_update_bits(wcnss->state,
284 BIT(wcnss->stop_bit),
288 ret = qcom_scm_pas_shutdown(WCNSS_PAS_ID);
290 dev_err(wcnss->dev, "failed to shutdown: %d\n", ret);
295 static void *wcnss_da_to_va(struct rproc *rproc, u64 da, int len)
297 struct qcom_wcnss *wcnss = (struct qcom_wcnss *)rproc->priv;
300 offset = da - wcnss->mem_reloc;
301 if (offset < 0 || offset + len > wcnss->mem_size)
304 return wcnss->mem_region + offset;
307 static const struct rproc_ops wcnss_ops = {
308 .start = wcnss_start,
310 .da_to_va = wcnss_da_to_va,
314 static irqreturn_t wcnss_wdog_interrupt(int irq, void *dev)
316 struct qcom_wcnss *wcnss = dev;
318 rproc_report_crash(wcnss->rproc, RPROC_WATCHDOG);
323 static irqreturn_t wcnss_fatal_interrupt(int irq, void *dev)
325 struct qcom_wcnss *wcnss = dev;
329 msg = qcom_smem_get(QCOM_SMEM_HOST_ANY, WCNSS_CRASH_REASON_SMEM, &len);
330 if (!IS_ERR(msg) && len > 0 && msg[0])
331 dev_err(wcnss->dev, "fatal error received: %s\n", msg);
333 rproc_report_crash(wcnss->rproc, RPROC_FATAL_ERROR);
341 static irqreturn_t wcnss_ready_interrupt(int irq, void *dev)
343 struct qcom_wcnss *wcnss = dev;
345 complete(&wcnss->start_done);
350 static irqreturn_t wcnss_handover_interrupt(int irq, void *dev)
353 * XXX: At this point we're supposed to release the resources that we
354 * have been holding on behalf of the WCNSS. Unfortunately this
355 * interrupt comes way before the other side seems to be done.
357 * So we're currently relying on the ready interrupt firing later then
358 * this and we just disable the resources at the end of wcnss_start().
364 static irqreturn_t wcnss_stop_ack_interrupt(int irq, void *dev)
366 struct qcom_wcnss *wcnss = dev;
368 complete(&wcnss->stop_done);
373 static int wcnss_init_regulators(struct qcom_wcnss *wcnss,
374 const struct wcnss_vreg_info *info,
377 struct regulator_bulk_data *bulk;
381 bulk = devm_kcalloc(wcnss->dev,
382 num_vregs, sizeof(struct regulator_bulk_data),
387 for (i = 0; i < num_vregs; i++)
388 bulk[i].supply = info[i].name;
390 ret = devm_regulator_bulk_get(wcnss->dev, num_vregs, bulk);
394 for (i = 0; i < num_vregs; i++) {
395 if (info[i].max_voltage)
396 regulator_set_voltage(bulk[i].consumer,
398 info[i].max_voltage);
401 regulator_set_load(bulk[i].consumer, info[i].load_uA);
405 wcnss->num_vregs = num_vregs;
410 static int wcnss_request_irq(struct qcom_wcnss *wcnss,
411 struct platform_device *pdev,
414 irq_handler_t thread_fn)
418 ret = platform_get_irq_byname(pdev, name);
419 if (ret < 0 && optional) {
420 dev_dbg(&pdev->dev, "no %s IRQ defined, ignoring\n", name);
422 } else if (ret < 0) {
423 dev_err(&pdev->dev, "no %s IRQ defined\n", name);
427 ret = devm_request_threaded_irq(&pdev->dev, ret,
429 IRQF_TRIGGER_RISING | IRQF_ONESHOT,
432 dev_err(&pdev->dev, "request %s IRQ failed\n", name);
437 static int wcnss_alloc_memory_region(struct qcom_wcnss *wcnss)
439 struct device_node *node;
443 node = of_parse_phandle(wcnss->dev->of_node, "memory-region", 0);
445 dev_err(wcnss->dev, "no memory-region specified\n");
449 ret = of_address_to_resource(node, 0, &r);
453 wcnss->mem_phys = wcnss->mem_reloc = r.start;
454 wcnss->mem_size = resource_size(&r);
455 wcnss->mem_region = devm_ioremap_wc(wcnss->dev, wcnss->mem_phys, wcnss->mem_size);
456 if (!wcnss->mem_region) {
457 dev_err(wcnss->dev, "unable to map memory region: %pa+%zx\n",
458 &r.start, wcnss->mem_size);
465 static int wcnss_probe(struct platform_device *pdev)
467 const struct wcnss_data *data;
468 struct qcom_wcnss *wcnss;
469 struct resource *res;
474 data = of_device_get_match_data(&pdev->dev);
476 if (!qcom_scm_is_available())
477 return -EPROBE_DEFER;
479 if (!qcom_scm_pas_supported(WCNSS_PAS_ID)) {
480 dev_err(&pdev->dev, "PAS is not available for WCNSS\n");
484 rproc = rproc_alloc(&pdev->dev, pdev->name, &wcnss_ops,
485 WCNSS_FIRMWARE_NAME, sizeof(*wcnss));
487 dev_err(&pdev->dev, "unable to allocate remoteproc\n");
491 wcnss = (struct qcom_wcnss *)rproc->priv;
492 wcnss->dev = &pdev->dev;
493 wcnss->rproc = rproc;
494 platform_set_drvdata(pdev, wcnss);
496 init_completion(&wcnss->start_done);
497 init_completion(&wcnss->stop_done);
499 mutex_init(&wcnss->iris_lock);
501 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pmu");
502 mmio = devm_ioremap_resource(&pdev->dev, res);
508 ret = wcnss_alloc_memory_region(wcnss);
512 wcnss->pmu_cfg = mmio + data->pmu_offset;
513 wcnss->spare_out = mmio + data->spare_offset;
515 ret = wcnss_init_regulators(wcnss, data->vregs, data->num_vregs);
519 ret = wcnss_request_irq(wcnss, pdev, "wdog", false, wcnss_wdog_interrupt);
522 wcnss->wdog_irq = ret;
524 ret = wcnss_request_irq(wcnss, pdev, "fatal", false, wcnss_fatal_interrupt);
527 wcnss->fatal_irq = ret;
529 ret = wcnss_request_irq(wcnss, pdev, "ready", true, wcnss_ready_interrupt);
532 wcnss->ready_irq = ret;
534 ret = wcnss_request_irq(wcnss, pdev, "handover", true, wcnss_handover_interrupt);
537 wcnss->handover_irq = ret;
539 ret = wcnss_request_irq(wcnss, pdev, "stop-ack", true, wcnss_stop_ack_interrupt);
542 wcnss->stop_ack_irq = ret;
544 if (wcnss->stop_ack_irq) {
545 wcnss->state = qcom_smem_state_get(&pdev->dev, "stop",
547 if (IS_ERR(wcnss->state)) {
548 ret = PTR_ERR(wcnss->state);
553 qcom_add_smd_subdev(rproc, &wcnss->smd_subdev);
555 ret = rproc_add(rproc);
559 return of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
567 static int wcnss_remove(struct platform_device *pdev)
569 struct qcom_wcnss *wcnss = platform_get_drvdata(pdev);
571 of_platform_depopulate(&pdev->dev);
573 qcom_smem_state_put(wcnss->state);
574 rproc_del(wcnss->rproc);
576 qcom_remove_smd_subdev(wcnss->rproc, &wcnss->smd_subdev);
577 rproc_free(wcnss->rproc);
582 static const struct of_device_id wcnss_of_match[] = {
583 { .compatible = "qcom,riva-pil", &riva_data },
584 { .compatible = "qcom,pronto-v1-pil", &pronto_v1_data },
585 { .compatible = "qcom,pronto-v2-pil", &pronto_v2_data },
588 MODULE_DEVICE_TABLE(of, wcnss_of_match);
590 static struct platform_driver wcnss_driver = {
591 .probe = wcnss_probe,
592 .remove = wcnss_remove,
594 .name = "qcom-wcnss-pil",
595 .of_match_table = wcnss_of_match,
599 static int __init wcnss_init(void)
603 ret = platform_driver_register(&wcnss_driver);
607 ret = platform_driver_register(&qcom_iris_driver);
609 platform_driver_unregister(&wcnss_driver);
613 module_init(wcnss_init);
615 static void __exit wcnss_exit(void)
617 platform_driver_unregister(&qcom_iris_driver);
618 platform_driver_unregister(&wcnss_driver);
620 module_exit(wcnss_exit);
622 MODULE_DESCRIPTION("Qualcomm Peripherial Image Loader for Wireless Subsystem");
623 MODULE_LICENSE("GPL v2");