1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015 MediaTek Inc.
4 * Author: Tianping.Fang <tianping.fang@mediatek.com>
8 #include <linux/interrupt.h>
9 #include <linux/mfd/mt6397/core.h>
10 #include <linux/module.h>
11 #include <linux/mutex.h>
12 #include <linux/platform_device.h>
13 #include <linux/regmap.h>
14 #include <linux/rtc.h>
15 #include <linux/mfd/mt6397/rtc.h>
16 #include <linux/mod_devicetable.h>
18 static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
23 ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1);
27 ret = regmap_read_poll_timeout(rtc->regmap,
28 rtc->addr_base + RTC_BBPU, data,
29 !(data & RTC_BBPU_CBUSY),
30 MTK_RTC_POLL_DELAY_US,
31 MTK_RTC_POLL_TIMEOUT);
33 dev_err(rtc->dev, "failed to write WRTGE: %d\n", ret);
38 static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data)
40 struct mt6397_rtc *rtc = data;
44 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta);
45 if ((ret >= 0) && (irqsta & RTC_IRQ_STA_AL)) {
46 rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
47 irqen = irqsta & ~RTC_IRQ_EN_AL;
48 mutex_lock(&rtc->lock);
49 if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN,
51 mtk_rtc_write_trigger(rtc);
52 mutex_unlock(&rtc->lock);
60 static int __mtk_rtc_read_time(struct mt6397_rtc *rtc,
61 struct rtc_time *tm, int *sec)
64 u16 data[RTC_OFFSET_COUNT];
66 mutex_lock(&rtc->lock);
67 ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
68 data, RTC_OFFSET_COUNT);
72 tm->tm_sec = data[RTC_OFFSET_SEC];
73 tm->tm_min = data[RTC_OFFSET_MIN];
74 tm->tm_hour = data[RTC_OFFSET_HOUR];
75 tm->tm_mday = data[RTC_OFFSET_DOM];
76 tm->tm_mon = data[RTC_OFFSET_MTH];
77 tm->tm_year = data[RTC_OFFSET_YEAR];
79 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec);
81 mutex_unlock(&rtc->lock);
85 static int mtk_rtc_read_time(struct device *dev, struct rtc_time *tm)
88 struct mt6397_rtc *rtc = dev_get_drvdata(dev);
92 ret = __mtk_rtc_read_time(rtc, tm, &sec);
95 } while (sec < tm->tm_sec);
97 /* HW register use 7 bits to store year data, minus
98 * RTC_MIN_YEAR_OFFSET before write year data to register, and plus
99 * RTC_MIN_YEAR_OFFSET back after read year from register
101 tm->tm_year += RTC_MIN_YEAR_OFFSET;
103 /* HW register start mon from one, but tm_mon start from zero. */
105 time = rtc_tm_to_time64(tm);
107 /* rtc_tm_to_time64 covert Gregorian date to seconds since
108 * 01-01-1970 00:00:00, and this date is Thursday.
110 days = div_s64(time, 86400);
111 tm->tm_wday = (days + 4) % 7;
117 static int mtk_rtc_set_time(struct device *dev, struct rtc_time *tm)
119 struct mt6397_rtc *rtc = dev_get_drvdata(dev);
121 u16 data[RTC_OFFSET_COUNT];
123 tm->tm_year -= RTC_MIN_YEAR_OFFSET;
126 data[RTC_OFFSET_SEC] = tm->tm_sec;
127 data[RTC_OFFSET_MIN] = tm->tm_min;
128 data[RTC_OFFSET_HOUR] = tm->tm_hour;
129 data[RTC_OFFSET_DOM] = tm->tm_mday;
130 data[RTC_OFFSET_MTH] = tm->tm_mon;
131 data[RTC_OFFSET_YEAR] = tm->tm_year;
133 mutex_lock(&rtc->lock);
134 ret = regmap_bulk_write(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
135 data, RTC_OFFSET_COUNT);
139 /* Time register write to hardware after call trigger function */
140 ret = mtk_rtc_write_trigger(rtc);
143 mutex_unlock(&rtc->lock);
147 static int mtk_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
149 struct rtc_time *tm = &alm->time;
150 struct mt6397_rtc *rtc = dev_get_drvdata(dev);
153 u16 data[RTC_OFFSET_COUNT];
155 mutex_lock(&rtc->lock);
156 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen);
159 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2);
163 ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
164 data, RTC_OFFSET_COUNT);
168 alm->enabled = !!(irqen & RTC_IRQ_EN_AL);
169 alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
170 mutex_unlock(&rtc->lock);
172 tm->tm_sec = data[RTC_OFFSET_SEC];
173 tm->tm_min = data[RTC_OFFSET_MIN];
174 tm->tm_hour = data[RTC_OFFSET_HOUR];
175 tm->tm_mday = data[RTC_OFFSET_DOM];
176 tm->tm_mon = data[RTC_OFFSET_MTH];
177 tm->tm_year = data[RTC_OFFSET_YEAR];
179 tm->tm_year += RTC_MIN_YEAR_OFFSET;
184 mutex_unlock(&rtc->lock);
188 static int mtk_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
190 struct rtc_time *tm = &alm->time;
191 struct mt6397_rtc *rtc = dev_get_drvdata(dev);
193 u16 data[RTC_OFFSET_COUNT];
195 tm->tm_year -= RTC_MIN_YEAR_OFFSET;
198 data[RTC_OFFSET_SEC] = tm->tm_sec;
199 data[RTC_OFFSET_MIN] = tm->tm_min;
200 data[RTC_OFFSET_HOUR] = tm->tm_hour;
201 data[RTC_OFFSET_DOM] = tm->tm_mday;
202 data[RTC_OFFSET_MTH] = tm->tm_mon;
203 data[RTC_OFFSET_YEAR] = tm->tm_year;
205 mutex_lock(&rtc->lock);
207 ret = regmap_bulk_write(rtc->regmap,
208 rtc->addr_base + RTC_AL_SEC,
209 data, RTC_OFFSET_COUNT);
212 ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_AL_MASK,
216 ret = regmap_update_bits(rtc->regmap,
217 rtc->addr_base + RTC_IRQ_EN,
218 RTC_IRQ_EN_ONESHOT_AL,
219 RTC_IRQ_EN_ONESHOT_AL);
223 ret = regmap_update_bits(rtc->regmap,
224 rtc->addr_base + RTC_IRQ_EN,
225 RTC_IRQ_EN_ONESHOT_AL, 0);
230 /* All alarm time register write to hardware after calling
231 * mtk_rtc_write_trigger. This can avoid race condition if alarm
232 * occur happen during writing alarm time register.
234 ret = mtk_rtc_write_trigger(rtc);
236 mutex_unlock(&rtc->lock);
240 static const struct rtc_class_ops mtk_rtc_ops = {
241 .read_time = mtk_rtc_read_time,
242 .set_time = mtk_rtc_set_time,
243 .read_alarm = mtk_rtc_read_alarm,
244 .set_alarm = mtk_rtc_set_alarm,
247 static int mtk_rtc_probe(struct platform_device *pdev)
249 struct resource *res;
250 struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
251 struct mt6397_rtc *rtc;
254 rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL);
258 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
259 rtc->addr_base = res->start;
261 rtc->irq = platform_get_irq(pdev, 0);
265 rtc->regmap = mt6397_chip->regmap;
266 mutex_init(&rtc->lock);
268 platform_set_drvdata(pdev, rtc);
270 rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
271 if (IS_ERR(rtc->rtc_dev))
272 return PTR_ERR(rtc->rtc_dev);
274 ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
275 mtk_rtc_irq_handler_thread,
276 IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
280 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
285 device_init_wakeup(&pdev->dev, 1);
287 rtc->rtc_dev->ops = &mtk_rtc_ops;
289 ret = rtc_register_device(rtc->rtc_dev);
296 free_irq(rtc->irq, rtc);
300 #ifdef CONFIG_PM_SLEEP
301 static int mt6397_rtc_suspend(struct device *dev)
303 struct mt6397_rtc *rtc = dev_get_drvdata(dev);
305 if (device_may_wakeup(dev))
306 enable_irq_wake(rtc->irq);
311 static int mt6397_rtc_resume(struct device *dev)
313 struct mt6397_rtc *rtc = dev_get_drvdata(dev);
315 if (device_may_wakeup(dev))
316 disable_irq_wake(rtc->irq);
322 static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
325 static const struct of_device_id mt6397_rtc_of_match[] = {
326 { .compatible = "mediatek,mt6323-rtc", },
327 { .compatible = "mediatek,mt6397-rtc", },
330 MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);
332 static struct platform_driver mtk_rtc_driver = {
334 .name = "mt6397-rtc",
335 .of_match_table = mt6397_rtc_of_match,
336 .pm = &mt6397_pm_ops,
338 .probe = mtk_rtc_probe,
341 module_platform_driver(mtk_rtc_driver);
343 MODULE_LICENSE("GPL v2");
344 MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
345 MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");