1 // SPDX-License-Identifier: GPL-2.0
3 * SuperH On-Chip RTC Support
5 * Copyright (C) 2006 - 2009 Paul Mundt
6 * Copyright (C) 2006 Jamie Lenehan
7 * Copyright (C) 2008 Angelo Castello
9 * Based on the old arch/sh/kernel/cpu/rtc.c by:
11 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
12 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
14 #include <linux/module.h>
15 #include <linux/mod_devicetable.h>
16 #include <linux/kernel.h>
17 #include <linux/bcd.h>
18 #include <linux/rtc.h>
19 #include <linux/init.h>
20 #include <linux/platform_device.h>
21 #include <linux/seq_file.h>
22 #include <linux/interrupt.h>
23 #include <linux/spinlock.h>
25 #include <linux/log2.h>
26 #include <linux/clk.h>
27 #include <linux/slab.h>
31 /* Default values for RZ/A RTC */
32 #define rtc_reg_size sizeof(u16)
33 #define RTC_BIT_INVERTED 0 /* no chip bugs */
34 #define RTC_CAP_4_DIGIT_YEAR (1 << 0)
35 #define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
38 #define DRV_NAME "sh-rtc"
40 #define RTC_REG(r) ((r) * rtc_reg_size)
42 #define R64CNT RTC_REG(0)
44 #define RSECCNT RTC_REG(1) /* RTC sec */
45 #define RMINCNT RTC_REG(2) /* RTC min */
46 #define RHRCNT RTC_REG(3) /* RTC hour */
47 #define RWKCNT RTC_REG(4) /* RTC week */
48 #define RDAYCNT RTC_REG(5) /* RTC day */
49 #define RMONCNT RTC_REG(6) /* RTC month */
50 #define RYRCNT RTC_REG(7) /* RTC year */
51 #define RSECAR RTC_REG(8) /* ALARM sec */
52 #define RMINAR RTC_REG(9) /* ALARM min */
53 #define RHRAR RTC_REG(10) /* ALARM hour */
54 #define RWKAR RTC_REG(11) /* ALARM week */
55 #define RDAYAR RTC_REG(12) /* ALARM day */
56 #define RMONAR RTC_REG(13) /* ALARM month */
57 #define RCR1 RTC_REG(14) /* Control */
58 #define RCR2 RTC_REG(15) /* Control */
61 * Note on RYRAR and RCR3: Up until this point most of the register
62 * definitions are consistent across all of the available parts. However,
63 * the placement of the optional RYRAR and RCR3 (the RYRAR control
64 * register used to control RYRCNT/RYRAR compare) varies considerably
65 * across various parts, occasionally being mapped in to a completely
66 * unrelated address space. For proper RYRAR support a separate resource
67 * would have to be handed off, but as this is purely optional in
68 * practice, we simply opt not to support it, thereby keeping the code
69 * quite a bit more simplified.
72 /* ALARM Bits - or with BCD encoded value */
73 #define AR_ENB 0x80 /* Enable for alarm cmp */
76 #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
77 #define PF_COUNT 0x200 /* Half periodic counter */
78 #define PF_OXS 0x400 /* Periodic One x Second */
79 #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
83 #define RCR1_CF 0x80 /* Carry Flag */
84 #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
85 #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
86 #define RCR1_AF 0x01 /* Alarm Flag */
89 #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
90 #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
91 #define RCR2_RTCEN 0x08 /* ENable RTC */
92 #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
93 #define RCR2_RESET 0x02 /* Reset bit */
94 #define RCR2_START 0x01 /* Start bit */
97 void __iomem *regbase;
98 unsigned long regsize;
104 struct rtc_device *rtc_dev;
106 unsigned long capabilities; /* See asm/rtc.h for cap bits */
107 unsigned short periodic_freq;
110 static int __sh_rtc_interrupt(struct sh_rtc *rtc)
112 unsigned int tmp, pending;
114 tmp = readb(rtc->regbase + RCR1);
115 pending = tmp & RCR1_CF;
117 writeb(tmp, rtc->regbase + RCR1);
119 /* Users have requested One x Second IRQ */
120 if (pending && rtc->periodic_freq & PF_OXS)
121 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
126 static int __sh_rtc_alarm(struct sh_rtc *rtc)
128 unsigned int tmp, pending;
130 tmp = readb(rtc->regbase + RCR1);
131 pending = tmp & RCR1_AF;
132 tmp &= ~(RCR1_AF | RCR1_AIE);
133 writeb(tmp, rtc->regbase + RCR1);
136 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
141 static int __sh_rtc_periodic(struct sh_rtc *rtc)
143 unsigned int tmp, pending;
145 tmp = readb(rtc->regbase + RCR2);
146 pending = tmp & RCR2_PEF;
148 writeb(tmp, rtc->regbase + RCR2);
153 /* Half period enabled than one skipped and the next notified */
154 if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
155 rtc->periodic_freq &= ~PF_COUNT;
157 if (rtc->periodic_freq & PF_HP)
158 rtc->periodic_freq |= PF_COUNT;
159 rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
165 static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
167 struct sh_rtc *rtc = dev_id;
170 spin_lock(&rtc->lock);
171 ret = __sh_rtc_interrupt(rtc);
172 spin_unlock(&rtc->lock);
174 return IRQ_RETVAL(ret);
177 static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
179 struct sh_rtc *rtc = dev_id;
182 spin_lock(&rtc->lock);
183 ret = __sh_rtc_alarm(rtc);
184 spin_unlock(&rtc->lock);
186 return IRQ_RETVAL(ret);
189 static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
191 struct sh_rtc *rtc = dev_id;
194 spin_lock(&rtc->lock);
195 ret = __sh_rtc_periodic(rtc);
196 spin_unlock(&rtc->lock);
198 return IRQ_RETVAL(ret);
201 static irqreturn_t sh_rtc_shared(int irq, void *dev_id)
203 struct sh_rtc *rtc = dev_id;
206 spin_lock(&rtc->lock);
207 ret = __sh_rtc_interrupt(rtc);
208 ret |= __sh_rtc_alarm(rtc);
209 ret |= __sh_rtc_periodic(rtc);
210 spin_unlock(&rtc->lock);
212 return IRQ_RETVAL(ret);
215 static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
217 struct sh_rtc *rtc = dev_get_drvdata(dev);
220 spin_lock_irq(&rtc->lock);
222 tmp = readb(rtc->regbase + RCR1);
229 writeb(tmp, rtc->regbase + RCR1);
231 spin_unlock_irq(&rtc->lock);
234 static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
236 struct sh_rtc *rtc = dev_get_drvdata(dev);
239 tmp = readb(rtc->regbase + RCR1);
240 seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
242 tmp = readb(rtc->regbase + RCR2);
243 seq_printf(seq, "periodic_IRQ\t: %s\n",
244 (tmp & RCR2_PESMASK) ? "yes" : "no");
249 static inline void sh_rtc_setcie(struct device *dev, unsigned int enable)
251 struct sh_rtc *rtc = dev_get_drvdata(dev);
254 spin_lock_irq(&rtc->lock);
256 tmp = readb(rtc->regbase + RCR1);
263 writeb(tmp, rtc->regbase + RCR1);
265 spin_unlock_irq(&rtc->lock);
268 static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
270 sh_rtc_setaie(dev, enabled);
274 static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
276 struct sh_rtc *rtc = dev_get_drvdata(dev);
277 unsigned int sec128, sec2, yr, yr100, cf_bit;
282 spin_lock_irq(&rtc->lock);
284 tmp = readb(rtc->regbase + RCR1);
285 tmp &= ~RCR1_CF; /* Clear CF-bit */
287 writeb(tmp, rtc->regbase + RCR1);
289 sec128 = readb(rtc->regbase + R64CNT);
291 tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
292 tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
293 tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
294 tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
295 tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
296 tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
298 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
299 yr = readw(rtc->regbase + RYRCNT);
300 yr100 = bcd2bin(yr >> 8);
303 yr = readb(rtc->regbase + RYRCNT);
304 yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
307 tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
309 sec2 = readb(rtc->regbase + R64CNT);
310 cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
312 spin_unlock_irq(&rtc->lock);
313 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
315 #if RTC_BIT_INVERTED != 0
316 if ((sec128 & RTC_BIT_INVERTED))
320 /* only keep the carry interrupt enabled if UIE is on */
321 if (!(rtc->periodic_freq & PF_OXS))
322 sh_rtc_setcie(dev, 0);
324 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
325 "mday=%d, mon=%d, year=%d, wday=%d\n",
327 tm->tm_sec, tm->tm_min, tm->tm_hour,
328 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
333 static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
335 struct sh_rtc *rtc = dev_get_drvdata(dev);
339 spin_lock_irq(&rtc->lock);
341 /* Reset pre-scaler & stop RTC */
342 tmp = readb(rtc->regbase + RCR2);
345 writeb(tmp, rtc->regbase + RCR2);
347 writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
348 writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
349 writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
350 writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
351 writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
352 writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
354 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
355 year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
356 bin2bcd(tm->tm_year % 100);
357 writew(year, rtc->regbase + RYRCNT);
359 year = tm->tm_year % 100;
360 writeb(bin2bcd(year), rtc->regbase + RYRCNT);
364 tmp = readb(rtc->regbase + RCR2);
366 tmp |= RCR2_RTCEN | RCR2_START;
367 writeb(tmp, rtc->regbase + RCR2);
369 spin_unlock_irq(&rtc->lock);
374 static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
377 int value = 0xff; /* return 0xff for ignored values */
379 byte = readb(rtc->regbase + reg_off);
381 byte &= ~AR_ENB; /* strip the enable bit */
382 value = bcd2bin(byte);
388 static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
390 struct sh_rtc *rtc = dev_get_drvdata(dev);
391 struct rtc_time *tm = &wkalrm->time;
393 spin_lock_irq(&rtc->lock);
395 tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
396 tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
397 tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
398 tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
399 tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
400 tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
402 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
404 wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
406 spin_unlock_irq(&rtc->lock);
411 static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
412 int value, int reg_off)
414 /* < 0 for a value that is ignored */
416 writeb(0, rtc->regbase + reg_off);
418 writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
421 static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
423 struct sh_rtc *rtc = dev_get_drvdata(dev);
425 struct rtc_time *tm = &wkalrm->time;
428 spin_lock_irq(&rtc->lock);
430 /* disable alarm interrupt and clear the alarm flag */
431 rcr1 = readb(rtc->regbase + RCR1);
432 rcr1 &= ~(RCR1_AF | RCR1_AIE);
433 writeb(rcr1, rtc->regbase + RCR1);
436 sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
437 sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
438 sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
439 sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
440 sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
444 sh_rtc_write_alarm_value(rtc, mon, RMONAR);
446 if (wkalrm->enabled) {
448 writeb(rcr1, rtc->regbase + RCR1);
451 spin_unlock_irq(&rtc->lock);
456 static const struct rtc_class_ops sh_rtc_ops = {
457 .read_time = sh_rtc_read_time,
458 .set_time = sh_rtc_set_time,
459 .read_alarm = sh_rtc_read_alarm,
460 .set_alarm = sh_rtc_set_alarm,
462 .alarm_irq_enable = sh_rtc_alarm_irq_enable,
465 static int __init sh_rtc_probe(struct platform_device *pdev)
468 struct resource *res;
473 rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
477 spin_lock_init(&rtc->lock);
479 /* get periodic/carry/alarm irqs */
480 ret = platform_get_irq(pdev, 0);
481 if (unlikely(ret <= 0)) {
482 dev_err(&pdev->dev, "No IRQ resource\n");
486 rtc->periodic_irq = ret;
487 rtc->carry_irq = platform_get_irq(pdev, 1);
488 rtc->alarm_irq = platform_get_irq(pdev, 2);
490 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
492 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
493 if (unlikely(res == NULL)) {
494 dev_err(&pdev->dev, "No IO resource\n");
498 rtc->regsize = resource_size(res);
500 rtc->res = devm_request_mem_region(&pdev->dev, res->start,
501 rtc->regsize, pdev->name);
502 if (unlikely(!rtc->res))
505 rtc->regbase = devm_ioremap_nocache(&pdev->dev, rtc->res->start,
507 if (unlikely(!rtc->regbase))
510 if (!pdev->dev.of_node) {
512 /* With a single device, the clock id is still "rtc0" */
516 snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id);
518 snprintf(clk_name, sizeof(clk_name), "fck");
520 rtc->clk = devm_clk_get(&pdev->dev, clk_name);
521 if (IS_ERR(rtc->clk)) {
523 * No error handling for rtc->clk intentionally, not all
524 * platforms will have a unique clock for the RTC, and
525 * the clk API can handle the struct clk pointer being
531 clk_enable(rtc->clk);
533 rtc->capabilities = RTC_DEF_CAPABILITIES;
536 if (dev_get_platdata(&pdev->dev)) {
537 struct sh_rtc_platform_info *pinfo =
538 dev_get_platdata(&pdev->dev);
541 * Some CPUs have special capabilities in addition to the
542 * default set. Add those in here.
544 rtc->capabilities |= pinfo->capabilities;
548 if (rtc->carry_irq <= 0) {
549 /* register shared periodic/carry/alarm irq */
550 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
551 sh_rtc_shared, 0, "sh-rtc", rtc);
554 "request IRQ failed with %d, IRQ %d\n", ret,
559 /* register periodic/carry/alarm irqs */
560 ret = devm_request_irq(&pdev->dev, rtc->periodic_irq,
561 sh_rtc_periodic, 0, "sh-rtc period", rtc);
564 "request period IRQ failed with %d, IRQ %d\n",
565 ret, rtc->periodic_irq);
569 ret = devm_request_irq(&pdev->dev, rtc->carry_irq,
570 sh_rtc_interrupt, 0, "sh-rtc carry", rtc);
573 "request carry IRQ failed with %d, IRQ %d\n",
574 ret, rtc->carry_irq);
578 ret = devm_request_irq(&pdev->dev, rtc->alarm_irq,
579 sh_rtc_alarm, 0, "sh-rtc alarm", rtc);
582 "request alarm IRQ failed with %d, IRQ %d\n",
583 ret, rtc->alarm_irq);
588 platform_set_drvdata(pdev, rtc);
590 /* everything disabled by default */
591 sh_rtc_setaie(&pdev->dev, 0);
592 sh_rtc_setcie(&pdev->dev, 0);
594 rtc->rtc_dev = devm_rtc_device_register(&pdev->dev, "sh",
595 &sh_rtc_ops, THIS_MODULE);
596 if (IS_ERR(rtc->rtc_dev)) {
597 ret = PTR_ERR(rtc->rtc_dev);
601 rtc->rtc_dev->max_user_freq = 256;
603 /* reset rtc to epoch 0 if time is invalid */
604 if (rtc_read_time(rtc->rtc_dev, &r) < 0) {
605 rtc_time_to_tm(0, &r);
606 rtc_set_time(rtc->rtc_dev, &r);
609 device_init_wakeup(&pdev->dev, 1);
613 clk_disable(rtc->clk);
618 static int __exit sh_rtc_remove(struct platform_device *pdev)
620 struct sh_rtc *rtc = platform_get_drvdata(pdev);
622 sh_rtc_setaie(&pdev->dev, 0);
623 sh_rtc_setcie(&pdev->dev, 0);
625 clk_disable(rtc->clk);
630 static void sh_rtc_set_irq_wake(struct device *dev, int enabled)
632 struct sh_rtc *rtc = dev_get_drvdata(dev);
634 irq_set_irq_wake(rtc->periodic_irq, enabled);
636 if (rtc->carry_irq > 0) {
637 irq_set_irq_wake(rtc->carry_irq, enabled);
638 irq_set_irq_wake(rtc->alarm_irq, enabled);
642 static int __maybe_unused sh_rtc_suspend(struct device *dev)
644 if (device_may_wakeup(dev))
645 sh_rtc_set_irq_wake(dev, 1);
650 static int __maybe_unused sh_rtc_resume(struct device *dev)
652 if (device_may_wakeup(dev))
653 sh_rtc_set_irq_wake(dev, 0);
658 static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume);
660 static const struct of_device_id sh_rtc_of_match[] = {
661 { .compatible = "renesas,sh-rtc", },
664 MODULE_DEVICE_TABLE(of, sh_rtc_of_match);
666 static struct platform_driver sh_rtc_platform_driver = {
669 .pm = &sh_rtc_pm_ops,
670 .of_match_table = sh_rtc_of_match,
672 .remove = __exit_p(sh_rtc_remove),
675 module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe);
677 MODULE_DESCRIPTION("SuperH on-chip RTC driver");
678 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
679 "Jamie Lenehan <lenehan@twibble.org>, "
680 "Angelo Castello <angelo.castello@st.com>");
681 MODULE_LICENSE("GPL v2");
682 MODULE_ALIAS("platform:" DRV_NAME);