1 /*******************************************************************
2 * This file is part of the Emulex Linux Device Driver for *
3 * Fibre Channel Host Bus Adapters. *
4 * Copyright (C) 2017-2018 Broadcom. All Rights Reserved. The term *
5 * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries. *
6 * Copyright (C) 2009-2016 Emulex. All rights reserved. *
7 * EMULEX and SLI are trademarks of Emulex. *
10 * This program is free software; you can redistribute it and/or *
11 * modify it under the terms of version 2 of the GNU General *
12 * Public License as published by the Free Software Foundation. *
13 * This program is distributed in the hope that it will be useful. *
14 * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
15 * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
16 * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
17 * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
18 * TO BE LEGALLY INVALID. See the GNU General Public License for *
19 * more details, a copy of which can be found in the file COPYING *
20 * included with this package. *
21 *******************************************************************/
23 #define LPFC_ACTIVE_MBOX_WAIT_CNT 100
24 #define LPFC_XRI_EXCH_BUSY_WAIT_TMO 10000
25 #define LPFC_XRI_EXCH_BUSY_WAIT_T1 10
26 #define LPFC_XRI_EXCH_BUSY_WAIT_T2 30000
27 #define LPFC_RPI_LOW_WATER_MARK 10
29 #define LPFC_UNREG_FCF 1
30 #define LPFC_SKIP_UNREG_FCF 0
32 /* Amount of time in seconds for waiting FCF rediscovery to complete */
33 #define LPFC_FCF_REDISCOVER_WAIT_TMO 2000 /* msec */
35 /* Number of SGL entries can be posted in a 4KB nonembedded mbox command */
36 #define LPFC_NEMBED_MBOX_SGL_CNT 254
38 /* Multi-queue arrangement for FCP EQ/CQ/WQ tuples */
39 #define LPFC_HBA_HDWQ_MIN 0
40 #define LPFC_HBA_HDWQ_MAX 64
41 #define LPFC_HBA_HDWQ_DEF 0
43 /* Common buffer size to accomidate SCSI and NVME IO buffers */
44 #define LPFC_COMMON_IO_BUF_SZ 768
47 * Provide the default FCF Record attributes used by the driver
48 * when nonFIP mode is configured and there is no other default
49 * FCF Record attributes.
51 #define LPFC_FCOE_FCF_DEF_INDEX 0
52 #define LPFC_FCOE_FCF_GET_FIRST 0xFFFF
53 #define LPFC_FCOE_FCF_NEXT_NONE 0xFFFF
55 #define LPFC_FCOE_NULL_VID 0xFFF
56 #define LPFC_FCOE_IGNORE_VID 0xFFFF
58 /* First 3 bytes of default FCF MAC is specified by FC_MAP */
59 #define LPFC_FCOE_FCF_MAC3 0xFF
60 #define LPFC_FCOE_FCF_MAC4 0xFF
61 #define LPFC_FCOE_FCF_MAC5 0xFE
62 #define LPFC_FCOE_FCF_MAP0 0x0E
63 #define LPFC_FCOE_FCF_MAP1 0xFC
64 #define LPFC_FCOE_FCF_MAP2 0x00
65 #define LPFC_FCOE_MAX_RCV_SIZE 0x800
66 #define LPFC_FCOE_FKA_ADV_PER 0
67 #define LPFC_FCOE_FIP_PRIORITY 0x80
69 #define sli4_sid_from_fc_hdr(fc_hdr) \
70 ((fc_hdr)->fh_s_id[0] << 16 | \
71 (fc_hdr)->fh_s_id[1] << 8 | \
74 #define sli4_did_from_fc_hdr(fc_hdr) \
75 ((fc_hdr)->fh_d_id[0] << 16 | \
76 (fc_hdr)->fh_d_id[1] << 8 | \
79 #define sli4_fctl_from_fc_hdr(fc_hdr) \
80 ((fc_hdr)->fh_f_ctl[0] << 16 | \
81 (fc_hdr)->fh_f_ctl[1] << 8 | \
82 (fc_hdr)->fh_f_ctl[2])
84 #define sli4_type_from_fc_hdr(fc_hdr) \
87 #define LPFC_FW_RESET_MAXIMUM_WAIT_10MS_CNT 12000
89 #define INT_FW_UPGRADE 0
90 #define RUN_FW_UPGRADE 1
92 enum lpfc_sli4_queue_type {
104 /* The queue sub-type defines the functional purpose of the queue */
105 enum lpfc_sli4_queue_subtype {
118 struct lpfc_eqe *eqe;
119 struct lpfc_cqe *cqe;
120 struct lpfc_mcqe *mcqe;
121 struct lpfc_wcqe_complete *wcqe_complete;
122 struct lpfc_wcqe_release *wcqe_release;
123 struct sli4_wcqe_xri_aborted *wcqe_xri_aborted;
124 struct lpfc_rcqe_complete *rcqe_complete;
125 struct lpfc_mqe *mqe;
127 union lpfc_wqe128 *wqe128;
128 struct lpfc_rqe *rqe;
133 uint16_t entry_count; /* Current number of RQ slots */
134 uint16_t buffer_count; /* Current number of buffers posted */
135 struct list_head rqb_buffer_list; /* buffers assigned to this HBQ */
136 /* Callback for HBQ buffer allocation */
137 struct rqb_dmabuf *(*rqb_alloc_buffer)(struct lpfc_hba *);
138 /* Callback for HBQ buffer free */
139 void (*rqb_free_buffer)(struct lpfc_hba *,
140 struct rqb_dmabuf *);
144 struct list_head list;
145 struct list_head wq_list;
146 struct list_head wqfull_list;
147 enum lpfc_sli4_queue_type type;
148 enum lpfc_sli4_queue_subtype subtype;
149 struct lpfc_hba *phba;
150 struct list_head child_list;
151 struct list_head page_list;
152 struct list_head sgl_list;
153 uint32_t entry_count; /* Number of entries to support on the queue */
154 uint32_t entry_size; /* Size of each queue entry. */
155 uint32_t entry_repost; /* Count of entries before doorbell is rung */
156 #define LPFC_EQ_REPOST 8
157 #define LPFC_MQ_REPOST 8
158 #define LPFC_CQ_REPOST 64
159 #define LPFC_RQ_REPOST 64
160 #define LPFC_RELEASE_NOTIFICATION_INTERVAL 32 /* For WQs */
161 uint32_t queue_id; /* Queue ID assigned by the hardware */
162 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */
163 uint32_t host_index; /* The host's index for putting or getting */
164 uint32_t hba_index; /* The last known hba index for get or put */
166 struct lpfc_sli_ring *pring; /* ptr to io ring associated with q */
167 struct lpfc_rqb *rqbp; /* ptr to RQ buffers */
170 uint16_t page_count; /* Number of pages allocated for this queue */
171 uint16_t page_size; /* size of page allocated for this queue */
172 #define LPFC_EXPANDED_PAGE_SIZE 16384
173 #define LPFC_DEFAULT_PAGE_SIZE 4096
174 uint16_t chann; /* IO channel this queue is associated with */
176 #define LPFC_DB_RING_FORMAT 0x01
177 #define LPFC_DB_LIST_FORMAT 0x02
179 #define HBA_NVMET_WQFULL 0x1 /* We hit WQ Full condition for NVMET */
180 void __iomem *db_regaddr;
183 void __iomem *dpp_regaddr;
190 /* defines for EQ stats */
191 #define EQ_max_eqe q_cnt_1
192 #define EQ_no_entry q_cnt_2
193 #define EQ_cqe_cnt q_cnt_3
194 #define EQ_processed q_cnt_4
196 /* defines for CQ stats */
197 #define CQ_mbox q_cnt_1
198 #define CQ_max_cqe q_cnt_1
199 #define CQ_release_wqe q_cnt_2
200 #define CQ_xri_aborted q_cnt_3
201 #define CQ_wq q_cnt_4
203 /* defines for WQ stats */
204 #define WQ_overflow q_cnt_1
205 #define WQ_posted q_cnt_4
207 /* defines for RQ stats */
208 #define RQ_no_posted_buf q_cnt_1
209 #define RQ_no_buf_found q_cnt_2
210 #define RQ_buf_posted q_cnt_3
211 #define RQ_rcv_buf q_cnt_4
213 struct work_struct irqwork;
214 struct work_struct spwork;
216 uint64_t isr_timestamp;
218 struct lpfc_queue *assoc_qp;
219 union sli4_qe qe[1]; /* array to index entries (must be last) */
222 struct lpfc_sli4_link {
229 uint16_t logical_speed;
233 struct lpfc_fcf_rec {
234 uint8_t fabric_name[8];
235 uint8_t switch_name[8];
242 #define BOOT_ENABLE 0x01
243 #define RECORD_VALID 0x02
246 struct lpfc_fcf_pri_rec {
248 #define LPFC_FCF_ON_PRI_LIST 0x0001
249 #define LPFC_FCF_FLOGI_FAILED 0x0002
254 struct lpfc_fcf_pri {
255 struct list_head list;
256 struct lpfc_fcf_pri_rec fcf_rec;
260 * Maximum FCF table index, it is for driver internal book keeping, it
261 * just needs to be no less than the supported HBA's FCF table size.
263 #define LPFC_SLI4_FCF_TBL_INDX_MAX 32
268 #define FCF_AVAILABLE 0x01 /* FCF available for discovery */
269 #define FCF_REGISTERED 0x02 /* FCF registered with FW */
270 #define FCF_SCAN_DONE 0x04 /* FCF table scan done */
271 #define FCF_IN_USE 0x08 /* Atleast one discovery completed */
272 #define FCF_INIT_DISC 0x10 /* Initial FCF discovery */
273 #define FCF_DEAD_DISC 0x20 /* FCF DEAD fast FCF failover discovery */
274 #define FCF_ACVL_DISC 0x40 /* All CVL fast FCF failover discovery */
275 #define FCF_DISCOVERY (FCF_INIT_DISC | FCF_DEAD_DISC | FCF_ACVL_DISC)
276 #define FCF_REDISC_PEND 0x80 /* FCF rediscovery pending */
277 #define FCF_REDISC_EVT 0x100 /* FCF rediscovery event to worker thread */
278 #define FCF_REDISC_FOV 0x200 /* Post FCF rediscovery fast failover */
279 #define FCF_REDISC_PROG (FCF_REDISC_PEND | FCF_REDISC_EVT)
280 uint16_t fcf_redisc_attempted;
282 uint32_t eligible_fcf_cnt;
283 struct lpfc_fcf_rec current_rec;
284 struct lpfc_fcf_rec failover_rec;
285 struct list_head fcf_pri_list;
286 struct lpfc_fcf_pri fcf_pri[LPFC_SLI4_FCF_TBL_INDX_MAX];
287 uint32_t current_fcf_scan_pri;
288 struct timer_list redisc_wait;
289 unsigned long *fcf_rr_bmask; /* Eligible FCF indexes for RR failover */
293 #define LPFC_REGION23_SIGNATURE "RG23"
294 #define LPFC_REGION23_VERSION 1
295 #define LPFC_REGION23_LAST_REC 0xff
296 #define DRIVER_SPECIFIC_TYPE 0xA2
297 #define LINUX_DRIVER_ID 0x20
298 #define PORT_STE_TYPE 0x1
300 struct lpfc_fip_param_hdr {
302 #define FCOE_PARAM_TYPE 0xA0
304 #define FCOE_PARAM_LENGTH 2
305 uint8_t parm_version;
306 #define FIPP_VERSION 0x01
308 #define lpfc_fip_param_hdr_fipp_mode_SHIFT 6
309 #define lpfc_fip_param_hdr_fipp_mode_MASK 0x3
310 #define lpfc_fip_param_hdr_fipp_mode_WORD parm_flags
311 #define FIPP_MODE_ON 0x1
312 #define FIPP_MODE_OFF 0x0
313 #define FIPP_VLAN_VALID 0x1
316 struct lpfc_fcoe_params {
323 struct lpfc_fcf_conn_hdr {
325 #define FCOE_CONN_TBL_TYPE 0xA1
326 uint8_t length; /* words */
330 struct lpfc_fcf_conn_rec {
332 #define FCFCNCT_VALID 0x0001
333 #define FCFCNCT_BOOT 0x0002
334 #define FCFCNCT_PRIMARY 0x0004 /* if not set, Secondary */
335 #define FCFCNCT_FBNM_VALID 0x0008
336 #define FCFCNCT_SWNM_VALID 0x0010
337 #define FCFCNCT_VLAN_VALID 0x0020
338 #define FCFCNCT_AM_VALID 0x0040
339 #define FCFCNCT_AM_PREFERRED 0x0080 /* if not set, AM Required */
340 #define FCFCNCT_AM_SPMA 0x0100 /* if not set, FPMA */
343 uint8_t fabric_name[8];
344 uint8_t switch_name[8];
347 struct lpfc_fcf_conn_entry {
348 struct list_head list;
349 struct lpfc_fcf_conn_rec conn_rec;
353 * Define the host's bootstrap mailbox. This structure contains
354 * the member attributes needed to create, use, and destroy the
355 * bootstrap mailbox region.
357 * The macro definitions for the bmbx data structure are defined
358 * in lpfc_hw4.h with the register definition.
361 struct lpfc_dmabuf *dmabuf;
362 struct dma_address dma_address;
368 #define LPFC_EQE_SIZE LPFC_EQE_SIZE_4
370 #define LPFC_EQE_SIZE_4B 4
371 #define LPFC_EQE_SIZE_16B 16
372 #define LPFC_CQE_SIZE 16
373 #define LPFC_WQE_SIZE 64
374 #define LPFC_WQE128_SIZE 128
375 #define LPFC_MQE_SIZE 256
376 #define LPFC_RQE_SIZE 8
378 #define LPFC_EQE_DEF_COUNT 1024
379 #define LPFC_CQE_DEF_COUNT 1024
380 #define LPFC_CQE_EXP_COUNT 4096
381 #define LPFC_WQE_DEF_COUNT 256
382 #define LPFC_WQE_EXP_COUNT 1024
383 #define LPFC_MQE_DEF_COUNT 16
384 #define LPFC_RQE_DEF_COUNT 512
386 #define LPFC_QUEUE_NOARM false
387 #define LPFC_QUEUE_REARM true
391 * SLI4 CT field defines
393 #define SLI4_CT_RPI 0
394 #define SLI4_CT_VPI 1
395 #define SLI4_CT_VFI 2
396 #define SLI4_CT_FCFI 3
399 * SLI4 specific data structures
401 struct lpfc_max_cfg_param {
423 /* SLI4 HBA multi-fcp queue handler struct */
424 #define LPFC_SLI4_HANDLER_NAME_SZ 16
425 struct lpfc_hba_eq_hdl {
427 char handler_name[LPFC_SLI4_HANDLER_NAME_SZ];
428 struct lpfc_hba *phba;
429 atomic_t hba_eq_in_use;
430 struct cpumask *cpumask;
431 /* CPU affinitsed to or 0xffffffff if multiple */
433 #define LPFC_MULTI_CPU_AFFINITY 0xffffffff
436 /*BB Credit recovery value*/
437 struct lpfc_bbscn_params {
439 #define lpfc_bbscn_min_SHIFT 0
440 #define lpfc_bbscn_min_MASK 0x0000000F
441 #define lpfc_bbscn_min_WORD word0
442 #define lpfc_bbscn_max_SHIFT 4
443 #define lpfc_bbscn_max_MASK 0x0000000F
444 #define lpfc_bbscn_max_WORD word0
445 #define lpfc_bbscn_def_SHIFT 8
446 #define lpfc_bbscn_def_MASK 0x0000000F
447 #define lpfc_bbscn_def_WORD word0
450 /* Port Capabilities for SLI4 Parameters */
451 struct lpfc_pc_sli4_params {
456 uint32_t featurelevel_1;
457 uint32_t featurelevel_2;
458 uint32_t proto_types;
459 #define LPFC_SLI4_PROTO_FCOE 0x0000001
460 #define LPFC_SLI4_PROTO_FC 0x0000002
461 #define LPFC_SLI4_PROTO_NIC 0x0000004
462 #define LPFC_SLI4_PROTO_ISCSI 0x0000008
463 #define LPFC_SLI4_PROTO_RDMA 0x0000010
464 uint32_t sge_supp_len;
466 uint32_t rq_db_window;
467 uint32_t loopbk_scope;
468 uint32_t oas_supported;
469 uint32_t eq_pages_max;
471 uint32_t cq_pages_max;
473 uint32_t mq_pages_max;
475 uint32_t mq_elem_cnt;
476 uint32_t wq_pages_max;
478 uint32_t rq_pages_max;
480 uint32_t hdr_pages_max;
482 uint32_t hdr_pp_align;
483 uint32_t sgl_pages_max;
484 uint32_t sgl_pp_align;
493 #define LPFC_WQ_SZ64_SUPPORT 1
494 #define LPFC_WQ_SZ128_SUPPORT 2
498 #define LPFC_CQ_4K_PAGE_SZ 0x1
499 #define LPFC_CQ_16K_PAGE_SZ 0x4
500 #define LPFC_WQ_4K_PAGE_SZ 0x1
501 #define LPFC_WQ_16K_PAGE_SZ 0x4
508 struct lpfc_sli4_lnk_info {
510 #define LPFC_LNK_DAT_INVAL 0
511 #define LPFC_LNK_DAT_VAL 1
513 #define LPFC_LNK_GE 0x0 /* FCoE */
514 #define LPFC_LNK_FC 0x1 /* FC */
519 #define LPFC_SLI4_HANDLER_CNT (LPFC_HBA_IO_CHAN_MAX+ \
520 LPFC_FOF_IO_CHAN_NUM)
522 /* Used for IRQ vector to CPU mapping */
523 struct lpfc_vector_map_info {
529 #define LPFC_VECTOR_MAP_EMPTY 0xffff
531 /* SLI4 HBA data structure entries */
532 struct lpfc_sli4_hdw_queue {
533 /* Pointers to the constructed SLI4 queues */
534 struct lpfc_queue *hba_eq; /* Event queues for HBA */
535 struct lpfc_queue *fcp_cq; /* Fast-path FCP compl queue */
536 struct lpfc_queue *nvme_cq; /* Fast-path NVME compl queue */
537 struct lpfc_queue *fcp_wq; /* Fast-path FCP work queue */
538 struct lpfc_queue *nvme_wq; /* Fast-path NVME work queue */
540 uint16_t nvme_cq_map;
543 struct lpfc_sli4_hba {
544 void __iomem *conf_regs_memmap_p; /* Kernel memory mapped address for
545 * config space registers
547 void __iomem *ctrl_regs_memmap_p; /* Kernel memory mapped address for
550 void __iomem *drbl_regs_memmap_p; /* Kernel memory mapped address for
553 void __iomem *dpp_regs_memmap_p; /* Kernel memory mapped address for
558 /* IF Type 0, BAR 0 PCI cfg space reg mem map */
559 void __iomem *UERRLOregaddr;
560 void __iomem *UERRHIregaddr;
561 void __iomem *UEMASKLOregaddr;
562 void __iomem *UEMASKHIregaddr;
565 /* IF Type 2, BAR 0 PCI cfg space reg mem map. */
566 void __iomem *STATUSregaddr;
567 void __iomem *CTRLregaddr;
568 void __iomem *ERR1regaddr;
569 #define SLIPORT_ERR1_REG_ERR_CODE_1 0x1
570 #define SLIPORT_ERR1_REG_ERR_CODE_2 0x2
571 void __iomem *ERR2regaddr;
572 #define SLIPORT_ERR2_REG_FW_RESTART 0x0
573 #define SLIPORT_ERR2_REG_FUNC_PROVISON 0x1
574 #define SLIPORT_ERR2_REG_FORCED_DUMP 0x2
575 #define SLIPORT_ERR2_REG_FAILURE_EQ 0x3
576 #define SLIPORT_ERR2_REG_FAILURE_CQ 0x4
577 #define SLIPORT_ERR2_REG_FAILURE_BUS 0x5
578 #define SLIPORT_ERR2_REG_FAILURE_RQ 0x6
579 void __iomem *EQDregaddr;
583 /* IF type 0, BAR1 and if type 2, Bar 0 CSR register memory map */
584 void __iomem *PSMPHRregaddr;
586 /* Well-known SLI INTF register memory map. */
587 void __iomem *SLIINTFregaddr;
589 /* IF type 0, BAR 1 function CSR register memory map */
590 void __iomem *ISRregaddr; /* HST_ISR register */
591 void __iomem *IMRregaddr; /* HST_IMR register */
592 void __iomem *ISCRregaddr; /* HST_ISCR register */
593 /* IF type 0, BAR 0 and if type 2, BAR 0 doorbell register memory map */
594 void __iomem *RQDBregaddr; /* RQ_DOORBELL register */
595 void __iomem *WQDBregaddr; /* WQ_DOORBELL register */
596 void __iomem *CQDBregaddr; /* CQ_DOORBELL register */
597 void __iomem *EQDBregaddr; /* EQ_DOORBELL register */
598 void __iomem *MQDBregaddr; /* MQ_DOORBELL register */
599 void __iomem *BMBXregaddr; /* BootStrap MBX register */
605 struct lpfc_register sli_intf;
606 struct lpfc_pc_sli4_params pc_sli4_params;
607 struct lpfc_bbscn_params bbscn_params;
608 struct lpfc_hba_eq_hdl *hba_eq_hdl; /* HBA per-WQ handle */
610 void (*sli4_eq_clr_intr)(struct lpfc_queue *q);
611 uint32_t (*sli4_eq_release)(struct lpfc_queue *q, bool arm);
612 uint32_t (*sli4_cq_release)(struct lpfc_queue *q, bool arm);
614 /* Pointers to the constructed SLI4 queues */
615 struct lpfc_sli4_hdw_queue *hdwq;
616 struct list_head lpfc_wq_list;
618 /* Pointers to the constructed SLI4 queues for NVMET */
619 struct lpfc_queue **nvmet_cqset; /* Fast-path NVMET CQ Set queues */
620 struct lpfc_queue **nvmet_mrq_hdr; /* Fast-path NVMET hdr MRQs */
621 struct lpfc_queue **nvmet_mrq_data; /* Fast-path NVMET data MRQs */
623 struct lpfc_queue *mbx_cq; /* Slow-path mailbox complete queue */
624 struct lpfc_queue *els_cq; /* Slow-path ELS response complete queue */
625 struct lpfc_queue *nvmels_cq; /* NVME LS complete queue */
626 struct lpfc_queue *mbx_wq; /* Slow-path MBOX work queue */
627 struct lpfc_queue *els_wq; /* Slow-path ELS work queue */
628 struct lpfc_queue *nvmels_wq; /* NVME LS work queue */
629 struct lpfc_queue *hdr_rq; /* Slow-path Header Receive queue */
630 struct lpfc_queue *dat_rq; /* Slow-path Data Receive queue */
632 struct lpfc_name wwnn;
633 struct lpfc_name wwpn;
635 uint32_t fw_func_mode; /* FW function protocol mode */
636 uint32_t ulp0_mode; /* ULP0 protocol mode */
637 uint32_t ulp1_mode; /* ULP1 protocol mode */
639 /* Optimized Access Storage specific queues/structures */
640 uint64_t oas_next_lun;
641 uint8_t oas_next_tgt_wwpn[8];
642 uint8_t oas_next_vpt_wwpn[8];
644 /* Setup information for various queue parameters */
655 #define LPFC_SP_EQ_MAX_INTR_SEC 10000
656 #define LPFC_FP_EQ_MAX_INTR_SEC 10000
658 uint32_t intr_enable;
659 struct lpfc_bmbx bmbx;
660 struct lpfc_max_cfg_param max_cfg_param;
661 uint16_t extents_in_use; /* must allocate resource extents. */
662 uint16_t rpi_hdrs_in_use; /* must post rpi hdrs if set. */
663 uint16_t next_xri; /* last_xri - max_cfg_param.xri_base = used */
665 uint16_t common_xri_max;
666 uint16_t common_xri_cnt;
667 uint16_t common_xri_start;
668 uint16_t els_xri_cnt;
669 uint16_t nvmet_xri_cnt;
670 uint16_t nvmet_io_wait_cnt;
671 uint16_t nvmet_io_wait_total;
672 struct list_head lpfc_els_sgl_list;
673 struct list_head lpfc_abts_els_sgl_list;
674 struct list_head lpfc_nvmet_sgl_list;
675 struct list_head lpfc_abts_nvmet_ctx_list;
676 struct list_head lpfc_abts_scsi_buf_list;
677 struct list_head lpfc_abts_nvme_buf_list;
678 struct list_head lpfc_nvmet_io_wait_list;
679 struct lpfc_nvmet_ctx_info *nvmet_ctx_info;
680 struct lpfc_sglq **lpfc_sglq_active_list;
681 struct list_head lpfc_rpi_hdr_list;
682 unsigned long *rpi_bmask;
685 struct list_head lpfc_rpi_blk_list;
686 unsigned long *xri_bmask;
688 struct list_head lpfc_xri_blk_list;
689 unsigned long *vfi_bmask;
692 struct list_head lpfc_vfi_blk_list;
693 struct lpfc_sli4_flags sli4_flags;
694 struct list_head sp_queue_event;
695 struct list_head sp_cqe_event_pool;
696 struct list_head sp_asynce_work_queue;
697 struct list_head sp_fcp_xri_aborted_work_queue;
698 struct list_head sp_els_xri_aborted_work_queue;
699 struct list_head sp_unsol_work_queue;
700 struct lpfc_sli4_link link_state;
701 struct lpfc_sli4_lnk_info lnk_info;
702 uint32_t pport_name_sta;
703 #define LPFC_SLI4_PPNAME_NON 0
704 #define LPFC_SLI4_PPNAME_GET 1
706 spinlock_t abts_nvme_buf_list_lock; /* list of aborted SCSI IOs */
707 spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */
708 spinlock_t sgl_list_lock; /* list of aborted els IOs */
709 spinlock_t nvmet_io_wait_lock; /* IOs waiting for ctx resources */
710 uint32_t physical_port;
712 /* CPU to vector mapping information */
713 struct lpfc_vector_map_info *cpu_map;
714 uint16_t num_online_cpu;
715 uint16_t num_present_cpu;
716 uint16_t curr_disp_cpu;
718 #define lpfc_conf_trunk_port0_WORD conf_trunk
719 #define lpfc_conf_trunk_port0_SHIFT 0
720 #define lpfc_conf_trunk_port0_MASK 0x1
721 #define lpfc_conf_trunk_port1_WORD conf_trunk
722 #define lpfc_conf_trunk_port1_SHIFT 1
723 #define lpfc_conf_trunk_port1_MASK 0x1
724 #define lpfc_conf_trunk_port2_WORD conf_trunk
725 #define lpfc_conf_trunk_port2_SHIFT 2
726 #define lpfc_conf_trunk_port2_MASK 0x1
727 #define lpfc_conf_trunk_port3_WORD conf_trunk
728 #define lpfc_conf_trunk_port3_SHIFT 3
729 #define lpfc_conf_trunk_port3_MASK 0x1
738 enum lpfc_sgl_state {
745 /* lpfc_sglqs are used in double linked lists */
746 struct list_head list;
747 struct list_head clist;
748 enum lpfc_sge_type buff_type; /* is this a scsi sgl */
749 enum lpfc_sgl_state state;
750 struct lpfc_nodelist *ndlp; /* ndlp associated with IO */
751 uint16_t iotag; /* pre-assigned IO tag */
752 uint16_t sli4_lxritag; /* logical pre-assigned xri. */
753 uint16_t sli4_xritag; /* pre-assigned XRI, (OXID) tag. */
754 struct sli4_sge *sgl; /* pre-assigned SGL */
755 void *virt; /* virtual address. */
756 dma_addr_t phys; /* physical address */
759 struct lpfc_rpi_hdr {
760 struct list_head list;
762 struct lpfc_dmabuf *dmabuf;
768 struct lpfc_rsrc_blks {
769 struct list_head list;
775 struct lpfc_rdp_context {
776 struct lpfc_nodelist *ndlp;
779 READ_LNK_VAR link_stat;
780 uint8_t page_a0[DMP_SFF_PAGE_A0_SIZE];
781 uint8_t page_a2[DMP_SFF_PAGE_A2_SIZE];
782 void (*cmpl)(struct lpfc_hba *, struct lpfc_rdp_context*, int);
785 struct lpfc_lcb_context {
793 struct lpfc_nodelist *ndlp;
798 * SLI4 specific function prototypes
800 int lpfc_pci_function_reset(struct lpfc_hba *);
801 int lpfc_sli4_pdev_status_reg_wait(struct lpfc_hba *);
802 int lpfc_sli4_hba_setup(struct lpfc_hba *);
803 int lpfc_sli4_config(struct lpfc_hba *, struct lpfcMboxq *, uint8_t,
804 uint8_t, uint32_t, bool);
805 void lpfc_sli4_mbox_cmd_free(struct lpfc_hba *, struct lpfcMboxq *);
806 void lpfc_sli4_mbx_sge_set(struct lpfcMboxq *, uint32_t, dma_addr_t, uint32_t);
807 void lpfc_sli4_mbx_sge_get(struct lpfcMboxq *, uint32_t,
808 struct lpfc_mbx_sge *);
809 int lpfc_sli4_mbx_read_fcf_rec(struct lpfc_hba *, struct lpfcMboxq *,
812 void lpfc_sli4_hba_reset(struct lpfc_hba *);
813 struct lpfc_queue *lpfc_sli4_queue_alloc(struct lpfc_hba *, uint32_t,
815 void lpfc_sli4_queue_free(struct lpfc_queue *);
816 int lpfc_eq_create(struct lpfc_hba *, struct lpfc_queue *, uint32_t);
817 int lpfc_modify_hba_eq_delay(struct lpfc_hba *phba, uint32_t startq,
818 uint32_t numq, uint32_t imax);
819 int lpfc_cq_create(struct lpfc_hba *, struct lpfc_queue *,
820 struct lpfc_queue *, uint32_t, uint32_t);
821 int lpfc_cq_create_set(struct lpfc_hba *phba, struct lpfc_queue **cqp,
822 struct lpfc_sli4_hdw_queue *hdwq, uint32_t type,
824 int32_t lpfc_mq_create(struct lpfc_hba *, struct lpfc_queue *,
825 struct lpfc_queue *, uint32_t);
826 int lpfc_wq_create(struct lpfc_hba *, struct lpfc_queue *,
827 struct lpfc_queue *, uint32_t);
828 int lpfc_rq_create(struct lpfc_hba *, struct lpfc_queue *,
829 struct lpfc_queue *, struct lpfc_queue *, uint32_t);
830 int lpfc_mrq_create(struct lpfc_hba *phba, struct lpfc_queue **hrqp,
831 struct lpfc_queue **drqp, struct lpfc_queue **cqp,
833 int lpfc_eq_destroy(struct lpfc_hba *, struct lpfc_queue *);
834 int lpfc_cq_destroy(struct lpfc_hba *, struct lpfc_queue *);
835 int lpfc_mq_destroy(struct lpfc_hba *, struct lpfc_queue *);
836 int lpfc_wq_destroy(struct lpfc_hba *, struct lpfc_queue *);
837 int lpfc_rq_destroy(struct lpfc_hba *, struct lpfc_queue *,
838 struct lpfc_queue *);
839 int lpfc_sli4_queue_setup(struct lpfc_hba *);
840 void lpfc_sli4_queue_unset(struct lpfc_hba *);
841 int lpfc_sli4_post_sgl(struct lpfc_hba *, dma_addr_t, dma_addr_t, uint16_t);
842 int lpfc_repost_common_sgl_list(struct lpfc_hba *phba);
843 uint16_t lpfc_sli4_next_xritag(struct lpfc_hba *);
844 void lpfc_sli4_free_xri(struct lpfc_hba *, int);
845 int lpfc_sli4_post_async_mbox(struct lpfc_hba *);
846 struct lpfc_cq_event *__lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
847 struct lpfc_cq_event *lpfc_sli4_cq_event_alloc(struct lpfc_hba *);
848 void __lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
849 void lpfc_sli4_cq_event_release(struct lpfc_hba *, struct lpfc_cq_event *);
850 int lpfc_sli4_init_rpi_hdrs(struct lpfc_hba *);
851 int lpfc_sli4_post_rpi_hdr(struct lpfc_hba *, struct lpfc_rpi_hdr *);
852 int lpfc_sli4_post_all_rpi_hdrs(struct lpfc_hba *);
853 struct lpfc_rpi_hdr *lpfc_sli4_create_rpi_hdr(struct lpfc_hba *);
854 void lpfc_sli4_remove_rpi_hdrs(struct lpfc_hba *);
855 int lpfc_sli4_alloc_rpi(struct lpfc_hba *);
856 void lpfc_sli4_free_rpi(struct lpfc_hba *, int);
857 void lpfc_sli4_remove_rpis(struct lpfc_hba *);
858 void lpfc_sli4_async_event_proc(struct lpfc_hba *);
859 void lpfc_sli4_fcf_redisc_event_proc(struct lpfc_hba *);
860 int lpfc_sli4_resume_rpi(struct lpfc_nodelist *,
861 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *);
862 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *);
863 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *);
864 void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *,
865 struct sli4_wcqe_xri_aborted *);
866 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba,
867 struct sli4_wcqe_xri_aborted *axri);
868 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba,
869 struct sli4_wcqe_xri_aborted *axri);
870 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *,
871 struct sli4_wcqe_xri_aborted *);
872 void lpfc_sli4_vport_delete_els_xri_aborted(struct lpfc_vport *);
873 void lpfc_sli4_vport_delete_fcp_xri_aborted(struct lpfc_vport *);
874 int lpfc_sli4_brdreset(struct lpfc_hba *);
875 int lpfc_sli4_add_fcf_record(struct lpfc_hba *, struct fcf_record *);
876 void lpfc_sli_remove_dflt_fcf(struct lpfc_hba *);
877 int lpfc_sli4_get_els_iocb_cnt(struct lpfc_hba *);
878 int lpfc_sli4_get_iocb_cnt(struct lpfc_hba *phba);
879 int lpfc_sli4_init_vpi(struct lpfc_vport *);
880 inline void lpfc_sli4_eq_clr_intr(struct lpfc_queue *);
881 uint32_t lpfc_sli4_cq_release(struct lpfc_queue *, bool);
882 uint32_t lpfc_sli4_eq_release(struct lpfc_queue *, bool);
883 inline void lpfc_sli4_if6_eq_clr_intr(struct lpfc_queue *q);
884 uint32_t lpfc_sli4_if6_cq_release(struct lpfc_queue *q, bool arm);
885 uint32_t lpfc_sli4_if6_eq_release(struct lpfc_queue *q, bool arm);
886 void lpfc_sli4_fcfi_unreg(struct lpfc_hba *, uint16_t);
887 int lpfc_sli4_fcf_scan_read_fcf_rec(struct lpfc_hba *, uint16_t);
888 int lpfc_sli4_fcf_rr_read_fcf_rec(struct lpfc_hba *, uint16_t);
889 int lpfc_sli4_read_fcf_rec(struct lpfc_hba *, uint16_t);
890 void lpfc_mbx_cmpl_fcf_scan_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
891 void lpfc_mbx_cmpl_fcf_rr_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
892 void lpfc_mbx_cmpl_read_fcf_rec(struct lpfc_hba *, LPFC_MBOXQ_t *);
893 int lpfc_sli4_unregister_fcf(struct lpfc_hba *);
894 int lpfc_sli4_post_status_check(struct lpfc_hba *);
895 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
896 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *);
897 void lpfc_sli4_ras_dma_free(struct lpfc_hba *phba);