drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <scsi/scsi_tcq.h>
  18 #include <scsi/scsicam.h>
  19 #include <scsi/scsi_transport.h>
  20 #include <scsi/scsi_transport_fc.h>
  21
  22 #include "qla_target.h"
  23
  24 /*
  25  * Driver version
  26  */
  27 char qla2x00_version_str[40];
  28
  29 static int apidev_major;
  30
  31 /*
  32  * SRB allocation cache
  33  */
  34 struct kmem_cache *srb_cachep;
  35
  36 /*
  37  * CT6 CTX allocation cache
  38  */
  39 static struct kmem_cache *ctx_cachep;
  40 /*
  41  * error level for logging
  42  */
  43 int ql_errlev = ql_log_all;
  44
  45 static int ql2xenableclass2;
  46 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  47 MODULE_PARM_DESC(ql2xenableclass2,
  48                 "Specify if Class 2 operations are supported from the very "
  49                 "beginning. Default is 0 - class 2 not supported.");
  50
  51
  52 int ql2xlogintimeout = 20;
  53 module_param(ql2xlogintimeout, int, S_IRUGO);
  54 MODULE_PARM_DESC(ql2xlogintimeout,
  55                 "Login timeout value in seconds.");
  56
  57 int qlport_down_retry;
  58 module_param(qlport_down_retry, int, S_IRUGO);
  59 MODULE_PARM_DESC(qlport_down_retry,
  60                 "Maximum number of command retries to a port that returns "
  61                 "a PORT-DOWN status.");
  62
  63 int ql2xplogiabsentdevice;
  64 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  65 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  66                 "Option to enable PLOGI to devices that are not present after "
  67                 "a Fabric scan.  This is needed for several broken switches. "
  68                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  69
  70 int ql2xloginretrycount = 0;
  71 module_param(ql2xloginretrycount, int, S_IRUGO);
  72 MODULE_PARM_DESC(ql2xloginretrycount,
  73                 "Specify an alternate value for the NVRAM login retry count.");
  74
  75 int ql2xallocfwdump = 1;
  76 module_param(ql2xallocfwdump, int, S_IRUGO);
  77 MODULE_PARM_DESC(ql2xallocfwdump,
  78                 "Option to enable allocation of memory for a firmware dump "
  79                 "during HBA initialization.  Memory allocation requirements "
  80                 "vary by ISP type.  Default is 1 - allocate memory.");
  81
  82 int ql2xextended_error_logging;
  83 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  84 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  85 MODULE_PARM_DESC(ql2xextended_error_logging,
  86                 "Option to enable extended error logging,\n"
  87                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  88                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  89                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  90                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  91                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  92                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  93                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  94                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  95                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  96                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  97                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
  98                 "\t\t0x1e400000 - Preferred value for capturing essential "
  99                 "debug information (equivalent to old "
 100                 "ql2xextended_error_logging=1).\n"
 101                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 102
 103 int ql2xshiftctondsd = 6;
 104 module_param(ql2xshiftctondsd, int, S_IRUGO);
 105 MODULE_PARM_DESC(ql2xshiftctondsd,
 106                 "Set to control shifting of command type processing "
 107                 "based on total number of SG elements.");
 108
 109 int ql2xfdmienable=1;
 110 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 111 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 112 MODULE_PARM_DESC(ql2xfdmienable,
 113                 "Enables FDMI registrations. "
 114                 "0 - no FDMI. Default is 1 - perform FDMI.");
 115
 116 #define MAX_Q_DEPTH     32
 117 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 118 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 119 MODULE_PARM_DESC(ql2xmaxqdepth,
 120                 "Maximum queue depth to set for each LUN. "
 121                 "Default is 32.");
 122
 123 int ql2xenabledif = 2;
 124 module_param(ql2xenabledif, int, S_IRUGO);
 125 MODULE_PARM_DESC(ql2xenabledif,
 126                 " Enable T10-CRC-DIF:\n"
 127                 " Default is 2.\n"
 128                 "  0 -- No DIF Support\n"
 129                 "  1 -- Enable DIF for all types\n"
 130                 "  2 -- Enable DIF for all types, except Type 0.\n");
 131
 132 int ql2xenablehba_err_chk = 2;
 133 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 134 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 135                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 136                 " Default is 2.\n"
 137                 "  0 -- Error isolation disabled\n"
 138                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 139                 "  2 -- Error isolation enabled for all Types\n");
 140
 141 int ql2xiidmaenable=1;
 142 module_param(ql2xiidmaenable, int, S_IRUGO);
 143 MODULE_PARM_DESC(ql2xiidmaenable,
 144                 "Enables iIDMA settings "
 145                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 146
 147 int ql2xmqsupport = 1;
 148 module_param(ql2xmqsupport, int, S_IRUGO);
 149 MODULE_PARM_DESC(ql2xmqsupport,
 150                 "Enable on demand multiple queue pairs support "
 151                 "Default is 1 for supported. "
 152                 "Set it to 0 to turn off mq qpair support.");
 153
 154 int ql2xfwloadbin;
 155 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 156 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 157 MODULE_PARM_DESC(ql2xfwloadbin,
 158                 "Option to specify location from which to load ISP firmware:.\n"
 159                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 160                 "      interface.\n"
 161                 " 1 -- load firmware from flash.\n"
 162                 " 0 -- use default semantics.\n");
 163
 164 int ql2xetsenable;
 165 module_param(ql2xetsenable, int, S_IRUGO);
 166 MODULE_PARM_DESC(ql2xetsenable,
 167                 "Enables firmware ETS burst."
 168                 "Default is 0 - skip ETS enablement.");
 169
 170 int ql2xdbwr = 1;
 171 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 172 MODULE_PARM_DESC(ql2xdbwr,
 173                 "Option to specify scheme for request queue posting.\n"
 174                 " 0 -- Regular doorbell.\n"
 175                 " 1 -- CAMRAM doorbell (faster).\n");
 176
 177 int ql2xtargetreset = 1;
 178 module_param(ql2xtargetreset, int, S_IRUGO);
 179 MODULE_PARM_DESC(ql2xtargetreset,
 180                  "Enable target reset."
 181                  "Default is 1 - use hw defaults.");
 182
 183 int ql2xgffidenable;
 184 module_param(ql2xgffidenable, int, S_IRUGO);
 185 MODULE_PARM_DESC(ql2xgffidenable,
 186                 "Enables GFF_ID checks of port type. "
 187                 "Default is 0 - Do not use GFF_ID information.");
 188
 189 int ql2xasynctmfenable;
 190 module_param(ql2xasynctmfenable, int, S_IRUGO);
 191 MODULE_PARM_DESC(ql2xasynctmfenable,
 192                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 193                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
 194
 195 int ql2xdontresethba;
 196 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 197 MODULE_PARM_DESC(ql2xdontresethba,
 198                 "Option to specify reset behaviour.\n"
 199                 " 0 (Default) -- Reset on failure.\n"
 200                 " 1 -- Do not reset on failure.\n");
 201
 202 uint64_t ql2xmaxlun = MAX_LUNS;
 203 module_param(ql2xmaxlun, ullong, S_IRUGO);
 204 MODULE_PARM_DESC(ql2xmaxlun,
 205                 "Defines the maximum LU number to register with the SCSI "
 206                 "midlayer. Default is 65535.");
 207
 208 int ql2xmdcapmask = 0x1F;
 209 module_param(ql2xmdcapmask, int, S_IRUGO);
 210 MODULE_PARM_DESC(ql2xmdcapmask,
 211                 "Set the Minidump driver capture mask level. "
 212                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 213
 214 int ql2xmdenable = 1;
 215 module_param(ql2xmdenable, int, S_IRUGO);
 216 MODULE_PARM_DESC(ql2xmdenable,
 217                 "Enable/disable MiniDump. "
 218                 "0 - MiniDump disabled. "
 219                 "1 (Default) - MiniDump enabled.");
 220
 221 int ql2xexlogins = 0;
 222 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 223 MODULE_PARM_DESC(ql2xexlogins,
 224                  "Number of extended Logins. "
 225                  "0 (Default)- Disabled.");
 226
 227 int ql2xexchoffld = 0;
 228 module_param(ql2xexchoffld, uint, S_IRUGO|S_IWUSR);
 229 MODULE_PARM_DESC(ql2xexchoffld,
 230                  "Number of exchanges to offload. "
 231                  "0 (Default)- Disabled.");
 232
 233 int ql2xfwholdabts = 0;
 234 module_param(ql2xfwholdabts, int, S_IRUGO);
 235 MODULE_PARM_DESC(ql2xfwholdabts,
 236                 "Allow FW to hold status IOCB until ABTS rsp received. "
 237                 "0 (Default) Do not set fw option. "
 238                 "1 - Set fw option to hold ABTS.");
 239
 240 /*
 241  * SCSI host template entry points
 242  */
 243 static int qla2xxx_slave_configure(struct scsi_device * device);
 244 static int qla2xxx_slave_alloc(struct scsi_device *);
 245 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
 246 static void qla2xxx_scan_start(struct Scsi_Host *);
 247 static void qla2xxx_slave_destroy(struct scsi_device *);
 248 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 249 static int qla2xxx_eh_abort(struct scsi_cmnd *);
 250 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
 251 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
 252 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
 253 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
 254
 255 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 256 static void qla2x00_free_device(scsi_qla_host_t *);
 257 static void qla83xx_disable_laser(scsi_qla_host_t *vha);
 258 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 259
 260 struct scsi_host_template qla2xxx_driver_template = {
 261         .module                 = THIS_MODULE,
 262         .name                   = QLA2XXX_DRIVER_NAME,
 263         .queuecommand           = qla2xxx_queuecommand,
 264
 265         .eh_abort_handler       = qla2xxx_eh_abort,
 266         .eh_device_reset_handler = qla2xxx_eh_device_reset,
 267         .eh_target_reset_handler = qla2xxx_eh_target_reset,
 268         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
 269         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
 270
 271         .slave_configure        = qla2xxx_slave_configure,
 272
 273         .slave_alloc            = qla2xxx_slave_alloc,
 274         .slave_destroy          = qla2xxx_slave_destroy,
 275         .scan_finished          = qla2xxx_scan_finished,
 276         .scan_start             = qla2xxx_scan_start,
 277         .change_queue_depth     = scsi_change_queue_depth,
 278         .map_queues             = qla2xxx_map_queues,
 279         .this_id                = -1,
 280         .cmd_per_lun            = 3,
 281         .use_clustering         = ENABLE_CLUSTERING,
 282         .sg_tablesize           = SG_ALL,
 283
 284         .max_sectors            = 0xFFFF,
 285         .shost_attrs            = qla2x00_host_attrs,
 286
 287         .supported_mode         = MODE_INITIATOR,
 288         .track_queue_depth      = 1,
 289 };
 290
 291 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 292 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 293
 294 /* TODO Convert to inlines
 295  *
 296  * Timer routines
 297  */
 298
 299 __inline__ void
 300 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
 301 {
 302         init_timer(&vha->timer);
 303         vha->timer.expires = jiffies + interval * HZ;
 304         vha->timer.data = (unsigned long)vha;
 305         vha->timer.function = (void (*)(unsigned long))func;
 306         add_timer(&vha->timer);
 307         vha->timer_active = 1;
 308 }
 309
 310 static inline void
 311 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 312 {
 313         /* Currently used for 82XX only. */
 314         if (vha->device_flags & DFLG_DEV_FAILED) {
 315                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 316                     "Device in a failed state, returning.\n");
 317                 return;
 318         }
 319
 320         mod_timer(&vha->timer, jiffies + interval * HZ);
 321 }
 322
 323 static __inline__ void
 324 qla2x00_stop_timer(scsi_qla_host_t *vha)
 325 {
 326         del_timer_sync(&vha->timer);
 327         vha->timer_active = 0;
 328 }
 329
 330 static int qla2x00_do_dpc(void *data);
 331
 332 static void qla2x00_rst_aen(scsi_qla_host_t *);
 333
 334 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 335         struct req_que **, struct rsp_que **);
 336 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 337 static void qla2x00_mem_free(struct qla_hw_data *);
 338 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 339         struct qla_qpair *qpair);
 340
 341 /* -------------------------------------------------------------------------- */
 342 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 343                                 struct rsp_que *rsp)
 344 {
 345         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 346         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
 347                                 GFP_KERNEL);
 348         if (!ha->req_q_map) {
 349                 ql_log(ql_log_fatal, vha, 0x003b,
 350                     "Unable to allocate memory for request queue ptrs.\n");
 351                 goto fail_req_map;
 352         }
 353
 354         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
 355                                 GFP_KERNEL);
 356         if (!ha->rsp_q_map) {
 357                 ql_log(ql_log_fatal, vha, 0x003c,
 358                     "Unable to allocate memory for response queue ptrs.\n");
 359                 goto fail_rsp_map;
 360         }
 361
 362         if (ql2xmqsupport && ha->max_qpairs) {
 363                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 364                         GFP_KERNEL);
 365                 if (!ha->queue_pair_map) {
 366                         ql_log(ql_log_fatal, vha, 0x0180,
 367                             "Unable to allocate memory for queue pair ptrs.\n");
 368                         goto fail_qpair_map;
 369                 }
 370                 ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 371                 if (ha->base_qpair == NULL) {
 372                         ql_log(ql_log_warn, vha, 0x0182,
 373                             "Failed to allocate base queue pair memory.\n");
 374                         goto fail_base_qpair;
 375                 }
 376                 ha->base_qpair->req = req;
 377                 ha->base_qpair->rsp = rsp;
 378         }
 379
 380         /*
 381          * Make sure we record at least the request and response queue zero in
 382          * case we need to free them if part of the probe fails.
 383          */
 384         ha->rsp_q_map[0] = rsp;
 385         ha->req_q_map[0] = req;
 386         set_bit(0, ha->rsp_qid_map);
 387         set_bit(0, ha->req_qid_map);
 388         return 1;
 389
 390 fail_base_qpair:
 391         kfree(ha->queue_pair_map);
 392 fail_qpair_map:
 393         kfree(ha->rsp_q_map);
 394         ha->rsp_q_map = NULL;
 395 fail_rsp_map:
 396         kfree(ha->req_q_map);
 397         ha->req_q_map = NULL;
 398 fail_req_map:
 399         return -ENOMEM;
 400 }
 401
 402 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 403 {
 404         if (IS_QLAFX00(ha)) {
 405                 if (req && req->ring_fx00)
 406                         dma_free_coherent(&ha->pdev->dev,
 407                             (req->length_fx00 + 1) * sizeof(request_t),
 408                             req->ring_fx00, req->dma_fx00);
 409         } else if (req && req->ring)
 410                 dma_free_coherent(&ha->pdev->dev,
 411                 (req->length + 1) * sizeof(request_t),
 412                 req->ring, req->dma);
 413
 414         if (req)
 415                 kfree(req->outstanding_cmds);
 416
 417         kfree(req);
 418         req = NULL;
 419 }
 420
 421 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 422 {
 423         if (IS_QLAFX00(ha)) {
 424                 if (rsp && rsp->ring)
 425                         dma_free_coherent(&ha->pdev->dev,
 426                             (rsp->length_fx00 + 1) * sizeof(request_t),
 427                             rsp->ring_fx00, rsp->dma_fx00);
 428         } else if (rsp && rsp->ring) {
 429                 dma_free_coherent(&ha->pdev->dev,
 430                 (rsp->length + 1) * sizeof(response_t),
 431                 rsp->ring, rsp->dma);
 432         }
 433         kfree(rsp);
 434         rsp = NULL;
 435 }
 436
 437 static void qla2x00_free_queues(struct qla_hw_data *ha)
 438 {
 439         struct req_que *req;
 440         struct rsp_que *rsp;
 441         int cnt;
 442         unsigned long flags;
 443
 444         spin_lock_irqsave(&ha->hardware_lock, flags);
 445         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 446                 if (!test_bit(cnt, ha->req_qid_map))
 447                         continue;
 448
 449                 req = ha->req_q_map[cnt];
 450                 clear_bit(cnt, ha->req_qid_map);
 451                 ha->req_q_map[cnt] = NULL;
 452
 453                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 454                 qla2x00_free_req_que(ha, req);
 455                 spin_lock_irqsave(&ha->hardware_lock, flags);
 456         }
 457         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 458
 459         kfree(ha->req_q_map);
 460         ha->req_q_map = NULL;
 461
 462
 463         spin_lock_irqsave(&ha->hardware_lock, flags);
 464         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 465                 if (!test_bit(cnt, ha->rsp_qid_map))
 466                         continue;
 467
 468                 rsp = ha->rsp_q_map[cnt];
 469                 clear_bit(cnt, ha->rsp_qid_map);
 470                 ha->rsp_q_map[cnt] =  NULL;
 471                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 472                 qla2x00_free_rsp_que(ha, rsp);
 473                 spin_lock_irqsave(&ha->hardware_lock, flags);
 474         }
 475         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 476
 477         kfree(ha->rsp_q_map);
 478         ha->rsp_q_map = NULL;
 479 }
 480
 481 static char *
 482 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 483 {
 484         struct qla_hw_data *ha = vha->hw;
 485         static char *pci_bus_modes[] = {
 486                 "33", "66", "100", "133",
 487         };
 488         uint16_t pci_bus;
 489
 490         strcpy(str, "PCI");
 491         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 492         if (pci_bus) {
 493                 strcat(str, "-X (");
 494                 strcat(str, pci_bus_modes[pci_bus]);
 495         } else {
 496                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 497                 strcat(str, " (");
 498                 strcat(str, pci_bus_modes[pci_bus]);
 499         }
 500         strcat(str, " MHz)");
 501
 502         return (str);
 503 }
 504
 505 static char *
 506 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 507 {
 508         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 509         struct qla_hw_data *ha = vha->hw;
 510         uint32_t pci_bus;
 511
 512         if (pci_is_pcie(ha->pdev)) {
 513                 char lwstr[6];
 514                 uint32_t lstat, lspeed, lwidth;
 515
 516                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 517                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 518                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 519
 520                 strcpy(str, "PCIe (");
 521                 switch (lspeed) {
 522                 case 1:
 523                         strcat(str, "2.5GT/s ");
 524                         break;
 525                 case 2:
 526                         strcat(str, "5.0GT/s ");
 527                         break;
 528                 case 3:
 529                         strcat(str, "8.0GT/s ");
 530                         break;
 531                 default:
 532                         strcat(str, "<unknown> ");
 533                         break;
 534                 }
 535                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 536                 strcat(str, lwstr);
 537
 538                 return str;
 539         }
 540
 541         strcpy(str, "PCI");
 542         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 543         if (pci_bus == 0 || pci_bus == 8) {
 544                 strcat(str, " (");
 545                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 546         } else {
 547                 strcat(str, "-X ");
 548                 if (pci_bus & BIT_2)
 549                         strcat(str, "Mode 2");
 550                 else
 551                         strcat(str, "Mode 1");
 552                 strcat(str, " (");
 553                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 554         }
 555         strcat(str, " MHz)");
 556
 557         return str;
 558 }
 559
 560 static char *
 561 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 562 {
 563         char un_str[10];
 564         struct qla_hw_data *ha = vha->hw;
 565
 566         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 567             ha->fw_minor_version, ha->fw_subminor_version);
 568
 569         if (ha->fw_attributes & BIT_9) {
 570                 strcat(str, "FLX");
 571                 return (str);
 572         }
 573
 574         switch (ha->fw_attributes & 0xFF) {
 575         case 0x7:
 576                 strcat(str, "EF");
 577                 break;
 578         case 0x17:
 579                 strcat(str, "TP");
 580                 break;
 581         case 0x37:
 582                 strcat(str, "IP");
 583                 break;
 584         case 0x77:
 585                 strcat(str, "VI");
 586                 break;
 587         default:
 588                 sprintf(un_str, "(%x)", ha->fw_attributes);
 589                 strcat(str, un_str);
 590                 break;
 591         }
 592         if (ha->fw_attributes & 0x100)
 593                 strcat(str, "X");
 594
 595         return (str);
 596 }
 597
 598 static char *
 599 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 600 {
 601         struct qla_hw_data *ha = vha->hw;
 602
 603         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 604             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 605         return str;
 606 }
 607
 608 void
 609 qla2x00_sp_free_dma(void *vha, void *ptr)
 610 {
 611         srb_t *sp = (srb_t *)ptr;
 612         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 613         struct qla_hw_data *ha = sp->fcport->vha->hw;
 614         void *ctx = GET_CMD_CTX_SP(sp);
 615
 616         if (sp->flags & SRB_DMA_VALID) {
 617                 scsi_dma_unmap(cmd);
 618                 sp->flags &= ~SRB_DMA_VALID;
 619         }
 620
 621         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 622                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 623                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 624                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 625         }
 626
 627         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 628                 /* List assured to be having elements */
 629                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 630                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 631         }
 632
 633         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 634                 dma_pool_free(ha->dl_dma_pool, ctx,
 635                     ((struct crc_context *)ctx)->crc_ctx_dma);
 636                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 637         }
 638
 639         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 640                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 641
 642                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 643                         ctx1->fcp_cmnd_dma);
 644                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 645                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 646                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 647                 mempool_free(ctx1, ha->ctx_mempool);
 648                 ctx1 = NULL;
 649         }
 650
 651         CMD_SP(cmd) = NULL;
 652         qla2x00_rel_sp(sp->fcport->vha, sp);
 653 }
 654
 655 void
 656 qla2x00_sp_compl(void *data, void *ptr, int res)
 657 {
 658         struct qla_hw_data *ha = (struct qla_hw_data *)data;
 659         srb_t *sp = (srb_t *)ptr;
 660         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 661
 662         cmd->result = res;
 663
 664         if (atomic_read(&sp->ref_count) == 0) {
 665                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
 666                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 667                     sp, GET_CMD_SP(sp));
 668                 if (ql2xextended_error_logging & ql_dbg_io)
 669                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 670                 return;
 671         }
 672         if (!atomic_dec_and_test(&sp->ref_count))
 673                 return;
 674
 675         qla2x00_sp_free_dma(ha, sp);
 676         cmd->scsi_done(cmd);
 677 }
 678
 679 void
 680 qla2xxx_qpair_sp_free_dma(void *vha, void *ptr)
 681 {
 682         srb_t *sp = (srb_t *)ptr;
 683         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 684         struct qla_hw_data *ha = sp->fcport->vha->hw;
 685         void *ctx = GET_CMD_CTX_SP(sp);
 686
 687         if (sp->flags & SRB_DMA_VALID) {
 688                 scsi_dma_unmap(cmd);
 689                 sp->flags &= ~SRB_DMA_VALID;
 690         }
 691
 692         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 693                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 694                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 695                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 696         }
 697
 698         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 699                 /* List assured to be having elements */
 700                 qla2x00_clean_dsd_pool(ha, sp, NULL);
 701                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 702         }
 703
 704         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 705                 dma_pool_free(ha->dl_dma_pool, ctx,
 706                     ((struct crc_context *)ctx)->crc_ctx_dma);
 707                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 708         }
 709
 710         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 711                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
 712
 713                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 714                     ctx1->fcp_cmnd_dma);
 715                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 716                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 717                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 718                 mempool_free(ctx1, ha->ctx_mempool);
 719         }
 720
 721         CMD_SP(cmd) = NULL;
 722         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 723 }
 724
 725 void
 726 qla2xxx_qpair_sp_compl(void *data, void *ptr, int res)
 727 {
 728         srb_t *sp = (srb_t *)ptr;
 729         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 730
 731         cmd->result = res;
 732
 733         if (atomic_read(&sp->ref_count) == 0) {
 734                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3079,
 735                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
 736                     sp, GET_CMD_SP(sp));
 737                 if (ql2xextended_error_logging & ql_dbg_io)
 738                         WARN_ON(atomic_read(&sp->ref_count) == 0);
 739                 return;
 740         }
 741         if (!atomic_dec_and_test(&sp->ref_count))
 742                 return;
 743
 744         qla2xxx_qpair_sp_free_dma(sp->fcport->vha, sp);
 745         cmd->scsi_done(cmd);
 746 }
 747
 748 /* If we are SP1 here, we need to still take and release the host_lock as SP1
 749  * does not have the changes necessary to avoid taking host->host_lock.
 750  */
 751 static int
 752 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 753 {
 754         scsi_qla_host_t *vha = shost_priv(host);
 755         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 756         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 757         struct qla_hw_data *ha = vha->hw;
 758         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 759         srb_t *sp;
 760         int rval;
 761         struct qla_qpair *qpair = NULL;
 762         uint32_t tag;
 763         uint16_t hwq;
 764
 765         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags))) {
 766                 cmd->result = DID_NO_CONNECT << 16;
 767                 goto qc24_fail_command;
 768         }
 769
 770         if (ha->mqenable) {
 771                 if (shost_use_blk_mq(vha->host)) {
 772                         tag = blk_mq_unique_tag(cmd->request);
 773                         hwq = blk_mq_unique_tag_to_hwq(tag);
 774                         qpair = ha->queue_pair_map[hwq];
 775                 } else if (vha->vp_idx && vha->qpair) {
 776                         qpair = vha->qpair;
 777                 }
 778
 779                 if (qpair)
 780                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 781         }
 782
 783         if (ha->flags.eeh_busy) {
 784                 if (ha->flags.pci_channel_io_perm_failure) {
 785                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 786                             "PCI Channel IO permanent failure, exiting "
 787                             "cmd=%p.\n", cmd);
 788                         cmd->result = DID_NO_CONNECT << 16;
 789                 } else {
 790                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 791                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 792                         cmd->result = DID_REQUEUE << 16;
 793                 }
 794                 goto qc24_fail_command;
 795         }
 796
 797         rval = fc_remote_port_chkready(rport);
 798         if (rval) {
 799                 cmd->result = rval;
 800                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 801                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 802                     cmd, rval);
 803                 goto qc24_fail_command;
 804         }
 805
 806         if (!vha->flags.difdix_supported &&
 807                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 808                         ql_dbg(ql_dbg_io, vha, 0x3004,
 809                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 810                             cmd);
 811                         cmd->result = DID_NO_CONNECT << 16;
 812                         goto qc24_fail_command;
 813         }
 814
 815         if (!fcport) {
 816                 cmd->result = DID_NO_CONNECT << 16;
 817                 goto qc24_fail_command;
 818         }
 819
 820         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 821                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 822                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 823                         ql_dbg(ql_dbg_io, vha, 0x3005,
 824                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 825                             atomic_read(&fcport->state),
 826                             atomic_read(&base_vha->loop_state));
 827                         cmd->result = DID_NO_CONNECT << 16;
 828                         goto qc24_fail_command;
 829                 }
 830                 goto qc24_target_busy;
 831         }
 832
 833         /*
 834          * Return target busy if we've received a non-zero retry_delay_timer
 835          * in a FCP_RSP.
 836          */
 837         if (fcport->retry_delay_timestamp == 0) {
 838                 /* retry delay not set */
 839         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 840                 fcport->retry_delay_timestamp = 0;
 841         else
 842                 goto qc24_target_busy;
 843
 844         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 845         if (!sp)
 846                 goto qc24_host_busy;
 847
 848         sp->u.scmd.cmd = cmd;
 849         sp->type = SRB_SCSI_CMD;
 850         atomic_set(&sp->ref_count, 1);
 851         CMD_SP(cmd) = (void *)sp;
 852         sp->free = qla2x00_sp_free_dma;
 853         sp->done = qla2x00_sp_compl;
 854
 855         rval = ha->isp_ops->start_scsi(sp);
 856         if (rval != QLA_SUCCESS) {
 857                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 858                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 859                 goto qc24_host_busy_free_sp;
 860         }
 861
 862         return 0;
 863
 864 qc24_host_busy_free_sp:
 865         qla2x00_sp_free_dma(ha, sp);
 866
 867 qc24_host_busy:
 868         return SCSI_MLQUEUE_HOST_BUSY;
 869
 870 qc24_target_busy:
 871         return SCSI_MLQUEUE_TARGET_BUSY;
 872
 873 qc24_fail_command:
 874         cmd->scsi_done(cmd);
 875
 876         return 0;
 877 }
 878
 879 /* For MQ supported I/O */
 880 int
 881 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 882     struct qla_qpair *qpair)
 883 {
 884         scsi_qla_host_t *vha = shost_priv(host);
 885         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 886         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 887         struct qla_hw_data *ha = vha->hw;
 888         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 889         srb_t *sp;
 890         int rval;
 891
 892         rval = fc_remote_port_chkready(rport);
 893         if (rval) {
 894                 cmd->result = rval;
 895                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 896                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 897                     cmd, rval);
 898                 goto qc24_fail_command;
 899         }
 900
 901         if (!fcport) {
 902                 cmd->result = DID_NO_CONNECT << 16;
 903                 goto qc24_fail_command;
 904         }
 905
 906         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 907                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 908                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 909                         ql_dbg(ql_dbg_io, vha, 0x3077,
 910                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 911                             atomic_read(&fcport->state),
 912                             atomic_read(&base_vha->loop_state));
 913                         cmd->result = DID_NO_CONNECT << 16;
 914                         goto qc24_fail_command;
 915                 }
 916                 goto qc24_target_busy;
 917         }
 918
 919         /*
 920          * Return target busy if we've received a non-zero retry_delay_timer
 921          * in a FCP_RSP.
 922          */
 923         if (fcport->retry_delay_timestamp == 0) {
 924                 /* retry delay not set */
 925         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 926                 fcport->retry_delay_timestamp = 0;
 927         else
 928                 goto qc24_target_busy;
 929
 930         sp = qla2xxx_get_qpair_sp(qpair, fcport, GFP_ATOMIC);
 931         if (!sp)
 932                 goto qc24_host_busy;
 933
 934         sp->u.scmd.cmd = cmd;
 935         sp->type = SRB_SCSI_CMD;
 936         atomic_set(&sp->ref_count, 1);
 937         CMD_SP(cmd) = (void *)sp;
 938         sp->free = qla2xxx_qpair_sp_free_dma;
 939         sp->done = qla2xxx_qpair_sp_compl;
 940         sp->qpair = qpair;
 941
 942         rval = ha->isp_ops->start_scsi_mq(sp);
 943         if (rval != QLA_SUCCESS) {
 944                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
 945                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 946                 if (rval == QLA_INTERFACE_ERROR)
 947                         goto qc24_fail_command;
 948                 goto qc24_host_busy_free_sp;
 949         }
 950
 951         return 0;
 952
 953 qc24_host_busy_free_sp:
 954         qla2xxx_qpair_sp_free_dma(vha, sp);
 955
 956 qc24_host_busy:
 957         return SCSI_MLQUEUE_HOST_BUSY;
 958
 959 qc24_target_busy:
 960         return SCSI_MLQUEUE_TARGET_BUSY;
 961
 962 qc24_fail_command:
 963         cmd->scsi_done(cmd);
 964
 965         return 0;
 966 }
 967
 968 /*
 969  * qla2x00_eh_wait_on_command
 970  *    Waits for the command to be returned by the Firmware for some
 971  *    max time.
 972  *
 973  * Input:
 974  *    cmd = Scsi Command to wait on.
 975  *
 976  * Return:
 977  *    Not Found : 0
 978  *    Found : 1
 979  */
 980 static int
 981 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 982 {
 983 #define ABORT_POLLING_PERIOD    1000
 984 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
 985         unsigned long wait_iter = ABORT_WAIT_ITER;
 986         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
 987         struct qla_hw_data *ha = vha->hw;
 988         int ret = QLA_SUCCESS;
 989
 990         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
 991                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
 992                     "Return:eh_wait.\n");
 993                 return ret;
 994         }
 995
 996         while (CMD_SP(cmd) && wait_iter--) {
 997                 msleep(ABORT_POLLING_PERIOD);
 998         }
 999         if (CMD_SP(cmd))
1000                 ret = QLA_FUNCTION_FAILED;
1001
1002         return ret;
1003 }
1004
1005 /*
1006  * qla2x00_wait_for_hba_online
1007  *    Wait till the HBA is online after going through
1008  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1009  *    finally HBA is disabled ie marked offline
1010  *
1011  * Input:
1012  *     ha - pointer to host adapter structure
1013  *
1014  * Note:
1015  *    Does context switching-Release SPIN_LOCK
1016  *    (if any) before calling this routine.
1017  *
1018  * Return:
1019  *    Success (Adapter is online) : 0
1020  *    Failed  (Adapter is offline/disabled) : 1
1021  */
1022 int
1023 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1024 {
1025         int             return_status;
1026         unsigned long   wait_online;
1027         struct qla_hw_data *ha = vha->hw;
1028         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1029
1030         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1031         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1032             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1033             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1034             ha->dpc_active) && time_before(jiffies, wait_online)) {
1035
1036                 msleep(1000);
1037         }
1038         if (base_vha->flags.online)
1039                 return_status = QLA_SUCCESS;
1040         else
1041                 return_status = QLA_FUNCTION_FAILED;
1042
1043         return (return_status);
1044 }
1045
1046 /*
1047  * qla2x00_wait_for_hba_ready
1048  * Wait till the HBA is ready before doing driver unload
1049  *
1050  * Input:
1051  *     ha - pointer to host adapter structure
1052  *
1053  * Note:
1054  *    Does context switching-Release SPIN_LOCK
1055  *    (if any) before calling this routine.
1056  *
1057  */
1058 static void
1059 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1060 {
1061         struct qla_hw_data *ha = vha->hw;
1062         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1063
1064         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1065                 ha->flags.mbox_busy) ||
1066                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1067                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1068                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1069                         break;
1070                 msleep(1000);
1071         }
1072 }
1073
1074 int
1075 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1076 {
1077         int             return_status;
1078         unsigned long   wait_reset;
1079         struct qla_hw_data *ha = vha->hw;
1080         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1081
1082         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1083         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1084             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1085             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1086             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1087
1088                 msleep(1000);
1089
1090                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1091                     ha->flags.chip_reset_done)
1092                         break;
1093         }
1094         if (ha->flags.chip_reset_done)
1095                 return_status = QLA_SUCCESS;
1096         else
1097                 return_status = QLA_FUNCTION_FAILED;
1098
1099         return return_status;
1100 }
1101
1102 static void
1103 sp_get(struct srb *sp)
1104 {
1105         atomic_inc(&sp->ref_count);
1106 }
1107
1108 #define ISP_REG_DISCONNECT 0xffffffffU
1109 /**************************************************************************
1110 * qla2x00_isp_reg_stat
1111 *
1112 * Description:
1113 *       Read the host status register of ISP before aborting the command.
1114 *
1115 * Input:
1116 *       ha = pointer to host adapter structure.
1117 *
1118 *
1119 * Returns:
1120 *       Either true or false.
1121 *
1122 * Note: Return true if there is register disconnect.
1123 **************************************************************************/
1124 static inline
1125 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1126 {
1127         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1128
1129         return ((RD_REG_DWORD(&reg->host_status)) == ISP_REG_DISCONNECT);
1130 }
1131
1132 /**************************************************************************
1133 * qla2xxx_eh_abort
1134 *
1135 * Description:
1136 *    The abort function will abort the specified command.
1137 *
1138 * Input:
1139 *    cmd = Linux SCSI command packet to be aborted.
1140 *
1141 * Returns:
1142 *    Either SUCCESS or FAILED.
1143 *
1144 * Note:
1145 *    Only return FAILED if command not returned by firmware.
1146 **************************************************************************/
1147 static int
1148 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1149 {
1150         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1151         srb_t *sp;
1152         int ret;
1153         unsigned int id;
1154         uint64_t lun;
1155         unsigned long flags;
1156         int rval, wait = 0;
1157         struct qla_hw_data *ha = vha->hw;
1158
1159         if (qla2x00_isp_reg_stat(ha)) {
1160                 ql_log(ql_log_info, vha, 0x8042,
1161                     "PCI/Register disconnect, exiting.\n");
1162                 return FAILED;
1163         }
1164         if (!CMD_SP(cmd))
1165                 return SUCCESS;
1166
1167         ret = fc_block_scsi_eh(cmd);
1168         if (ret != 0)
1169                 return ret;
1170         ret = SUCCESS;
1171
1172         id = cmd->device->id;
1173         lun = cmd->device->lun;
1174
1175         spin_lock_irqsave(&ha->hardware_lock, flags);
1176         sp = (srb_t *) CMD_SP(cmd);
1177         if (!sp) {
1178                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1179                 return SUCCESS;
1180         }
1181
1182         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1183             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1184             vha->host_no, id, lun, sp, cmd, sp->handle);
1185
1186         /* Get a reference to the sp and drop the lock.*/
1187         sp_get(sp);
1188
1189         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1190         rval = ha->isp_ops->abort_command(sp);
1191         if (rval) {
1192                 if (rval == QLA_FUNCTION_PARAMETER_ERROR)
1193                         ret = SUCCESS;
1194                 else
1195                         ret = FAILED;
1196
1197                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
1198                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
1199         } else {
1200                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
1201                     "Abort command mbx success cmd=%p.\n", cmd);
1202                 wait = 1;
1203         }
1204
1205         spin_lock_irqsave(&ha->hardware_lock, flags);
1206         sp->done(ha, sp, 0);
1207         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1208
1209         /* Did the command return during mailbox execution? */
1210         if (ret == FAILED && !CMD_SP(cmd))
1211                 ret = SUCCESS;
1212
1213         /* Wait for the command to be returned. */
1214         if (wait) {
1215                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
1216                         ql_log(ql_log_warn, vha, 0x8006,
1217                             "Abort handler timed out cmd=%p.\n", cmd);
1218                         ret = FAILED;
1219                 }
1220         }
1221
1222         ql_log(ql_log_info, vha, 0x801c,
1223             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1224             vha->host_no, id, lun, wait, ret);
1225
1226         return ret;
1227 }
1228
1229 int
1230 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1231         uint64_t l, enum nexus_wait_type type)
1232 {
1233         int cnt, match, status;
1234         unsigned long flags;
1235         struct qla_hw_data *ha = vha->hw;
1236         struct req_que *req;
1237         srb_t *sp;
1238         struct scsi_cmnd *cmd;
1239
1240         status = QLA_SUCCESS;
1241
1242         spin_lock_irqsave(&ha->hardware_lock, flags);
1243         req = vha->req;
1244         for (cnt = 1; status == QLA_SUCCESS &&
1245                 cnt < req->num_outstanding_cmds; cnt++) {
1246                 sp = req->outstanding_cmds[cnt];
1247                 if (!sp)
1248                         continue;
1249                 if (sp->type != SRB_SCSI_CMD)
1250                         continue;
1251                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1252                         continue;
1253                 match = 0;
1254                 cmd = GET_CMD_SP(sp);
1255                 switch (type) {
1256                 case WAIT_HOST:
1257                         match = 1;
1258                         break;
1259                 case WAIT_TARGET:
1260                         match = cmd->device->id == t;
1261                         break;
1262                 case WAIT_LUN:
1263                         match = (cmd->device->id == t &&
1264                                 cmd->device->lun == l);
1265                         break;
1266                 }
1267                 if (!match)
1268                         continue;
1269
1270                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1271                 status = qla2x00_eh_wait_on_command(cmd);
1272                 spin_lock_irqsave(&ha->hardware_lock, flags);
1273         }
1274         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1275
1276         return status;
1277 }
1278
1279 static char *reset_errors[] = {
1280         "HBA not online",
1281         "HBA not ready",
1282         "Task management failed",
1283         "Waiting for command completions",
1284 };
1285
1286 static int
1287 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1288     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1289 {
1290         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1291         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1292         int err;
1293
1294         if (!fcport) {
1295                 return FAILED;
1296         }
1297
1298         err = fc_block_scsi_eh(cmd);
1299         if (err != 0)
1300                 return err;
1301
1302         ql_log(ql_log_info, vha, 0x8009,
1303             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1304             cmd->device->id, cmd->device->lun, cmd);
1305
1306         err = 0;
1307         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1308                 ql_log(ql_log_warn, vha, 0x800a,
1309                     "Wait for hba online failed for cmd=%p.\n", cmd);
1310                 goto eh_reset_failed;
1311         }
1312         err = 2;
1313         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1314                 != QLA_SUCCESS) {
1315                 ql_log(ql_log_warn, vha, 0x800c,
1316                     "do_reset failed for cmd=%p.\n", cmd);
1317                 goto eh_reset_failed;
1318         }
1319         err = 3;
1320         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1321             cmd->device->lun, type) != QLA_SUCCESS) {
1322                 ql_log(ql_log_warn, vha, 0x800d,
1323                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1324                 goto eh_reset_failed;
1325         }
1326
1327         ql_log(ql_log_info, vha, 0x800e,
1328             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1329             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1330
1331         return SUCCESS;
1332
1333 eh_reset_failed:
1334         ql_log(ql_log_info, vha, 0x800f,
1335             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1336             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1337             cmd);
1338         return FAILED;
1339 }
1340
1341 static int
1342 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1343 {
1344         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1345         struct qla_hw_data *ha = vha->hw;
1346
1347         if (qla2x00_isp_reg_stat(ha)) {
1348                 ql_log(ql_log_info, vha, 0x803e,
1349                     "PCI/Register disconnect, exiting.\n");
1350                 return FAILED;
1351         }
1352
1353         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1354             ha->isp_ops->lun_reset);
1355 }
1356
1357 static int
1358 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1359 {
1360         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1361         struct qla_hw_data *ha = vha->hw;
1362
1363         if (qla2x00_isp_reg_stat(ha)) {
1364                 ql_log(ql_log_info, vha, 0x803f,
1365                     "PCI/Register disconnect, exiting.\n");
1366                 return FAILED;
1367         }
1368
1369         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1370             ha->isp_ops->target_reset);
1371 }
1372
1373 /**************************************************************************
1374 * qla2xxx_eh_bus_reset
1375 *
1376 * Description:
1377 *    The bus reset function will reset the bus and abort any executing
1378 *    commands.
1379 *
1380 * Input:
1381 *    cmd = Linux SCSI command packet of the command that cause the
1382 *          bus reset.
1383 *
1384 * Returns:
1385 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1386 *
1387 **************************************************************************/
1388 static int
1389 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1390 {
1391         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1392         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1393         int ret = FAILED;
1394         unsigned int id;
1395         uint64_t lun;
1396         struct qla_hw_data *ha = vha->hw;
1397
1398         if (qla2x00_isp_reg_stat(ha)) {
1399                 ql_log(ql_log_info, vha, 0x8040,
1400                     "PCI/Register disconnect, exiting.\n");
1401                 return FAILED;
1402         }
1403
1404         id = cmd->device->id;
1405         lun = cmd->device->lun;
1406
1407         if (!fcport) {
1408                 return ret;
1409         }
1410
1411         ret = fc_block_scsi_eh(cmd);
1412         if (ret != 0)
1413                 return ret;
1414         ret = FAILED;
1415
1416         ql_log(ql_log_info, vha, 0x8012,
1417             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1418
1419         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1420                 ql_log(ql_log_fatal, vha, 0x8013,
1421                     "Wait for hba online failed board disabled.\n");
1422                 goto eh_bus_reset_done;
1423         }
1424
1425         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1426                 ret = SUCCESS;
1427
1428         if (ret == FAILED)
1429                 goto eh_bus_reset_done;
1430
1431         /* Flush outstanding commands. */
1432         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1433             QLA_SUCCESS) {
1434                 ql_log(ql_log_warn, vha, 0x8014,
1435                     "Wait for pending commands failed.\n");
1436                 ret = FAILED;
1437         }
1438
1439 eh_bus_reset_done:
1440         ql_log(ql_log_warn, vha, 0x802b,
1441             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1442             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1443
1444         return ret;
1445 }
1446
1447 /**************************************************************************
1448 * qla2xxx_eh_host_reset
1449 *
1450 * Description:
1451 *    The reset function will reset the Adapter.
1452 *
1453 * Input:
1454 *      cmd = Linux SCSI command packet of the command that cause the
1455 *            adapter reset.
1456 *
1457 * Returns:
1458 *      Either SUCCESS or FAILED.
1459 *
1460 * Note:
1461 **************************************************************************/
1462 static int
1463 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1464 {
1465         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1466         struct qla_hw_data *ha = vha->hw;
1467         int ret = FAILED;
1468         unsigned int id;
1469         uint64_t lun;
1470         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1471
1472         if (qla2x00_isp_reg_stat(ha)) {
1473                 ql_log(ql_log_info, vha, 0x8041,
1474                     "PCI/Register disconnect, exiting.\n");
1475                 schedule_work(&ha->board_disable);
1476                 return SUCCESS;
1477         }
1478
1479         id = cmd->device->id;
1480         lun = cmd->device->lun;
1481
1482         ql_log(ql_log_info, vha, 0x8018,
1483             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1484
1485         /*
1486          * No point in issuing another reset if one is active.  Also do not
1487          * attempt a reset if we are updating flash.
1488          */
1489         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1490                 goto eh_host_reset_lock;
1491
1492         if (vha != base_vha) {
1493                 if (qla2x00_vp_abort_isp(vha))
1494                         goto eh_host_reset_lock;
1495         } else {
1496                 if (IS_P3P_TYPE(vha->hw)) {
1497                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1498                                 /* Ctx reset success */
1499                                 ret = SUCCESS;
1500                                 goto eh_host_reset_lock;
1501                         }
1502                         /* fall thru if ctx reset failed */
1503                 }
1504                 if (ha->wq)
1505                         flush_workqueue(ha->wq);
1506
1507                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1508                 if (ha->isp_ops->abort_isp(base_vha)) {
1509                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1510                         /* failed. schedule dpc to try */
1511                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1512
1513                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1514                                 ql_log(ql_log_warn, vha, 0x802a,
1515                                     "wait for hba online failed.\n");
1516                                 goto eh_host_reset_lock;
1517                         }
1518                 }
1519                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1520         }
1521
1522         /* Waiting for command to be returned to OS.*/
1523         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1524                 QLA_SUCCESS)
1525                 ret = SUCCESS;
1526
1527 eh_host_reset_lock:
1528         ql_log(ql_log_info, vha, 0x8017,
1529             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1530             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1531
1532         return ret;
1533 }
1534
1535 /*
1536 * qla2x00_loop_reset
1537 *      Issue loop reset.
1538 *
1539 * Input:
1540 *      ha = adapter block pointer.
1541 *
1542 * Returns:
1543 *      0 = success
1544 */
1545 int
1546 qla2x00_loop_reset(scsi_qla_host_t *vha)
1547 {
1548         int ret;
1549         struct fc_port *fcport;
1550         struct qla_hw_data *ha = vha->hw;
1551
1552         if (IS_QLAFX00(ha)) {
1553                 return qlafx00_loop_reset(vha);
1554         }
1555
1556         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1557                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1558                         if (fcport->port_type != FCT_TARGET)
1559                                 continue;
1560
1561                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1562                         if (ret != QLA_SUCCESS) {
1563                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1564                                     "Bus Reset failed: Reset=%d "
1565                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1566                         }
1567                 }
1568         }
1569
1570
1571         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1572                 atomic_set(&vha->loop_state, LOOP_DOWN);
1573                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1574                 qla2x00_mark_all_devices_lost(vha, 0);
1575                 ret = qla2x00_full_login_lip(vha);
1576                 if (ret != QLA_SUCCESS) {
1577                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1578                             "full_login_lip=%d.\n", ret);
1579                 }
1580         }
1581
1582         if (ha->flags.enable_lip_reset) {
1583                 ret = qla2x00_lip_reset(vha);
1584                 if (ret != QLA_SUCCESS)
1585                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1586                             "lip_reset failed (%d).\n", ret);
1587         }
1588
1589         /* Issue marker command only when we are going to start the I/O */
1590         vha->marker_needed = 1;
1591
1592         return QLA_SUCCESS;
1593 }
1594
1595 void
1596 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1597 {
1598         int que, cnt;
1599         unsigned long flags;
1600         srb_t *sp;
1601         struct qla_hw_data *ha = vha->hw;
1602         struct req_que *req;
1603
1604         qlt_host_reset_handler(ha);
1605
1606         spin_lock_irqsave(&ha->hardware_lock, flags);
1607         for (que = 0; que < ha->max_req_queues; que++) {
1608                 req = ha->req_q_map[que];
1609                 if (!req)
1610                         continue;
1611                 if (!req->outstanding_cmds)
1612                         continue;
1613                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1614                         sp = req->outstanding_cmds[cnt];
1615                         if (sp) {
1616                                 /* Don't abort commands in adapter during EEH
1617                                  * recovery as it's not accessible/responding.
1618                                  */
1619                                 if (GET_CMD_SP(sp) && !ha->flags.eeh_busy) {
1620                                         /* Get a reference to the sp and drop the lock.
1621                                          * The reference ensures this sp->done() call
1622                                          * - and not the call in qla2xxx_eh_abort() -
1623                                          * ends the SCSI command (with result 'res').
1624                                          */
1625                                         sp_get(sp);
1626                                         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1627                                         qla2xxx_eh_abort(GET_CMD_SP(sp));
1628                                         spin_lock_irqsave(&ha->hardware_lock, flags);
1629                                 }
1630                                 req->outstanding_cmds[cnt] = NULL;
1631                                 sp->done(vha, sp, res);
1632                         }
1633                 }
1634         }
1635         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1636 }
1637
1638 static int
1639 qla2xxx_slave_alloc(struct scsi_device *sdev)
1640 {
1641         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1642
1643         if (!rport || fc_remote_port_chkready(rport))
1644                 return -ENXIO;
1645
1646         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1647
1648         return 0;
1649 }
1650
1651 static int
1652 qla2xxx_slave_configure(struct scsi_device *sdev)
1653 {
1654         scsi_qla_host_t *vha = shost_priv(sdev->host);
1655         struct req_que *req = vha->req;
1656
1657         if (IS_T10_PI_CAPABLE(vha->hw))
1658                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1659
1660         scsi_change_queue_depth(sdev, req->max_q_depth);
1661         return 0;
1662 }
1663
1664 static void
1665 qla2xxx_slave_destroy(struct scsi_device *sdev)
1666 {
1667         sdev->hostdata = NULL;
1668 }
1669
1670 /**
1671  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1672  * @ha: HA context
1673  *
1674  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1675  * supported addressing method.
1676  */
1677 static void
1678 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1679 {
1680         /* Assume a 32bit DMA mask. */
1681         ha->flags.enable_64bit_addressing = 0;
1682
1683         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1684                 /* Any upper-dword bits set? */
1685                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1686                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1687                         /* Ok, a 64bit DMA mask is applicable. */
1688                         ha->flags.enable_64bit_addressing = 1;
1689                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1690                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1691                         return;
1692                 }
1693         }
1694
1695         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1696         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1697 }
1698
1699 static void
1700 qla2x00_enable_intrs(struct qla_hw_data *ha)
1701 {
1702         unsigned long flags = 0;
1703         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1704
1705         spin_lock_irqsave(&ha->hardware_lock, flags);
1706         ha->interrupts_on = 1;
1707         /* enable risc and host interrupts */
1708         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1709         RD_REG_WORD(&reg->ictrl);
1710         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1711
1712 }
1713
1714 static void
1715 qla2x00_disable_intrs(struct qla_hw_data *ha)
1716 {
1717         unsigned long flags = 0;
1718         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1719
1720         spin_lock_irqsave(&ha->hardware_lock, flags);
1721         ha->interrupts_on = 0;
1722         /* disable risc and host interrupts */
1723         WRT_REG_WORD(&reg->ictrl, 0);
1724         RD_REG_WORD(&reg->ictrl);
1725         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1726 }
1727
1728 static void
1729 qla24xx_enable_intrs(struct qla_hw_data *ha)
1730 {
1731         unsigned long flags = 0;
1732         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1733
1734         spin_lock_irqsave(&ha->hardware_lock, flags);
1735         ha->interrupts_on = 1;
1736         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1737         RD_REG_DWORD(&reg->ictrl);
1738         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1739 }
1740
1741 static void
1742 qla24xx_disable_intrs(struct qla_hw_data *ha)
1743 {
1744         unsigned long flags = 0;
1745         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1746
1747         if (IS_NOPOLLING_TYPE(ha))
1748                 return;
1749         spin_lock_irqsave(&ha->hardware_lock, flags);
1750         ha->interrupts_on = 0;
1751         WRT_REG_DWORD(&reg->ictrl, 0);
1752         RD_REG_DWORD(&reg->ictrl);
1753         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1754 }
1755
1756 static int
1757 qla2x00_iospace_config(struct qla_hw_data *ha)
1758 {
1759         resource_size_t pio;
1760         uint16_t msix;
1761
1762         if (pci_request_selected_regions(ha->pdev, ha->bars,
1763             QLA2XXX_DRIVER_NAME)) {
1764                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1765                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1766                     pci_name(ha->pdev));
1767                 goto iospace_error_exit;
1768         }
1769         if (!(ha->bars & 1))
1770                 goto skip_pio;
1771
1772         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1773         pio = pci_resource_start(ha->pdev, 0);
1774         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1775                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1776                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1777                             "Invalid pci I/O region size (%s).\n",
1778                             pci_name(ha->pdev));
1779                         pio = 0;
1780                 }
1781         } else {
1782                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1783                     "Region #0 no a PIO resource (%s).\n",
1784                     pci_name(ha->pdev));
1785                 pio = 0;
1786         }
1787         ha->pio_address = pio;
1788         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1789             "PIO address=%llu.\n",
1790             (unsigned long long)ha->pio_address);
1791
1792 skip_pio:
1793         /* Use MMIO operations for all accesses. */
1794         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1795                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1796                     "Region #1 not an MMIO resource (%s), aborting.\n",
1797                     pci_name(ha->pdev));
1798                 goto iospace_error_exit;
1799         }
1800         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1801                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1802                     "Invalid PCI mem region size (%s), aborting.\n",
1803                     pci_name(ha->pdev));
1804                 goto iospace_error_exit;
1805         }
1806
1807         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1808         if (!ha->iobase) {
1809                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1810                     "Cannot remap MMIO (%s), aborting.\n",
1811                     pci_name(ha->pdev));
1812                 goto iospace_error_exit;
1813         }
1814
1815         /* Determine queue resources */
1816         ha->max_req_queues = ha->max_rsp_queues = 1;
1817         if (!ql2xmqsupport || (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1818                 goto mqiobase_exit;
1819
1820         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1821                         pci_resource_len(ha->pdev, 3));
1822         if (ha->mqiobase) {
1823                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1824                     "MQIO Base=%p.\n", ha->mqiobase);
1825                 /* Read MSIX vector size of the board */
1826                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1827                 ha->msix_count = msix + 1;
1828                 /* Max queues are bounded by available msix vectors */
1829                 /* MB interrupt uses 1 vector */
1830                 ha->max_req_queues = ha->msix_count - 1;
1831                 ha->max_rsp_queues = ha->max_req_queues;
1832                 /* Queue pairs is the max value minus the base queue pair */
1833                 ha->max_qpairs = ha->max_rsp_queues - 1;
1834                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
1835                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
1836
1837                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1838                     "MSI-X vector count: %d.\n", ha->msix_count);
1839         } else
1840                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1841                     "BAR 3 not enabled.\n");
1842
1843 mqiobase_exit:
1844         ha->msix_count = ha->max_rsp_queues + 1;
1845         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1846             "MSIX Count:%d.\n", ha->msix_count);
1847         return (0);
1848
1849 iospace_error_exit:
1850         return (-ENOMEM);
1851 }
1852
1853
1854 static int
1855 qla83xx_iospace_config(struct qla_hw_data *ha)
1856 {
1857         uint16_t msix;
1858
1859         if (pci_request_selected_regions(ha->pdev, ha->bars,
1860             QLA2XXX_DRIVER_NAME)) {
1861                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1862                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1863                     pci_name(ha->pdev));
1864
1865                 goto iospace_error_exit;
1866         }
1867
1868         /* Use MMIO operations for all accesses. */
1869         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1870                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1871                     "Invalid pci I/O region size (%s).\n",
1872                     pci_name(ha->pdev));
1873                 goto iospace_error_exit;
1874         }
1875         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1876                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1877                     "Invalid PCI mem region size (%s), aborting\n",
1878                         pci_name(ha->pdev));
1879                 goto iospace_error_exit;
1880         }
1881
1882         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1883         if (!ha->iobase) {
1884                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1885                     "Cannot remap MMIO (%s), aborting.\n",
1886                     pci_name(ha->pdev));
1887                 goto iospace_error_exit;
1888         }
1889
1890         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1891         /* 83XX 26XX always use MQ type access for queues
1892          * - mbar 2, a.k.a region 4 */
1893         ha->max_req_queues = ha->max_rsp_queues = 1;
1894         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1895                         pci_resource_len(ha->pdev, 4));
1896
1897         if (!ha->mqiobase) {
1898                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1899                     "BAR2/region4 not enabled\n");
1900                 goto mqiobase_exit;
1901         }
1902
1903         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1904                         pci_resource_len(ha->pdev, 2));
1905         if (ha->msixbase) {
1906                 /* Read MSIX vector size of the board */
1907                 pci_read_config_word(ha->pdev,
1908                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1909                 ha->msix_count = msix + 1;
1910                 /*
1911                  * By default, driver uses at least two msix vectors
1912                  * (default & rspq)
1913                  */
1914                 if (ql2xmqsupport) {
1915                         /* MB interrupt uses 1 vector */
1916                         ha->max_req_queues = ha->msix_count - 1;
1917                         ha->max_rsp_queues = ha->max_req_queues;
1918
1919                         /* ATIOQ needs 1 vector. That's 1 less QPair */
1920                         if (QLA_TGT_MODE_ENABLED())
1921                                 ha->max_req_queues--;
1922
1923                         /* Queue pairs is the max value minus
1924                          * the base queue pair */
1925                         ha->max_qpairs = ha->max_req_queues - 1;
1926                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
1927                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
1928                 }
1929                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1930                     "MSI-X vector count: %d.\n", ha->msix_count);
1931         } else
1932                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1933                     "BAR 1 not enabled.\n");
1934
1935 mqiobase_exit:
1936         ha->msix_count = ha->max_rsp_queues + 1;
1937         if (QLA_TGT_MODE_ENABLED())
1938                 ha->msix_count++;
1939
1940         qlt_83xx_iospace_config(ha);
1941
1942         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1943             "MSIX Count:%d.\n", ha->msix_count);
1944         return 0;
1945
1946 iospace_error_exit:
1947         return -ENOMEM;
1948 }
1949
1950 static struct isp_operations qla2100_isp_ops = {
1951         .pci_config             = qla2100_pci_config,
1952         .reset_chip             = qla2x00_reset_chip,
1953         .chip_diag              = qla2x00_chip_diag,
1954         .config_rings           = qla2x00_config_rings,
1955         .reset_adapter          = qla2x00_reset_adapter,
1956         .nvram_config           = qla2x00_nvram_config,
1957         .update_fw_options      = qla2x00_update_fw_options,
1958         .load_risc              = qla2x00_load_risc,
1959         .pci_info_str           = qla2x00_pci_info_str,
1960         .fw_version_str         = qla2x00_fw_version_str,
1961         .intr_handler           = qla2100_intr_handler,
1962         .enable_intrs           = qla2x00_enable_intrs,
1963         .disable_intrs          = qla2x00_disable_intrs,
1964         .abort_command          = qla2x00_abort_command,
1965         .target_reset           = qla2x00_abort_target,
1966         .lun_reset              = qla2x00_lun_reset,
1967         .fabric_login           = qla2x00_login_fabric,
1968         .fabric_logout          = qla2x00_fabric_logout,
1969         .calc_req_entries       = qla2x00_calc_iocbs_32,
1970         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1971         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1972         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1973         .read_nvram             = qla2x00_read_nvram_data,
1974         .write_nvram            = qla2x00_write_nvram_data,
1975         .fw_dump                = qla2100_fw_dump,
1976         .beacon_on              = NULL,
1977         .beacon_off             = NULL,
1978         .beacon_blink           = NULL,
1979         .read_optrom            = qla2x00_read_optrom_data,
1980         .write_optrom           = qla2x00_write_optrom_data,
1981         .get_flash_version      = qla2x00_get_flash_version,
1982         .start_scsi             = qla2x00_start_scsi,
1983         .start_scsi_mq          = NULL,
1984         .abort_isp              = qla2x00_abort_isp,
1985         .iospace_config         = qla2x00_iospace_config,
1986         .initialize_adapter     = qla2x00_initialize_adapter,
1987 };
1988
1989 static struct isp_operations qla2300_isp_ops = {
1990         .pci_config             = qla2300_pci_config,
1991         .reset_chip             = qla2x00_reset_chip,
1992         .chip_diag              = qla2x00_chip_diag,
1993         .config_rings           = qla2x00_config_rings,
1994         .reset_adapter          = qla2x00_reset_adapter,
1995         .nvram_config           = qla2x00_nvram_config,
1996         .update_fw_options      = qla2x00_update_fw_options,
1997         .load_risc              = qla2x00_load_risc,
1998         .pci_info_str           = qla2x00_pci_info_str,
1999         .fw_version_str         = qla2x00_fw_version_str,
2000         .intr_handler           = qla2300_intr_handler,
2001         .enable_intrs           = qla2x00_enable_intrs,
2002         .disable_intrs          = qla2x00_disable_intrs,
2003         .abort_command          = qla2x00_abort_command,
2004         .target_reset           = qla2x00_abort_target,
2005         .lun_reset              = qla2x00_lun_reset,
2006         .fabric_login           = qla2x00_login_fabric,
2007         .fabric_logout          = qla2x00_fabric_logout,
2008         .calc_req_entries       = qla2x00_calc_iocbs_32,
2009         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2010         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2011         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2012         .read_nvram             = qla2x00_read_nvram_data,
2013         .write_nvram            = qla2x00_write_nvram_data,
2014         .fw_dump                = qla2300_fw_dump,
2015         .beacon_on              = qla2x00_beacon_on,
2016         .beacon_off             = qla2x00_beacon_off,
2017         .beacon_blink           = qla2x00_beacon_blink,
2018         .read_optrom            = qla2x00_read_optrom_data,
2019         .write_optrom           = qla2x00_write_optrom_data,
2020         .get_flash_version      = qla2x00_get_flash_version,
2021         .start_scsi             = qla2x00_start_scsi,
2022         .start_scsi_mq          = NULL,
2023         .abort_isp              = qla2x00_abort_isp,
2024         .iospace_config         = qla2x00_iospace_config,
2025         .initialize_adapter     = qla2x00_initialize_adapter,
2026 };
2027
2028 static struct isp_operations qla24xx_isp_ops = {
2029         .pci_config             = qla24xx_pci_config,
2030         .reset_chip             = qla24xx_reset_chip,
2031         .chip_diag              = qla24xx_chip_diag,
2032         .config_rings           = qla24xx_config_rings,
2033         .reset_adapter          = qla24xx_reset_adapter,
2034         .nvram_config           = qla24xx_nvram_config,
2035         .update_fw_options      = qla24xx_update_fw_options,
2036         .load_risc              = qla24xx_load_risc,
2037         .pci_info_str           = qla24xx_pci_info_str,
2038         .fw_version_str         = qla24xx_fw_version_str,
2039         .intr_handler           = qla24xx_intr_handler,
2040         .enable_intrs           = qla24xx_enable_intrs,
2041         .disable_intrs          = qla24xx_disable_intrs,
2042         .abort_command          = qla24xx_abort_command,
2043         .target_reset           = qla24xx_abort_target,
2044         .lun_reset              = qla24xx_lun_reset,
2045         .fabric_login           = qla24xx_login_fabric,
2046         .fabric_logout          = qla24xx_fabric_logout,
2047         .calc_req_entries       = NULL,
2048         .build_iocbs            = NULL,
2049         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2050         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2051         .read_nvram             = qla24xx_read_nvram_data,
2052         .write_nvram            = qla24xx_write_nvram_data,
2053         .fw_dump                = qla24xx_fw_dump,
2054         .beacon_on              = qla24xx_beacon_on,
2055         .beacon_off             = qla24xx_beacon_off,
2056         .beacon_blink           = qla24xx_beacon_blink,
2057         .read_optrom            = qla24xx_read_optrom_data,
2058         .write_optrom           = qla24xx_write_optrom_data,
2059         .get_flash_version      = qla24xx_get_flash_version,
2060         .start_scsi             = qla24xx_start_scsi,
2061         .start_scsi_mq          = NULL,
2062         .abort_isp              = qla2x00_abort_isp,
2063         .iospace_config         = qla2x00_iospace_config,
2064         .initialize_adapter     = qla2x00_initialize_adapter,
2065 };
2066
2067 static struct isp_operations qla25xx_isp_ops = {
2068         .pci_config             = qla25xx_pci_config,
2069         .reset_chip             = qla24xx_reset_chip,
2070         .chip_diag              = qla24xx_chip_diag,
2071         .config_rings           = qla24xx_config_rings,
2072         .reset_adapter          = qla24xx_reset_adapter,
2073         .nvram_config           = qla24xx_nvram_config,
2074         .update_fw_options      = qla24xx_update_fw_options,
2075         .load_risc              = qla24xx_load_risc,
2076         .pci_info_str           = qla24xx_pci_info_str,
2077         .fw_version_str         = qla24xx_fw_version_str,
2078         .intr_handler           = qla24xx_intr_handler,
2079         .enable_intrs           = qla24xx_enable_intrs,
2080         .disable_intrs          = qla24xx_disable_intrs,
2081         .abort_command          = qla24xx_abort_command,
2082         .target_reset           = qla24xx_abort_target,
2083         .lun_reset              = qla24xx_lun_reset,
2084         .fabric_login           = qla24xx_login_fabric,
2085         .fabric_logout          = qla24xx_fabric_logout,
2086         .calc_req_entries       = NULL,
2087         .build_iocbs            = NULL,
2088         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2089         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2090         .read_nvram             = qla25xx_read_nvram_data,
2091         .write_nvram            = qla25xx_write_nvram_data,
2092         .fw_dump                = qla25xx_fw_dump,
2093         .beacon_on              = qla24xx_beacon_on,
2094         .beacon_off             = qla24xx_beacon_off,
2095         .beacon_blink           = qla24xx_beacon_blink,
2096         .read_optrom            = qla25xx_read_optrom_data,
2097         .write_optrom           = qla24xx_write_optrom_data,
2098         .get_flash_version      = qla24xx_get_flash_version,
2099         .start_scsi             = qla24xx_dif_start_scsi,
2100         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2101         .abort_isp              = qla2x00_abort_isp,
2102         .iospace_config         = qla2x00_iospace_config,
2103         .initialize_adapter     = qla2x00_initialize_adapter,
2104 };
2105
2106 static struct isp_operations qla81xx_isp_ops = {
2107         .pci_config             = qla25xx_pci_config,
2108         .reset_chip             = qla24xx_reset_chip,
2109         .chip_diag              = qla24xx_chip_diag,
2110         .config_rings           = qla24xx_config_rings,
2111         .reset_adapter          = qla24xx_reset_adapter,
2112         .nvram_config           = qla81xx_nvram_config,
2113         .update_fw_options      = qla81xx_update_fw_options,
2114         .load_risc              = qla81xx_load_risc,
2115         .pci_info_str           = qla24xx_pci_info_str,
2116         .fw_version_str         = qla24xx_fw_version_str,
2117         .intr_handler           = qla24xx_intr_handler,
2118         .enable_intrs           = qla24xx_enable_intrs,
2119         .disable_intrs          = qla24xx_disable_intrs,
2120         .abort_command          = qla24xx_abort_command,
2121         .target_reset           = qla24xx_abort_target,
2122         .lun_reset              = qla24xx_lun_reset,
2123         .fabric_login           = qla24xx_login_fabric,
2124         .fabric_logout          = qla24xx_fabric_logout,
2125         .calc_req_entries       = NULL,
2126         .build_iocbs            = NULL,
2127         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2128         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2129         .read_nvram             = NULL,
2130         .write_nvram            = NULL,
2131         .fw_dump                = qla81xx_fw_dump,
2132         .beacon_on              = qla24xx_beacon_on,
2133         .beacon_off             = qla24xx_beacon_off,
2134         .beacon_blink           = qla83xx_beacon_blink,
2135         .read_optrom            = qla25xx_read_optrom_data,
2136         .write_optrom           = qla24xx_write_optrom_data,
2137         .get_flash_version      = qla24xx_get_flash_version,
2138         .start_scsi             = qla24xx_dif_start_scsi,
2139         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2140         .abort_isp              = qla2x00_abort_isp,
2141         .iospace_config         = qla2x00_iospace_config,
2142         .initialize_adapter     = qla2x00_initialize_adapter,
2143 };
2144
2145 static struct isp_operations qla82xx_isp_ops = {
2146         .pci_config             = qla82xx_pci_config,
2147         .reset_chip             = qla82xx_reset_chip,
2148         .chip_diag              = qla24xx_chip_diag,
2149         .config_rings           = qla82xx_config_rings,
2150         .reset_adapter          = qla24xx_reset_adapter,
2151         .nvram_config           = qla81xx_nvram_config,
2152         .update_fw_options      = qla24xx_update_fw_options,
2153         .load_risc              = qla82xx_load_risc,
2154         .pci_info_str           = qla24xx_pci_info_str,
2155         .fw_version_str         = qla24xx_fw_version_str,
2156         .intr_handler           = qla82xx_intr_handler,
2157         .enable_intrs           = qla82xx_enable_intrs,
2158         .disable_intrs          = qla82xx_disable_intrs,
2159         .abort_command          = qla24xx_abort_command,
2160         .target_reset           = qla24xx_abort_target,
2161         .lun_reset              = qla24xx_lun_reset,
2162         .fabric_login           = qla24xx_login_fabric,
2163         .fabric_logout          = qla24xx_fabric_logout,
2164         .calc_req_entries       = NULL,
2165         .build_iocbs            = NULL,
2166         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2167         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2168         .read_nvram             = qla24xx_read_nvram_data,
2169         .write_nvram            = qla24xx_write_nvram_data,
2170         .fw_dump                = qla82xx_fw_dump,
2171         .beacon_on              = qla82xx_beacon_on,
2172         .beacon_off             = qla82xx_beacon_off,
2173         .beacon_blink           = NULL,
2174         .read_optrom            = qla82xx_read_optrom_data,
2175         .write_optrom           = qla82xx_write_optrom_data,
2176         .get_flash_version      = qla82xx_get_flash_version,
2177         .start_scsi             = qla82xx_start_scsi,
2178         .start_scsi_mq          = NULL,
2179         .abort_isp              = qla82xx_abort_isp,
2180         .iospace_config         = qla82xx_iospace_config,
2181         .initialize_adapter     = qla2x00_initialize_adapter,
2182 };
2183
2184 static struct isp_operations qla8044_isp_ops = {
2185         .pci_config             = qla82xx_pci_config,
2186         .reset_chip             = qla82xx_reset_chip,
2187         .chip_diag              = qla24xx_chip_diag,
2188         .config_rings           = qla82xx_config_rings,
2189         .reset_adapter          = qla24xx_reset_adapter,
2190         .nvram_config           = qla81xx_nvram_config,
2191         .update_fw_options      = qla24xx_update_fw_options,
2192         .load_risc              = qla82xx_load_risc,
2193         .pci_info_str           = qla24xx_pci_info_str,
2194         .fw_version_str         = qla24xx_fw_version_str,
2195         .intr_handler           = qla8044_intr_handler,
2196         .enable_intrs           = qla82xx_enable_intrs,
2197         .disable_intrs          = qla82xx_disable_intrs,
2198         .abort_command          = qla24xx_abort_command,
2199         .target_reset           = qla24xx_abort_target,
2200         .lun_reset              = qla24xx_lun_reset,
2201         .fabric_login           = qla24xx_login_fabric,
2202         .fabric_logout          = qla24xx_fabric_logout,
2203         .calc_req_entries       = NULL,
2204         .build_iocbs            = NULL,
2205         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2206         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2207         .read_nvram             = NULL,
2208         .write_nvram            = NULL,
2209         .fw_dump                = qla8044_fw_dump,
2210         .beacon_on              = qla82xx_beacon_on,
2211         .beacon_off             = qla82xx_beacon_off,
2212         .beacon_blink           = NULL,
2213         .read_optrom            = qla8044_read_optrom_data,
2214         .write_optrom           = qla8044_write_optrom_data,
2215         .get_flash_version      = qla82xx_get_flash_version,
2216         .start_scsi             = qla82xx_start_scsi,
2217         .start_scsi_mq          = NULL,
2218         .abort_isp              = qla8044_abort_isp,
2219         .iospace_config         = qla82xx_iospace_config,
2220         .initialize_adapter     = qla2x00_initialize_adapter,
2221 };
2222
2223 static struct isp_operations qla83xx_isp_ops = {
2224         .pci_config             = qla25xx_pci_config,
2225         .reset_chip             = qla24xx_reset_chip,
2226         .chip_diag              = qla24xx_chip_diag,
2227         .config_rings           = qla24xx_config_rings,
2228         .reset_adapter          = qla24xx_reset_adapter,
2229         .nvram_config           = qla81xx_nvram_config,
2230         .update_fw_options      = qla81xx_update_fw_options,
2231         .load_risc              = qla81xx_load_risc,
2232         .pci_info_str           = qla24xx_pci_info_str,
2233         .fw_version_str         = qla24xx_fw_version_str,
2234         .intr_handler           = qla24xx_intr_handler,
2235         .enable_intrs           = qla24xx_enable_intrs,
2236         .disable_intrs          = qla24xx_disable_intrs,
2237         .abort_command          = qla24xx_abort_command,
2238         .target_reset           = qla24xx_abort_target,
2239         .lun_reset              = qla24xx_lun_reset,
2240         .fabric_login           = qla24xx_login_fabric,
2241         .fabric_logout          = qla24xx_fabric_logout,
2242         .calc_req_entries       = NULL,
2243         .build_iocbs            = NULL,
2244         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2245         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2246         .read_nvram             = NULL,
2247         .write_nvram            = NULL,
2248         .fw_dump                = qla83xx_fw_dump,
2249         .beacon_on              = qla24xx_beacon_on,
2250         .beacon_off             = qla24xx_beacon_off,
2251         .beacon_blink           = qla83xx_beacon_blink,
2252         .read_optrom            = qla25xx_read_optrom_data,
2253         .write_optrom           = qla24xx_write_optrom_data,
2254         .get_flash_version      = qla24xx_get_flash_version,
2255         .start_scsi             = qla24xx_dif_start_scsi,
2256         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2257         .abort_isp              = qla2x00_abort_isp,
2258         .iospace_config         = qla83xx_iospace_config,
2259         .initialize_adapter     = qla2x00_initialize_adapter,
2260 };
2261
2262 static struct isp_operations qlafx00_isp_ops = {
2263         .pci_config             = qlafx00_pci_config,
2264         .reset_chip             = qlafx00_soft_reset,
2265         .chip_diag              = qlafx00_chip_diag,
2266         .config_rings           = qlafx00_config_rings,
2267         .reset_adapter          = qlafx00_soft_reset,
2268         .nvram_config           = NULL,
2269         .update_fw_options      = NULL,
2270         .load_risc              = NULL,
2271         .pci_info_str           = qlafx00_pci_info_str,
2272         .fw_version_str         = qlafx00_fw_version_str,
2273         .intr_handler           = qlafx00_intr_handler,
2274         .enable_intrs           = qlafx00_enable_intrs,
2275         .disable_intrs          = qlafx00_disable_intrs,
2276         .abort_command          = qla24xx_async_abort_command,
2277         .target_reset           = qlafx00_abort_target,
2278         .lun_reset              = qlafx00_lun_reset,
2279         .fabric_login           = NULL,
2280         .fabric_logout          = NULL,
2281         .calc_req_entries       = NULL,
2282         .build_iocbs            = NULL,
2283         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2284         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2285         .read_nvram             = qla24xx_read_nvram_data,
2286         .write_nvram            = qla24xx_write_nvram_data,
2287         .fw_dump                = NULL,
2288         .beacon_on              = qla24xx_beacon_on,
2289         .beacon_off             = qla24xx_beacon_off,
2290         .beacon_blink           = NULL,
2291         .read_optrom            = qla24xx_read_optrom_data,
2292         .write_optrom           = qla24xx_write_optrom_data,
2293         .get_flash_version      = qla24xx_get_flash_version,
2294         .start_scsi             = qlafx00_start_scsi,
2295         .start_scsi_mq          = NULL,
2296         .abort_isp              = qlafx00_abort_isp,
2297         .iospace_config         = qlafx00_iospace_config,
2298         .initialize_adapter     = qlafx00_initialize_adapter,
2299 };
2300
2301 static struct isp_operations qla27xx_isp_ops = {
2302         .pci_config             = qla25xx_pci_config,
2303         .reset_chip             = qla24xx_reset_chip,
2304         .chip_diag              = qla24xx_chip_diag,
2305         .config_rings           = qla24xx_config_rings,
2306         .reset_adapter          = qla24xx_reset_adapter,
2307         .nvram_config           = qla81xx_nvram_config,
2308         .update_fw_options      = qla81xx_update_fw_options,
2309         .load_risc              = qla81xx_load_risc,
2310         .pci_info_str           = qla24xx_pci_info_str,
2311         .fw_version_str         = qla24xx_fw_version_str,
2312         .intr_handler           = qla24xx_intr_handler,
2313         .enable_intrs           = qla24xx_enable_intrs,
2314         .disable_intrs          = qla24xx_disable_intrs,
2315         .abort_command          = qla24xx_abort_command,
2316         .target_reset           = qla24xx_abort_target,
2317         .lun_reset              = qla24xx_lun_reset,
2318         .fabric_login           = qla24xx_login_fabric,
2319         .fabric_logout          = qla24xx_fabric_logout,
2320         .calc_req_entries       = NULL,
2321         .build_iocbs            = NULL,
2322         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2323         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2324         .read_nvram             = NULL,
2325         .write_nvram            = NULL,
2326         .fw_dump                = qla27xx_fwdump,
2327         .beacon_on              = qla24xx_beacon_on,
2328         .beacon_off             = qla24xx_beacon_off,
2329         .beacon_blink           = qla83xx_beacon_blink,
2330         .read_optrom            = qla25xx_read_optrom_data,
2331         .write_optrom           = qla24xx_write_optrom_data,
2332         .get_flash_version      = qla24xx_get_flash_version,
2333         .start_scsi             = qla24xx_dif_start_scsi,
2334         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2335         .abort_isp              = qla2x00_abort_isp,
2336         .iospace_config         = qla83xx_iospace_config,
2337         .initialize_adapter     = qla2x00_initialize_adapter,
2338 };
2339
2340 static inline void
2341 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2342 {
2343         ha->device_type = DT_EXTENDED_IDS;
2344         switch (ha->pdev->device) {
2345         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2346                 ha->isp_type |= DT_ISP2100;
2347                 ha->device_type &= ~DT_EXTENDED_IDS;
2348                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2349                 break;
2350         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2351                 ha->isp_type |= DT_ISP2200;
2352                 ha->device_type &= ~DT_EXTENDED_IDS;
2353                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2354                 break;
2355         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2356                 ha->isp_type |= DT_ISP2300;
2357                 ha->device_type |= DT_ZIO_SUPPORTED;
2358                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2359                 break;
2360         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2361                 ha->isp_type |= DT_ISP2312;
2362                 ha->device_type |= DT_ZIO_SUPPORTED;
2363                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2364                 break;
2365         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2366                 ha->isp_type |= DT_ISP2322;
2367                 ha->device_type |= DT_ZIO_SUPPORTED;
2368                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2369                     ha->pdev->subsystem_device == 0x0170)
2370                         ha->device_type |= DT_OEM_001;
2371                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2372                 break;
2373         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2374                 ha->isp_type |= DT_ISP6312;
2375                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2376                 break;
2377         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2378                 ha->isp_type |= DT_ISP6322;
2379                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2380                 break;
2381         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2382                 ha->isp_type |= DT_ISP2422;
2383                 ha->device_type |= DT_ZIO_SUPPORTED;
2384                 ha->device_type |= DT_FWI2;
2385                 ha->device_type |= DT_IIDMA;
2386                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2387                 break;
2388         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2389                 ha->isp_type |= DT_ISP2432;
2390                 ha->device_type |= DT_ZIO_SUPPORTED;
2391                 ha->device_type |= DT_FWI2;
2392                 ha->device_type |= DT_IIDMA;
2393                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2394                 break;
2395         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2396                 ha->isp_type |= DT_ISP8432;
2397                 ha->device_type |= DT_ZIO_SUPPORTED;
2398                 ha->device_type |= DT_FWI2;
2399                 ha->device_type |= DT_IIDMA;
2400                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2401                 break;
2402         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2403                 ha->isp_type |= DT_ISP5422;
2404                 ha->device_type |= DT_FWI2;
2405                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2406                 break;
2407         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2408                 ha->isp_type |= DT_ISP5432;
2409                 ha->device_type |= DT_FWI2;
2410                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2411                 break;
2412         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2413                 ha->isp_type |= DT_ISP2532;
2414                 ha->device_type |= DT_ZIO_SUPPORTED;
2415                 ha->device_type |= DT_FWI2;
2416                 ha->device_type |= DT_IIDMA;
2417                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2418                 break;
2419         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2420                 ha->isp_type |= DT_ISP8001;
2421                 ha->device_type |= DT_ZIO_SUPPORTED;
2422                 ha->device_type |= DT_FWI2;
2423                 ha->device_type |= DT_IIDMA;
2424                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2425                 break;
2426         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2427                 ha->isp_type |= DT_ISP8021;
2428                 ha->device_type |= DT_ZIO_SUPPORTED;
2429                 ha->device_type |= DT_FWI2;
2430                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2431                 /* Initialize 82XX ISP flags */
2432                 qla82xx_init_flags(ha);
2433                 break;
2434          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2435                 ha->isp_type |= DT_ISP8044;
2436                 ha->device_type |= DT_ZIO_SUPPORTED;
2437                 ha->device_type |= DT_FWI2;
2438                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2439                 /* Initialize 82XX ISP flags */
2440                 qla82xx_init_flags(ha);
2441                 break;
2442         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2443                 ha->isp_type |= DT_ISP2031;
2444                 ha->device_type |= DT_ZIO_SUPPORTED;
2445                 ha->device_type |= DT_FWI2;
2446                 ha->device_type |= DT_IIDMA;
2447                 ha->device_type |= DT_T10_PI;
2448                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2449                 break;
2450         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2451                 ha->isp_type |= DT_ISP8031;
2452                 ha->device_type |= DT_ZIO_SUPPORTED;
2453                 ha->device_type |= DT_FWI2;
2454                 ha->device_type |= DT_IIDMA;
2455                 ha->device_type |= DT_T10_PI;
2456                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2457                 break;
2458         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2459                 ha->isp_type |= DT_ISPFX00;
2460                 break;
2461         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2462                 ha->isp_type |= DT_ISP2071;
2463                 ha->device_type |= DT_ZIO_SUPPORTED;
2464                 ha->device_type |= DT_FWI2;
2465                 ha->device_type |= DT_IIDMA;
2466                 ha->device_type |= DT_T10_PI;
2467                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2468                 break;
2469         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2470                 ha->isp_type |= DT_ISP2271;
2471                 ha->device_type |= DT_ZIO_SUPPORTED;
2472                 ha->device_type |= DT_FWI2;
2473                 ha->device_type |= DT_IIDMA;
2474                 ha->device_type |= DT_T10_PI;
2475                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2476                 break;
2477         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2478                 ha->isp_type |= DT_ISP2261;
2479                 ha->device_type |= DT_ZIO_SUPPORTED;
2480                 ha->device_type |= DT_FWI2;
2481                 ha->device_type |= DT_IIDMA;
2482                 ha->device_type |= DT_T10_PI;
2483                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2484                 break;
2485         }
2486
2487         if (IS_QLA82XX(ha))
2488                 ha->port_no = ha->portnum & 1;
2489         else {
2490                 /* Get adapter physical port no from interrupt pin register. */
2491                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2492                 if (IS_QLA27XX(ha))
2493                         ha->port_no--;
2494                 else
2495                         ha->port_no = !(ha->port_no & 1);
2496         }
2497
2498         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2499             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2500             ha->device_type, ha->port_no, ha->fw_srisc_address);
2501 }
2502
2503 static void
2504 qla2xxx_scan_start(struct Scsi_Host *shost)
2505 {
2506         scsi_qla_host_t *vha = shost_priv(shost);
2507
2508         if (vha->hw->flags.running_gold_fw)
2509                 return;
2510
2511         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2512         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2513         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2514         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2515 }
2516
2517 static int
2518 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2519 {
2520         scsi_qla_host_t *vha = shost_priv(shost);
2521
2522         if (test_bit(UNLOADING, &vha->dpc_flags))
2523                 return 1;
2524         if (!vha->host)
2525                 return 1;
2526         if (time > vha->hw->loop_reset_delay * HZ)
2527                 return 1;
2528
2529         return atomic_read(&vha->loop_state) == LOOP_READY;
2530 }
2531
2532 /*
2533  * PCI driver interface
2534  */
2535 static int
2536 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2537 {
2538         int     ret = -ENODEV;
2539         struct Scsi_Host *host;
2540         scsi_qla_host_t *base_vha = NULL;
2541         struct qla_hw_data *ha;
2542         char pci_info[30];
2543         char fw_str[30], wq_name[30];
2544         struct scsi_host_template *sht;
2545         int bars, mem_only = 0;
2546         uint16_t req_length = 0, rsp_length = 0;
2547         struct req_que *req = NULL;
2548         struct rsp_que *rsp = NULL;
2549         int i;
2550
2551         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2552         sht = &qla2xxx_driver_template;
2553         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2554             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2555             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2556             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2557             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2558             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2559             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2560             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2561             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2562             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2563             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2564             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2565             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2566             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2567             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261) {
2568                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2569                 mem_only = 1;
2570                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2571                     "Mem only adapter.\n");
2572         }
2573         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2574             "Bars=%d.\n", bars);
2575
2576         if (mem_only) {
2577                 if (pci_enable_device_mem(pdev))
2578                         goto probe_out;
2579         } else {
2580                 if (pci_enable_device(pdev))
2581                         goto probe_out;
2582         }
2583
2584         /* This may fail but that's ok */
2585         pci_enable_pcie_error_reporting(pdev);
2586
2587         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2588         if (!ha) {
2589                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2590                     "Unable to allocate memory for ha.\n");
2591                 goto probe_out;
2592         }
2593         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2594             "Memory allocated for ha=%p.\n", ha);
2595         ha->pdev = pdev;
2596         ha->tgt.enable_class_2 = ql2xenableclass2;
2597         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2598         spin_lock_init(&ha->tgt.q_full_lock);
2599         spin_lock_init(&ha->tgt.sess_lock);
2600         spin_lock_init(&ha->tgt.atio_lock);
2601
2602
2603         /* Clear our data area */
2604         ha->bars = bars;
2605         ha->mem_only = mem_only;
2606         spin_lock_init(&ha->hardware_lock);
2607         spin_lock_init(&ha->vport_slock);
2608         mutex_init(&ha->selflogin_lock);
2609         mutex_init(&ha->optrom_mutex);
2610
2611         /* Set ISP-type information. */
2612         qla2x00_set_isp_flags(ha);
2613
2614         /* Set EEH reset type to fundamental if required by hba */
2615         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2616             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2617                 pdev->needs_freset = 1;
2618
2619         ha->prev_topology = 0;
2620         ha->init_cb_size = sizeof(init_cb_t);
2621         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2622         ha->optrom_size = OPTROM_SIZE_2300;
2623
2624         /* Assign ISP specific operations. */
2625         if (IS_QLA2100(ha)) {
2626                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2627                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2628                 req_length = REQUEST_ENTRY_CNT_2100;
2629                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2630                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2631                 ha->gid_list_info_size = 4;
2632                 ha->flash_conf_off = ~0;
2633                 ha->flash_data_off = ~0;
2634                 ha->nvram_conf_off = ~0;
2635                 ha->nvram_data_off = ~0;
2636                 ha->isp_ops = &qla2100_isp_ops;
2637         } else if (IS_QLA2200(ha)) {
2638                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2639                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2640                 req_length = REQUEST_ENTRY_CNT_2200;
2641                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2642                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2643                 ha->gid_list_info_size = 4;
2644                 ha->flash_conf_off = ~0;
2645                 ha->flash_data_off = ~0;
2646                 ha->nvram_conf_off = ~0;
2647                 ha->nvram_data_off = ~0;
2648                 ha->isp_ops = &qla2100_isp_ops;
2649         } else if (IS_QLA23XX(ha)) {
2650                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2651                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2652                 req_length = REQUEST_ENTRY_CNT_2200;
2653                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2654                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2655                 ha->gid_list_info_size = 6;
2656                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2657                         ha->optrom_size = OPTROM_SIZE_2322;
2658                 ha->flash_conf_off = ~0;
2659                 ha->flash_data_off = ~0;
2660                 ha->nvram_conf_off = ~0;
2661                 ha->nvram_data_off = ~0;
2662                 ha->isp_ops = &qla2300_isp_ops;
2663         } else if (IS_QLA24XX_TYPE(ha)) {
2664                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2665                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2666                 req_length = REQUEST_ENTRY_CNT_24XX;
2667                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2668                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2669                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2670                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2671                 ha->gid_list_info_size = 8;
2672                 ha->optrom_size = OPTROM_SIZE_24XX;
2673                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2674                 ha->isp_ops = &qla24xx_isp_ops;
2675                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2676                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2677                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2678                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2679         } else if (IS_QLA25XX(ha)) {
2680                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2681                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2682                 req_length = REQUEST_ENTRY_CNT_24XX;
2683                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2684                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2685                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2686                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2687                 ha->gid_list_info_size = 8;
2688                 ha->optrom_size = OPTROM_SIZE_25XX;
2689                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2690                 ha->isp_ops = &qla25xx_isp_ops;
2691                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2692                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2693                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2694                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2695         } else if (IS_QLA81XX(ha)) {
2696                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2697                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2698                 req_length = REQUEST_ENTRY_CNT_24XX;
2699                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2700                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2701                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2702                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2703                 ha->gid_list_info_size = 8;
2704                 ha->optrom_size = OPTROM_SIZE_81XX;
2705                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2706                 ha->isp_ops = &qla81xx_isp_ops;
2707                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2708                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2709                 ha->nvram_conf_off = ~0;
2710                 ha->nvram_data_off = ~0;
2711         } else if (IS_QLA82XX(ha)) {
2712                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2713                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2714                 req_length = REQUEST_ENTRY_CNT_82XX;
2715                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2716                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2717                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2718                 ha->gid_list_info_size = 8;
2719                 ha->optrom_size = OPTROM_SIZE_82XX;
2720                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2721                 ha->isp_ops = &qla82xx_isp_ops;
2722                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2723                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2724                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2725                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2726         } else if (IS_QLA8044(ha)) {
2727                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2728                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2729                 req_length = REQUEST_ENTRY_CNT_82XX;
2730                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2731                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2732                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2733                 ha->gid_list_info_size = 8;
2734                 ha->optrom_size = OPTROM_SIZE_83XX;
2735                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2736                 ha->isp_ops = &qla8044_isp_ops;
2737                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2738                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2739                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2740                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2741         } else if (IS_QLA83XX(ha)) {
2742                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2743                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2744                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2745                 req_length = REQUEST_ENTRY_CNT_83XX;
2746                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2747                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2748                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2749                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2750                 ha->gid_list_info_size = 8;
2751                 ha->optrom_size = OPTROM_SIZE_83XX;
2752                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2753                 ha->isp_ops = &qla83xx_isp_ops;
2754                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2755                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2756                 ha->nvram_conf_off = ~0;
2757                 ha->nvram_data_off = ~0;
2758         }  else if (IS_QLAFX00(ha)) {
2759                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2760                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2761                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2762                 req_length = REQUEST_ENTRY_CNT_FX00;
2763                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2764                 ha->isp_ops = &qlafx00_isp_ops;
2765                 ha->port_down_retry_count = 30; /* default value */
2766                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2767                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2768                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2769                 ha->mr.fw_hbt_en = 1;
2770                 ha->mr.host_info_resend = false;
2771                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2772         } else if (IS_QLA27XX(ha)) {
2773                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2774                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2775                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2776                 req_length = REQUEST_ENTRY_CNT_83XX;
2777                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
2778                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2779                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2780                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2781                 ha->gid_list_info_size = 8;
2782                 ha->optrom_size = OPTROM_SIZE_83XX;
2783                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2784                 ha->isp_ops = &qla27xx_isp_ops;
2785                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2786                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2787                 ha->nvram_conf_off = ~0;
2788                 ha->nvram_data_off = ~0;
2789         }
2790
2791         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2792             "mbx_count=%d, req_length=%d, "
2793             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2794             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2795             "max_fibre_devices=%d.\n",
2796             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2797             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2798             ha->nvram_npiv_size, ha->max_fibre_devices);
2799         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2800             "isp_ops=%p, flash_conf_off=%d, "
2801             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2802             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2803             ha->nvram_conf_off, ha->nvram_data_off);
2804
2805         /* Configure PCI I/O space */
2806         ret = ha->isp_ops->iospace_config(ha);
2807         if (ret)
2808                 goto iospace_config_failed;
2809
2810         ql_log_pci(ql_log_info, pdev, 0x001d,
2811             "Found an ISP%04X irq %d iobase 0x%p.\n",
2812             pdev->device, pdev->irq, ha->iobase);
2813         mutex_init(&ha->vport_lock);
2814         mutex_init(&ha->mq_lock);
2815         init_completion(&ha->mbx_cmd_comp);
2816         complete(&ha->mbx_cmd_comp);
2817         init_completion(&ha->mbx_intr_comp);
2818         init_completion(&ha->dcbx_comp);
2819         init_completion(&ha->lb_portup_comp);
2820
2821         set_bit(0, (unsigned long *) ha->vp_idx_map);
2822
2823         qla2x00_config_dma_addressing(ha);
2824         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2825             "64 Bit addressing is %s.\n",
2826             ha->flags.enable_64bit_addressing ? "enable" :
2827             "disable");
2828         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2829         if (ret) {
2830                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2831                     "Failed to allocate memory for adapter, aborting.\n");
2832
2833                 goto probe_hw_failed;
2834         }
2835
2836         req->max_q_depth = MAX_Q_DEPTH;
2837         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2838                 req->max_q_depth = ql2xmaxqdepth;
2839
2840
2841         base_vha = qla2x00_create_host(sht, ha);
2842         if (!base_vha) {
2843                 ret = -ENOMEM;
2844                 qla2x00_mem_free(ha);
2845                 qla2x00_free_req_que(ha, req);
2846                 qla2x00_free_rsp_que(ha, rsp);
2847                 goto probe_hw_failed;
2848         }
2849
2850         pci_set_drvdata(pdev, base_vha);
2851         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
2852
2853         host = base_vha->host;
2854         base_vha->req = req;
2855         if (IS_QLA2XXX_MIDTYPE(ha))
2856                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2857         else
2858                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2859                                                 base_vha->vp_idx;
2860
2861         /* Setup fcport template structure. */
2862         ha->mr.fcport.vha = base_vha;
2863         ha->mr.fcport.port_type = FCT_UNKNOWN;
2864         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2865         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2866         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2867         ha->mr.fcport.scan_state = 1;
2868
2869         /* Set the SG table size based on ISP type */
2870         if (!IS_FWI2_CAPABLE(ha)) {
2871                 if (IS_QLA2100(ha))
2872                         host->sg_tablesize = 32;
2873         } else {
2874                 if (!IS_QLA82XX(ha))
2875                         host->sg_tablesize = QLA_SG_ALL;
2876         }
2877         host->max_id = ha->max_fibre_devices;
2878         host->cmd_per_lun = 3;
2879         host->unique_id = host->host_no;
2880         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2881                 host->max_cmd_len = 32;
2882         else
2883                 host->max_cmd_len = MAX_CMDSZ;
2884         host->max_channel = MAX_BUSES - 1;
2885         /* Older HBAs support only 16-bit LUNs */
2886         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2887             ql2xmaxlun > 0xffff)
2888                 host->max_lun = 0xffff;
2889         else
2890                 host->max_lun = ql2xmaxlun;
2891         host->transportt = qla2xxx_transport_template;
2892         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2893
2894         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2895             "max_id=%d this_id=%d "
2896             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2897             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2898             host->this_id, host->cmd_per_lun, host->unique_id,
2899             host->max_cmd_len, host->max_channel, host->max_lun,
2900             host->transportt, sht->vendor_id);
2901
2902         /* Set up the irqs */
2903         ret = qla2x00_request_irqs(ha, rsp);
2904         if (ret)
2905                 goto probe_init_failed;
2906
2907         /* Alloc arrays of request and response ring ptrs */
2908         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2909                 ql_log(ql_log_fatal, base_vha, 0x003d,
2910                     "Failed to allocate memory for queue pointers..."
2911                     "aborting.\n");
2912                 goto probe_init_failed;
2913         }
2914
2915         if (ha->mqenable && shost_use_blk_mq(host)) {
2916                 /* number of hardware queues supported by blk/scsi-mq*/
2917                 host->nr_hw_queues = ha->max_qpairs;
2918
2919                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
2920                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
2921         } else
2922                 ql_dbg(ql_dbg_init, base_vha, 0x0193,
2923                         "blk/scsi-mq disabled.\n");
2924
2925         qlt_probe_one_stage1(base_vha, ha);
2926
2927         pci_save_state(pdev);
2928
2929         /* Assign back pointers */
2930         rsp->req = req;
2931         req->rsp = rsp;
2932
2933         if (IS_QLAFX00(ha)) {
2934                 ha->rsp_q_map[0] = rsp;
2935                 ha->req_q_map[0] = req;
2936                 set_bit(0, ha->req_qid_map);
2937                 set_bit(0, ha->rsp_qid_map);
2938         }
2939
2940         /* FWI2-capable only. */
2941         req->req_q_in = &ha->iobase->isp24.req_q_in;
2942         req->req_q_out = &ha->iobase->isp24.req_q_out;
2943         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2944         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2945         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2946                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2947                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2948                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2949                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2950         }
2951
2952         if (IS_QLAFX00(ha)) {
2953                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2954                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2955                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2956                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2957         }
2958
2959         if (IS_P3P_TYPE(ha)) {
2960                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2961                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2962                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2963         }
2964
2965         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2966             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2967             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2968         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2969             "req->req_q_in=%p req->req_q_out=%p "
2970             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2971             req->req_q_in, req->req_q_out,
2972             rsp->rsp_q_in, rsp->rsp_q_out);
2973         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2974             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2975             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2976         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2977             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2978             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2979
2980         if (ha->isp_ops->initialize_adapter(base_vha)) {
2981                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2982                     "Failed to initialize adapter - Adapter flags %x.\n",
2983                     base_vha->device_flags);
2984
2985                 if (IS_QLA82XX(ha)) {
2986                         qla82xx_idc_lock(ha);
2987                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2988                                 QLA8XXX_DEV_FAILED);
2989                         qla82xx_idc_unlock(ha);
2990                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2991                             "HW State: FAILED.\n");
2992                 } else if (IS_QLA8044(ha)) {
2993                         qla8044_idc_lock(ha);
2994                         qla8044_wr_direct(base_vha,
2995                                 QLA8044_CRB_DEV_STATE_INDEX,
2996                                 QLA8XXX_DEV_FAILED);
2997                         qla8044_idc_unlock(ha);
2998                         ql_log(ql_log_fatal, base_vha, 0x0150,
2999                             "HW State: FAILED.\n");
3000                 }
3001
3002                 ret = -ENODEV;
3003                 goto probe_failed;
3004         }
3005
3006         if (IS_QLAFX00(ha))
3007                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3008         else
3009                 host->can_queue = req->num_outstanding_cmds - 10;
3010
3011         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3012             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3013             host->can_queue, base_vha->req,
3014             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3015
3016         if (ha->mqenable && qla_ini_mode_enabled(base_vha)) {
3017                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
3018                 /* Create start of day qpairs for Block MQ */
3019                 if (shost_use_blk_mq(host)) {
3020                         for (i = 0; i < ha->max_qpairs; i++)
3021                                 qla2xxx_create_qpair(base_vha, 5, 0);
3022                 }
3023         }
3024
3025         if (ha->flags.running_gold_fw)
3026                 goto skip_dpc;
3027
3028         /*
3029          * Startup the kernel thread for this host adapter
3030          */
3031         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3032             "%s_dpc", base_vha->host_str);
3033         if (IS_ERR(ha->dpc_thread)) {
3034                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3035                     "Failed to start DPC thread.\n");
3036                 ret = PTR_ERR(ha->dpc_thread);
3037                 goto probe_failed;
3038         }
3039         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3040             "DPC thread started successfully.\n");
3041
3042         /*
3043          * If we're not coming up in initiator mode, we might sit for
3044          * a while without waking up the dpc thread, which leads to a
3045          * stuck process warning.  So just kick the dpc once here and
3046          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3047          */
3048         qla2xxx_wake_dpc(base_vha);
3049
3050         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3051
3052         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3053                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3054                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3055                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3056
3057                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3058                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3059                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3060                 INIT_WORK(&ha->idc_state_handler,
3061                     qla83xx_idc_state_handler_work);
3062                 INIT_WORK(&ha->nic_core_unrecoverable,
3063                     qla83xx_nic_core_unrecoverable_work);
3064         }
3065
3066 skip_dpc:
3067         list_add_tail(&base_vha->list, &ha->vp_list);
3068         base_vha->host->irq = ha->pdev->irq;
3069
3070         /* Initialized the timer */
3071         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
3072         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3073             "Started qla2x00_timer with "
3074             "interval=%d.\n", WATCH_INTERVAL);
3075         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3076             "Detected hba at address=%p.\n",
3077             ha);
3078
3079         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3080                 if (ha->fw_attributes & BIT_4) {
3081                         int prot = 0, guard;
3082                         base_vha->flags.difdix_supported = 1;
3083                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3084                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3085                         if (ql2xenabledif == 1)
3086                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3087                         scsi_host_set_prot(host,
3088                             prot | SHOST_DIF_TYPE1_PROTECTION
3089                             | SHOST_DIF_TYPE2_PROTECTION
3090                             | SHOST_DIF_TYPE3_PROTECTION
3091                             | SHOST_DIX_TYPE1_PROTECTION
3092                             | SHOST_DIX_TYPE2_PROTECTION
3093                             | SHOST_DIX_TYPE3_PROTECTION);
3094
3095                         guard = SHOST_DIX_GUARD_CRC;
3096
3097                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3098                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3099                                 guard |= SHOST_DIX_GUARD_IP;
3100
3101                         scsi_host_set_guard(host, guard);
3102                 } else
3103                         base_vha->flags.difdix_supported = 0;
3104         }
3105
3106         ha->isp_ops->enable_intrs(ha);
3107
3108         if (IS_QLAFX00(ha)) {
3109                 ret = qlafx00_fx_disc(base_vha,
3110                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3111                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3112                     QLA_SG_ALL : 128;
3113         }
3114
3115         ret = scsi_add_host(host, &pdev->dev);
3116         if (ret)
3117                 goto probe_failed;
3118
3119         base_vha->flags.init_done = 1;
3120         base_vha->flags.online = 1;
3121         ha->prev_minidump_failed = 0;
3122
3123         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3124             "Init done and hba is online.\n");
3125
3126         if (qla_ini_mode_enabled(base_vha))
3127                 scsi_scan_host(host);
3128         else
3129                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3130                         "skipping scsi_scan_host() for non-initiator port\n");
3131
3132         qla2x00_alloc_sysfs_attr(base_vha);
3133
3134         if (IS_QLAFX00(ha)) {
3135                 ret = qlafx00_fx_disc(base_vha,
3136                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3137
3138                 /* Register system information */
3139                 ret =  qlafx00_fx_disc(base_vha,
3140                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3141         }
3142
3143         qla2x00_init_host_attr(base_vha);
3144
3145         qla2x00_dfs_setup(base_vha);
3146
3147         ql_log(ql_log_info, base_vha, 0x00fb,
3148             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3149         ql_log(ql_log_info, base_vha, 0x00fc,
3150             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3151             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3152             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3153             base_vha->host_no,
3154             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3155
3156         qlt_add_target(ha, base_vha);
3157
3158         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3159
3160         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3161                 return -ENODEV;
3162
3163         return 0;
3164
3165 probe_init_failed:
3166         qla2x00_free_req_que(ha, req);
3167         ha->req_q_map[0] = NULL;
3168         clear_bit(0, ha->req_qid_map);
3169         qla2x00_free_rsp_que(ha, rsp);
3170         ha->rsp_q_map[0] = NULL;
3171         clear_bit(0, ha->rsp_qid_map);
3172         ha->max_req_queues = ha->max_rsp_queues = 0;
3173
3174 probe_failed:
3175         if (base_vha->timer_active)
3176                 qla2x00_stop_timer(base_vha);
3177         base_vha->flags.online = 0;
3178         if (ha->dpc_thread) {
3179                 struct task_struct *t = ha->dpc_thread;
3180
3181                 ha->dpc_thread = NULL;
3182                 kthread_stop(t);
3183         }
3184
3185         qla2x00_free_device(base_vha);
3186
3187         scsi_host_put(base_vha->host);
3188
3189 probe_hw_failed:
3190         qla2x00_clear_drv_active(ha);
3191
3192 iospace_config_failed:
3193         if (IS_P3P_TYPE(ha)) {
3194                 if (!ha->nx_pcibase)
3195                         iounmap((device_reg_t *)ha->nx_pcibase);
3196                 if (!ql2xdbwr)
3197                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3198         } else {
3199                 if (ha->iobase)
3200                         iounmap(ha->iobase);
3201                 if (ha->cregbase)
3202                         iounmap(ha->cregbase);
3203         }
3204         pci_release_selected_regions(ha->pdev, ha->bars);
3205         kfree(ha);
3206         ha = NULL;
3207
3208 probe_out:
3209         pci_disable_device(pdev);
3210         return ret;
3211 }
3212
3213 static void
3214 qla2x00_shutdown(struct pci_dev *pdev)
3215 {
3216         scsi_qla_host_t *vha;
3217         struct qla_hw_data  *ha;
3218
3219         if (!atomic_read(&pdev->enable_cnt))
3220                 return;
3221
3222         vha = pci_get_drvdata(pdev);
3223         ha = vha->hw;
3224
3225         /* Notify ISPFX00 firmware */
3226         if (IS_QLAFX00(ha))
3227                 qlafx00_driver_shutdown(vha, 20);
3228
3229         /* Turn-off FCE trace */
3230         if (ha->flags.fce_enabled) {
3231                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3232                 ha->flags.fce_enabled = 0;
3233         }
3234
3235         /* Turn-off EFT trace */
3236         if (ha->eft)
3237                 qla2x00_disable_eft_trace(vha);
3238
3239         /* Stop currently executing firmware. */
3240         qla2x00_try_to_stop_firmware(vha);
3241
3242         /* Turn adapter off line */
3243         vha->flags.online = 0;
3244
3245         /* turn-off interrupts on the card */
3246         if (ha->interrupts_on) {
3247                 vha->flags.init_done = 0;
3248                 ha->isp_ops->disable_intrs(ha);
3249         }
3250
3251         qla2x00_free_irqs(vha);
3252
3253         qla2x00_free_fw_dump(ha);
3254
3255         pci_disable_pcie_error_reporting(pdev);
3256         pci_disable_device(pdev);
3257 }
3258
3259 /* Deletes all the virtual ports for a given ha */
3260 static void
3261 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3262 {
3263         scsi_qla_host_t *vha;
3264         unsigned long flags;
3265
3266         mutex_lock(&ha->vport_lock);
3267         while (ha->cur_vport_count) {
3268                 spin_lock_irqsave(&ha->vport_slock, flags);
3269
3270                 BUG_ON(base_vha->list.next == &ha->vp_list);
3271                 /* This assumes first entry in ha->vp_list is always base vha */
3272                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3273                 scsi_host_get(vha->host);
3274
3275                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3276                 mutex_unlock(&ha->vport_lock);
3277
3278                 fc_vport_terminate(vha->fc_vport);
3279                 scsi_host_put(vha->host);
3280
3281                 mutex_lock(&ha->vport_lock);
3282         }
3283         mutex_unlock(&ha->vport_lock);
3284 }
3285
3286 /* Stops all deferred work threads */
3287 static void
3288 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3289 {
3290         /* Cancel all work and destroy DPC workqueues */
3291         if (ha->dpc_lp_wq) {
3292                 cancel_work_sync(&ha->idc_aen);
3293                 destroy_workqueue(ha->dpc_lp_wq);
3294                 ha->dpc_lp_wq = NULL;
3295         }
3296
3297         if (ha->dpc_hp_wq) {
3298                 cancel_work_sync(&ha->nic_core_reset);
3299                 cancel_work_sync(&ha->idc_state_handler);
3300                 cancel_work_sync(&ha->nic_core_unrecoverable);
3301                 destroy_workqueue(ha->dpc_hp_wq);
3302                 ha->dpc_hp_wq = NULL;
3303         }
3304
3305         /* Kill the kernel thread for this host */
3306         if (ha->dpc_thread) {
3307                 struct task_struct *t = ha->dpc_thread;
3308
3309                 /*
3310                  * qla2xxx_wake_dpc checks for ->dpc_thread
3311                  * so we need to zero it out.
3312                  */
3313                 ha->dpc_thread = NULL;
3314                 kthread_stop(t);
3315         }
3316 }
3317
3318 static void
3319 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3320 {
3321         if (IS_QLA82XX(ha)) {
3322
3323                 iounmap((device_reg_t *)ha->nx_pcibase);
3324                 if (!ql2xdbwr)
3325                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3326         } else {
3327                 if (ha->iobase)
3328                         iounmap(ha->iobase);
3329
3330                 if (ha->cregbase)
3331                         iounmap(ha->cregbase);
3332
3333                 if (ha->mqiobase)
3334                         iounmap(ha->mqiobase);
3335
3336                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3337                         iounmap(ha->msixbase);
3338         }
3339 }
3340
3341 static void
3342 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3343 {
3344         if (IS_QLA8044(ha)) {
3345                 qla8044_idc_lock(ha);
3346                 qla8044_clear_drv_active(ha);
3347                 qla8044_idc_unlock(ha);
3348         } else if (IS_QLA82XX(ha)) {
3349                 qla82xx_idc_lock(ha);
3350                 qla82xx_clear_drv_active(ha);
3351                 qla82xx_idc_unlock(ha);
3352         }
3353 }
3354
3355 static void
3356 qla2x00_remove_one(struct pci_dev *pdev)
3357 {
3358         scsi_qla_host_t *base_vha;
3359         struct qla_hw_data  *ha;
3360
3361         base_vha = pci_get_drvdata(pdev);
3362         ha = base_vha->hw;
3363
3364         /* Indicate device removal to prevent future board_disable and wait
3365          * until any pending board_disable has completed. */
3366         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3367         cancel_work_sync(&ha->board_disable);
3368
3369         /*
3370          * If the PCI device is disabled then there was a PCI-disconnect and
3371          * qla2x00_disable_board_on_pci_error has taken care of most of the
3372          * resources.
3373          */
3374         if (!atomic_read(&pdev->enable_cnt)) {
3375                 scsi_host_put(base_vha->host);
3376                 kfree(ha);
3377                 pci_set_drvdata(pdev, NULL);
3378                 return;
3379         }
3380
3381         qla2x00_wait_for_hba_ready(base_vha);
3382
3383         /* if UNLOAD flag is already set, then continue unload,
3384          * where it was set first.
3385          */
3386         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3387                 return;
3388
3389         set_bit(UNLOADING, &base_vha->dpc_flags);
3390
3391         if (IS_QLAFX00(ha))
3392                 qlafx00_driver_shutdown(base_vha, 20);
3393
3394         qla2x00_delete_all_vps(ha, base_vha);
3395
3396         if (IS_QLA8031(ha)) {
3397                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3398                     "Clearing fcoe driver presence.\n");
3399                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3400                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3401                             "Error while clearing DRV-Presence.\n");
3402         }
3403
3404         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3405
3406         qla2x00_dfs_remove(base_vha);
3407
3408         qla84xx_put_chip(base_vha);
3409
3410         /* Laser should be disabled only for ISP2031 */
3411         if (IS_QLA2031(ha))
3412                 qla83xx_disable_laser(base_vha);
3413
3414         /* Disable timer */
3415         if (base_vha->timer_active)
3416                 qla2x00_stop_timer(base_vha);
3417
3418         base_vha->flags.online = 0;
3419
3420         /* free DMA memory */
3421         if (ha->exlogin_buf)
3422                 qla2x00_free_exlogin_buffer(ha);
3423
3424         /* free DMA memory */
3425         if (ha->exchoffld_buf)
3426                 qla2x00_free_exchoffld_buffer(ha);
3427
3428         qla2x00_destroy_deferred_work(ha);
3429
3430         qlt_remove_target(ha, base_vha);
3431
3432         qla2x00_free_sysfs_attr(base_vha, true);
3433
3434         fc_remove_host(base_vha->host);
3435
3436         scsi_remove_host(base_vha->host);
3437
3438         qla2x00_free_device(base_vha);
3439
3440         qla2x00_clear_drv_active(ha);
3441
3442         scsi_host_put(base_vha->host);
3443
3444         qla2x00_unmap_iobases(ha);
3445
3446         pci_release_selected_regions(ha->pdev, ha->bars);
3447         kfree(ha);
3448         ha = NULL;
3449
3450         pci_disable_pcie_error_reporting(pdev);
3451
3452         pci_disable_device(pdev);
3453 }
3454
3455 static void
3456 qla2x00_free_device(scsi_qla_host_t *vha)
3457 {
3458         struct qla_hw_data *ha = vha->hw;
3459
3460         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3461
3462         /* Disable timer */
3463         if (vha->timer_active)
3464                 qla2x00_stop_timer(vha);
3465
3466         qla25xx_delete_queues(vha);
3467
3468         if (ha->flags.fce_enabled)
3469                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3470
3471         if (ha->eft)
3472                 qla2x00_disable_eft_trace(vha);
3473
3474         /* Stop currently executing firmware. */
3475         qla2x00_try_to_stop_firmware(vha);
3476
3477         vha->flags.online = 0;
3478
3479         /* turn-off interrupts on the card */
3480         if (ha->interrupts_on) {
3481                 vha->flags.init_done = 0;
3482                 ha->isp_ops->disable_intrs(ha);
3483         }
3484
3485         qla2x00_free_fcports(vha);
3486
3487         qla2x00_free_irqs(vha);
3488
3489         /* Flush the work queue and remove it */
3490         if (ha->wq) {
3491                 flush_workqueue(ha->wq);
3492                 destroy_workqueue(ha->wq);
3493                 ha->wq = NULL;
3494         }
3495
3496
3497         qla2x00_mem_free(ha);
3498
3499         qla82xx_md_free(vha);
3500
3501         qla2x00_free_queues(ha);
3502 }
3503
3504 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3505 {
3506         fc_port_t *fcport, *tfcport;
3507
3508         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3509                 list_del(&fcport->list);
3510                 qla2x00_clear_loop_id(fcport);
3511                 kfree(fcport);
3512                 fcport = NULL;
3513         }
3514 }
3515
3516 static inline void
3517 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3518     int defer)
3519 {
3520         struct fc_rport *rport;
3521         scsi_qla_host_t *base_vha;
3522         unsigned long flags;
3523
3524         if (!fcport->rport)
3525                 return;
3526
3527         rport = fcport->rport;
3528         if (defer) {
3529                 base_vha = pci_get_drvdata(vha->hw->pdev);
3530                 spin_lock_irqsave(vha->host->host_lock, flags);
3531                 fcport->drport = rport;
3532                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3533                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3534                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3535                 qla2xxx_wake_dpc(base_vha);
3536         } else {
3537                 int now;
3538                 if (rport)
3539                         fc_remote_port_delete(rport);
3540                 qlt_do_generation_tick(vha, &now);
3541                 qlt_fc_port_deleted(vha, fcport, now);
3542         }
3543 }
3544
3545 /*
3546  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3547  *
3548  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3549  *
3550  * Return: None.
3551  *
3552  * Context:
3553  */
3554 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3555     int do_login, int defer)
3556 {
3557         if (IS_QLAFX00(vha->hw)) {
3558                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3559                 qla2x00_schedule_rport_del(vha, fcport, defer);
3560                 return;
3561         }
3562
3563         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3564             vha->vp_idx == fcport->vha->vp_idx) {
3565                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3566                 qla2x00_schedule_rport_del(vha, fcport, defer);
3567         }
3568         /*
3569          * We may need to retry the login, so don't change the state of the
3570          * port but do the retries.
3571          */
3572         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3573                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3574
3575         if (!do_login)
3576                 return;
3577
3578         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3579
3580         if (fcport->login_retry == 0) {
3581                 fcport->login_retry = vha->hw->login_retry_count;
3582
3583                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3584                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3585                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3586         }
3587 }
3588
3589 /*
3590  * qla2x00_mark_all_devices_lost
3591  *      Updates fcport state when device goes offline.
3592  *
3593  * Input:
3594  *      ha = adapter block pointer.
3595  *      fcport = port structure pointer.
3596  *
3597  * Return:
3598  *      None.
3599  *
3600  * Context:
3601  */
3602 void
3603 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3604 {
3605         fc_port_t *fcport;
3606
3607         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3608                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3609                         continue;
3610
3611                 /*
3612                  * No point in marking the device as lost, if the device is
3613                  * already DEAD.
3614                  */
3615                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3616                         continue;
3617                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3618                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3619                         if (defer)
3620                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3621                         else if (vha->vp_idx == fcport->vha->vp_idx)
3622                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3623                 }
3624         }
3625 }
3626
3627 /*
3628 * qla2x00_mem_alloc
3629 *      Allocates adapter memory.
3630 *
3631 * Returns:
3632 *      0  = success.
3633 *      !0  = failure.
3634 */
3635 static int
3636 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3637         struct req_que **req, struct rsp_que **rsp)
3638 {
3639         char    name[16];
3640
3641         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3642                 &ha->init_cb_dma, GFP_KERNEL);
3643         if (!ha->init_cb)
3644                 goto fail;
3645
3646         if (qlt_mem_alloc(ha) < 0)
3647                 goto fail_free_init_cb;
3648
3649         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3650                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3651         if (!ha->gid_list)
3652                 goto fail_free_tgt_mem;
3653
3654         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3655         if (!ha->srb_mempool)
3656                 goto fail_free_gid_list;
3657
3658         if (IS_P3P_TYPE(ha)) {
3659                 /* Allocate cache for CT6 Ctx. */
3660                 if (!ctx_cachep) {
3661                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3662                                 sizeof(struct ct6_dsd), 0,
3663                                 SLAB_HWCACHE_ALIGN, NULL);
3664                         if (!ctx_cachep)
3665                                 goto fail_free_gid_list;
3666                 }
3667                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3668                         ctx_cachep);
3669                 if (!ha->ctx_mempool)
3670                         goto fail_free_srb_mempool;
3671                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3672                     "ctx_cachep=%p ctx_mempool=%p.\n",
3673                     ctx_cachep, ha->ctx_mempool);
3674         }
3675
3676         /* Get memory for cached NVRAM */
3677         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3678         if (!ha->nvram)
3679                 goto fail_free_ctx_mempool;
3680
3681         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3682                 ha->pdev->device);
3683         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3684                 DMA_POOL_SIZE, 8, 0);
3685         if (!ha->s_dma_pool)
3686                 goto fail_free_nvram;
3687
3688         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3689             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3690             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3691
3692         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3693                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3694                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3695                 if (!ha->dl_dma_pool) {
3696                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3697                             "Failed to allocate memory for dl_dma_pool.\n");
3698                         goto fail_s_dma_pool;
3699                 }
3700
3701                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3702                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3703                 if (!ha->fcp_cmnd_dma_pool) {
3704                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3705                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3706                         goto fail_dl_dma_pool;
3707                 }
3708                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3709                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3710                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3711         }
3712
3713         /* Allocate memory for SNS commands */
3714         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3715         /* Get consistent memory allocated for SNS commands */
3716                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3717                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3718                 if (!ha->sns_cmd)
3719                         goto fail_dma_pool;
3720                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3721                     "sns_cmd: %p.\n", ha->sns_cmd);
3722         } else {
3723         /* Get consistent memory allocated for MS IOCB */
3724                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3725                         &ha->ms_iocb_dma);
3726                 if (!ha->ms_iocb)
3727                         goto fail_dma_pool;
3728         /* Get consistent memory allocated for CT SNS commands */
3729                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3730                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3731                 if (!ha->ct_sns)
3732                         goto fail_free_ms_iocb;
3733                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3734                     "ms_iocb=%p ct_sns=%p.\n",
3735                     ha->ms_iocb, ha->ct_sns);
3736         }
3737
3738         /* Allocate memory for request ring */
3739         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3740         if (!*req) {
3741                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3742                     "Failed to allocate memory for req.\n");
3743                 goto fail_req;
3744         }
3745         (*req)->length = req_len;
3746         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3747                 ((*req)->length + 1) * sizeof(request_t),
3748                 &(*req)->dma, GFP_KERNEL);
3749         if (!(*req)->ring) {
3750                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3751                     "Failed to allocate memory for req_ring.\n");
3752                 goto fail_req_ring;
3753         }
3754         /* Allocate memory for response ring */
3755         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3756         if (!*rsp) {
3757                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3758                     "Failed to allocate memory for rsp.\n");
3759                 goto fail_rsp;
3760         }
3761         (*rsp)->hw = ha;
3762         (*rsp)->length = rsp_len;
3763         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3764                 ((*rsp)->length + 1) * sizeof(response_t),
3765                 &(*rsp)->dma, GFP_KERNEL);
3766         if (!(*rsp)->ring) {
3767                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3768                     "Failed to allocate memory for rsp_ring.\n");
3769                 goto fail_rsp_ring;
3770         }
3771         (*req)->rsp = *rsp;
3772         (*rsp)->req = *req;
3773         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3774             "req=%p req->length=%d req->ring=%p rsp=%p "
3775             "rsp->length=%d rsp->ring=%p.\n",
3776             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3777             (*rsp)->ring);
3778         /* Allocate memory for NVRAM data for vports */
3779         if (ha->nvram_npiv_size) {
3780                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3781                     ha->nvram_npiv_size, GFP_KERNEL);
3782                 if (!ha->npiv_info) {
3783                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3784                             "Failed to allocate memory for npiv_info.\n");
3785                         goto fail_npiv_info;
3786                 }
3787         } else
3788                 ha->npiv_info = NULL;
3789
3790         /* Get consistent memory allocated for EX-INIT-CB. */
3791         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3792                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3793                     &ha->ex_init_cb_dma);
3794                 if (!ha->ex_init_cb)
3795                         goto fail_ex_init_cb;
3796                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3797                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3798         }
3799
3800         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3801
3802         /* Get consistent memory allocated for Async Port-Database. */
3803         if (!IS_FWI2_CAPABLE(ha)) {
3804                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3805                         &ha->async_pd_dma);
3806                 if (!ha->async_pd)
3807                         goto fail_async_pd;
3808                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3809                     "async_pd=%p.\n", ha->async_pd);
3810         }
3811
3812         INIT_LIST_HEAD(&ha->vp_list);
3813
3814         /* Allocate memory for our loop_id bitmap */
3815         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3816             GFP_KERNEL);
3817         if (!ha->loop_id_map)
3818                 goto fail_async_pd;
3819         else {
3820                 qla2x00_set_reserved_loop_ids(ha);
3821                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3822                     "loop_id_map=%p.\n", ha->loop_id_map);
3823         }
3824
3825         return 0;
3826
3827 fail_async_pd:
3828         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3829 fail_ex_init_cb:
3830         kfree(ha->npiv_info);
3831 fail_npiv_info:
3832         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3833                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3834         (*rsp)->ring = NULL;
3835         (*rsp)->dma = 0;
3836 fail_rsp_ring:
3837         kfree(*rsp);
3838 fail_rsp:
3839         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3840                 sizeof(request_t), (*req)->ring, (*req)->dma);
3841         (*req)->ring = NULL;
3842         (*req)->dma = 0;
3843 fail_req_ring:
3844         kfree(*req);
3845 fail_req:
3846         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3847                 ha->ct_sns, ha->ct_sns_dma);
3848         ha->ct_sns = NULL;
3849         ha->ct_sns_dma = 0;
3850 fail_free_ms_iocb:
3851         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3852         ha->ms_iocb = NULL;
3853         ha->ms_iocb_dma = 0;
3854 fail_dma_pool:
3855         if (IS_QLA82XX(ha) || ql2xenabledif) {
3856                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3857                 ha->fcp_cmnd_dma_pool = NULL;
3858         }
3859 fail_dl_dma_pool:
3860         if (IS_QLA82XX(ha) || ql2xenabledif) {
3861                 dma_pool_destroy(ha->dl_dma_pool);
3862                 ha->dl_dma_pool = NULL;
3863         }
3864 fail_s_dma_pool:
3865         dma_pool_destroy(ha->s_dma_pool);
3866         ha->s_dma_pool = NULL;
3867 fail_free_nvram:
3868         kfree(ha->nvram);
3869         ha->nvram = NULL;
3870 fail_free_ctx_mempool:
3871         mempool_destroy(ha->ctx_mempool);
3872         ha->ctx_mempool = NULL;
3873 fail_free_srb_mempool:
3874         mempool_destroy(ha->srb_mempool);
3875         ha->srb_mempool = NULL;
3876 fail_free_gid_list:
3877         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3878         ha->gid_list,
3879         ha->gid_list_dma);
3880         ha->gid_list = NULL;
3881         ha->gid_list_dma = 0;
3882 fail_free_tgt_mem:
3883         qlt_mem_free(ha);
3884 fail_free_init_cb:
3885         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3886         ha->init_cb_dma);
3887         ha->init_cb = NULL;
3888         ha->init_cb_dma = 0;
3889 fail:
3890         ql_log(ql_log_fatal, NULL, 0x0030,
3891             "Memory allocation failure.\n");
3892         return -ENOMEM;
3893 }
3894
3895 int
3896 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
3897 {
3898         int rval;
3899         uint16_t        size, max_cnt, temp;
3900         struct qla_hw_data *ha = vha->hw;
3901
3902         /* Return if we don't need to alloacate any extended logins */
3903         if (!ql2xexlogins)
3904                 return QLA_SUCCESS;
3905
3906         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
3907         max_cnt = 0;
3908         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
3909         if (rval != QLA_SUCCESS) {
3910                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
3911                     "Failed to get exlogin status.\n");
3912                 return rval;
3913         }
3914
3915         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
3916         ha->exlogin_size = (size * temp);
3917         ql_log(ql_log_info, vha, 0xd024,
3918                 "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
3919                 max_cnt, size, temp);
3920
3921         ql_log(ql_log_info, vha, 0xd025, "EXLOGIN: requested size=0x%x\n",
3922                 ha->exlogin_size);
3923
3924         /* Get consistent memory for extended logins */
3925         ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
3926             ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
3927         if (!ha->exlogin_buf) {
3928                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
3929                     "Failed to allocate memory for exlogin_buf_dma.\n");
3930                 return -ENOMEM;
3931         }
3932
3933         /* Now configure the dma buffer */
3934         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
3935         if (rval) {
3936                 ql_log(ql_log_fatal, vha, 0x00cf,
3937                     "Setup extended login buffer  ****FAILED****.\n");
3938                 qla2x00_free_exlogin_buffer(ha);
3939         }
3940
3941         return rval;
3942 }
3943
3944 /*
3945 * qla2x00_free_exlogin_buffer
3946 *
3947 * Input:
3948 *       ha = adapter block pointer
3949 */
3950 void
3951 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
3952 {
3953         if (ha->exlogin_buf) {
3954                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
3955                     ha->exlogin_buf, ha->exlogin_buf_dma);
3956                 ha->exlogin_buf = NULL;
3957                 ha->exlogin_size = 0;
3958         }
3959 }
3960
3961 int
3962 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
3963 {
3964         int rval;
3965         uint16_t        size, max_cnt, temp;
3966         struct qla_hw_data *ha = vha->hw;
3967
3968         /* Return if we don't need to alloacate any extended logins */
3969         if (!ql2xexchoffld)
3970                 return QLA_SUCCESS;
3971
3972         ql_log(ql_log_info, vha, 0xd014,
3973             "Exchange offload count: %d.\n", ql2xexlogins);
3974
3975         max_cnt = 0;
3976         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
3977         if (rval != QLA_SUCCESS) {
3978                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
3979                     "Failed to get exlogin status.\n");
3980                 return rval;
3981         }
3982
3983         temp = (ql2xexchoffld > max_cnt) ? max_cnt : ql2xexchoffld;
3984         ha->exchoffld_size = (size * temp);
3985         ql_log(ql_log_info, vha, 0xd016,
3986                 "Exchange offload: max_count=%d, buffers=0x%x, total=%d.\n",
3987                 max_cnt, size, temp);
3988
3989         ql_log(ql_log_info, vha, 0xd017,
3990             "Exchange Buffers requested size = 0x%x\n", ha->exchoffld_size);
3991
3992         /* Get consistent memory for extended logins */
3993         ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
3994             ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
3995         if (!ha->exchoffld_buf) {
3996                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
3997                     "Failed to allocate memory for exchoffld_buf_dma.\n");
3998                 return -ENOMEM;
3999         }
4000
4001         /* Now configure the dma buffer */
4002         rval = qla_set_exchoffld_mem_cfg(vha, ha->exchoffld_buf_dma);
4003         if (rval) {
4004                 ql_log(ql_log_fatal, vha, 0xd02e,
4005                     "Setup exchange offload buffer ****FAILED****.\n");
4006                 qla2x00_free_exchoffld_buffer(ha);
4007         }
4008
4009         return rval;
4010 }
4011
4012 /*
4013 * qla2x00_free_exchoffld_buffer
4014 *
4015 * Input:
4016 *       ha = adapter block pointer
4017 */
4018 void
4019 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4020 {
4021         if (ha->exchoffld_buf) {
4022                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4023                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4024                 ha->exchoffld_buf = NULL;
4025                 ha->exchoffld_size = 0;
4026         }
4027 }
4028
4029 /*
4030 * qla2x00_free_fw_dump
4031 *       Frees fw dump stuff.
4032 *
4033 * Input:
4034 *       ha = adapter block pointer
4035 */
4036 static void
4037 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4038 {
4039         if (ha->fce)
4040                 dma_free_coherent(&ha->pdev->dev,
4041                     FCE_SIZE, ha->fce, ha->fce_dma);
4042
4043         if (ha->eft)
4044                 dma_free_coherent(&ha->pdev->dev,
4045                     EFT_SIZE, ha->eft, ha->eft_dma);
4046
4047         if (ha->fw_dump)
4048                 vfree(ha->fw_dump);
4049         if (ha->fw_dump_template)
4050                 vfree(ha->fw_dump_template);
4051
4052         ha->fce = NULL;
4053         ha->fce_dma = 0;
4054         ha->eft = NULL;
4055         ha->eft_dma = 0;
4056         ha->fw_dumped = 0;
4057         ha->fw_dump_cap_flags = 0;
4058         ha->fw_dump_reading = 0;
4059         ha->fw_dump = NULL;
4060         ha->fw_dump_len = 0;
4061         ha->fw_dump_template = NULL;
4062         ha->fw_dump_template_len = 0;
4063 }
4064
4065 /*
4066 * qla2x00_mem_free
4067 *      Frees all adapter allocated memory.
4068 *
4069 * Input:
4070 *      ha = adapter block pointer.
4071 */
4072 static void
4073 qla2x00_mem_free(struct qla_hw_data *ha)
4074 {
4075         qla2x00_free_fw_dump(ha);
4076
4077         if (ha->mctp_dump)
4078                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4079                     ha->mctp_dump_dma);
4080
4081         if (ha->srb_mempool)
4082                 mempool_destroy(ha->srb_mempool);
4083
4084         if (ha->dcbx_tlv)
4085                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4086                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4087
4088         if (ha->xgmac_data)
4089                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4090                     ha->xgmac_data, ha->xgmac_data_dma);
4091
4092         if (ha->sns_cmd)
4093                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4094                 ha->sns_cmd, ha->sns_cmd_dma);
4095
4096         if (ha->ct_sns)
4097                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4098                 ha->ct_sns, ha->ct_sns_dma);
4099
4100         if (ha->sfp_data)
4101                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
4102
4103         if (ha->ms_iocb)
4104                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4105
4106         if (ha->ex_init_cb)
4107                 dma_pool_free(ha->s_dma_pool,
4108                         ha->ex_init_cb, ha->ex_init_cb_dma);
4109
4110         if (ha->async_pd)
4111                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4112
4113         if (ha->s_dma_pool)
4114                 dma_pool_destroy(ha->s_dma_pool);
4115
4116         if (ha->gid_list)
4117                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4118                 ha->gid_list, ha->gid_list_dma);
4119
4120         if (IS_QLA82XX(ha)) {
4121                 if (!list_empty(&ha->gbl_dsd_list)) {
4122                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4123
4124                         /* clean up allocated prev pool */
4125                         list_for_each_entry_safe(dsd_ptr,
4126                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4127                                 dma_pool_free(ha->dl_dma_pool,
4128                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4129                                 list_del(&dsd_ptr->list);
4130                                 kfree(dsd_ptr);
4131                         }
4132                 }
4133         }
4134
4135         if (ha->dl_dma_pool)
4136                 dma_pool_destroy(ha->dl_dma_pool);
4137
4138         if (ha->fcp_cmnd_dma_pool)
4139                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4140
4141         if (ha->ctx_mempool)
4142                 mempool_destroy(ha->ctx_mempool);
4143
4144         qlt_mem_free(ha);
4145
4146         if (ha->init_cb)
4147                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4148                         ha->init_cb, ha->init_cb_dma);
4149         vfree(ha->optrom_buffer);
4150         kfree(ha->nvram);
4151         kfree(ha->npiv_info);
4152         kfree(ha->swl);
4153         kfree(ha->loop_id_map);
4154
4155         ha->srb_mempool = NULL;
4156         ha->ctx_mempool = NULL;
4157         ha->sns_cmd = NULL;
4158         ha->sns_cmd_dma = 0;
4159         ha->ct_sns = NULL;
4160         ha->ct_sns_dma = 0;
4161         ha->ms_iocb = NULL;
4162         ha->ms_iocb_dma = 0;
4163         ha->init_cb = NULL;
4164         ha->init_cb_dma = 0;
4165         ha->ex_init_cb = NULL;
4166         ha->ex_init_cb_dma = 0;
4167         ha->async_pd = NULL;
4168         ha->async_pd_dma = 0;
4169
4170         ha->s_dma_pool = NULL;
4171         ha->dl_dma_pool = NULL;
4172         ha->fcp_cmnd_dma_pool = NULL;
4173
4174         ha->gid_list = NULL;
4175         ha->gid_list_dma = 0;
4176
4177         ha->tgt.atio_ring = NULL;
4178         ha->tgt.atio_dma = 0;
4179         ha->tgt.tgt_vp_map = NULL;
4180 }
4181
4182 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4183                                                 struct qla_hw_data *ha)
4184 {
4185         struct Scsi_Host *host;
4186         struct scsi_qla_host *vha = NULL;
4187
4188         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4189         if (host == NULL) {
4190                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4191                     "Failed to allocate host from the scsi layer, aborting.\n");
4192                 goto fail;
4193         }
4194
4195         /* Clear our data area */
4196         vha = shost_priv(host);
4197         memset(vha, 0, sizeof(scsi_qla_host_t));
4198
4199         vha->host = host;
4200         vha->host_no = host->host_no;
4201         vha->hw = ha;
4202
4203         INIT_LIST_HEAD(&vha->vp_fcports);
4204         INIT_LIST_HEAD(&vha->work_list);
4205         INIT_LIST_HEAD(&vha->list);
4206         INIT_LIST_HEAD(&vha->qla_cmd_list);
4207         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4208         INIT_LIST_HEAD(&vha->logo_list);
4209         INIT_LIST_HEAD(&vha->plogi_ack_list);
4210         INIT_LIST_HEAD(&vha->qp_list);
4211
4212         spin_lock_init(&vha->work_lock);
4213         spin_lock_init(&vha->cmd_list_lock);
4214
4215         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4216         ql_dbg(ql_dbg_init, vha, 0x0041,
4217             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4218             vha->host, vha->hw, vha,
4219             dev_name(&(ha->pdev->dev)));
4220
4221         return vha;
4222
4223 fail:
4224         return vha;
4225 }
4226
4227 static struct qla_work_evt *
4228 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4229 {
4230         struct qla_work_evt *e;
4231         uint8_t bail;
4232
4233         QLA_VHA_MARK_BUSY(vha, bail);
4234         if (bail)
4235                 return NULL;
4236
4237         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4238         if (!e) {
4239                 QLA_VHA_MARK_NOT_BUSY(vha);
4240                 return NULL;
4241         }
4242
4243         INIT_LIST_HEAD(&e->list);
4244         e->type = type;
4245         e->flags = QLA_EVT_FLAG_FREE;
4246         return e;
4247 }
4248
4249 static int
4250 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4251 {
4252         unsigned long flags;
4253
4254         spin_lock_irqsave(&vha->work_lock, flags);
4255         list_add_tail(&e->list, &vha->work_list);
4256         spin_unlock_irqrestore(&vha->work_lock, flags);
4257         qla2xxx_wake_dpc(vha);
4258
4259         return QLA_SUCCESS;
4260 }
4261
4262 int
4263 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4264     u32 data)
4265 {
4266         struct qla_work_evt *e;
4267
4268         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4269         if (!e)
4270                 return QLA_FUNCTION_FAILED;
4271
4272         e->u.aen.code = code;
4273         e->u.aen.data = data;
4274         return qla2x00_post_work(vha, e);
4275 }
4276
4277 int
4278 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4279 {
4280         struct qla_work_evt *e;
4281
4282         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4283         if (!e)
4284                 return QLA_FUNCTION_FAILED;
4285
4286         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4287         return qla2x00_post_work(vha, e);
4288 }
4289
4290 #define qla2x00_post_async_work(name, type)     \
4291 int qla2x00_post_async_##name##_work(           \
4292     struct scsi_qla_host *vha,                  \
4293     fc_port_t *fcport, uint16_t *data)          \
4294 {                                               \
4295         struct qla_work_evt *e;                 \
4296                                                 \
4297         e = qla2x00_alloc_work(vha, type);      \
4298         if (!e)                                 \
4299                 return QLA_FUNCTION_FAILED;     \
4300                                                 \
4301         e->u.logio.fcport = fcport;             \
4302         if (data) {                             \
4303                 e->u.logio.data[0] = data[0];   \
4304                 e->u.logio.data[1] = data[1];   \
4305         }                                       \
4306         return qla2x00_post_work(vha, e);       \
4307 }
4308
4309 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4310 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
4311 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4312 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4313 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4314 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
4315
4316 int
4317 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4318 {
4319         struct qla_work_evt *e;
4320
4321         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4322         if (!e)
4323                 return QLA_FUNCTION_FAILED;
4324
4325         e->u.uevent.code = code;
4326         return qla2x00_post_work(vha, e);
4327 }
4328
4329 static void
4330 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4331 {
4332         char event_string[40];
4333         char *envp[] = { event_string, NULL };
4334
4335         switch (code) {
4336         case QLA_UEVENT_CODE_FW_DUMP:
4337                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4338                     vha->host_no);
4339                 break;
4340         default:
4341                 /* do nothing */
4342                 break;
4343         }
4344         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4345 }
4346
4347 int
4348 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
4349                         uint32_t *data, int cnt)
4350 {
4351         struct qla_work_evt *e;
4352
4353         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
4354         if (!e)
4355                 return QLA_FUNCTION_FAILED;
4356
4357         e->u.aenfx.evtcode = evtcode;
4358         e->u.aenfx.count = cnt;
4359         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
4360         return qla2x00_post_work(vha, e);
4361 }
4362
4363 void
4364 qla2x00_do_work(struct scsi_qla_host *vha)
4365 {
4366         struct qla_work_evt *e, *tmp;
4367         unsigned long flags;
4368         LIST_HEAD(work);
4369
4370         spin_lock_irqsave(&vha->work_lock, flags);
4371         list_splice_init(&vha->work_list, &work);
4372         spin_unlock_irqrestore(&vha->work_lock, flags);
4373
4374         list_for_each_entry_safe(e, tmp, &work, list) {
4375                 list_del_init(&e->list);
4376
4377                 switch (e->type) {
4378                 case QLA_EVT_AEN:
4379                         fc_host_post_event(vha->host, fc_get_event_number(),
4380                             e->u.aen.code, e->u.aen.data);
4381                         break;
4382                 case QLA_EVT_IDC_ACK:
4383                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
4384                         break;
4385                 case QLA_EVT_ASYNC_LOGIN:
4386                         qla2x00_async_login(vha, e->u.logio.fcport,
4387                             e->u.logio.data);
4388                         break;
4389                 case QLA_EVT_ASYNC_LOGIN_DONE:
4390                         qla2x00_async_login_done(vha, e->u.logio.fcport,
4391                             e->u.logio.data);
4392                         break;
4393                 case QLA_EVT_ASYNC_LOGOUT:
4394                         qla2x00_async_logout(vha, e->u.logio.fcport);
4395                         break;
4396                 case QLA_EVT_ASYNC_LOGOUT_DONE:
4397                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
4398                             e->u.logio.data);
4399                         break;
4400                 case QLA_EVT_ASYNC_ADISC:
4401                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4402                             e->u.logio.data);
4403                         break;
4404                 case QLA_EVT_ASYNC_ADISC_DONE:
4405                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4406                             e->u.logio.data);
4407                         break;
4408                 case QLA_EVT_UEVENT:
4409                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4410                         break;
4411                 case QLA_EVT_AENFX:
4412                         qlafx00_process_aen(vha, e);
4413                         break;
4414                 }
4415                 if (e->flags & QLA_EVT_FLAG_FREE)
4416                         kfree(e);
4417
4418                 /* For each work completed decrement vha ref count */
4419                 QLA_VHA_MARK_NOT_BUSY(vha);
4420         }
4421 }
4422
4423 /* Relogins all the fcports of a vport
4424  * Context: dpc thread
4425  */
4426 void qla2x00_relogin(struct scsi_qla_host *vha)
4427 {
4428         fc_port_t       *fcport;
4429         int status;
4430         uint16_t        next_loopid = 0;
4431         struct qla_hw_data *ha = vha->hw;
4432         uint16_t data[2];
4433
4434         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4435         /*
4436          * If the port is not ONLINE then try to login
4437          * to it if we haven't run out of retries.
4438          */
4439                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4440                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4441                         fcport->login_retry--;
4442                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4443                                 if (fcport->flags & FCF_FCP2_DEVICE)
4444                                         ha->isp_ops->fabric_logout(vha,
4445                                                         fcport->loop_id,
4446                                                         fcport->d_id.b.domain,
4447                                                         fcport->d_id.b.area,
4448                                                         fcport->d_id.b.al_pa);
4449
4450                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4451                                         fcport->loop_id = next_loopid =
4452                                             ha->min_external_loopid;
4453                                         status = qla2x00_find_new_loop_id(
4454                                             vha, fcport);
4455                                         if (status != QLA_SUCCESS) {
4456                                                 /* Ran out of IDs to use */
4457                                                 break;
4458                                         }
4459                                 }
4460
4461                                 if (IS_ALOGIO_CAPABLE(ha)) {
4462                                         fcport->flags |= FCF_ASYNC_SENT;
4463                                         data[0] = 0;
4464                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4465                                         status = qla2x00_post_async_login_work(
4466                                             vha, fcport, data);
4467                                         if (status == QLA_SUCCESS)
4468                                                 continue;
4469                                         /* Attempt a retry. */
4470                                         status = 1;
4471                                 } else {
4472                                         status = qla2x00_fabric_login(vha,
4473                                             fcport, &next_loopid);
4474                                         if (status ==  QLA_SUCCESS) {
4475                                                 int status2;
4476                                                 uint8_t opts;
4477
4478                                                 opts = 0;
4479                                                 if (fcport->flags &
4480                                                     FCF_FCP2_DEVICE)
4481                                                         opts |= BIT_1;
4482                                                 status2 =
4483                                                     qla2x00_get_port_database(
4484                                                         vha, fcport, opts);
4485                                                 if (status2 != QLA_SUCCESS)
4486                                                         status = 1;
4487                                         }
4488                                 }
4489                         } else
4490                                 status = qla2x00_local_device_login(vha,
4491                                                                 fcport);
4492
4493                         if (status == QLA_SUCCESS) {
4494                                 fcport->old_loop_id = fcport->loop_id;
4495
4496                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4497                                     "Port login OK: logged in ID 0x%x.\n",
4498                                     fcport->loop_id);
4499
4500                                 qla2x00_update_fcport(vha, fcport);
4501
4502                         } else if (status == 1) {
4503                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4504                                 /* retry the login again */
4505                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4506                                     "Retrying %d login again loop_id 0x%x.\n",
4507                                     fcport->login_retry, fcport->loop_id);
4508                         } else {
4509                                 fcport->login_retry = 0;
4510                         }
4511
4512                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4513                                 qla2x00_clear_loop_id(fcport);
4514                 }
4515                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4516                         break;
4517         }
4518 }
4519
4520 /* Schedule work on any of the dpc-workqueues */
4521 void
4522 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4523 {
4524         struct qla_hw_data *ha = base_vha->hw;
4525
4526         switch (work_code) {
4527         case MBA_IDC_AEN: /* 0x8200 */
4528                 if (ha->dpc_lp_wq)
4529                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4530                 break;
4531
4532         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4533                 if (!ha->flags.nic_core_reset_hdlr_active) {
4534                         if (ha->dpc_hp_wq)
4535                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4536                 } else
4537                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4538                             "NIC Core reset is already active. Skip "
4539                             "scheduling it again.\n");
4540                 break;
4541         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4542                 if (ha->dpc_hp_wq)
4543                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4544                 break;
4545         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4546                 if (ha->dpc_hp_wq)
4547                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4548                 break;
4549         default:
4550                 ql_log(ql_log_warn, base_vha, 0xb05f,
4551                     "Unknown work-code=0x%x.\n", work_code);
4552         }
4553
4554         return;
4555 }
4556
4557 /* Work: Perform NIC Core Unrecoverable state handling */
4558 void
4559 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4560 {
4561         struct qla_hw_data *ha =
4562                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4563         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4564         uint32_t dev_state = 0;
4565
4566         qla83xx_idc_lock(base_vha, 0);
4567         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4568         qla83xx_reset_ownership(base_vha);
4569         if (ha->flags.nic_core_reset_owner) {
4570                 ha->flags.nic_core_reset_owner = 0;
4571                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4572                     QLA8XXX_DEV_FAILED);
4573                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4574                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4575         }
4576         qla83xx_idc_unlock(base_vha, 0);
4577 }
4578
4579 /* Work: Execute IDC state handler */
4580 void
4581 qla83xx_idc_state_handler_work(struct work_struct *work)
4582 {
4583         struct qla_hw_data *ha =
4584                 container_of(work, struct qla_hw_data, idc_state_handler);
4585         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4586         uint32_t dev_state = 0;
4587
4588         qla83xx_idc_lock(base_vha, 0);
4589         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4590         if (dev_state == QLA8XXX_DEV_FAILED ||
4591                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4592                 qla83xx_idc_state_handler(base_vha);
4593         qla83xx_idc_unlock(base_vha, 0);
4594 }
4595
4596 static int
4597 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4598 {
4599         int rval = QLA_SUCCESS;
4600         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4601         uint32_t heart_beat_counter1, heart_beat_counter2;
4602
4603         do {
4604                 if (time_after(jiffies, heart_beat_wait)) {
4605                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4606                             "Nic Core f/w is not alive.\n");
4607                         rval = QLA_FUNCTION_FAILED;
4608                         break;
4609                 }
4610
4611                 qla83xx_idc_lock(base_vha, 0);
4612                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4613                     &heart_beat_counter1);
4614                 qla83xx_idc_unlock(base_vha, 0);
4615                 msleep(100);
4616                 qla83xx_idc_lock(base_vha, 0);
4617                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4618                     &heart_beat_counter2);
4619                 qla83xx_idc_unlock(base_vha, 0);
4620         } while (heart_beat_counter1 == heart_beat_counter2);
4621
4622         return rval;
4623 }
4624
4625 /* Work: Perform NIC Core Reset handling */
4626 void
4627 qla83xx_nic_core_reset_work(struct work_struct *work)
4628 {
4629         struct qla_hw_data *ha =
4630                 container_of(work, struct qla_hw_data, nic_core_reset);
4631         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4632         uint32_t dev_state = 0;
4633
4634         if (IS_QLA2031(ha)) {
4635                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4636                         ql_log(ql_log_warn, base_vha, 0xb081,
4637                             "Failed to dump mctp\n");
4638                 return;
4639         }
4640
4641         if (!ha->flags.nic_core_reset_hdlr_active) {
4642                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4643                         qla83xx_idc_lock(base_vha, 0);
4644                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4645                             &dev_state);
4646                         qla83xx_idc_unlock(base_vha, 0);
4647                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4648                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4649                                     "Nic Core f/w is alive.\n");
4650                                 return;
4651                         }
4652                 }
4653
4654                 ha->flags.nic_core_reset_hdlr_active = 1;
4655                 if (qla83xx_nic_core_reset(base_vha)) {
4656                         /* NIC Core reset failed. */
4657                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4658                             "NIC Core reset failed.\n");
4659                 }
4660                 ha->flags.nic_core_reset_hdlr_active = 0;
4661         }
4662 }
4663
4664 /* Work: Handle 8200 IDC aens */
4665 void
4666 qla83xx_service_idc_aen(struct work_struct *work)
4667 {
4668         struct qla_hw_data *ha =
4669                 container_of(work, struct qla_hw_data, idc_aen);
4670         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4671         uint32_t dev_state, idc_control;
4672
4673         qla83xx_idc_lock(base_vha, 0);
4674         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4675         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4676         qla83xx_idc_unlock(base_vha, 0);
4677         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4678                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4679                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4680                             "Application requested NIC Core Reset.\n");
4681                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4682                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4683                     QLA_SUCCESS) {
4684                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4685                             "Other protocol driver requested NIC Core Reset.\n");
4686                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4687                 }
4688         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4689                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4690                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4691         }
4692 }
4693
4694 static void
4695 qla83xx_wait_logic(void)
4696 {
4697         int i;
4698
4699         /* Yield CPU */
4700         if (!in_interrupt()) {
4701                 /*
4702                  * Wait about 200ms before retrying again.
4703                  * This controls the number of retries for single
4704                  * lock operation.
4705                  */
4706                 msleep(100);
4707                 schedule();
4708         } else {
4709                 for (i = 0; i < 20; i++)
4710                         cpu_relax(); /* This a nop instr on i386 */
4711         }
4712 }
4713
4714 static int
4715 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4716 {
4717         int rval;
4718         uint32_t data;
4719         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4720         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4721         struct qla_hw_data *ha = base_vha->hw;
4722         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4723             "Trying force recovery of the IDC lock.\n");
4724
4725         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4726         if (rval)
4727                 return rval;
4728
4729         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4730                 return QLA_SUCCESS;
4731         } else {
4732                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4733                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4734                     data);
4735                 if (rval)
4736                         return rval;
4737
4738                 msleep(200);
4739
4740                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4741                     &data);
4742                 if (rval)
4743                         return rval;
4744
4745                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4746                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4747                                         ~(idc_lck_rcvry_stage_mask));
4748                         rval = qla83xx_wr_reg(base_vha,
4749                             QLA83XX_IDC_LOCK_RECOVERY, data);
4750                         if (rval)
4751                                 return rval;
4752
4753                         /* Forcefully perform IDC UnLock */
4754                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4755                             &data);
4756                         if (rval)
4757                                 return rval;
4758                         /* Clear lock-id by setting 0xff */
4759                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4760                             0xff);
4761                         if (rval)
4762                                 return rval;
4763                         /* Clear lock-recovery by setting 0x0 */
4764                         rval = qla83xx_wr_reg(base_vha,
4765                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4766                         if (rval)
4767                                 return rval;
4768                 } else
4769                         return QLA_SUCCESS;
4770         }
4771
4772         return rval;
4773 }
4774
4775 static int
4776 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4777 {
4778         int rval = QLA_SUCCESS;
4779         uint32_t o_drv_lockid, n_drv_lockid;
4780         unsigned long lock_recovery_timeout;
4781
4782         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4783 retry_lockid:
4784         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4785         if (rval)
4786                 goto exit;
4787
4788         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4789         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4790                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4791                         return QLA_SUCCESS;
4792                 else
4793                         return QLA_FUNCTION_FAILED;
4794         }
4795
4796         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4797         if (rval)
4798                 goto exit;
4799
4800         if (o_drv_lockid == n_drv_lockid) {
4801                 qla83xx_wait_logic();
4802                 goto retry_lockid;
4803         } else
4804                 return QLA_SUCCESS;
4805
4806 exit:
4807         return rval;
4808 }
4809
4810 void
4811 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4812 {
4813         uint16_t options = (requester_id << 15) | BIT_6;
4814         uint32_t data;
4815         uint32_t lock_owner;
4816         struct qla_hw_data *ha = base_vha->hw;
4817
4818         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4819 retry_lock:
4820         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4821             == QLA_SUCCESS) {
4822                 if (data) {
4823                         /* Setting lock-id to our function-number */
4824                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4825                             ha->portnum);
4826                 } else {
4827                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4828                             &lock_owner);
4829                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4830                             "Failed to acquire IDC lock, acquired by %d, "
4831                             "retrying...\n", lock_owner);
4832
4833                         /* Retry/Perform IDC-Lock recovery */
4834                         if (qla83xx_idc_lock_recovery(base_vha)
4835                             == QLA_SUCCESS) {
4836                                 qla83xx_wait_logic();
4837                                 goto retry_lock;
4838                         } else
4839                                 ql_log(ql_log_warn, base_vha, 0xb075,
4840                                     "IDC Lock recovery FAILED.\n");
4841                 }
4842
4843         }
4844
4845         return;
4846
4847         /* XXX: IDC-lock implementation using access-control mbx */
4848 retry_lock2:
4849         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4850                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4851                     "Failed to acquire IDC lock. retrying...\n");
4852                 /* Retry/Perform IDC-Lock recovery */
4853                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4854                         qla83xx_wait_logic();
4855                         goto retry_lock2;
4856                 } else
4857                         ql_log(ql_log_warn, base_vha, 0xb076,
4858                             "IDC Lock recovery FAILED.\n");
4859         }
4860
4861         return;
4862 }
4863
4864 void
4865 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4866 {
4867 #if 0
4868         uint16_t options = (requester_id << 15) | BIT_7;
4869 #endif
4870         uint16_t retry;
4871         uint32_t data;
4872         struct qla_hw_data *ha = base_vha->hw;
4873
4874         /* IDC-unlock implementation using driver-unlock/lock-id
4875          * remote registers
4876          */
4877         retry = 0;
4878 retry_unlock:
4879         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4880             == QLA_SUCCESS) {
4881                 if (data == ha->portnum) {
4882                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4883                         /* Clearing lock-id by setting 0xff */
4884                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4885                 } else if (retry < 10) {
4886                         /* SV: XXX: IDC unlock retrying needed here? */
4887
4888                         /* Retry for IDC-unlock */
4889                         qla83xx_wait_logic();
4890                         retry++;
4891                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4892                             "Failed to release IDC lock, retrying=%d\n", retry);
4893                         goto retry_unlock;
4894                 }
4895         } else if (retry < 10) {
4896                 /* Retry for IDC-unlock */
4897                 qla83xx_wait_logic();
4898                 retry++;
4899                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4900                     "Failed to read drv-lockid, retrying=%d\n", retry);
4901                 goto retry_unlock;
4902         }
4903
4904         return;
4905
4906 #if 0
4907         /* XXX: IDC-unlock implementation using access-control mbx */
4908         retry = 0;
4909 retry_unlock2:
4910         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4911                 if (retry < 10) {
4912                         /* Retry for IDC-unlock */
4913                         qla83xx_wait_logic();
4914                         retry++;
4915                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4916                             "Failed to release IDC lock, retrying=%d\n", retry);
4917                         goto retry_unlock2;
4918                 }
4919         }
4920
4921         return;
4922 #endif
4923 }
4924
4925 int
4926 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4927 {
4928         int rval = QLA_SUCCESS;
4929         struct qla_hw_data *ha = vha->hw;
4930         uint32_t drv_presence;
4931
4932         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4933         if (rval == QLA_SUCCESS) {
4934                 drv_presence |= (1 << ha->portnum);
4935                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4936                     drv_presence);
4937         }
4938
4939         return rval;
4940 }
4941
4942 int
4943 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4944 {
4945         int rval = QLA_SUCCESS;
4946
4947         qla83xx_idc_lock(vha, 0);
4948         rval = __qla83xx_set_drv_presence(vha);
4949         qla83xx_idc_unlock(vha, 0);
4950
4951         return rval;
4952 }
4953
4954 int
4955 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4956 {
4957         int rval = QLA_SUCCESS;
4958         struct qla_hw_data *ha = vha->hw;
4959         uint32_t drv_presence;
4960
4961         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4962         if (rval == QLA_SUCCESS) {
4963                 drv_presence &= ~(1 << ha->portnum);
4964                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4965                     drv_presence);
4966         }
4967
4968         return rval;
4969 }
4970
4971 int
4972 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4973 {
4974         int rval = QLA_SUCCESS;
4975
4976         qla83xx_idc_lock(vha, 0);
4977         rval = __qla83xx_clear_drv_presence(vha);
4978         qla83xx_idc_unlock(vha, 0);
4979
4980         return rval;
4981 }
4982
4983 static void
4984 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4985 {
4986         struct qla_hw_data *ha = vha->hw;
4987         uint32_t drv_ack, drv_presence;
4988         unsigned long ack_timeout;
4989
4990         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4991         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4992         while (1) {
4993                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4994                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4995                 if ((drv_ack & drv_presence) == drv_presence)
4996                         break;
4997
4998                 if (time_after_eq(jiffies, ack_timeout)) {
4999                         ql_log(ql_log_warn, vha, 0xb067,
5000                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5001                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5002                         /*
5003                          * The function(s) which did not ack in time are forced
5004                          * to withdraw any further participation in the IDC
5005                          * reset.
5006                          */
5007                         if (drv_ack != drv_presence)
5008                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5009                                     drv_ack);
5010                         break;
5011                 }
5012
5013                 qla83xx_idc_unlock(vha, 0);
5014                 msleep(1000);
5015                 qla83xx_idc_lock(vha, 0);
5016         }
5017
5018         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5019         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5020 }
5021
5022 static int
5023 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5024 {
5025         int rval = QLA_SUCCESS;
5026         uint32_t idc_control;
5027
5028         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5029         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5030
5031         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5032         __qla83xx_get_idc_control(vha, &idc_control);
5033         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5034         __qla83xx_set_idc_control(vha, 0);
5035
5036         qla83xx_idc_unlock(vha, 0);
5037         rval = qla83xx_restart_nic_firmware(vha);
5038         qla83xx_idc_lock(vha, 0);
5039
5040         if (rval != QLA_SUCCESS) {
5041                 ql_log(ql_log_fatal, vha, 0xb06a,
5042                     "Failed to restart NIC f/w.\n");
5043                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5044                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5045         } else {
5046                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5047                     "Success in restarting nic f/w.\n");
5048                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5049                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5050         }
5051
5052         return rval;
5053 }
5054
5055 /* Assumes idc_lock always held on entry */
5056 int
5057 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5058 {
5059         struct qla_hw_data *ha = base_vha->hw;
5060         int rval = QLA_SUCCESS;
5061         unsigned long dev_init_timeout;
5062         uint32_t dev_state;
5063
5064         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5065         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5066
5067         while (1) {
5068
5069                 if (time_after_eq(jiffies, dev_init_timeout)) {
5070                         ql_log(ql_log_warn, base_vha, 0xb06e,
5071                             "Initialization TIMEOUT!\n");
5072                         /* Init timeout. Disable further NIC Core
5073                          * communication.
5074                          */
5075                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5076                                 QLA8XXX_DEV_FAILED);
5077                         ql_log(ql_log_info, base_vha, 0xb06f,
5078                             "HW State: FAILED.\n");
5079                 }
5080
5081                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5082                 switch (dev_state) {
5083                 case QLA8XXX_DEV_READY:
5084                         if (ha->flags.nic_core_reset_owner)
5085                                 qla83xx_idc_audit(base_vha,
5086                                     IDC_AUDIT_COMPLETION);
5087                         ha->flags.nic_core_reset_owner = 0;
5088                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5089                             "Reset_owner reset by 0x%x.\n",
5090                             ha->portnum);
5091                         goto exit;
5092                 case QLA8XXX_DEV_COLD:
5093                         if (ha->flags.nic_core_reset_owner)
5094                                 rval = qla83xx_device_bootstrap(base_vha);
5095                         else {
5096                         /* Wait for AEN to change device-state */
5097                                 qla83xx_idc_unlock(base_vha, 0);
5098                                 msleep(1000);
5099                                 qla83xx_idc_lock(base_vha, 0);
5100                         }
5101                         break;
5102                 case QLA8XXX_DEV_INITIALIZING:
5103                         /* Wait for AEN to change device-state */
5104                         qla83xx_idc_unlock(base_vha, 0);
5105                         msleep(1000);
5106                         qla83xx_idc_lock(base_vha, 0);
5107                         break;
5108                 case QLA8XXX_DEV_NEED_RESET:
5109                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
5110                                 qla83xx_need_reset_handler(base_vha);
5111                         else {
5112                                 /* Wait for AEN to change device-state */
5113                                 qla83xx_idc_unlock(base_vha, 0);
5114                                 msleep(1000);
5115                                 qla83xx_idc_lock(base_vha, 0);
5116                         }
5117                         /* reset timeout value after need reset handler */
5118                         dev_init_timeout = jiffies +
5119                             (ha->fcoe_dev_init_timeout * HZ);
5120                         break;
5121                 case QLA8XXX_DEV_NEED_QUIESCENT:
5122                         /* XXX: DEBUG for now */
5123                         qla83xx_idc_unlock(base_vha, 0);
5124                         msleep(1000);
5125                         qla83xx_idc_lock(base_vha, 0);
5126                         break;
5127                 case QLA8XXX_DEV_QUIESCENT:
5128                         /* XXX: DEBUG for now */
5129                         if (ha->flags.quiesce_owner)
5130                                 goto exit;
5131
5132                         qla83xx_idc_unlock(base_vha, 0);
5133                         msleep(1000);
5134                         qla83xx_idc_lock(base_vha, 0);
5135                         dev_init_timeout = jiffies +
5136                             (ha->fcoe_dev_init_timeout * HZ);
5137                         break;
5138                 case QLA8XXX_DEV_FAILED:
5139                         if (ha->flags.nic_core_reset_owner)
5140                                 qla83xx_idc_audit(base_vha,
5141                                     IDC_AUDIT_COMPLETION);
5142                         ha->flags.nic_core_reset_owner = 0;
5143                         __qla83xx_clear_drv_presence(base_vha);
5144                         qla83xx_idc_unlock(base_vha, 0);
5145                         qla8xxx_dev_failed_handler(base_vha);
5146                         rval = QLA_FUNCTION_FAILED;
5147                         qla83xx_idc_lock(base_vha, 0);
5148                         goto exit;
5149                 case QLA8XXX_BAD_VALUE:
5150                         qla83xx_idc_unlock(base_vha, 0);
5151                         msleep(1000);
5152                         qla83xx_idc_lock(base_vha, 0);
5153                         break;
5154                 default:
5155                         ql_log(ql_log_warn, base_vha, 0xb071,
5156                             "Unknown Device State: %x.\n", dev_state);
5157                         qla83xx_idc_unlock(base_vha, 0);
5158                         qla8xxx_dev_failed_handler(base_vha);
5159                         rval = QLA_FUNCTION_FAILED;
5160                         qla83xx_idc_lock(base_vha, 0);
5161                         goto exit;
5162                 }
5163         }
5164
5165 exit:
5166         return rval;
5167 }
5168
5169 void
5170 qla2x00_disable_board_on_pci_error(struct work_struct *work)
5171 {
5172         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
5173             board_disable);
5174         struct pci_dev *pdev = ha->pdev;
5175         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5176
5177         /* if UNLOAD flag is already set, then continue unload,
5178          * where it was set first.
5179          */
5180         if (test_bit(UNLOADING, &base_vha->dpc_flags))
5181                 return;
5182
5183         ql_log(ql_log_warn, base_vha, 0x015b,
5184             "Disabling adapter.\n");
5185
5186         set_bit(UNLOADING, &base_vha->dpc_flags);
5187
5188         qla2x00_delete_all_vps(ha, base_vha);
5189
5190         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5191
5192         qla2x00_dfs_remove(base_vha);
5193
5194         qla84xx_put_chip(base_vha);
5195
5196         if (base_vha->timer_active)
5197                 qla2x00_stop_timer(base_vha);
5198
5199         base_vha->flags.online = 0;
5200
5201         qla2x00_destroy_deferred_work(ha);
5202
5203         /*
5204          * Do not try to stop beacon blink as it will issue a mailbox
5205          * command.
5206          */
5207         qla2x00_free_sysfs_attr(base_vha, false);
5208
5209         fc_remove_host(base_vha->host);
5210
5211         scsi_remove_host(base_vha->host);
5212
5213         base_vha->flags.init_done = 0;
5214         qla25xx_delete_queues(base_vha);
5215         qla2x00_free_fcports(base_vha);
5216         qla2x00_free_irqs(base_vha);
5217         qla2x00_mem_free(ha);
5218         qla82xx_md_free(base_vha);
5219         qla2x00_free_queues(ha);
5220
5221         qla2x00_unmap_iobases(ha);
5222
5223         pci_release_selected_regions(ha->pdev, ha->bars);
5224         pci_disable_pcie_error_reporting(pdev);
5225         pci_disable_device(pdev);
5226
5227         /*
5228          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
5229          */
5230 }
5231
5232 /**************************************************************************
5233 * qla2x00_do_dpc
5234 *   This kernel thread is a task that is schedule by the interrupt handler
5235 *   to perform the background processing for interrupts.
5236 *
5237 * Notes:
5238 * This task always run in the context of a kernel thread.  It
5239 * is kick-off by the driver's detect code and starts up
5240 * up one per adapter. It immediately goes to sleep and waits for
5241 * some fibre event.  When either the interrupt handler or
5242 * the timer routine detects a event it will one of the task
5243 * bits then wake us up.
5244 **************************************************************************/
5245 static int
5246 qla2x00_do_dpc(void *data)
5247 {
5248         scsi_qla_host_t *base_vha;
5249         struct qla_hw_data *ha;
5250         uint32_t online;
5251         struct qla_qpair *qpair;
5252
5253         ha = (struct qla_hw_data *)data;
5254         base_vha = pci_get_drvdata(ha->pdev);
5255
5256         set_user_nice(current, MIN_NICE);
5257
5258         set_current_state(TASK_INTERRUPTIBLE);
5259         while (!kthread_should_stop()) {
5260                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
5261                     "DPC handler sleeping.\n");
5262
5263                 schedule();
5264
5265                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
5266                         goto end_loop;
5267
5268                 if (ha->flags.eeh_busy) {
5269                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
5270                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
5271                         goto end_loop;
5272                 }
5273
5274                 ha->dpc_active = 1;
5275
5276                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
5277                     "DPC handler waking up, dpc_flags=0x%lx.\n",
5278                     base_vha->dpc_flags);
5279
5280                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
5281                         break;
5282
5283                 qla2x00_do_work(base_vha);
5284
5285                 if (IS_P3P_TYPE(ha)) {
5286                         if (IS_QLA8044(ha)) {
5287                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5288                                         &base_vha->dpc_flags)) {
5289                                         qla8044_idc_lock(ha);
5290                                         qla8044_wr_direct(base_vha,
5291                                                 QLA8044_CRB_DEV_STATE_INDEX,
5292                                                 QLA8XXX_DEV_FAILED);
5293                                         qla8044_idc_unlock(ha);
5294                                         ql_log(ql_log_info, base_vha, 0x4004,
5295                                                 "HW State: FAILED.\n");
5296                                         qla8044_device_state_handler(base_vha);
5297                                         continue;
5298                                 }
5299
5300                         } else {
5301                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
5302                                         &base_vha->dpc_flags)) {
5303                                         qla82xx_idc_lock(ha);
5304                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5305                                                 QLA8XXX_DEV_FAILED);
5306                                         qla82xx_idc_unlock(ha);
5307                                         ql_log(ql_log_info, base_vha, 0x0151,
5308                                                 "HW State: FAILED.\n");
5309                                         qla82xx_device_state_handler(base_vha);
5310                                         continue;
5311                                 }
5312                         }
5313
5314                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
5315                                 &base_vha->dpc_flags)) {
5316
5317                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
5318                                     "FCoE context reset scheduled.\n");
5319                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5320                                         &base_vha->dpc_flags))) {
5321                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
5322                                                 /* FCoE-ctx reset failed.
5323                                                  * Escalate to chip-reset
5324                                                  */
5325                                                 set_bit(ISP_ABORT_NEEDED,
5326                                                         &base_vha->dpc_flags);
5327                                         }
5328                                         clear_bit(ABORT_ISP_ACTIVE,
5329                                                 &base_vha->dpc_flags);
5330                                 }
5331
5332                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
5333                                     "FCoE context reset end.\n");
5334                         }
5335                 } else if (IS_QLAFX00(ha)) {
5336                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
5337                                 &base_vha->dpc_flags)) {
5338                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
5339                                     "Firmware Reset Recovery\n");
5340                                 if (qlafx00_reset_initialize(base_vha)) {
5341                                         /* Failed. Abort isp later. */
5342                                         if (!test_bit(UNLOADING,
5343                                             &base_vha->dpc_flags)) {
5344                                                 set_bit(ISP_UNRECOVERABLE,
5345                                                     &base_vha->dpc_flags);
5346                                                 ql_dbg(ql_dbg_dpc, base_vha,
5347                                                     0x4021,
5348                                                     "Reset Recovery Failed\n");
5349                                         }
5350                                 }
5351                         }
5352
5353                         if (test_and_clear_bit(FX00_TARGET_SCAN,
5354                                 &base_vha->dpc_flags)) {
5355                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
5356                                     "ISPFx00 Target Scan scheduled\n");
5357                                 if (qlafx00_rescan_isp(base_vha)) {
5358                                         if (!test_bit(UNLOADING,
5359                                             &base_vha->dpc_flags))
5360                                                 set_bit(ISP_UNRECOVERABLE,
5361                                                     &base_vha->dpc_flags);
5362                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
5363                                             "ISPFx00 Target Scan Failed\n");
5364                                 }
5365                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
5366                                     "ISPFx00 Target Scan End\n");
5367                         }
5368                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
5369                                 &base_vha->dpc_flags)) {
5370                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
5371                                     "ISPFx00 Host Info resend scheduled\n");
5372                                 qlafx00_fx_disc(base_vha,
5373                                     &base_vha->hw->mr.fcport,
5374                                     FXDISC_REG_HOST_INFO);
5375                         }
5376                 }
5377
5378                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
5379                                                 &base_vha->dpc_flags)) {
5380
5381                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
5382                             "ISP abort scheduled.\n");
5383                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
5384                             &base_vha->dpc_flags))) {
5385
5386                                 if (ha->isp_ops->abort_isp(base_vha)) {
5387                                         /* failed. retry later */
5388                                         set_bit(ISP_ABORT_NEEDED,
5389                                             &base_vha->dpc_flags);
5390                                 }
5391                                 clear_bit(ABORT_ISP_ACTIVE,
5392                                                 &base_vha->dpc_flags);
5393                         }
5394
5395                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
5396                             "ISP abort end.\n");
5397                 }
5398
5399                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
5400                     &base_vha->dpc_flags)) {
5401                         qla2x00_update_fcports(base_vha);
5402                 }
5403
5404                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
5405                         int ret;
5406                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
5407                         if (ret != QLA_SUCCESS)
5408                                 ql_log(ql_log_warn, base_vha, 0x121,
5409                                     "Failed to enable receiving of RSCN "
5410                                     "requests: 0x%x.\n", ret);
5411                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
5412                 }
5413
5414                 if (IS_QLAFX00(ha))
5415                         goto loop_resync_check;
5416
5417                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5418                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5419                             "Quiescence mode scheduled.\n");
5420                         if (IS_P3P_TYPE(ha)) {
5421                                 if (IS_QLA82XX(ha))
5422                                         qla82xx_device_state_handler(base_vha);
5423                                 if (IS_QLA8044(ha))
5424                                         qla8044_device_state_handler(base_vha);
5425                                 clear_bit(ISP_QUIESCE_NEEDED,
5426                                     &base_vha->dpc_flags);
5427                                 if (!ha->flags.quiesce_owner) {
5428                                         qla2x00_perform_loop_resync(base_vha);
5429                                         if (IS_QLA82XX(ha)) {
5430                                                 qla82xx_idc_lock(ha);
5431                                                 qla82xx_clear_qsnt_ready(
5432                                                     base_vha);
5433                                                 qla82xx_idc_unlock(ha);
5434                                         } else if (IS_QLA8044(ha)) {
5435                                                 qla8044_idc_lock(ha);
5436                                                 qla8044_clear_qsnt_ready(
5437                                                     base_vha);
5438                                                 qla8044_idc_unlock(ha);
5439                                         }
5440                                 }
5441                         } else {
5442                                 clear_bit(ISP_QUIESCE_NEEDED,
5443                                     &base_vha->dpc_flags);
5444                                 qla2x00_quiesce_io(base_vha);
5445                         }
5446                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5447                             "Quiescence mode end.\n");
5448                 }
5449
5450                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5451                                 &base_vha->dpc_flags) &&
5452                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5453
5454                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5455                             "Reset marker scheduled.\n");
5456                         qla2x00_rst_aen(base_vha);
5457                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5458                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5459                             "Reset marker end.\n");
5460                 }
5461
5462                 /* Retry each device up to login retry count */
5463                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5464                                                 &base_vha->dpc_flags)) &&
5465                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5466                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5467
5468                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5469                             "Relogin scheduled.\n");
5470                         qla2x00_relogin(base_vha);
5471                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5472                             "Relogin end.\n");
5473                 }
5474 loop_resync_check:
5475                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5476                     &base_vha->dpc_flags)) {
5477
5478                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5479                             "Loop resync scheduled.\n");
5480
5481                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5482                             &base_vha->dpc_flags))) {
5483
5484                                 qla2x00_loop_resync(base_vha);
5485
5486                                 clear_bit(LOOP_RESYNC_ACTIVE,
5487                                                 &base_vha->dpc_flags);
5488                         }
5489
5490                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5491                             "Loop resync end.\n");
5492                 }
5493
5494                 if (IS_QLAFX00(ha))
5495                         goto intr_on_check;
5496
5497                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5498                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5499                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5500                         qla2xxx_flash_npiv_conf(base_vha);
5501                 }
5502
5503 intr_on_check:
5504                 if (!ha->interrupts_on)
5505                         ha->isp_ops->enable_intrs(ha);
5506
5507                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5508                                         &base_vha->dpc_flags)) {
5509                         if (ha->beacon_blink_led == 1)
5510                                 ha->isp_ops->beacon_blink(base_vha);
5511                 }
5512
5513                 /* qpair online check */
5514                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
5515                     &base_vha->dpc_flags)) {
5516                         if (ha->flags.eeh_busy ||
5517                             ha->flags.pci_channel_io_perm_failure)
5518                                 online = 0;
5519                         else
5520                                 online = 1;
5521
5522                         mutex_lock(&ha->mq_lock);
5523                         list_for_each_entry(qpair, &base_vha->qp_list,
5524                             qp_list_elem)
5525                         qpair->online = online;
5526                         mutex_unlock(&ha->mq_lock);
5527                 }
5528
5529                 if (!IS_QLAFX00(ha))
5530                         qla2x00_do_dpc_all_vps(base_vha);
5531
5532                 ha->dpc_active = 0;
5533 end_loop:
5534                 set_current_state(TASK_INTERRUPTIBLE);
5535         } /* End of while(1) */
5536         __set_current_state(TASK_RUNNING);
5537
5538         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5539             "DPC handler exiting.\n");
5540
5541         /*
5542          * Make sure that nobody tries to wake us up again.
5543          */
5544         ha->dpc_active = 0;
5545
5546         /* Cleanup any residual CTX SRBs. */
5547         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5548
5549         return 0;
5550 }
5551
5552 void
5553 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5554 {
5555         struct qla_hw_data *ha = vha->hw;
5556         struct task_struct *t = ha->dpc_thread;
5557
5558         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5559                 wake_up_process(t);
5560 }
5561
5562 /*
5563 *  qla2x00_rst_aen
5564 *      Processes asynchronous reset.
5565 *
5566 * Input:
5567 *      ha  = adapter block pointer.
5568 */
5569 static void
5570 qla2x00_rst_aen(scsi_qla_host_t *vha)
5571 {
5572         if (vha->flags.online && !vha->flags.reset_active &&
5573             !atomic_read(&vha->loop_down_timer) &&
5574             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5575                 do {
5576                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5577
5578                         /*
5579                          * Issue marker command only when we are going to start
5580                          * the I/O.
5581                          */
5582                         vha->marker_needed = 1;
5583                 } while (!atomic_read(&vha->loop_down_timer) &&
5584                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5585         }
5586 }
5587
5588 /**************************************************************************
5589 *   qla2x00_timer
5590 *
5591 * Description:
5592 *   One second timer
5593 *
5594 * Context: Interrupt
5595 ***************************************************************************/
5596 void
5597 qla2x00_timer(scsi_qla_host_t *vha)
5598 {
5599         unsigned long   cpu_flags = 0;
5600         int             start_dpc = 0;
5601         int             index;
5602         srb_t           *sp;
5603         uint16_t        w;
5604         struct qla_hw_data *ha = vha->hw;
5605         struct req_que *req;
5606
5607         if (ha->flags.eeh_busy) {
5608                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5609                     "EEH = %d, restarting timer.\n",
5610                     ha->flags.eeh_busy);
5611                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5612                 return;
5613         }
5614
5615         /*
5616          * Hardware read to raise pending EEH errors during mailbox waits. If
5617          * the read returns -1 then disable the board.
5618          */
5619         if (!pci_channel_offline(ha->pdev)) {
5620                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5621                 qla2x00_check_reg16_for_disconnect(vha, w);
5622         }
5623
5624         /* Make sure qla82xx_watchdog is run only for physical port */
5625         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5626                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5627                         start_dpc++;
5628                 if (IS_QLA82XX(ha))
5629                         qla82xx_watchdog(vha);
5630                 else if (IS_QLA8044(ha))
5631                         qla8044_watchdog(vha);
5632         }
5633
5634         if (!vha->vp_idx && IS_QLAFX00(ha))
5635                 qlafx00_timer_routine(vha);
5636
5637         /* Loop down handler. */
5638         if (atomic_read(&vha->loop_down_timer) > 0 &&
5639             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5640             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5641                 && vha->flags.online) {
5642
5643                 if (atomic_read(&vha->loop_down_timer) ==
5644                     vha->loop_down_abort_time) {
5645
5646                         ql_log(ql_log_info, vha, 0x6008,
5647                             "Loop down - aborting the queues before time expires.\n");
5648
5649                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5650                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5651
5652                         /*
5653                          * Schedule an ISP abort to return any FCP2-device
5654                          * commands.
5655                          */
5656                         /* NPIV - scan physical port only */
5657                         if (!vha->vp_idx) {
5658                                 spin_lock_irqsave(&ha->hardware_lock,
5659                                     cpu_flags);
5660                                 req = ha->req_q_map[0];
5661                                 for (index = 1;
5662                                     index < req->num_outstanding_cmds;
5663                                     index++) {
5664                                         fc_port_t *sfcp;
5665
5666                                         sp = req->outstanding_cmds[index];
5667                                         if (!sp)
5668                                                 continue;
5669                                         if (sp->type != SRB_SCSI_CMD)
5670                                                 continue;
5671                                         sfcp = sp->fcport;
5672                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5673                                                 continue;
5674
5675                                         if (IS_QLA82XX(ha))
5676                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5677                                                         &vha->dpc_flags);
5678                                         else
5679                                                 set_bit(ISP_ABORT_NEEDED,
5680                                                         &vha->dpc_flags);
5681                                         break;
5682                                 }
5683                                 spin_unlock_irqrestore(&ha->hardware_lock,
5684                                                                 cpu_flags);
5685                         }
5686                         start_dpc++;
5687                 }
5688
5689                 /* if the loop has been down for 4 minutes, reinit adapter */
5690                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5691                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5692                                 ql_log(ql_log_warn, vha, 0x6009,
5693                                     "Loop down - aborting ISP.\n");
5694
5695                                 if (IS_QLA82XX(ha))
5696                                         set_bit(FCOE_CTX_RESET_NEEDED,
5697                                                 &vha->dpc_flags);
5698                                 else
5699                                         set_bit(ISP_ABORT_NEEDED,
5700                                                 &vha->dpc_flags);
5701                         }
5702                 }
5703                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5704                     "Loop down - seconds remaining %d.\n",
5705                     atomic_read(&vha->loop_down_timer));
5706         }
5707         /* Check if beacon LED needs to be blinked for physical host only */
5708         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5709                 /* There is no beacon_blink function for ISP82xx */
5710                 if (!IS_P3P_TYPE(ha)) {
5711                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5712                         start_dpc++;
5713                 }
5714         }
5715
5716         /* Process any deferred work. */
5717         if (!list_empty(&vha->work_list))
5718                 start_dpc++;
5719
5720         /* Schedule the DPC routine if needed */
5721         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5722             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5723             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5724             start_dpc ||
5725             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5726             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5727             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5728             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5729             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5730             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5731                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5732                     "isp_abort_needed=%d loop_resync_needed=%d "
5733                     "fcport_update_needed=%d start_dpc=%d "
5734                     "reset_marker_needed=%d",
5735                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5736                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5737                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5738                     start_dpc,
5739                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5740                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5741                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5742                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5743                     "relogin_needed=%d.\n",
5744                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5745                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5746                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5747                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5748                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5749                 qla2xxx_wake_dpc(vha);
5750         }
5751
5752         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5753 }
5754
5755 /* Firmware interface routines. */
5756
5757 #define FW_BLOBS        11
5758 #define FW_ISP21XX      0
5759 #define FW_ISP22XX      1
5760 #define FW_ISP2300      2
5761 #define FW_ISP2322      3
5762 #define FW_ISP24XX      4
5763 #define FW_ISP25XX      5
5764 #define FW_ISP81XX      6
5765 #define FW_ISP82XX      7
5766 #define FW_ISP2031      8
5767 #define FW_ISP8031      9
5768 #define FW_ISP27XX      10
5769
5770 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5771 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5772 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5773 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5774 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5775 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5776 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5777 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5778 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5779 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5780 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5781
5782
5783 static DEFINE_MUTEX(qla_fw_lock);
5784
5785 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5786         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5787         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5788         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5789         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5790         { .name = FW_FILE_ISP24XX, },
5791         { .name = FW_FILE_ISP25XX, },
5792         { .name = FW_FILE_ISP81XX, },
5793         { .name = FW_FILE_ISP82XX, },
5794         { .name = FW_FILE_ISP2031, },
5795         { .name = FW_FILE_ISP8031, },
5796         { .name = FW_FILE_ISP27XX, },
5797 };
5798
5799 struct fw_blob *
5800 qla2x00_request_firmware(scsi_qla_host_t *vha)
5801 {
5802         struct qla_hw_data *ha = vha->hw;
5803         struct fw_blob *blob;
5804
5805         if (IS_QLA2100(ha)) {
5806                 blob = &qla_fw_blobs[FW_ISP21XX];
5807         } else if (IS_QLA2200(ha)) {
5808                 blob = &qla_fw_blobs[FW_ISP22XX];
5809         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5810                 blob = &qla_fw_blobs[FW_ISP2300];
5811         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5812                 blob = &qla_fw_blobs[FW_ISP2322];
5813         } else if (IS_QLA24XX_TYPE(ha)) {
5814                 blob = &qla_fw_blobs[FW_ISP24XX];
5815         } else if (IS_QLA25XX(ha)) {
5816                 blob = &qla_fw_blobs[FW_ISP25XX];
5817         } else if (IS_QLA81XX(ha)) {
5818                 blob = &qla_fw_blobs[FW_ISP81XX];
5819         } else if (IS_QLA82XX(ha)) {
5820                 blob = &qla_fw_blobs[FW_ISP82XX];
5821         } else if (IS_QLA2031(ha)) {
5822                 blob = &qla_fw_blobs[FW_ISP2031];
5823         } else if (IS_QLA8031(ha)) {
5824                 blob = &qla_fw_blobs[FW_ISP8031];
5825         } else if (IS_QLA27XX(ha)) {
5826                 blob = &qla_fw_blobs[FW_ISP27XX];
5827         } else {
5828                 return NULL;
5829         }
5830
5831         mutex_lock(&qla_fw_lock);
5832         if (blob->fw)
5833                 goto out;
5834
5835         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5836                 ql_log(ql_log_warn, vha, 0x0063,
5837                     "Failed to load firmware image (%s).\n", blob->name);
5838                 blob->fw = NULL;
5839                 blob = NULL;
5840                 goto out;
5841         }
5842
5843 out:
5844         mutex_unlock(&qla_fw_lock);
5845         return blob;
5846 }
5847
5848 static void
5849 qla2x00_release_firmware(void)
5850 {
5851         int idx;
5852
5853         mutex_lock(&qla_fw_lock);
5854         for (idx = 0; idx < FW_BLOBS; idx++)
5855                 release_firmware(qla_fw_blobs[idx].fw);
5856         mutex_unlock(&qla_fw_lock);
5857 }
5858
5859 static pci_ers_result_t
5860 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5861 {
5862         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5863         struct qla_hw_data *ha = vha->hw;
5864
5865         ql_dbg(ql_dbg_aer, vha, 0x9000,
5866             "PCI error detected, state %x.\n", state);
5867
5868         switch (state) {
5869         case pci_channel_io_normal:
5870                 ha->flags.eeh_busy = 0;
5871                 if (ql2xmqsupport) {
5872                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
5873                         qla2xxx_wake_dpc(vha);
5874                 }
5875                 return PCI_ERS_RESULT_CAN_RECOVER;
5876         case pci_channel_io_frozen:
5877                 ha->flags.eeh_busy = 1;
5878                 /* For ISP82XX complete any pending mailbox cmd */
5879                 if (IS_QLA82XX(ha)) {
5880                         ha->flags.isp82xx_fw_hung = 1;
5881                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5882                         qla82xx_clear_pending_mbx(vha);
5883                 }
5884                 qla2x00_free_irqs(vha);
5885                 pci_disable_device(pdev);
5886                 /* Return back all IOs */
5887                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5888                 if (ql2xmqsupport) {
5889                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
5890                         qla2xxx_wake_dpc(vha);
5891                 }
5892                 return PCI_ERS_RESULT_NEED_RESET;
5893         case pci_channel_io_perm_failure:
5894                 ha->flags.pci_channel_io_perm_failure = 1;
5895                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5896                 if (ql2xmqsupport) {
5897                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
5898                         qla2xxx_wake_dpc(vha);
5899                 }
5900                 return PCI_ERS_RESULT_DISCONNECT;
5901         }
5902         return PCI_ERS_RESULT_NEED_RESET;
5903 }
5904
5905 static pci_ers_result_t
5906 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5907 {
5908         int risc_paused = 0;
5909         uint32_t stat;
5910         unsigned long flags;
5911         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5912         struct qla_hw_data *ha = base_vha->hw;
5913         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5914         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5915
5916         if (IS_QLA82XX(ha))
5917                 return PCI_ERS_RESULT_RECOVERED;
5918
5919         spin_lock_irqsave(&ha->hardware_lock, flags);
5920         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5921                 stat = RD_REG_DWORD(&reg->hccr);
5922                 if (stat & HCCR_RISC_PAUSE)
5923                         risc_paused = 1;
5924         } else if (IS_QLA23XX(ha)) {
5925                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5926                 if (stat & HSR_RISC_PAUSED)
5927                         risc_paused = 1;
5928         } else if (IS_FWI2_CAPABLE(ha)) {
5929                 stat = RD_REG_DWORD(&reg24->host_status);
5930                 if (stat & HSRX_RISC_PAUSED)
5931                         risc_paused = 1;
5932         }
5933         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5934
5935         if (risc_paused) {
5936                 ql_log(ql_log_info, base_vha, 0x9003,
5937                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5938                 ha->isp_ops->fw_dump(base_vha, 0);
5939
5940                 return PCI_ERS_RESULT_NEED_RESET;
5941         } else
5942                 return PCI_ERS_RESULT_RECOVERED;
5943 }
5944
5945 static uint32_t
5946 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5947 {
5948         uint32_t rval = QLA_FUNCTION_FAILED;
5949         uint32_t drv_active = 0;
5950         struct qla_hw_data *ha = base_vha->hw;
5951         int fn;
5952         struct pci_dev *other_pdev = NULL;
5953
5954         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5955             "Entered %s.\n", __func__);
5956
5957         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5958
5959         if (base_vha->flags.online) {
5960                 /* Abort all outstanding commands,
5961                  * so as to be requeued later */
5962                 qla2x00_abort_isp_cleanup(base_vha);
5963         }
5964
5965
5966         fn = PCI_FUNC(ha->pdev->devfn);
5967         while (fn > 0) {
5968                 fn--;
5969                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5970                     "Finding pci device at function = 0x%x.\n", fn);
5971                 other_pdev =
5972                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5973                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5974                     fn));
5975
5976                 if (!other_pdev)
5977                         continue;
5978                 if (atomic_read(&other_pdev->enable_cnt)) {
5979                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5980                             "Found PCI func available and enable at 0x%x.\n",
5981                             fn);
5982                         pci_dev_put(other_pdev);
5983                         break;
5984                 }
5985                 pci_dev_put(other_pdev);
5986         }
5987
5988         if (!fn) {
5989                 /* Reset owner */
5990                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5991                     "This devfn is reset owner = 0x%x.\n",
5992                     ha->pdev->devfn);
5993                 qla82xx_idc_lock(ha);
5994
5995                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5996                     QLA8XXX_DEV_INITIALIZING);
5997
5998                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5999                     QLA82XX_IDC_VERSION);
6000
6001                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
6002                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
6003                     "drv_active = 0x%x.\n", drv_active);
6004
6005                 qla82xx_idc_unlock(ha);
6006                 /* Reset if device is not already reset
6007                  * drv_active would be 0 if a reset has already been done
6008                  */
6009                 if (drv_active)
6010                         rval = qla82xx_start_firmware(base_vha);
6011                 else
6012                         rval = QLA_SUCCESS;
6013                 qla82xx_idc_lock(ha);
6014
6015                 if (rval != QLA_SUCCESS) {
6016                         ql_log(ql_log_info, base_vha, 0x900b,
6017                             "HW State: FAILED.\n");
6018                         qla82xx_clear_drv_active(ha);
6019                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6020                             QLA8XXX_DEV_FAILED);
6021                 } else {
6022                         ql_log(ql_log_info, base_vha, 0x900c,
6023                             "HW State: READY.\n");
6024                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6025                             QLA8XXX_DEV_READY);
6026                         qla82xx_idc_unlock(ha);
6027                         ha->flags.isp82xx_fw_hung = 0;
6028                         rval = qla82xx_restart_isp(base_vha);
6029                         qla82xx_idc_lock(ha);
6030                         /* Clear driver state register */
6031                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
6032                         qla82xx_set_drv_active(base_vha);
6033                 }
6034                 qla82xx_idc_unlock(ha);
6035         } else {
6036                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
6037                     "This devfn is not reset owner = 0x%x.\n",
6038                     ha->pdev->devfn);
6039                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
6040                     QLA8XXX_DEV_READY)) {
6041                         ha->flags.isp82xx_fw_hung = 0;
6042                         rval = qla82xx_restart_isp(base_vha);
6043                         qla82xx_idc_lock(ha);
6044                         qla82xx_set_drv_active(base_vha);
6045                         qla82xx_idc_unlock(ha);
6046                 }
6047         }
6048         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6049
6050         return rval;
6051 }
6052
6053 static pci_ers_result_t
6054 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
6055 {
6056         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
6057         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6058         struct qla_hw_data *ha = base_vha->hw;
6059         struct rsp_que *rsp;
6060         int rc, retries = 10;
6061
6062         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
6063             "Slot Reset.\n");
6064
6065         /* Workaround: qla2xxx driver which access hardware earlier
6066          * needs error state to be pci_channel_io_online.
6067          * Otherwise mailbox command timesout.
6068          */
6069         pdev->error_state = pci_channel_io_normal;
6070
6071         pci_restore_state(pdev);
6072
6073         /* pci_restore_state() clears the saved_state flag of the device
6074          * save restored state which resets saved_state flag
6075          */
6076         pci_save_state(pdev);
6077
6078         if (ha->mem_only)
6079                 rc = pci_enable_device_mem(pdev);
6080         else
6081                 rc = pci_enable_device(pdev);
6082
6083         if (rc) {
6084                 ql_log(ql_log_warn, base_vha, 0x9005,
6085                     "Can't re-enable PCI device after reset.\n");
6086                 goto exit_slot_reset;
6087         }
6088
6089         rsp = ha->rsp_q_map[0];
6090         if (qla2x00_request_irqs(ha, rsp))
6091                 goto exit_slot_reset;
6092
6093         if (ha->isp_ops->pci_config(base_vha))
6094                 goto exit_slot_reset;
6095
6096         if (IS_QLA82XX(ha)) {
6097                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
6098                         ret = PCI_ERS_RESULT_RECOVERED;
6099                         goto exit_slot_reset;
6100                 } else
6101                         goto exit_slot_reset;
6102         }
6103
6104         while (ha->flags.mbox_busy && retries--)
6105                 msleep(1000);
6106
6107         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6108         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
6109                 ret =  PCI_ERS_RESULT_RECOVERED;
6110         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
6111
6112
6113 exit_slot_reset:
6114         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
6115             "slot_reset return %x.\n", ret);
6116
6117         return ret;
6118 }
6119
6120 static void
6121 qla2xxx_pci_resume(struct pci_dev *pdev)
6122 {
6123         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6124         struct qla_hw_data *ha = base_vha->hw;
6125         int ret;
6126
6127         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
6128             "pci_resume.\n");
6129
6130         ret = qla2x00_wait_for_hba_online(base_vha);
6131         if (ret != QLA_SUCCESS) {
6132                 ql_log(ql_log_fatal, base_vha, 0x9002,
6133                     "The device failed to resume I/O from slot/link_reset.\n");
6134         }
6135
6136         pci_cleanup_aer_uncorrect_error_status(pdev);
6137
6138         ha->flags.eeh_busy = 0;
6139 }
6140
6141 static void
6142 qla83xx_disable_laser(scsi_qla_host_t *vha)
6143 {
6144         uint32_t reg, data, fn;
6145         struct qla_hw_data *ha = vha->hw;
6146         struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24;
6147
6148         /* pci func #/port # */
6149         ql_dbg(ql_dbg_init, vha, 0x004b,
6150             "Disabling Laser for hba: %p\n", vha);
6151
6152         fn = (RD_REG_DWORD(&isp_reg->ctrl_status) &
6153                 (BIT_15|BIT_14|BIT_13|BIT_12));
6154
6155         fn = (fn >> 12);
6156
6157         if (fn & 1)
6158                 reg = PORT_1_2031;
6159         else
6160                 reg = PORT_0_2031;
6161
6162         data = LASER_OFF_2031;
6163
6164         qla83xx_wr_reg(vha, reg, data);
6165 }
6166
6167 static int qla2xxx_map_queues(struct Scsi_Host *shost)
6168 {
6169         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
6170
6171         return blk_mq_pci_map_queues(&shost->tag_set, vha->hw->pdev);
6172 }
6173
6174 static const struct pci_error_handlers qla2xxx_err_handler = {
6175         .error_detected = qla2xxx_pci_error_detected,
6176         .mmio_enabled = qla2xxx_pci_mmio_enabled,
6177         .slot_reset = qla2xxx_pci_slot_reset,
6178         .resume = qla2xxx_pci_resume,
6179 };
6180
6181 static struct pci_device_id qla2xxx_pci_tbl[] = {
6182         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
6183         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
6184         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
6185         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
6186         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
6187         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
6188         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
6189         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
6190         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
6191         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
6192         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
6193         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
6194         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
6195         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
6196         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
6197         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
6198         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
6199         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
6200         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
6201         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
6202         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
6203         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
6204         { 0 },
6205 };
6206 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
6207
6208 static struct pci_driver qla2xxx_pci_driver = {
6209         .name           = QLA2XXX_DRIVER_NAME,
6210         .driver         = {
6211                 .owner          = THIS_MODULE,
6212         },
6213         .id_table       = qla2xxx_pci_tbl,
6214         .probe          = qla2x00_probe_one,
6215         .remove         = qla2x00_remove_one,
6216         .shutdown       = qla2x00_shutdown,
6217         .err_handler    = &qla2xxx_err_handler,
6218 };
6219
6220 static const struct file_operations apidev_fops = {
6221         .owner = THIS_MODULE,
6222         .llseek = noop_llseek,
6223 };
6224
6225 /**
6226  * qla2x00_module_init - Module initialization.
6227  **/
6228 static int __init
6229 qla2x00_module_init(void)
6230 {
6231         int ret = 0;
6232
6233         /* Allocate cache for SRBs. */
6234         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
6235             SLAB_HWCACHE_ALIGN, NULL);
6236         if (srb_cachep == NULL) {
6237                 ql_log(ql_log_fatal, NULL, 0x0001,
6238                     "Unable to allocate SRB cache...Failing load!.\n");
6239                 return -ENOMEM;
6240         }
6241
6242         /* Initialize target kmem_cache and mem_pools */
6243         ret = qlt_init();
6244         if (ret < 0) {
6245                 kmem_cache_destroy(srb_cachep);
6246                 return ret;
6247         } else if (ret > 0) {
6248                 /*
6249                  * If initiator mode is explictly disabled by qlt_init(),
6250                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
6251                  * performing scsi_scan_target() during LOOP UP event.
6252                  */
6253                 qla2xxx_transport_functions.disable_target_scan = 1;
6254                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
6255         }
6256
6257         /* Derive version string. */
6258         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
6259         if (ql2xextended_error_logging)
6260                 strcat(qla2x00_version_str, "-debug");
6261
6262         qla2xxx_transport_template =
6263             fc_attach_transport(&qla2xxx_transport_functions);
6264         if (!qla2xxx_transport_template) {
6265                 kmem_cache_destroy(srb_cachep);
6266                 ql_log(ql_log_fatal, NULL, 0x0002,
6267                     "fc_attach_transport failed...Failing load!.\n");
6268                 qlt_exit();
6269                 return -ENODEV;
6270         }
6271
6272         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
6273         if (apidev_major < 0) {
6274                 ql_log(ql_log_fatal, NULL, 0x0003,
6275                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
6276         }
6277
6278         qla2xxx_transport_vport_template =
6279             fc_attach_transport(&qla2xxx_transport_vport_functions);
6280         if (!qla2xxx_transport_vport_template) {
6281                 kmem_cache_destroy(srb_cachep);
6282                 qlt_exit();
6283                 fc_release_transport(qla2xxx_transport_template);
6284                 ql_log(ql_log_fatal, NULL, 0x0004,
6285                     "fc_attach_transport vport failed...Failing load!.\n");
6286                 return -ENODEV;
6287         }
6288         ql_log(ql_log_info, NULL, 0x0005,
6289             "QLogic Fibre Channel HBA Driver: %s.\n",
6290             qla2x00_version_str);
6291         ret = pci_register_driver(&qla2xxx_pci_driver);
6292         if (ret) {
6293                 kmem_cache_destroy(srb_cachep);
6294                 qlt_exit();
6295                 fc_release_transport(qla2xxx_transport_template);
6296                 fc_release_transport(qla2xxx_transport_vport_template);
6297                 ql_log(ql_log_fatal, NULL, 0x0006,
6298                     "pci_register_driver failed...ret=%d Failing load!.\n",
6299                     ret);
6300         }
6301         return ret;
6302 }
6303
6304 /**
6305  * qla2x00_module_exit - Module cleanup.
6306  **/
6307 static void __exit
6308 qla2x00_module_exit(void)
6309 {
6310         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
6311         pci_unregister_driver(&qla2xxx_pci_driver);
6312         qla2x00_release_firmware();
6313         kmem_cache_destroy(srb_cachep);
6314         qlt_exit();
6315         if (ctx_cachep)
6316                 kmem_cache_destroy(ctx_cachep);
6317         fc_release_transport(qla2xxx_transport_template);
6318         fc_release_transport(qla2xxx_transport_vport_template);
6319 }
6320
6321 module_init(qla2x00_module_init);
6322 module_exit(qla2x00_module_exit);
6323
6324 MODULE_AUTHOR("QLogic Corporation");
6325 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
6326 MODULE_LICENSE("GPL");
6327 MODULE_VERSION(QLA2XXX_VERSION);
6328 MODULE_FIRMWARE(FW_FILE_ISP21XX);
6329 MODULE_FIRMWARE(FW_FILE_ISP22XX);
6330 MODULE_FIRMWARE(FW_FILE_ISP2300);
6331 MODULE_FIRMWARE(FW_FILE_ISP2322);
6332 MODULE_FIRMWARE(FW_FILE_ISP24XX);
6333 MODULE_FIRMWARE(FW_FILE_ISP25XX);