2 * Universal Flash Storage Host controller driver Core
4 * This code is based on drivers/scsi/ufs/ufshcd.c
5 * Copyright (C) 2011-2013 Samsung India Software Operations
6 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
9 * Santosh Yaraganavi <santosh.sy@samsung.com>
10 * Vinayak Holikatti <h.vinayak@samsung.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 * See the COPYING file in the top-level directory or visit
17 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * This program is provided "AS IS" and "WITH ALL FAULTS" and
25 * without warranty of any kind. You are solely responsible for
26 * determining the appropriateness of using and distributing
27 * the program and assume all risks associated with your exercise
28 * of rights with respect to the program, including but not limited
29 * to infringement of third party rights, the risks and costs of
30 * program errors, damage to or loss of data, programs or equipment,
31 * and unavailability or interruption of operations. Under no
32 * circumstances will the contributor of this Program be liable for
33 * any damages of any kind arising from your use or distribution of
36 * The Linux Foundation chooses to take subject only to the GPLv2
37 * license terms, and distributes only under these terms.
40 #include <linux/async.h>
41 #include <linux/devfreq.h>
42 #include <linux/nls.h>
44 #include <linux/bitfield.h>
46 #include "ufs_quirks.h"
48 #include "ufs-sysfs.h"
51 #define CREATE_TRACE_POINTS
52 #include <trace/events/ufs.h>
54 #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
57 /* UIC command timeout, unit: ms */
58 #define UIC_CMD_TIMEOUT 500
60 /* NOP OUT retries waiting for NOP IN response */
61 #define NOP_OUT_RETRIES 10
62 /* Timeout after 30 msecs if NOP OUT hangs without response */
63 #define NOP_OUT_TIMEOUT 30 /* msecs */
65 /* Query request retries */
66 #define QUERY_REQ_RETRIES 3
67 /* Query request timeout */
68 #define QUERY_REQ_TIMEOUT 1500 /* 1.5 seconds */
70 /* Task management command timeout */
71 #define TM_CMD_TIMEOUT 100 /* msecs */
73 /* maximum number of retries for a general UIC command */
74 #define UFS_UIC_COMMAND_RETRIES 3
76 /* maximum number of link-startup retries */
77 #define DME_LINKSTARTUP_RETRIES 3
79 /* Maximum retries for Hibern8 enter */
80 #define UIC_HIBERN8_ENTER_RETRIES 3
82 /* maximum number of reset retries before giving up */
83 #define MAX_HOST_RESET_RETRIES 5
85 /* Expose the flag value from utp_upiu_query.value */
86 #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
88 /* Interrupt aggregation default timeout, unit: 40us */
89 #define INT_AGGR_DEF_TO 0x02
91 /* default delay of autosuspend: 2000 ms */
92 #define RPM_AUTOSUSPEND_DELAY_MS 2000
94 #define ufshcd_toggle_vreg(_dev, _vreg, _on) \
98 _ret = ufshcd_enable_vreg(_dev, _vreg); \
100 _ret = ufshcd_disable_vreg(_dev, _vreg); \
104 #define ufshcd_hex_dump(prefix_str, buf, len) do { \
105 size_t __len = (len); \
106 print_hex_dump(KERN_ERR, prefix_str, \
107 __len > 4 ? DUMP_PREFIX_OFFSET : DUMP_PREFIX_NONE,\
108 16, 4, buf, __len, false); \
111 int ufshcd_dump_regs(struct ufs_hba *hba, size_t offset, size_t len,
117 if (offset % 4 != 0 || len % 4 != 0) /* keep readl happy */
120 regs = kzalloc(len, GFP_ATOMIC);
124 for (pos = 0; pos < len; pos += 4)
125 regs[pos / 4] = ufshcd_readl(hba, offset + pos);
127 ufshcd_hex_dump(prefix, regs, len);
132 EXPORT_SYMBOL_GPL(ufshcd_dump_regs);
135 UFSHCD_MAX_CHANNEL = 0,
137 UFSHCD_CMD_PER_LUN = 32,
138 UFSHCD_CAN_QUEUE = 32,
145 UFSHCD_STATE_OPERATIONAL,
146 UFSHCD_STATE_EH_SCHEDULED,
149 /* UFSHCD error handling flags */
151 UFSHCD_EH_IN_PROGRESS = (1 << 0),
154 /* UFSHCD UIC layer error flags */
156 UFSHCD_UIC_DL_PA_INIT_ERROR = (1 << 0), /* Data link layer error */
157 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR = (1 << 1), /* Data link layer error */
158 UFSHCD_UIC_DL_TCx_REPLAY_ERROR = (1 << 2), /* Data link layer error */
159 UFSHCD_UIC_NL_ERROR = (1 << 3), /* Network layer error */
160 UFSHCD_UIC_TL_ERROR = (1 << 4), /* Transport Layer error */
161 UFSHCD_UIC_DME_ERROR = (1 << 5), /* DME error */
164 #define ufshcd_set_eh_in_progress(h) \
165 ((h)->eh_flags |= UFSHCD_EH_IN_PROGRESS)
166 #define ufshcd_eh_in_progress(h) \
167 ((h)->eh_flags & UFSHCD_EH_IN_PROGRESS)
168 #define ufshcd_clear_eh_in_progress(h) \
169 ((h)->eh_flags &= ~UFSHCD_EH_IN_PROGRESS)
171 #define ufshcd_set_ufs_dev_active(h) \
172 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
173 #define ufshcd_set_ufs_dev_sleep(h) \
174 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
175 #define ufshcd_set_ufs_dev_poweroff(h) \
176 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
177 #define ufshcd_is_ufs_dev_active(h) \
178 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
179 #define ufshcd_is_ufs_dev_sleep(h) \
180 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
181 #define ufshcd_is_ufs_dev_poweroff(h) \
182 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
184 struct ufs_pm_lvl_states ufs_pm_lvl_states[] = {
185 {UFS_ACTIVE_PWR_MODE, UIC_LINK_ACTIVE_STATE},
186 {UFS_ACTIVE_PWR_MODE, UIC_LINK_HIBERN8_STATE},
187 {UFS_SLEEP_PWR_MODE, UIC_LINK_ACTIVE_STATE},
188 {UFS_SLEEP_PWR_MODE, UIC_LINK_HIBERN8_STATE},
189 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_HIBERN8_STATE},
190 {UFS_POWERDOWN_PWR_MODE, UIC_LINK_OFF_STATE},
193 static inline enum ufs_dev_pwr_mode
194 ufs_get_pm_lvl_to_dev_pwr_mode(enum ufs_pm_level lvl)
196 return ufs_pm_lvl_states[lvl].dev_state;
199 static inline enum uic_link_state
200 ufs_get_pm_lvl_to_link_pwr_state(enum ufs_pm_level lvl)
202 return ufs_pm_lvl_states[lvl].link_state;
205 static inline enum ufs_pm_level
206 ufs_get_desired_pm_lvl_for_dev_link_state(enum ufs_dev_pwr_mode dev_state,
207 enum uic_link_state link_state)
209 enum ufs_pm_level lvl;
211 for (lvl = UFS_PM_LVL_0; lvl < UFS_PM_LVL_MAX; lvl++) {
212 if ((ufs_pm_lvl_states[lvl].dev_state == dev_state) &&
213 (ufs_pm_lvl_states[lvl].link_state == link_state))
217 /* if no match found, return the level 0 */
221 static struct ufs_dev_fix ufs_fixups[] = {
222 /* UFS cards deviations table */
223 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
224 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
225 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
226 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS),
227 UFS_FIX(UFS_VENDOR_SAMSUNG, UFS_ANY_MODEL,
228 UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE),
229 UFS_FIX(UFS_VENDOR_TOSHIBA, UFS_ANY_MODEL,
230 UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM),
231 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9C8KBADG",
232 UFS_DEVICE_QUIRK_PA_TACTIVATE),
233 UFS_FIX(UFS_VENDOR_TOSHIBA, "THGLF2G9D8KBADG",
234 UFS_DEVICE_QUIRK_PA_TACTIVATE),
235 UFS_FIX(UFS_VENDOR_SKHYNIX, UFS_ANY_MODEL,
236 UFS_DEVICE_QUIRK_HOST_PA_SAVECONFIGTIME),
237 UFS_FIX(UFS_VENDOR_SKHYNIX, "hB8aL1" /*H28U62301AMR*/,
238 UFS_DEVICE_QUIRK_HOST_VS_DEBUGSAVECONFIGTIME),
243 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba);
244 static void ufshcd_async_scan(void *data, async_cookie_t cookie);
245 static int ufshcd_reset_and_restore(struct ufs_hba *hba);
246 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd);
247 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag);
248 static void ufshcd_hba_exit(struct ufs_hba *hba);
249 static int ufshcd_probe_hba(struct ufs_hba *hba);
250 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
252 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on);
253 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba);
254 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba);
255 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba);
256 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba);
257 static void ufshcd_resume_clkscaling(struct ufs_hba *hba);
258 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba);
259 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba);
260 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up);
261 static irqreturn_t ufshcd_intr(int irq, void *__hba);
262 static int ufshcd_change_power_mode(struct ufs_hba *hba,
263 struct ufs_pa_layer_attr *pwr_mode);
264 static inline bool ufshcd_valid_tag(struct ufs_hba *hba, int tag)
266 return tag >= 0 && tag < hba->nutrs;
269 static inline void ufshcd_enable_irq(struct ufs_hba *hba)
271 if (!hba->is_irq_enabled) {
272 enable_irq(hba->irq);
273 hba->is_irq_enabled = true;
277 static inline void ufshcd_disable_irq(struct ufs_hba *hba)
279 if (hba->is_irq_enabled) {
280 disable_irq(hba->irq);
281 hba->is_irq_enabled = false;
285 static void ufshcd_scsi_unblock_requests(struct ufs_hba *hba)
287 if (atomic_dec_and_test(&hba->scsi_block_reqs_cnt))
288 scsi_unblock_requests(hba->host);
291 static void ufshcd_scsi_block_requests(struct ufs_hba *hba)
293 if (atomic_inc_return(&hba->scsi_block_reqs_cnt) == 1)
294 scsi_block_requests(hba->host);
297 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag,
300 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
302 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->sc.cdb);
305 static void ufshcd_add_query_upiu_trace(struct ufs_hba *hba, unsigned int tag,
308 struct utp_upiu_req *rq = hba->lrb[tag].ucd_req_ptr;
310 trace_ufshcd_upiu(dev_name(hba->dev), str, &rq->header, &rq->qr);
313 static void ufshcd_add_tm_upiu_trace(struct ufs_hba *hba, unsigned int tag,
316 int off = (int)tag - hba->nutrs;
317 struct utp_task_req_desc *descp = &hba->utmrdl_base_addr[off];
319 trace_ufshcd_upiu(dev_name(hba->dev), str, &descp->req_header,
320 &descp->input_param1);
323 static void ufshcd_add_command_trace(struct ufs_hba *hba,
324 unsigned int tag, const char *str)
329 struct ufshcd_lrb *lrbp = &hba->lrb[tag];
330 int transfer_len = -1;
332 if (!trace_ufshcd_command_enabled()) {
333 /* trace UPIU W/O tracing command */
335 ufshcd_add_cmd_upiu_trace(hba, tag, str);
339 if (lrbp->cmd) { /* data phase exists */
340 /* trace UPIU also */
341 ufshcd_add_cmd_upiu_trace(hba, tag, str);
342 opcode = (u8)(*lrbp->cmd->cmnd);
343 if ((opcode == READ_10) || (opcode == WRITE_10)) {
345 * Currently we only fully trace read(10) and write(10)
348 if (lrbp->cmd->request && lrbp->cmd->request->bio)
350 lrbp->cmd->request->bio->bi_iter.bi_sector;
351 transfer_len = be32_to_cpu(
352 lrbp->ucd_req_ptr->sc.exp_data_transfer_len);
356 intr = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
357 doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
358 trace_ufshcd_command(dev_name(hba->dev), str, tag,
359 doorbell, transfer_len, intr, lba, opcode);
362 static void ufshcd_print_clk_freqs(struct ufs_hba *hba)
364 struct ufs_clk_info *clki;
365 struct list_head *head = &hba->clk_list_head;
367 if (list_empty(head))
370 list_for_each_entry(clki, head, list) {
371 if (!IS_ERR_OR_NULL(clki->clk) && clki->min_freq &&
373 dev_err(hba->dev, "clk: %s, rate: %u\n",
374 clki->name, clki->curr_freq);
378 static void ufshcd_print_err_hist(struct ufs_hba *hba,
379 struct ufs_err_reg_hist *err_hist,
385 for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) {
386 int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH;
388 if (err_hist->reg[p] == 0)
390 dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p,
391 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p]));
396 dev_err(hba->dev, "No record of %s errors\n", err_name);
399 static void ufshcd_print_host_regs(struct ufs_hba *hba)
401 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
402 dev_err(hba->dev, "hba->ufs_version = 0x%x, hba->capabilities = 0x%x\n",
403 hba->ufs_version, hba->capabilities);
405 "hba->outstanding_reqs = 0x%x, hba->outstanding_tasks = 0x%x\n",
406 (u32)hba->outstanding_reqs, (u32)hba->outstanding_tasks);
408 "last_hibern8_exit_tstamp at %lld us, hibern8_exit_cnt = %d\n",
409 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp),
410 hba->ufs_stats.hibern8_exit_cnt);
412 ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err");
413 ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err");
414 ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err");
415 ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err");
416 ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err");
417 ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err,
419 ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err");
420 ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err,
421 "link_startup_fail");
422 ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail");
423 ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err,
425 ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset");
426 ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset");
427 ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort");
429 ufshcd_print_clk_freqs(hba);
431 if (hba->vops && hba->vops->dbg_register_dump)
432 hba->vops->dbg_register_dump(hba);
436 void ufshcd_print_trs(struct ufs_hba *hba, unsigned long bitmap, bool pr_prdt)
438 struct ufshcd_lrb *lrbp;
442 for_each_set_bit(tag, &bitmap, hba->nutrs) {
443 lrbp = &hba->lrb[tag];
445 dev_err(hba->dev, "UPIU[%d] - issue time %lld us\n",
446 tag, ktime_to_us(lrbp->issue_time_stamp));
447 dev_err(hba->dev, "UPIU[%d] - complete time %lld us\n",
448 tag, ktime_to_us(lrbp->compl_time_stamp));
450 "UPIU[%d] - Transfer Request Descriptor phys@0x%llx\n",
451 tag, (u64)lrbp->utrd_dma_addr);
453 ufshcd_hex_dump("UPIU TRD: ", lrbp->utr_descriptor_ptr,
454 sizeof(struct utp_transfer_req_desc));
455 dev_err(hba->dev, "UPIU[%d] - Request UPIU phys@0x%llx\n", tag,
456 (u64)lrbp->ucd_req_dma_addr);
457 ufshcd_hex_dump("UPIU REQ: ", lrbp->ucd_req_ptr,
458 sizeof(struct utp_upiu_req));
459 dev_err(hba->dev, "UPIU[%d] - Response UPIU phys@0x%llx\n", tag,
460 (u64)lrbp->ucd_rsp_dma_addr);
461 ufshcd_hex_dump("UPIU RSP: ", lrbp->ucd_rsp_ptr,
462 sizeof(struct utp_upiu_rsp));
464 prdt_length = le16_to_cpu(
465 lrbp->utr_descriptor_ptr->prd_table_length);
467 "UPIU[%d] - PRDT - %d entries phys@0x%llx\n",
469 (u64)lrbp->ucd_prdt_dma_addr);
472 ufshcd_hex_dump("UPIU PRDT: ", lrbp->ucd_prdt_ptr,
473 sizeof(struct ufshcd_sg_entry) * prdt_length);
477 static void ufshcd_print_tmrs(struct ufs_hba *hba, unsigned long bitmap)
481 for_each_set_bit(tag, &bitmap, hba->nutmrs) {
482 struct utp_task_req_desc *tmrdp = &hba->utmrdl_base_addr[tag];
484 dev_err(hba->dev, "TM[%d] - Task Management Header\n", tag);
485 ufshcd_hex_dump("", tmrdp, sizeof(*tmrdp));
489 static void ufshcd_print_host_state(struct ufs_hba *hba)
491 dev_err(hba->dev, "UFS Host state=%d\n", hba->ufshcd_state);
492 dev_err(hba->dev, "outstanding reqs=0x%lx tasks=0x%lx\n",
493 hba->outstanding_reqs, hba->outstanding_tasks);
494 dev_err(hba->dev, "saved_err=0x%x, saved_uic_err=0x%x\n",
495 hba->saved_err, hba->saved_uic_err);
496 dev_err(hba->dev, "Device power mode=%d, UIC link state=%d\n",
497 hba->curr_dev_pwr_mode, hba->uic_link_state);
498 dev_err(hba->dev, "PM in progress=%d, sys. suspended=%d\n",
499 hba->pm_op_in_progress, hba->is_sys_suspended);
500 dev_err(hba->dev, "Auto BKOPS=%d, Host self-block=%d\n",
501 hba->auto_bkops_enabled, hba->host->host_self_blocked);
502 dev_err(hba->dev, "Clk gate=%d\n", hba->clk_gating.state);
503 dev_err(hba->dev, "error handling flags=0x%x, req. abort count=%d\n",
504 hba->eh_flags, hba->req_abort_count);
505 dev_err(hba->dev, "Host capabilities=0x%x, caps=0x%x\n",
506 hba->capabilities, hba->caps);
507 dev_err(hba->dev, "quirks=0x%x, dev. quirks=0x%x\n", hba->quirks,
512 * ufshcd_print_pwr_info - print power params as saved in hba
514 * @hba: per-adapter instance
516 static void ufshcd_print_pwr_info(struct ufs_hba *hba)
518 static const char * const names[] = {
528 dev_err(hba->dev, "%s:[RX, TX]: gear=[%d, %d], lane[%d, %d], pwr[%s, %s], rate = %d\n",
530 hba->pwr_info.gear_rx, hba->pwr_info.gear_tx,
531 hba->pwr_info.lane_rx, hba->pwr_info.lane_tx,
532 names[hba->pwr_info.pwr_rx],
533 names[hba->pwr_info.pwr_tx],
534 hba->pwr_info.hs_rate);
538 * ufshcd_wait_for_register - wait for register value to change
539 * @hba - per-adapter interface
540 * @reg - mmio register offset
541 * @mask - mask to apply to read register value
542 * @val - wait condition
543 * @interval_us - polling interval in microsecs
544 * @timeout_ms - timeout in millisecs
545 * @can_sleep - perform sleep or just spin
547 * Returns -ETIMEDOUT on error, zero on success
549 int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
550 u32 val, unsigned long interval_us,
551 unsigned long timeout_ms, bool can_sleep)
554 unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
556 /* ignore bits that we don't intend to wait on */
559 while ((ufshcd_readl(hba, reg) & mask) != val) {
561 usleep_range(interval_us, interval_us + 50);
564 if (time_after(jiffies, timeout)) {
565 if ((ufshcd_readl(hba, reg) & mask) != val)
575 * ufshcd_get_intr_mask - Get the interrupt bit mask
576 * @hba: Pointer to adapter instance
578 * Returns interrupt bit mask per version
580 static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
584 switch (hba->ufs_version) {
585 case UFSHCI_VERSION_10:
586 intr_mask = INTERRUPT_MASK_ALL_VER_10;
588 case UFSHCI_VERSION_11:
589 case UFSHCI_VERSION_20:
590 intr_mask = INTERRUPT_MASK_ALL_VER_11;
592 case UFSHCI_VERSION_21:
594 intr_mask = INTERRUPT_MASK_ALL_VER_21;
602 * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
603 * @hba: Pointer to adapter instance
605 * Returns UFSHCI version supported by the controller
607 static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
609 if (hba->quirks & UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION)
610 return ufshcd_vops_get_ufs_hci_version(hba);
612 return ufshcd_readl(hba, REG_UFS_VERSION);
616 * ufshcd_is_device_present - Check if any device connected to
617 * the host controller
618 * @hba: pointer to adapter instance
620 * Returns true if device present, false if no device detected
622 static inline bool ufshcd_is_device_present(struct ufs_hba *hba)
624 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) &
625 DEVICE_PRESENT) ? true : false;
629 * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
630 * @lrbp: pointer to local command reference block
632 * This function is used to get the OCS field from UTRD
633 * Returns the OCS field in the UTRD
635 static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
637 return le32_to_cpu(lrbp->utr_descriptor_ptr->header.dword_2) & MASK_OCS;
641 * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
642 * @hba: per adapter instance
643 * @pos: position of the bit to be cleared
645 static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
647 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
648 ufshcd_writel(hba, (1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
650 ufshcd_writel(hba, ~(1 << pos),
651 REG_UTP_TRANSFER_REQ_LIST_CLEAR);
655 * ufshcd_utmrl_clear - Clear a bit in UTRMLCLR register
656 * @hba: per adapter instance
657 * @pos: position of the bit to be cleared
659 static inline void ufshcd_utmrl_clear(struct ufs_hba *hba, u32 pos)
661 if (hba->quirks & UFSHCI_QUIRK_BROKEN_REQ_LIST_CLR)
662 ufshcd_writel(hba, (1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
664 ufshcd_writel(hba, ~(1 << pos), REG_UTP_TASK_REQ_LIST_CLEAR);
668 * ufshcd_outstanding_req_clear - Clear a bit in outstanding request field
669 * @hba: per adapter instance
670 * @tag: position of the bit to be cleared
672 static inline void ufshcd_outstanding_req_clear(struct ufs_hba *hba, int tag)
674 __clear_bit(tag, &hba->outstanding_reqs);
678 * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
679 * @reg: Register value of host controller status
681 * Returns integer, 0 on Success and positive value if failed
683 static inline int ufshcd_get_lists_status(u32 reg)
685 return !((reg & UFSHCD_STATUS_READY) == UFSHCD_STATUS_READY);
689 * ufshcd_get_uic_cmd_result - Get the UIC command result
690 * @hba: Pointer to adapter instance
692 * This function gets the result of UIC command completion
693 * Returns 0 on success, non zero value on error
695 static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
697 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
698 MASK_UIC_COMMAND_RESULT;
702 * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
703 * @hba: Pointer to adapter instance
705 * This function gets UIC command argument3
706 * Returns 0 on success, non zero value on error
708 static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
710 return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
714 * ufshcd_get_req_rsp - returns the TR response transaction type
715 * @ucd_rsp_ptr: pointer to response UPIU
718 ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
720 return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
724 * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
725 * @ucd_rsp_ptr: pointer to response UPIU
727 * This function gets the response status and scsi_status from response UPIU
728 * Returns the response result code.
731 ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
733 return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
737 * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
739 * @ucd_rsp_ptr: pointer to response UPIU
741 * Return the data segment length.
743 static inline unsigned int
744 ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
746 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
747 MASK_RSP_UPIU_DATA_SEG_LEN;
751 * ufshcd_is_exception_event - Check if the device raised an exception event
752 * @ucd_rsp_ptr: pointer to response UPIU
754 * The function checks if the device raised an exception event indicated in
755 * the Device Information field of response UPIU.
757 * Returns true if exception is raised, false otherwise.
759 static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
761 return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
762 MASK_RSP_EXCEPTION_EVENT ? true : false;
766 * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
767 * @hba: per adapter instance
770 ufshcd_reset_intr_aggr(struct ufs_hba *hba)
772 ufshcd_writel(hba, INT_AGGR_ENABLE |
773 INT_AGGR_COUNTER_AND_TIMER_RESET,
774 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
778 * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
779 * @hba: per adapter instance
780 * @cnt: Interrupt aggregation counter threshold
781 * @tmout: Interrupt aggregation timeout value
784 ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
786 ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
787 INT_AGGR_COUNTER_THLD_VAL(cnt) |
788 INT_AGGR_TIMEOUT_VAL(tmout),
789 REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
793 * ufshcd_disable_intr_aggr - Disables interrupt aggregation.
794 * @hba: per adapter instance
796 static inline void ufshcd_disable_intr_aggr(struct ufs_hba *hba)
798 ufshcd_writel(hba, 0, REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
802 * ufshcd_enable_run_stop_reg - Enable run-stop registers,
803 * When run-stop registers are set to 1, it indicates the
804 * host controller that it can process the requests
805 * @hba: per adapter instance
807 static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
809 ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
810 REG_UTP_TASK_REQ_LIST_RUN_STOP);
811 ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
812 REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
816 * ufshcd_hba_start - Start controller initialization sequence
817 * @hba: per adapter instance
819 static inline void ufshcd_hba_start(struct ufs_hba *hba)
821 ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
825 * ufshcd_is_hba_active - Get controller state
826 * @hba: per adapter instance
828 * Returns false if controller is active, true otherwise
830 static inline bool ufshcd_is_hba_active(struct ufs_hba *hba)
832 return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & CONTROLLER_ENABLE)
836 u32 ufshcd_get_local_unipro_ver(struct ufs_hba *hba)
838 /* HCI version 1.0 and 1.1 supports UniPro 1.41 */
839 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
840 (hba->ufs_version == UFSHCI_VERSION_11))
841 return UFS_UNIPRO_VER_1_41;
843 return UFS_UNIPRO_VER_1_6;
845 EXPORT_SYMBOL(ufshcd_get_local_unipro_ver);
847 static bool ufshcd_is_unipro_pa_params_tuning_req(struct ufs_hba *hba)
850 * If both host and device support UniPro ver1.6 or later, PA layer
851 * parameters tuning happens during link startup itself.
853 * We can manually tune PA layer parameters if either host or device
854 * doesn't support UniPro ver 1.6 or later. But to keep manual tuning
855 * logic simple, we will only do manual tuning if local unipro version
856 * doesn't support ver1.6 or later.
858 if (ufshcd_get_local_unipro_ver(hba) < UFS_UNIPRO_VER_1_6)
864 static int ufshcd_scale_clks(struct ufs_hba *hba, bool scale_up)
867 struct ufs_clk_info *clki;
868 struct list_head *head = &hba->clk_list_head;
869 ktime_t start = ktime_get();
870 bool clk_state_changed = false;
872 if (list_empty(head))
875 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, PRE_CHANGE);
879 list_for_each_entry(clki, head, list) {
880 if (!IS_ERR_OR_NULL(clki->clk)) {
881 if (scale_up && clki->max_freq) {
882 if (clki->curr_freq == clki->max_freq)
885 clk_state_changed = true;
886 ret = clk_set_rate(clki->clk, clki->max_freq);
888 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
889 __func__, clki->name,
890 clki->max_freq, ret);
893 trace_ufshcd_clk_scaling(dev_name(hba->dev),
894 "scaled up", clki->name,
898 clki->curr_freq = clki->max_freq;
900 } else if (!scale_up && clki->min_freq) {
901 if (clki->curr_freq == clki->min_freq)
904 clk_state_changed = true;
905 ret = clk_set_rate(clki->clk, clki->min_freq);
907 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
908 __func__, clki->name,
909 clki->min_freq, ret);
912 trace_ufshcd_clk_scaling(dev_name(hba->dev),
913 "scaled down", clki->name,
916 clki->curr_freq = clki->min_freq;
919 dev_dbg(hba->dev, "%s: clk: %s, rate: %lu\n", __func__,
920 clki->name, clk_get_rate(clki->clk));
923 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
926 if (clk_state_changed)
927 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
928 (scale_up ? "up" : "down"),
929 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
934 * ufshcd_is_devfreq_scaling_required - check if scaling is required or not
935 * @hba: per adapter instance
936 * @scale_up: True if scaling up and false if scaling down
938 * Returns true if scaling is required, false otherwise.
940 static bool ufshcd_is_devfreq_scaling_required(struct ufs_hba *hba,
943 struct ufs_clk_info *clki;
944 struct list_head *head = &hba->clk_list_head;
946 if (list_empty(head))
949 list_for_each_entry(clki, head, list) {
950 if (!IS_ERR_OR_NULL(clki->clk)) {
951 if (scale_up && clki->max_freq) {
952 if (clki->curr_freq == clki->max_freq)
955 } else if (!scale_up && clki->min_freq) {
956 if (clki->curr_freq == clki->min_freq)
966 static int ufshcd_wait_for_doorbell_clr(struct ufs_hba *hba,
973 bool timeout = false, do_last_check = false;
976 ufshcd_hold(hba, false);
977 spin_lock_irqsave(hba->host->host_lock, flags);
979 * Wait for all the outstanding tasks/transfer requests.
980 * Verify by checking the doorbell registers are clear.
984 if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
989 tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
990 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
991 if (!tm_doorbell && !tr_doorbell) {
994 } else if (do_last_check) {
998 spin_unlock_irqrestore(hba->host->host_lock, flags);
1000 if (ktime_to_us(ktime_sub(ktime_get(), start)) >
1004 * We might have scheduled out for long time so make
1005 * sure to check if doorbells are cleared by this time
1008 do_last_check = true;
1010 spin_lock_irqsave(hba->host->host_lock, flags);
1011 } while (tm_doorbell || tr_doorbell);
1015 "%s: timedout waiting for doorbell to clear (tm=0x%x, tr=0x%x)\n",
1016 __func__, tm_doorbell, tr_doorbell);
1020 spin_unlock_irqrestore(hba->host->host_lock, flags);
1021 ufshcd_release(hba);
1026 * ufshcd_scale_gear - scale up/down UFS gear
1027 * @hba: per adapter instance
1028 * @scale_up: True for scaling up gear and false for scaling down
1030 * Returns 0 for success,
1031 * Returns -EBUSY if scaling can't happen at this time
1032 * Returns non-zero for any other errors
1034 static int ufshcd_scale_gear(struct ufs_hba *hba, bool scale_up)
1036 #define UFS_MIN_GEAR_TO_SCALE_DOWN UFS_HS_G1
1038 struct ufs_pa_layer_attr new_pwr_info;
1041 memcpy(&new_pwr_info, &hba->clk_scaling.saved_pwr_info.info,
1042 sizeof(struct ufs_pa_layer_attr));
1044 memcpy(&new_pwr_info, &hba->pwr_info,
1045 sizeof(struct ufs_pa_layer_attr));
1047 if (hba->pwr_info.gear_tx > UFS_MIN_GEAR_TO_SCALE_DOWN
1048 || hba->pwr_info.gear_rx > UFS_MIN_GEAR_TO_SCALE_DOWN) {
1049 /* save the current power mode */
1050 memcpy(&hba->clk_scaling.saved_pwr_info.info,
1052 sizeof(struct ufs_pa_layer_attr));
1054 /* scale down gear */
1055 new_pwr_info.gear_tx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1056 new_pwr_info.gear_rx = UFS_MIN_GEAR_TO_SCALE_DOWN;
1060 /* check if the power mode needs to be changed or not? */
1061 ret = ufshcd_change_power_mode(hba, &new_pwr_info);
1064 dev_err(hba->dev, "%s: failed err %d, old gear: (tx %d rx %d), new gear: (tx %d rx %d)",
1066 hba->pwr_info.gear_tx, hba->pwr_info.gear_rx,
1067 new_pwr_info.gear_tx, new_pwr_info.gear_rx);
1072 static int ufshcd_clock_scaling_prepare(struct ufs_hba *hba)
1074 #define DOORBELL_CLR_TOUT_US (1000 * 1000) /* 1 sec */
1077 * make sure that there are no outstanding requests when
1078 * clock scaling is in progress
1080 ufshcd_scsi_block_requests(hba);
1081 down_write(&hba->clk_scaling_lock);
1082 if (ufshcd_wait_for_doorbell_clr(hba, DOORBELL_CLR_TOUT_US)) {
1084 up_write(&hba->clk_scaling_lock);
1085 ufshcd_scsi_unblock_requests(hba);
1091 static void ufshcd_clock_scaling_unprepare(struct ufs_hba *hba)
1093 up_write(&hba->clk_scaling_lock);
1094 ufshcd_scsi_unblock_requests(hba);
1098 * ufshcd_devfreq_scale - scale up/down UFS clocks and gear
1099 * @hba: per adapter instance
1100 * @scale_up: True for scaling up and false for scalin down
1102 * Returns 0 for success,
1103 * Returns -EBUSY if scaling can't happen at this time
1104 * Returns non-zero for any other errors
1106 static int ufshcd_devfreq_scale(struct ufs_hba *hba, bool scale_up)
1110 /* let's not get into low power until clock scaling is completed */
1111 ufshcd_hold(hba, false);
1113 ret = ufshcd_clock_scaling_prepare(hba);
1117 /* scale down the gear before scaling down clocks */
1119 ret = ufshcd_scale_gear(hba, false);
1124 ret = ufshcd_scale_clks(hba, scale_up);
1127 ufshcd_scale_gear(hba, true);
1131 /* scale up the gear after scaling up clocks */
1133 ret = ufshcd_scale_gear(hba, true);
1135 ufshcd_scale_clks(hba, false);
1140 ret = ufshcd_vops_clk_scale_notify(hba, scale_up, POST_CHANGE);
1143 ufshcd_clock_scaling_unprepare(hba);
1144 ufshcd_release(hba);
1148 static void ufshcd_clk_scaling_suspend_work(struct work_struct *work)
1150 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1151 clk_scaling.suspend_work);
1152 unsigned long irq_flags;
1154 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1155 if (hba->clk_scaling.active_reqs || hba->clk_scaling.is_suspended) {
1156 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1159 hba->clk_scaling.is_suspended = true;
1160 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1162 __ufshcd_suspend_clkscaling(hba);
1165 static void ufshcd_clk_scaling_resume_work(struct work_struct *work)
1167 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1168 clk_scaling.resume_work);
1169 unsigned long irq_flags;
1171 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1172 if (!hba->clk_scaling.is_suspended) {
1173 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1176 hba->clk_scaling.is_suspended = false;
1177 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1179 devfreq_resume_device(hba->devfreq);
1182 static int ufshcd_devfreq_target(struct device *dev,
1183 unsigned long *freq, u32 flags)
1186 struct ufs_hba *hba = dev_get_drvdata(dev);
1188 bool scale_up, sched_clk_scaling_suspend_work = false;
1189 struct list_head *clk_list = &hba->clk_list_head;
1190 struct ufs_clk_info *clki;
1191 unsigned long irq_flags;
1193 if (!ufshcd_is_clkscaling_supported(hba))
1196 spin_lock_irqsave(hba->host->host_lock, irq_flags);
1197 if (ufshcd_eh_in_progress(hba)) {
1198 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1202 if (!hba->clk_scaling.active_reqs)
1203 sched_clk_scaling_suspend_work = true;
1205 if (list_empty(clk_list)) {
1206 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1210 clki = list_first_entry(&hba->clk_list_head, struct ufs_clk_info, list);
1211 scale_up = (*freq == clki->max_freq) ? true : false;
1212 if (!ufshcd_is_devfreq_scaling_required(hba, scale_up)) {
1213 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1215 goto out; /* no state change required */
1217 spin_unlock_irqrestore(hba->host->host_lock, irq_flags);
1219 start = ktime_get();
1220 ret = ufshcd_devfreq_scale(hba, scale_up);
1222 trace_ufshcd_profile_clk_scaling(dev_name(hba->dev),
1223 (scale_up ? "up" : "down"),
1224 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
1227 if (sched_clk_scaling_suspend_work)
1228 queue_work(hba->clk_scaling.workq,
1229 &hba->clk_scaling.suspend_work);
1234 static bool ufshcd_is_busy(struct request *req, void *priv, bool reserved)
1238 WARN_ON_ONCE(reserved);
1243 /* Whether or not any tag is in use by a request that is in progress. */
1244 static bool ufshcd_any_tag_in_use(struct ufs_hba *hba)
1246 struct request_queue *q = hba->cmd_queue;
1249 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_is_busy, &busy);
1253 static int ufshcd_devfreq_get_dev_status(struct device *dev,
1254 struct devfreq_dev_status *stat)
1256 struct ufs_hba *hba = dev_get_drvdata(dev);
1257 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1258 unsigned long flags;
1260 if (!ufshcd_is_clkscaling_supported(hba))
1263 memset(stat, 0, sizeof(*stat));
1265 spin_lock_irqsave(hba->host->host_lock, flags);
1266 if (!scaling->window_start_t)
1269 if (scaling->is_busy_started)
1270 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1271 scaling->busy_start_t));
1273 stat->total_time = jiffies_to_usecs((long)jiffies -
1274 (long)scaling->window_start_t);
1275 stat->busy_time = scaling->tot_busy_t;
1277 scaling->window_start_t = jiffies;
1278 scaling->tot_busy_t = 0;
1280 if (hba->outstanding_reqs) {
1281 scaling->busy_start_t = ktime_get();
1282 scaling->is_busy_started = true;
1284 scaling->busy_start_t = 0;
1285 scaling->is_busy_started = false;
1287 spin_unlock_irqrestore(hba->host->host_lock, flags);
1291 static struct devfreq_dev_profile ufs_devfreq_profile = {
1293 .target = ufshcd_devfreq_target,
1294 .get_dev_status = ufshcd_devfreq_get_dev_status,
1297 static int ufshcd_devfreq_init(struct ufs_hba *hba)
1299 struct list_head *clk_list = &hba->clk_list_head;
1300 struct ufs_clk_info *clki;
1301 struct devfreq *devfreq;
1304 /* Skip devfreq if we don't have any clocks in the list */
1305 if (list_empty(clk_list))
1308 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1309 dev_pm_opp_add(hba->dev, clki->min_freq, 0);
1310 dev_pm_opp_add(hba->dev, clki->max_freq, 0);
1312 devfreq = devfreq_add_device(hba->dev,
1313 &ufs_devfreq_profile,
1314 DEVFREQ_GOV_SIMPLE_ONDEMAND,
1316 if (IS_ERR(devfreq)) {
1317 ret = PTR_ERR(devfreq);
1318 dev_err(hba->dev, "Unable to register with devfreq %d\n", ret);
1320 dev_pm_opp_remove(hba->dev, clki->min_freq);
1321 dev_pm_opp_remove(hba->dev, clki->max_freq);
1325 hba->devfreq = devfreq;
1330 static void ufshcd_devfreq_remove(struct ufs_hba *hba)
1332 struct list_head *clk_list = &hba->clk_list_head;
1333 struct ufs_clk_info *clki;
1338 devfreq_remove_device(hba->devfreq);
1339 hba->devfreq = NULL;
1341 clki = list_first_entry(clk_list, struct ufs_clk_info, list);
1342 dev_pm_opp_remove(hba->dev, clki->min_freq);
1343 dev_pm_opp_remove(hba->dev, clki->max_freq);
1346 static void __ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1348 unsigned long flags;
1350 devfreq_suspend_device(hba->devfreq);
1351 spin_lock_irqsave(hba->host->host_lock, flags);
1352 hba->clk_scaling.window_start_t = 0;
1353 spin_unlock_irqrestore(hba->host->host_lock, flags);
1356 static void ufshcd_suspend_clkscaling(struct ufs_hba *hba)
1358 unsigned long flags;
1359 bool suspend = false;
1361 if (!ufshcd_is_clkscaling_supported(hba))
1364 spin_lock_irqsave(hba->host->host_lock, flags);
1365 if (!hba->clk_scaling.is_suspended) {
1367 hba->clk_scaling.is_suspended = true;
1369 spin_unlock_irqrestore(hba->host->host_lock, flags);
1372 __ufshcd_suspend_clkscaling(hba);
1375 static void ufshcd_resume_clkscaling(struct ufs_hba *hba)
1377 unsigned long flags;
1378 bool resume = false;
1380 if (!ufshcd_is_clkscaling_supported(hba))
1383 spin_lock_irqsave(hba->host->host_lock, flags);
1384 if (hba->clk_scaling.is_suspended) {
1386 hba->clk_scaling.is_suspended = false;
1388 spin_unlock_irqrestore(hba->host->host_lock, flags);
1391 devfreq_resume_device(hba->devfreq);
1394 static ssize_t ufshcd_clkscale_enable_show(struct device *dev,
1395 struct device_attribute *attr, char *buf)
1397 struct ufs_hba *hba = dev_get_drvdata(dev);
1399 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_scaling.is_allowed);
1402 static ssize_t ufshcd_clkscale_enable_store(struct device *dev,
1403 struct device_attribute *attr, const char *buf, size_t count)
1405 struct ufs_hba *hba = dev_get_drvdata(dev);
1409 if (kstrtou32(buf, 0, &value))
1413 if (value == hba->clk_scaling.is_allowed)
1416 pm_runtime_get_sync(hba->dev);
1417 ufshcd_hold(hba, false);
1419 cancel_work_sync(&hba->clk_scaling.suspend_work);
1420 cancel_work_sync(&hba->clk_scaling.resume_work);
1422 hba->clk_scaling.is_allowed = value;
1425 ufshcd_resume_clkscaling(hba);
1427 ufshcd_suspend_clkscaling(hba);
1428 err = ufshcd_devfreq_scale(hba, true);
1430 dev_err(hba->dev, "%s: failed to scale clocks up %d\n",
1434 ufshcd_release(hba);
1435 pm_runtime_put_sync(hba->dev);
1440 static void ufshcd_clkscaling_init_sysfs(struct ufs_hba *hba)
1442 hba->clk_scaling.enable_attr.show = ufshcd_clkscale_enable_show;
1443 hba->clk_scaling.enable_attr.store = ufshcd_clkscale_enable_store;
1444 sysfs_attr_init(&hba->clk_scaling.enable_attr.attr);
1445 hba->clk_scaling.enable_attr.attr.name = "clkscale_enable";
1446 hba->clk_scaling.enable_attr.attr.mode = 0644;
1447 if (device_create_file(hba->dev, &hba->clk_scaling.enable_attr))
1448 dev_err(hba->dev, "Failed to create sysfs for clkscale_enable\n");
1451 static void ufshcd_ungate_work(struct work_struct *work)
1454 unsigned long flags;
1455 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1456 clk_gating.ungate_work);
1458 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1460 spin_lock_irqsave(hba->host->host_lock, flags);
1461 if (hba->clk_gating.state == CLKS_ON) {
1462 spin_unlock_irqrestore(hba->host->host_lock, flags);
1466 spin_unlock_irqrestore(hba->host->host_lock, flags);
1467 ufshcd_setup_clocks(hba, true);
1469 /* Exit from hibern8 */
1470 if (ufshcd_can_hibern8_during_gating(hba)) {
1471 /* Prevent gating in this path */
1472 hba->clk_gating.is_suspended = true;
1473 if (ufshcd_is_link_hibern8(hba)) {
1474 ret = ufshcd_uic_hibern8_exit(hba);
1476 dev_err(hba->dev, "%s: hibern8 exit failed %d\n",
1479 ufshcd_set_link_active(hba);
1481 hba->clk_gating.is_suspended = false;
1484 ufshcd_scsi_unblock_requests(hba);
1488 * ufshcd_hold - Enable clocks that were gated earlier due to ufshcd_release.
1489 * Also, exit from hibern8 mode and set the link as active.
1490 * @hba: per adapter instance
1491 * @async: This indicates whether caller should ungate clocks asynchronously.
1493 int ufshcd_hold(struct ufs_hba *hba, bool async)
1496 unsigned long flags;
1498 if (!ufshcd_is_clkgating_allowed(hba))
1500 spin_lock_irqsave(hba->host->host_lock, flags);
1501 hba->clk_gating.active_reqs++;
1503 if (ufshcd_eh_in_progress(hba)) {
1504 spin_unlock_irqrestore(hba->host->host_lock, flags);
1509 switch (hba->clk_gating.state) {
1512 * Wait for the ungate work to complete if in progress.
1513 * Though the clocks may be in ON state, the link could
1514 * still be in hibner8 state if hibern8 is allowed
1515 * during clock gating.
1516 * Make sure we exit hibern8 state also in addition to
1519 if (ufshcd_can_hibern8_during_gating(hba) &&
1520 ufshcd_is_link_hibern8(hba)) {
1521 spin_unlock_irqrestore(hba->host->host_lock, flags);
1522 flush_work(&hba->clk_gating.ungate_work);
1523 spin_lock_irqsave(hba->host->host_lock, flags);
1528 if (cancel_delayed_work(&hba->clk_gating.gate_work)) {
1529 hba->clk_gating.state = CLKS_ON;
1530 trace_ufshcd_clk_gating(dev_name(hba->dev),
1531 hba->clk_gating.state);
1535 * If we are here, it means gating work is either done or
1536 * currently running. Hence, fall through to cancel gating
1537 * work and to enable clocks.
1541 ufshcd_scsi_block_requests(hba);
1542 hba->clk_gating.state = REQ_CLKS_ON;
1543 trace_ufshcd_clk_gating(dev_name(hba->dev),
1544 hba->clk_gating.state);
1545 queue_work(hba->clk_gating.clk_gating_workq,
1546 &hba->clk_gating.ungate_work);
1548 * fall through to check if we should wait for this
1549 * work to be done or not.
1555 hba->clk_gating.active_reqs--;
1559 spin_unlock_irqrestore(hba->host->host_lock, flags);
1560 flush_work(&hba->clk_gating.ungate_work);
1561 /* Make sure state is CLKS_ON before returning */
1562 spin_lock_irqsave(hba->host->host_lock, flags);
1565 dev_err(hba->dev, "%s: clk gating is in invalid state %d\n",
1566 __func__, hba->clk_gating.state);
1569 spin_unlock_irqrestore(hba->host->host_lock, flags);
1573 EXPORT_SYMBOL_GPL(ufshcd_hold);
1575 static void ufshcd_gate_work(struct work_struct *work)
1577 struct ufs_hba *hba = container_of(work, struct ufs_hba,
1578 clk_gating.gate_work.work);
1579 unsigned long flags;
1581 spin_lock_irqsave(hba->host->host_lock, flags);
1583 * In case you are here to cancel this work the gating state
1584 * would be marked as REQ_CLKS_ON. In this case save time by
1585 * skipping the gating work and exit after changing the clock
1588 if (hba->clk_gating.is_suspended ||
1589 (hba->clk_gating.state != REQ_CLKS_OFF)) {
1590 hba->clk_gating.state = CLKS_ON;
1591 trace_ufshcd_clk_gating(dev_name(hba->dev),
1592 hba->clk_gating.state);
1596 if (hba->clk_gating.active_reqs
1597 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1598 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1599 || hba->active_uic_cmd || hba->uic_async_done)
1602 spin_unlock_irqrestore(hba->host->host_lock, flags);
1604 /* put the link into hibern8 mode before turning off clocks */
1605 if (ufshcd_can_hibern8_during_gating(hba)) {
1606 if (ufshcd_uic_hibern8_enter(hba)) {
1607 hba->clk_gating.state = CLKS_ON;
1608 trace_ufshcd_clk_gating(dev_name(hba->dev),
1609 hba->clk_gating.state);
1612 ufshcd_set_link_hibern8(hba);
1615 if (!ufshcd_is_link_active(hba))
1616 ufshcd_setup_clocks(hba, false);
1618 /* If link is active, device ref_clk can't be switched off */
1619 __ufshcd_setup_clocks(hba, false, true);
1622 * In case you are here to cancel this work the gating state
1623 * would be marked as REQ_CLKS_ON. In this case keep the state
1624 * as REQ_CLKS_ON which would anyway imply that clocks are off
1625 * and a request to turn them on is pending. By doing this way,
1626 * we keep the state machine in tact and this would ultimately
1627 * prevent from doing cancel work multiple times when there are
1628 * new requests arriving before the current cancel work is done.
1630 spin_lock_irqsave(hba->host->host_lock, flags);
1631 if (hba->clk_gating.state == REQ_CLKS_OFF) {
1632 hba->clk_gating.state = CLKS_OFF;
1633 trace_ufshcd_clk_gating(dev_name(hba->dev),
1634 hba->clk_gating.state);
1637 spin_unlock_irqrestore(hba->host->host_lock, flags);
1642 /* host lock must be held before calling this variant */
1643 static void __ufshcd_release(struct ufs_hba *hba)
1645 if (!ufshcd_is_clkgating_allowed(hba))
1648 hba->clk_gating.active_reqs--;
1650 if (hba->clk_gating.active_reqs || hba->clk_gating.is_suspended
1651 || hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL
1652 || ufshcd_any_tag_in_use(hba) || hba->outstanding_tasks
1653 || hba->active_uic_cmd || hba->uic_async_done
1654 || ufshcd_eh_in_progress(hba))
1657 hba->clk_gating.state = REQ_CLKS_OFF;
1658 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
1659 queue_delayed_work(hba->clk_gating.clk_gating_workq,
1660 &hba->clk_gating.gate_work,
1661 msecs_to_jiffies(hba->clk_gating.delay_ms));
1664 void ufshcd_release(struct ufs_hba *hba)
1666 unsigned long flags;
1668 spin_lock_irqsave(hba->host->host_lock, flags);
1669 __ufshcd_release(hba);
1670 spin_unlock_irqrestore(hba->host->host_lock, flags);
1672 EXPORT_SYMBOL_GPL(ufshcd_release);
1674 static ssize_t ufshcd_clkgate_delay_show(struct device *dev,
1675 struct device_attribute *attr, char *buf)
1677 struct ufs_hba *hba = dev_get_drvdata(dev);
1679 return snprintf(buf, PAGE_SIZE, "%lu\n", hba->clk_gating.delay_ms);
1682 static ssize_t ufshcd_clkgate_delay_store(struct device *dev,
1683 struct device_attribute *attr, const char *buf, size_t count)
1685 struct ufs_hba *hba = dev_get_drvdata(dev);
1686 unsigned long flags, value;
1688 if (kstrtoul(buf, 0, &value))
1691 spin_lock_irqsave(hba->host->host_lock, flags);
1692 hba->clk_gating.delay_ms = value;
1693 spin_unlock_irqrestore(hba->host->host_lock, flags);
1697 static ssize_t ufshcd_clkgate_enable_show(struct device *dev,
1698 struct device_attribute *attr, char *buf)
1700 struct ufs_hba *hba = dev_get_drvdata(dev);
1702 return snprintf(buf, PAGE_SIZE, "%d\n", hba->clk_gating.is_enabled);
1705 static ssize_t ufshcd_clkgate_enable_store(struct device *dev,
1706 struct device_attribute *attr, const char *buf, size_t count)
1708 struct ufs_hba *hba = dev_get_drvdata(dev);
1709 unsigned long flags;
1712 if (kstrtou32(buf, 0, &value))
1716 if (value == hba->clk_gating.is_enabled)
1720 ufshcd_release(hba);
1722 spin_lock_irqsave(hba->host->host_lock, flags);
1723 hba->clk_gating.active_reqs++;
1724 spin_unlock_irqrestore(hba->host->host_lock, flags);
1727 hba->clk_gating.is_enabled = value;
1732 static void ufshcd_init_clk_scaling(struct ufs_hba *hba)
1734 char wq_name[sizeof("ufs_clkscaling_00")];
1736 if (!ufshcd_is_clkscaling_supported(hba))
1739 INIT_WORK(&hba->clk_scaling.suspend_work,
1740 ufshcd_clk_scaling_suspend_work);
1741 INIT_WORK(&hba->clk_scaling.resume_work,
1742 ufshcd_clk_scaling_resume_work);
1744 snprintf(wq_name, sizeof(wq_name), "ufs_clkscaling_%d",
1745 hba->host->host_no);
1746 hba->clk_scaling.workq = create_singlethread_workqueue(wq_name);
1748 ufshcd_clkscaling_init_sysfs(hba);
1751 static void ufshcd_exit_clk_scaling(struct ufs_hba *hba)
1753 if (!ufshcd_is_clkscaling_supported(hba))
1756 destroy_workqueue(hba->clk_scaling.workq);
1757 ufshcd_devfreq_remove(hba);
1760 static void ufshcd_init_clk_gating(struct ufs_hba *hba)
1762 char wq_name[sizeof("ufs_clk_gating_00")];
1764 if (!ufshcd_is_clkgating_allowed(hba))
1767 hba->clk_gating.delay_ms = 150;
1768 INIT_DELAYED_WORK(&hba->clk_gating.gate_work, ufshcd_gate_work);
1769 INIT_WORK(&hba->clk_gating.ungate_work, ufshcd_ungate_work);
1771 snprintf(wq_name, ARRAY_SIZE(wq_name), "ufs_clk_gating_%d",
1772 hba->host->host_no);
1773 hba->clk_gating.clk_gating_workq = alloc_ordered_workqueue(wq_name,
1776 hba->clk_gating.is_enabled = true;
1778 hba->clk_gating.delay_attr.show = ufshcd_clkgate_delay_show;
1779 hba->clk_gating.delay_attr.store = ufshcd_clkgate_delay_store;
1780 sysfs_attr_init(&hba->clk_gating.delay_attr.attr);
1781 hba->clk_gating.delay_attr.attr.name = "clkgate_delay_ms";
1782 hba->clk_gating.delay_attr.attr.mode = 0644;
1783 if (device_create_file(hba->dev, &hba->clk_gating.delay_attr))
1784 dev_err(hba->dev, "Failed to create sysfs for clkgate_delay\n");
1786 hba->clk_gating.enable_attr.show = ufshcd_clkgate_enable_show;
1787 hba->clk_gating.enable_attr.store = ufshcd_clkgate_enable_store;
1788 sysfs_attr_init(&hba->clk_gating.enable_attr.attr);
1789 hba->clk_gating.enable_attr.attr.name = "clkgate_enable";
1790 hba->clk_gating.enable_attr.attr.mode = 0644;
1791 if (device_create_file(hba->dev, &hba->clk_gating.enable_attr))
1792 dev_err(hba->dev, "Failed to create sysfs for clkgate_enable\n");
1795 static void ufshcd_exit_clk_gating(struct ufs_hba *hba)
1797 if (!ufshcd_is_clkgating_allowed(hba))
1799 device_remove_file(hba->dev, &hba->clk_gating.delay_attr);
1800 device_remove_file(hba->dev, &hba->clk_gating.enable_attr);
1801 cancel_work_sync(&hba->clk_gating.ungate_work);
1802 cancel_delayed_work_sync(&hba->clk_gating.gate_work);
1803 destroy_workqueue(hba->clk_gating.clk_gating_workq);
1806 /* Must be called with host lock acquired */
1807 static void ufshcd_clk_scaling_start_busy(struct ufs_hba *hba)
1809 bool queue_resume_work = false;
1811 if (!ufshcd_is_clkscaling_supported(hba))
1814 if (!hba->clk_scaling.active_reqs++)
1815 queue_resume_work = true;
1817 if (!hba->clk_scaling.is_allowed || hba->pm_op_in_progress)
1820 if (queue_resume_work)
1821 queue_work(hba->clk_scaling.workq,
1822 &hba->clk_scaling.resume_work);
1824 if (!hba->clk_scaling.window_start_t) {
1825 hba->clk_scaling.window_start_t = jiffies;
1826 hba->clk_scaling.tot_busy_t = 0;
1827 hba->clk_scaling.is_busy_started = false;
1830 if (!hba->clk_scaling.is_busy_started) {
1831 hba->clk_scaling.busy_start_t = ktime_get();
1832 hba->clk_scaling.is_busy_started = true;
1836 static void ufshcd_clk_scaling_update_busy(struct ufs_hba *hba)
1838 struct ufs_clk_scaling *scaling = &hba->clk_scaling;
1840 if (!ufshcd_is_clkscaling_supported(hba))
1843 if (!hba->outstanding_reqs && scaling->is_busy_started) {
1844 scaling->tot_busy_t += ktime_to_us(ktime_sub(ktime_get(),
1845 scaling->busy_start_t));
1846 scaling->busy_start_t = 0;
1847 scaling->is_busy_started = false;
1851 * ufshcd_send_command - Send SCSI or device management commands
1852 * @hba: per adapter instance
1853 * @task_tag: Task tag of the command
1856 void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
1858 hba->lrb[task_tag].issue_time_stamp = ktime_get();
1859 hba->lrb[task_tag].compl_time_stamp = ktime_set(0, 0);
1860 ufshcd_clk_scaling_start_busy(hba);
1861 __set_bit(task_tag, &hba->outstanding_reqs);
1862 ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
1863 /* Make sure that doorbell is committed immediately */
1865 ufshcd_add_command_trace(hba, task_tag, "send");
1869 * ufshcd_copy_sense_data - Copy sense data in case of check condition
1870 * @lrbp: pointer to local reference block
1872 static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
1875 if (lrbp->sense_buffer &&
1876 ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
1879 len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
1880 len_to_copy = min_t(int, UFS_SENSE_SIZE, len);
1882 memcpy(lrbp->sense_buffer, lrbp->ucd_rsp_ptr->sr.sense_data,
1888 * ufshcd_copy_query_response() - Copy the Query Response and the data
1890 * @hba: per adapter instance
1891 * @lrbp: pointer to local reference block
1894 int ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
1896 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
1898 memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
1900 /* Get the descriptor */
1901 if (hba->dev_cmd.query.descriptor &&
1902 lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
1903 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr +
1904 GENERAL_UPIU_REQUEST_SIZE;
1908 /* data segment length */
1909 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
1910 MASK_QUERY_DATA_SEG_LEN;
1911 buf_len = be16_to_cpu(
1912 hba->dev_cmd.query.request.upiu_req.length);
1913 if (likely(buf_len >= resp_len)) {
1914 memcpy(hba->dev_cmd.query.descriptor, descp, resp_len);
1917 "%s: rsp size %d is bigger than buffer size %d",
1918 __func__, resp_len, buf_len);
1927 * ufshcd_hba_capabilities - Read controller capabilities
1928 * @hba: per adapter instance
1930 static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
1932 hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
1934 /* nutrs and nutmrs are 0 based values */
1935 hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
1937 ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
1941 * ufshcd_ready_for_uic_cmd - Check if controller is ready
1942 * to accept UIC commands
1943 * @hba: per adapter instance
1944 * Return true on success, else false
1946 static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
1948 if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
1955 * ufshcd_get_upmcrs - Get the power mode change request status
1956 * @hba: Pointer to adapter instance
1958 * This function gets the UPMCRS field of HCS register
1959 * Returns value of UPMCRS field
1961 static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
1963 return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
1967 * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
1968 * @hba: per adapter instance
1969 * @uic_cmd: UIC command
1971 * Mutex must be held.
1974 ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
1976 WARN_ON(hba->active_uic_cmd);
1978 hba->active_uic_cmd = uic_cmd;
1981 ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
1982 ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
1983 ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
1986 ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
1991 * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
1992 * @hba: per adapter instance
1993 * @uic_cmd: UIC command
1995 * Must be called with mutex held.
1996 * Returns 0 only if success.
1999 ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2002 unsigned long flags;
2004 if (wait_for_completion_timeout(&uic_cmd->done,
2005 msecs_to_jiffies(UIC_CMD_TIMEOUT)))
2006 ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
2010 spin_lock_irqsave(hba->host->host_lock, flags);
2011 hba->active_uic_cmd = NULL;
2012 spin_unlock_irqrestore(hba->host->host_lock, flags);
2018 * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2019 * @hba: per adapter instance
2020 * @uic_cmd: UIC command
2021 * @completion: initialize the completion only if this is set to true
2023 * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
2024 * with mutex held and host_lock locked.
2025 * Returns 0 only if success.
2028 __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd,
2031 if (!ufshcd_ready_for_uic_cmd(hba)) {
2033 "Controller not ready to accept UIC commands\n");
2038 init_completion(&uic_cmd->done);
2040 ufshcd_dispatch_uic_cmd(hba, uic_cmd);
2046 * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
2047 * @hba: per adapter instance
2048 * @uic_cmd: UIC command
2050 * Returns 0 only if success.
2052 int ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
2055 unsigned long flags;
2057 ufshcd_hold(hba, false);
2058 mutex_lock(&hba->uic_cmd_mutex);
2059 ufshcd_add_delay_before_dme_cmd(hba);
2061 spin_lock_irqsave(hba->host->host_lock, flags);
2062 ret = __ufshcd_send_uic_cmd(hba, uic_cmd, true);
2063 spin_unlock_irqrestore(hba->host->host_lock, flags);
2065 ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
2067 mutex_unlock(&hba->uic_cmd_mutex);
2069 ufshcd_release(hba);
2074 * ufshcd_map_sg - Map scatter-gather list to prdt
2075 * @hba: per adapter instance
2076 * @lrbp: pointer to local reference block
2078 * Returns 0 in case of success, non-zero value in case of failure
2080 static int ufshcd_map_sg(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2082 struct ufshcd_sg_entry *prd_table;
2083 struct scatterlist *sg;
2084 struct scsi_cmnd *cmd;
2089 sg_segments = scsi_dma_map(cmd);
2090 if (sg_segments < 0)
2094 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN)
2095 lrbp->utr_descriptor_ptr->prd_table_length =
2096 cpu_to_le16((u16)(sg_segments *
2097 sizeof(struct ufshcd_sg_entry)));
2099 lrbp->utr_descriptor_ptr->prd_table_length =
2100 cpu_to_le16((u16) (sg_segments));
2102 prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
2104 scsi_for_each_sg(cmd, sg, sg_segments, i) {
2106 cpu_to_le32(((u32) sg_dma_len(sg))-1);
2107 prd_table[i].base_addr =
2108 cpu_to_le32(lower_32_bits(sg->dma_address));
2109 prd_table[i].upper_addr =
2110 cpu_to_le32(upper_32_bits(sg->dma_address));
2111 prd_table[i].reserved = 0;
2114 lrbp->utr_descriptor_ptr->prd_table_length = 0;
2121 * ufshcd_enable_intr - enable interrupts
2122 * @hba: per adapter instance
2123 * @intrs: interrupt bits
2125 static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
2127 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2129 if (hba->ufs_version == UFSHCI_VERSION_10) {
2131 rw = set & INTERRUPT_MASK_RW_VER_10;
2132 set = rw | ((set ^ intrs) & intrs);
2137 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2141 * ufshcd_disable_intr - disable interrupts
2142 * @hba: per adapter instance
2143 * @intrs: interrupt bits
2145 static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
2147 u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
2149 if (hba->ufs_version == UFSHCI_VERSION_10) {
2151 rw = (set & INTERRUPT_MASK_RW_VER_10) &
2152 ~(intrs & INTERRUPT_MASK_RW_VER_10);
2153 set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
2159 ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
2163 * ufshcd_prepare_req_desc_hdr() - Fills the requests header
2164 * descriptor according to request
2165 * @lrbp: pointer to local reference block
2166 * @upiu_flags: flags required in the header
2167 * @cmd_dir: requests data direction
2169 static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
2170 u32 *upiu_flags, enum dma_data_direction cmd_dir)
2172 struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
2176 if (cmd_dir == DMA_FROM_DEVICE) {
2177 data_direction = UTP_DEVICE_TO_HOST;
2178 *upiu_flags = UPIU_CMD_FLAGS_READ;
2179 } else if (cmd_dir == DMA_TO_DEVICE) {
2180 data_direction = UTP_HOST_TO_DEVICE;
2181 *upiu_flags = UPIU_CMD_FLAGS_WRITE;
2183 data_direction = UTP_NO_DATA_TRANSFER;
2184 *upiu_flags = UPIU_CMD_FLAGS_NONE;
2187 dword_0 = data_direction | (lrbp->command_type
2188 << UPIU_COMMAND_TYPE_OFFSET);
2190 dword_0 |= UTP_REQ_DESC_INT_CMD;
2192 /* Transfer request descriptor header fields */
2193 req_desc->header.dword_0 = cpu_to_le32(dword_0);
2194 /* dword_1 is reserved, hence it is set to 0 */
2195 req_desc->header.dword_1 = 0;
2197 * assigning invalid value for command status. Controller
2198 * updates OCS on command completion, with the command
2201 req_desc->header.dword_2 =
2202 cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
2203 /* dword_3 is reserved, hence it is set to 0 */
2204 req_desc->header.dword_3 = 0;
2206 req_desc->prd_table_length = 0;
2210 * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
2212 * @lrbp: local reference block pointer
2213 * @upiu_flags: flags
2216 void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
2218 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2219 unsigned short cdb_len;
2221 /* command descriptor fields */
2222 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2223 UPIU_TRANSACTION_COMMAND, upiu_flags,
2224 lrbp->lun, lrbp->task_tag);
2225 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2226 UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
2228 /* Total EHS length and Data segment length will be zero */
2229 ucd_req_ptr->header.dword_2 = 0;
2231 ucd_req_ptr->sc.exp_data_transfer_len =
2232 cpu_to_be32(lrbp->cmd->sdb.length);
2234 cdb_len = min_t(unsigned short, lrbp->cmd->cmd_len, UFS_CDB_SIZE);
2235 memset(ucd_req_ptr->sc.cdb, 0, UFS_CDB_SIZE);
2236 memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd, cdb_len);
2238 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2242 * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
2245 * @lrbp: local reference block pointer
2246 * @upiu_flags: flags
2248 static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
2249 struct ufshcd_lrb *lrbp, u32 upiu_flags)
2251 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2252 struct ufs_query *query = &hba->dev_cmd.query;
2253 u16 len = be16_to_cpu(query->request.upiu_req.length);
2255 /* Query request header */
2256 ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
2257 UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
2258 lrbp->lun, lrbp->task_tag);
2259 ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
2260 0, query->request.query_func, 0, 0);
2262 /* Data segment length only need for WRITE_DESC */
2263 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2264 ucd_req_ptr->header.dword_2 =
2265 UPIU_HEADER_DWORD(0, 0, (len >> 8), (u8)len);
2267 ucd_req_ptr->header.dword_2 = 0;
2269 /* Copy the Query Request buffer as is */
2270 memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
2273 /* Copy the Descriptor */
2274 if (query->request.upiu_req.opcode == UPIU_QUERY_OPCODE_WRITE_DESC)
2275 memcpy(ucd_req_ptr + 1, query->descriptor, len);
2277 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2280 static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
2282 struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
2284 memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
2286 /* command descriptor fields */
2287 ucd_req_ptr->header.dword_0 =
2289 UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
2290 /* clear rest of the fields of basic header */
2291 ucd_req_ptr->header.dword_1 = 0;
2292 ucd_req_ptr->header.dword_2 = 0;
2294 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
2298 * ufshcd_comp_devman_upiu - UFS Protocol Information Unit(UPIU)
2299 * for Device Management Purposes
2300 * @hba: per adapter instance
2301 * @lrbp: pointer to local reference block
2303 static int ufshcd_comp_devman_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2308 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2309 (hba->ufs_version == UFSHCI_VERSION_11))
2310 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
2312 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2314 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
2315 if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
2316 ufshcd_prepare_utp_query_req_upiu(hba, lrbp, upiu_flags);
2317 else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
2318 ufshcd_prepare_utp_nop_upiu(lrbp);
2326 * ufshcd_comp_scsi_upiu - UFS Protocol Information Unit(UPIU)
2328 * @hba: per adapter instance
2329 * @lrbp: pointer to local reference block
2331 static int ufshcd_comp_scsi_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2336 if ((hba->ufs_version == UFSHCI_VERSION_10) ||
2337 (hba->ufs_version == UFSHCI_VERSION_11))
2338 lrbp->command_type = UTP_CMD_TYPE_SCSI;
2340 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
2342 if (likely(lrbp->cmd)) {
2343 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
2344 lrbp->cmd->sc_data_direction);
2345 ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
2354 * ufshcd_upiu_wlun_to_scsi_wlun - maps UPIU W-LUN id to SCSI W-LUN ID
2355 * @upiu_wlun_id: UPIU W-LUN id
2357 * Returns SCSI W-LUN id
2359 static inline u16 ufshcd_upiu_wlun_to_scsi_wlun(u8 upiu_wlun_id)
2361 return (upiu_wlun_id & ~UFS_UPIU_WLUN_ID) | SCSI_W_LUN_BASE;
2365 * ufshcd_queuecommand - main entry point for SCSI requests
2366 * @host: SCSI host pointer
2367 * @cmd: command from SCSI Midlayer
2369 * Returns 0 for success, non-zero in case of failure
2371 static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
2373 struct ufshcd_lrb *lrbp;
2374 struct ufs_hba *hba;
2375 unsigned long flags;
2379 hba = shost_priv(host);
2381 tag = cmd->request->tag;
2382 if (!ufshcd_valid_tag(hba, tag)) {
2384 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
2385 __func__, tag, cmd, cmd->request);
2389 if (!down_read_trylock(&hba->clk_scaling_lock))
2390 return SCSI_MLQUEUE_HOST_BUSY;
2392 spin_lock_irqsave(hba->host->host_lock, flags);
2393 switch (hba->ufshcd_state) {
2394 case UFSHCD_STATE_OPERATIONAL:
2396 case UFSHCD_STATE_EH_SCHEDULED:
2397 case UFSHCD_STATE_RESET:
2398 err = SCSI_MLQUEUE_HOST_BUSY;
2400 case UFSHCD_STATE_ERROR:
2401 set_host_byte(cmd, DID_ERROR);
2402 cmd->scsi_done(cmd);
2405 dev_WARN_ONCE(hba->dev, 1, "%s: invalid state %d\n",
2406 __func__, hba->ufshcd_state);
2407 set_host_byte(cmd, DID_BAD_TARGET);
2408 cmd->scsi_done(cmd);
2412 /* if error handling is in progress, don't issue commands */
2413 if (ufshcd_eh_in_progress(hba)) {
2414 set_host_byte(cmd, DID_ERROR);
2415 cmd->scsi_done(cmd);
2418 spin_unlock_irqrestore(hba->host->host_lock, flags);
2420 hba->req_abort_count = 0;
2422 err = ufshcd_hold(hba, true);
2424 err = SCSI_MLQUEUE_HOST_BUSY;
2427 WARN_ON(hba->clk_gating.state != CLKS_ON);
2429 lrbp = &hba->lrb[tag];
2433 lrbp->sense_bufflen = UFS_SENSE_SIZE;
2434 lrbp->sense_buffer = cmd->sense_buffer;
2435 lrbp->task_tag = tag;
2436 lrbp->lun = ufshcd_scsi_to_upiu_lun(cmd->device->lun);
2437 lrbp->intr_cmd = !ufshcd_is_intr_aggr_allowed(hba) ? true : false;
2438 lrbp->req_abort_skip = false;
2440 ufshcd_comp_scsi_upiu(hba, lrbp);
2442 err = ufshcd_map_sg(hba, lrbp);
2445 ufshcd_release(hba);
2448 /* Make sure descriptors are ready before ringing the doorbell */
2451 /* issue command to the controller */
2452 spin_lock_irqsave(hba->host->host_lock, flags);
2453 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2454 ufshcd_send_command(hba, tag);
2456 spin_unlock_irqrestore(hba->host->host_lock, flags);
2458 up_read(&hba->clk_scaling_lock);
2462 static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
2463 struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
2466 lrbp->sense_bufflen = 0;
2467 lrbp->sense_buffer = NULL;
2468 lrbp->task_tag = tag;
2469 lrbp->lun = 0; /* device management cmd is not specific to any LUN */
2470 lrbp->intr_cmd = true; /* No interrupt aggregation */
2471 hba->dev_cmd.type = cmd_type;
2473 return ufshcd_comp_devman_upiu(hba, lrbp);
2477 ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
2480 unsigned long flags;
2481 u32 mask = 1 << tag;
2483 /* clear outstanding transaction before retry */
2484 spin_lock_irqsave(hba->host->host_lock, flags);
2485 ufshcd_utrl_clear(hba, tag);
2486 spin_unlock_irqrestore(hba->host->host_lock, flags);
2489 * wait for for h/w to clear corresponding bit in door-bell.
2490 * max. wait is 1 sec.
2492 err = ufshcd_wait_for_register(hba,
2493 REG_UTP_TRANSFER_REQ_DOOR_BELL,
2494 mask, ~mask, 1000, 1000, true);
2500 ufshcd_check_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2502 struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
2504 /* Get the UPIU response */
2505 query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
2506 UPIU_RSP_CODE_OFFSET;
2507 return query_res->response;
2511 * ufshcd_dev_cmd_completion() - handles device management command responses
2512 * @hba: per adapter instance
2513 * @lrbp: pointer to local reference block
2516 ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
2521 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
2522 resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
2525 case UPIU_TRANSACTION_NOP_IN:
2526 if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
2528 dev_err(hba->dev, "%s: unexpected response %x\n",
2532 case UPIU_TRANSACTION_QUERY_RSP:
2533 err = ufshcd_check_query_response(hba, lrbp);
2535 err = ufshcd_copy_query_response(hba, lrbp);
2537 case UPIU_TRANSACTION_REJECT_UPIU:
2538 /* TODO: handle Reject UPIU Response */
2540 dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
2545 dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
2553 static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
2554 struct ufshcd_lrb *lrbp, int max_timeout)
2557 unsigned long time_left;
2558 unsigned long flags;
2560 time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
2561 msecs_to_jiffies(max_timeout));
2563 /* Make sure descriptors are ready before ringing the doorbell */
2565 spin_lock_irqsave(hba->host->host_lock, flags);
2566 hba->dev_cmd.complete = NULL;
2567 if (likely(time_left)) {
2568 err = ufshcd_get_tr_ocs(lrbp);
2570 err = ufshcd_dev_cmd_completion(hba, lrbp);
2572 spin_unlock_irqrestore(hba->host->host_lock, flags);
2576 dev_dbg(hba->dev, "%s: dev_cmd request timedout, tag %d\n",
2577 __func__, lrbp->task_tag);
2578 if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
2579 /* successfully cleared the command, retry if needed */
2582 * in case of an error, after clearing the doorbell,
2583 * we also need to clear the outstanding_request
2586 ufshcd_outstanding_req_clear(hba, lrbp->task_tag);
2593 * ufshcd_exec_dev_cmd - API for sending device management requests
2595 * @cmd_type: specifies the type (NOP, Query...)
2596 * @timeout: time in seconds
2598 * NOTE: Since there is only one available tag for device management commands,
2599 * it is expected you hold the hba->dev_cmd.lock mutex.
2601 static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
2602 enum dev_cmd_type cmd_type, int timeout)
2604 struct request_queue *q = hba->cmd_queue;
2605 struct request *req;
2606 struct ufshcd_lrb *lrbp;
2609 struct completion wait;
2610 unsigned long flags;
2612 down_read(&hba->clk_scaling_lock);
2615 * Get free slot, sleep if slots are unavailable.
2616 * Even though we use wait_event() which sleeps indefinitely,
2617 * the maximum wait time is bounded by SCSI request timeout.
2619 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
2625 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
2627 init_completion(&wait);
2628 lrbp = &hba->lrb[tag];
2630 err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
2634 hba->dev_cmd.complete = &wait;
2636 ufshcd_add_query_upiu_trace(hba, tag, "query_send");
2637 /* Make sure descriptors are ready before ringing the doorbell */
2639 spin_lock_irqsave(hba->host->host_lock, flags);
2640 ufshcd_vops_setup_xfer_req(hba, tag, (lrbp->cmd ? true : false));
2641 ufshcd_send_command(hba, tag);
2642 spin_unlock_irqrestore(hba->host->host_lock, flags);
2644 err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
2646 ufshcd_add_query_upiu_trace(hba, tag,
2647 err ? "query_complete_err" : "query_complete");
2650 blk_put_request(req);
2652 up_read(&hba->clk_scaling_lock);
2657 * ufshcd_init_query() - init the query response and request parameters
2658 * @hba: per-adapter instance
2659 * @request: address of the request pointer to be initialized
2660 * @response: address of the response pointer to be initialized
2661 * @opcode: operation to perform
2662 * @idn: flag idn to access
2663 * @index: LU number to access
2664 * @selector: query/flag/descriptor further identification
2666 static inline void ufshcd_init_query(struct ufs_hba *hba,
2667 struct ufs_query_req **request, struct ufs_query_res **response,
2668 enum query_opcode opcode, u8 idn, u8 index, u8 selector)
2670 *request = &hba->dev_cmd.query.request;
2671 *response = &hba->dev_cmd.query.response;
2672 memset(*request, 0, sizeof(struct ufs_query_req));
2673 memset(*response, 0, sizeof(struct ufs_query_res));
2674 (*request)->upiu_req.opcode = opcode;
2675 (*request)->upiu_req.idn = idn;
2676 (*request)->upiu_req.index = index;
2677 (*request)->upiu_req.selector = selector;
2680 static int ufshcd_query_flag_retry(struct ufs_hba *hba,
2681 enum query_opcode opcode, enum flag_idn idn, bool *flag_res)
2686 for (retries = 0; retries < QUERY_REQ_RETRIES; retries++) {
2687 ret = ufshcd_query_flag(hba, opcode, idn, flag_res);
2690 "%s: failed with error %d, retries %d\n",
2691 __func__, ret, retries);
2698 "%s: query attribute, opcode %d, idn %d, failed with error %d after %d retires\n",
2699 __func__, opcode, idn, ret, retries);
2704 * ufshcd_query_flag() - API function for sending flag query requests
2705 * @hba: per-adapter instance
2706 * @opcode: flag query to perform
2707 * @idn: flag idn to access
2708 * @flag_res: the flag value after the query request completes
2710 * Returns 0 for success, non-zero in case of failure
2712 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
2713 enum flag_idn idn, bool *flag_res)
2715 struct ufs_query_req *request = NULL;
2716 struct ufs_query_res *response = NULL;
2717 int err, index = 0, selector = 0;
2718 int timeout = QUERY_REQ_TIMEOUT;
2722 ufshcd_hold(hba, false);
2723 mutex_lock(&hba->dev_cmd.lock);
2724 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2728 case UPIU_QUERY_OPCODE_SET_FLAG:
2729 case UPIU_QUERY_OPCODE_CLEAR_FLAG:
2730 case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
2731 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2733 case UPIU_QUERY_OPCODE_READ_FLAG:
2734 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2736 /* No dummy reads */
2737 dev_err(hba->dev, "%s: Invalid argument for read request\n",
2745 "%s: Expected query flag opcode but got = %d\n",
2751 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, timeout);
2755 "%s: Sending flag query for idn %d failed, err = %d\n",
2756 __func__, idn, err);
2761 *flag_res = (be32_to_cpu(response->upiu_res.value) &
2762 MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
2765 mutex_unlock(&hba->dev_cmd.lock);
2766 ufshcd_release(hba);
2771 * ufshcd_query_attr - API function for sending attribute requests
2772 * @hba: per-adapter instance
2773 * @opcode: attribute opcode
2774 * @idn: attribute idn to access
2775 * @index: index field
2776 * @selector: selector field
2777 * @attr_val: the attribute value after the query request completes
2779 * Returns 0 for success, non-zero in case of failure
2781 int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
2782 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
2784 struct ufs_query_req *request = NULL;
2785 struct ufs_query_res *response = NULL;
2790 ufshcd_hold(hba, false);
2792 dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
2798 mutex_lock(&hba->dev_cmd.lock);
2799 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2803 case UPIU_QUERY_OPCODE_WRITE_ATTR:
2804 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2805 request->upiu_req.value = cpu_to_be32(*attr_val);
2807 case UPIU_QUERY_OPCODE_READ_ATTR:
2808 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2811 dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
2817 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2820 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2821 __func__, opcode, idn, index, err);
2825 *attr_val = be32_to_cpu(response->upiu_res.value);
2828 mutex_unlock(&hba->dev_cmd.lock);
2830 ufshcd_release(hba);
2835 * ufshcd_query_attr_retry() - API function for sending query
2836 * attribute with retries
2837 * @hba: per-adapter instance
2838 * @opcode: attribute opcode
2839 * @idn: attribute idn to access
2840 * @index: index field
2841 * @selector: selector field
2842 * @attr_val: the attribute value after the query request
2845 * Returns 0 for success, non-zero in case of failure
2847 static int ufshcd_query_attr_retry(struct ufs_hba *hba,
2848 enum query_opcode opcode, enum attr_idn idn, u8 index, u8 selector,
2854 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2855 ret = ufshcd_query_attr(hba, opcode, idn, index,
2856 selector, attr_val);
2858 dev_dbg(hba->dev, "%s: failed with error %d, retries %d\n",
2859 __func__, ret, retries);
2866 "%s: query attribute, idn %d, failed with error %d after %d retires\n",
2867 __func__, idn, ret, QUERY_REQ_RETRIES);
2871 static int __ufshcd_query_descriptor(struct ufs_hba *hba,
2872 enum query_opcode opcode, enum desc_idn idn, u8 index,
2873 u8 selector, u8 *desc_buf, int *buf_len)
2875 struct ufs_query_req *request = NULL;
2876 struct ufs_query_res *response = NULL;
2881 ufshcd_hold(hba, false);
2883 dev_err(hba->dev, "%s: descriptor buffer required for opcode 0x%x\n",
2889 if (*buf_len < QUERY_DESC_MIN_SIZE || *buf_len > QUERY_DESC_MAX_SIZE) {
2890 dev_err(hba->dev, "%s: descriptor buffer size (%d) is out of range\n",
2891 __func__, *buf_len);
2896 mutex_lock(&hba->dev_cmd.lock);
2897 ufshcd_init_query(hba, &request, &response, opcode, idn, index,
2899 hba->dev_cmd.query.descriptor = desc_buf;
2900 request->upiu_req.length = cpu_to_be16(*buf_len);
2903 case UPIU_QUERY_OPCODE_WRITE_DESC:
2904 request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
2906 case UPIU_QUERY_OPCODE_READ_DESC:
2907 request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
2911 "%s: Expected query descriptor opcode but got = 0x%.2x\n",
2917 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY, QUERY_REQ_TIMEOUT);
2920 dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, index %d, err = %d\n",
2921 __func__, opcode, idn, index, err);
2925 *buf_len = be16_to_cpu(response->upiu_res.length);
2928 hba->dev_cmd.query.descriptor = NULL;
2929 mutex_unlock(&hba->dev_cmd.lock);
2931 ufshcd_release(hba);
2936 * ufshcd_query_descriptor_retry - API function for sending descriptor requests
2937 * @hba: per-adapter instance
2938 * @opcode: attribute opcode
2939 * @idn: attribute idn to access
2940 * @index: index field
2941 * @selector: selector field
2942 * @desc_buf: the buffer that contains the descriptor
2943 * @buf_len: length parameter passed to the device
2945 * Returns 0 for success, non-zero in case of failure.
2946 * The buf_len parameter will contain, on return, the length parameter
2947 * received on the response.
2949 int ufshcd_query_descriptor_retry(struct ufs_hba *hba,
2950 enum query_opcode opcode,
2951 enum desc_idn idn, u8 index,
2953 u8 *desc_buf, int *buf_len)
2958 for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
2959 err = __ufshcd_query_descriptor(hba, opcode, idn, index,
2960 selector, desc_buf, buf_len);
2961 if (!err || err == -EINVAL)
2969 * ufshcd_read_desc_length - read the specified descriptor length from header
2970 * @hba: Pointer to adapter instance
2971 * @desc_id: descriptor idn value
2972 * @desc_index: descriptor index
2973 * @desc_length: pointer to variable to read the length of descriptor
2975 * Return 0 in case of success, non-zero otherwise
2977 static int ufshcd_read_desc_length(struct ufs_hba *hba,
2978 enum desc_idn desc_id,
2983 u8 header[QUERY_DESC_HDR_SIZE];
2984 int header_len = QUERY_DESC_HDR_SIZE;
2986 if (desc_id >= QUERY_DESC_IDN_MAX)
2989 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
2990 desc_id, desc_index, 0, header,
2994 dev_err(hba->dev, "%s: Failed to get descriptor header id %d",
2997 } else if (desc_id != header[QUERY_DESC_DESC_TYPE_OFFSET]) {
2998 dev_warn(hba->dev, "%s: descriptor header id %d and desc_id %d mismatch",
2999 __func__, header[QUERY_DESC_DESC_TYPE_OFFSET],
3004 *desc_length = header[QUERY_DESC_LENGTH_OFFSET];
3010 * ufshcd_map_desc_id_to_length - map descriptor IDN to its length
3011 * @hba: Pointer to adapter instance
3012 * @desc_id: descriptor idn value
3013 * @desc_len: mapped desc length (out)
3015 * Return 0 in case of success, non-zero otherwise
3017 int ufshcd_map_desc_id_to_length(struct ufs_hba *hba,
3018 enum desc_idn desc_id, int *desc_len)
3021 case QUERY_DESC_IDN_DEVICE:
3022 *desc_len = hba->desc_size.dev_desc;
3024 case QUERY_DESC_IDN_POWER:
3025 *desc_len = hba->desc_size.pwr_desc;
3027 case QUERY_DESC_IDN_GEOMETRY:
3028 *desc_len = hba->desc_size.geom_desc;
3030 case QUERY_DESC_IDN_CONFIGURATION:
3031 *desc_len = hba->desc_size.conf_desc;
3033 case QUERY_DESC_IDN_UNIT:
3034 *desc_len = hba->desc_size.unit_desc;
3036 case QUERY_DESC_IDN_INTERCONNECT:
3037 *desc_len = hba->desc_size.interc_desc;
3039 case QUERY_DESC_IDN_STRING:
3040 *desc_len = QUERY_DESC_MAX_SIZE;
3042 case QUERY_DESC_IDN_HEALTH:
3043 *desc_len = hba->desc_size.hlth_desc;
3045 case QUERY_DESC_IDN_RFU_0:
3046 case QUERY_DESC_IDN_RFU_1:
3055 EXPORT_SYMBOL(ufshcd_map_desc_id_to_length);
3058 * ufshcd_read_desc_param - read the specified descriptor parameter
3059 * @hba: Pointer to adapter instance
3060 * @desc_id: descriptor idn value
3061 * @desc_index: descriptor index
3062 * @param_offset: offset of the parameter to read
3063 * @param_read_buf: pointer to buffer where parameter would be read
3064 * @param_size: sizeof(param_read_buf)
3066 * Return 0 in case of success, non-zero otherwise
3068 int ufshcd_read_desc_param(struct ufs_hba *hba,
3069 enum desc_idn desc_id,
3078 bool is_kmalloc = true;
3081 if (desc_id >= QUERY_DESC_IDN_MAX || !param_size)
3084 /* Get the max length of descriptor from structure filled up at probe
3087 ret = ufshcd_map_desc_id_to_length(hba, desc_id, &buff_len);
3090 if (ret || !buff_len) {
3091 dev_err(hba->dev, "%s: Failed to get full descriptor length",
3096 /* Check whether we need temp memory */
3097 if (param_offset != 0 || param_size < buff_len) {
3098 desc_buf = kmalloc(buff_len, GFP_KERNEL);
3102 desc_buf = param_read_buf;
3106 /* Request for full descriptor */
3107 ret = ufshcd_query_descriptor_retry(hba, UPIU_QUERY_OPCODE_READ_DESC,
3108 desc_id, desc_index, 0,
3109 desc_buf, &buff_len);
3112 dev_err(hba->dev, "%s: Failed reading descriptor. desc_id %d, desc_index %d, param_offset %d, ret %d",
3113 __func__, desc_id, desc_index, param_offset, ret);
3118 if (desc_buf[QUERY_DESC_DESC_TYPE_OFFSET] != desc_id) {
3119 dev_err(hba->dev, "%s: invalid desc_id %d in descriptor header",
3120 __func__, desc_buf[QUERY_DESC_DESC_TYPE_OFFSET]);
3125 /* Check wherher we will not copy more data, than available */
3126 if (is_kmalloc && param_size > buff_len)
3127 param_size = buff_len;
3130 memcpy(param_read_buf, &desc_buf[param_offset], param_size);
3137 static inline int ufshcd_read_desc(struct ufs_hba *hba,
3138 enum desc_idn desc_id,
3143 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size);
3146 static inline int ufshcd_read_power_desc(struct ufs_hba *hba,
3150 return ufshcd_read_desc(hba, QUERY_DESC_IDN_POWER, 0, buf, size);
3153 static int ufshcd_read_device_desc(struct ufs_hba *hba, u8 *buf, u32 size)
3155 return ufshcd_read_desc(hba, QUERY_DESC_IDN_DEVICE, 0, buf, size);
3159 * struct uc_string_id - unicode string
3161 * @len: size of this descriptor inclusive
3162 * @type: descriptor type
3163 * @uc: unicode string character
3165 struct uc_string_id {
3171 /* replace non-printable or non-ASCII characters with spaces */
3172 static inline char ufshcd_remove_non_printable(u8 ch)
3174 return (ch >= 0x20 && ch <= 0x7e) ? ch : ' ';
3178 * ufshcd_read_string_desc - read string descriptor
3179 * @hba: pointer to adapter instance
3180 * @desc_index: descriptor index
3181 * @buf: pointer to buffer where descriptor would be read,
3182 * the caller should free the memory.
3183 * @ascii: if true convert from unicode to ascii characters
3184 * null terminated string.
3187 * * string size on success.
3188 * * -ENOMEM: on allocation failure
3189 * * -EINVAL: on a wrong parameter
3191 int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index,
3192 u8 **buf, bool ascii)
3194 struct uc_string_id *uc_str;
3201 uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL);
3205 ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING,
3207 QUERY_DESC_MAX_SIZE);
3209 dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n",
3210 QUERY_REQ_RETRIES, ret);
3215 if (uc_str->len <= QUERY_DESC_HDR_SIZE) {
3216 dev_dbg(hba->dev, "String Desc is of zero length\n");
3225 /* remove header and divide by 2 to move from UTF16 to UTF8 */
3226 ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1;
3227 str = kzalloc(ascii_len, GFP_KERNEL);
3234 * the descriptor contains string in UTF16 format
3235 * we need to convert to utf-8 so it can be displayed
3237 ret = utf16s_to_utf8s(uc_str->uc,
3238 uc_str->len - QUERY_DESC_HDR_SIZE,
3239 UTF16_BIG_ENDIAN, str, ascii_len);
3241 /* replace non-printable or non-ASCII characters with spaces */
3242 for (i = 0; i < ret; i++)
3243 str[i] = ufshcd_remove_non_printable(str[i]);
3248 str = kmemdup(uc_str, uc_str->len, GFP_KERNEL);
3262 * ufshcd_read_unit_desc_param - read the specified unit descriptor parameter
3263 * @hba: Pointer to adapter instance
3265 * @param_offset: offset of the parameter to read
3266 * @param_read_buf: pointer to buffer where parameter would be read
3267 * @param_size: sizeof(param_read_buf)
3269 * Return 0 in case of success, non-zero otherwise
3271 static inline int ufshcd_read_unit_desc_param(struct ufs_hba *hba,
3273 enum unit_desc_param param_offset,
3278 * Unit descriptors are only available for general purpose LUs (LUN id
3279 * from 0 to 7) and RPMB Well known LU.
3281 if (!ufs_is_valid_unit_desc_lun(lun))
3284 return ufshcd_read_desc_param(hba, QUERY_DESC_IDN_UNIT, lun,
3285 param_offset, param_read_buf, param_size);
3289 * ufshcd_memory_alloc - allocate memory for host memory space data structures
3290 * @hba: per adapter instance
3292 * 1. Allocate DMA memory for Command Descriptor array
3293 * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
3294 * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
3295 * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
3297 * 4. Allocate memory for local reference block(lrb).
3299 * Returns 0 for success, non-zero in case of failure
3301 static int ufshcd_memory_alloc(struct ufs_hba *hba)
3303 size_t utmrdl_size, utrdl_size, ucdl_size;
3305 /* Allocate memory for UTP command descriptors */
3306 ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
3307 hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
3309 &hba->ucdl_dma_addr,
3313 * UFSHCI requires UTP command descriptor to be 128 byte aligned.
3314 * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
3315 * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
3316 * be aligned to 128 bytes as well
3318 if (!hba->ucdl_base_addr ||
3319 WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
3321 "Command Descriptor Memory allocation failed\n");
3326 * Allocate memory for UTP Transfer descriptors
3327 * UFSHCI requires 1024 byte alignment of UTRD
3329 utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
3330 hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
3332 &hba->utrdl_dma_addr,
3334 if (!hba->utrdl_base_addr ||
3335 WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
3337 "Transfer Descriptor Memory allocation failed\n");
3342 * Allocate memory for UTP Task Management descriptors
3343 * UFSHCI requires 1024 byte alignment of UTMRD
3345 utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
3346 hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
3348 &hba->utmrdl_dma_addr,
3350 if (!hba->utmrdl_base_addr ||
3351 WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
3353 "Task Management Descriptor Memory allocation failed\n");
3357 /* Allocate memory for local reference block */
3358 hba->lrb = devm_kcalloc(hba->dev,
3359 hba->nutrs, sizeof(struct ufshcd_lrb),
3362 dev_err(hba->dev, "LRB Memory allocation failed\n");
3371 * ufshcd_host_memory_configure - configure local reference block with
3373 * @hba: per adapter instance
3375 * Configure Host memory space
3376 * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
3378 * 2. Update each UTRD with Response UPIU offset, Response UPIU length
3380 * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
3381 * into local reference block.
3383 static void ufshcd_host_memory_configure(struct ufs_hba *hba)
3385 struct utp_transfer_cmd_desc *cmd_descp;
3386 struct utp_transfer_req_desc *utrdlp;
3387 dma_addr_t cmd_desc_dma_addr;
3388 dma_addr_t cmd_desc_element_addr;
3389 u16 response_offset;
3394 utrdlp = hba->utrdl_base_addr;
3395 cmd_descp = hba->ucdl_base_addr;
3398 offsetof(struct utp_transfer_cmd_desc, response_upiu);
3400 offsetof(struct utp_transfer_cmd_desc, prd_table);
3402 cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
3403 cmd_desc_dma_addr = hba->ucdl_dma_addr;
3405 for (i = 0; i < hba->nutrs; i++) {
3406 /* Configure UTRD with command descriptor base address */
3407 cmd_desc_element_addr =
3408 (cmd_desc_dma_addr + (cmd_desc_size * i));
3409 utrdlp[i].command_desc_base_addr_lo =
3410 cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
3411 utrdlp[i].command_desc_base_addr_hi =
3412 cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
3414 /* Response upiu and prdt offset should be in double words */
3415 if (hba->quirks & UFSHCD_QUIRK_PRDT_BYTE_GRAN) {
3416 utrdlp[i].response_upiu_offset =
3417 cpu_to_le16(response_offset);
3418 utrdlp[i].prd_table_offset =
3419 cpu_to_le16(prdt_offset);
3420 utrdlp[i].response_upiu_length =
3421 cpu_to_le16(ALIGNED_UPIU_SIZE);
3423 utrdlp[i].response_upiu_offset =
3424 cpu_to_le16((response_offset >> 2));
3425 utrdlp[i].prd_table_offset =
3426 cpu_to_le16((prdt_offset >> 2));
3427 utrdlp[i].response_upiu_length =
3428 cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
3431 hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
3432 hba->lrb[i].utrd_dma_addr = hba->utrdl_dma_addr +
3433 (i * sizeof(struct utp_transfer_req_desc));
3434 hba->lrb[i].ucd_req_ptr =
3435 (struct utp_upiu_req *)(cmd_descp + i);
3436 hba->lrb[i].ucd_req_dma_addr = cmd_desc_element_addr;
3437 hba->lrb[i].ucd_rsp_ptr =
3438 (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
3439 hba->lrb[i].ucd_rsp_dma_addr = cmd_desc_element_addr +
3441 hba->lrb[i].ucd_prdt_ptr =
3442 (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
3443 hba->lrb[i].ucd_prdt_dma_addr = cmd_desc_element_addr +
3449 * ufshcd_dme_link_startup - Notify Unipro to perform link startup
3450 * @hba: per adapter instance
3452 * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
3453 * in order to initialize the Unipro link startup procedure.
3454 * Once the Unipro links are up, the device connected to the controller
3457 * Returns 0 on success, non-zero value on failure
3459 static int ufshcd_dme_link_startup(struct ufs_hba *hba)
3461 struct uic_command uic_cmd = {0};
3464 uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
3466 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3469 "dme-link-startup: error code %d\n", ret);
3473 * ufshcd_dme_reset - UIC command for DME_RESET
3474 * @hba: per adapter instance
3476 * DME_RESET command is issued in order to reset UniPro stack.
3477 * This function now deal with cold reset.
3479 * Returns 0 on success, non-zero value on failure
3481 static int ufshcd_dme_reset(struct ufs_hba *hba)
3483 struct uic_command uic_cmd = {0};
3486 uic_cmd.command = UIC_CMD_DME_RESET;
3488 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3491 "dme-reset: error code %d\n", ret);
3497 * ufshcd_dme_enable - UIC command for DME_ENABLE
3498 * @hba: per adapter instance
3500 * DME_ENABLE command is issued in order to enable UniPro stack.
3502 * Returns 0 on success, non-zero value on failure
3504 static int ufshcd_dme_enable(struct ufs_hba *hba)
3506 struct uic_command uic_cmd = {0};
3509 uic_cmd.command = UIC_CMD_DME_ENABLE;
3511 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3514 "dme-reset: error code %d\n", ret);
3519 static inline void ufshcd_add_delay_before_dme_cmd(struct ufs_hba *hba)
3521 #define MIN_DELAY_BEFORE_DME_CMDS_US 1000
3522 unsigned long min_sleep_time_us;
3524 if (!(hba->quirks & UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS))
3528 * last_dme_cmd_tstamp will be 0 only for 1st call to
3531 if (unlikely(!ktime_to_us(hba->last_dme_cmd_tstamp))) {
3532 min_sleep_time_us = MIN_DELAY_BEFORE_DME_CMDS_US;
3534 unsigned long delta =
3535 (unsigned long) ktime_to_us(
3536 ktime_sub(ktime_get(),
3537 hba->last_dme_cmd_tstamp));
3539 if (delta < MIN_DELAY_BEFORE_DME_CMDS_US)
3541 MIN_DELAY_BEFORE_DME_CMDS_US - delta;
3543 return; /* no more delay required */
3546 /* allow sleep for extra 50us if needed */
3547 usleep_range(min_sleep_time_us, min_sleep_time_us + 50);
3551 * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
3552 * @hba: per adapter instance
3553 * @attr_sel: uic command argument1
3554 * @attr_set: attribute set type as uic command argument2
3555 * @mib_val: setting value as uic command argument3
3556 * @peer: indicate whether peer or local
3558 * Returns 0 on success, non-zero value on failure
3560 int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
3561 u8 attr_set, u32 mib_val, u8 peer)
3563 struct uic_command uic_cmd = {0};
3564 static const char *const action[] = {
3568 const char *set = action[!!peer];
3570 int retries = UFS_UIC_COMMAND_RETRIES;
3572 uic_cmd.command = peer ?
3573 UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
3574 uic_cmd.argument1 = attr_sel;
3575 uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
3576 uic_cmd.argument3 = mib_val;
3579 /* for peer attributes we retry upon failure */
3580 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3582 dev_dbg(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
3583 set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
3584 } while (ret && peer && --retries);
3587 dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x failed %d retries\n",
3588 set, UIC_GET_ATTR_ID(attr_sel), mib_val,
3589 UFS_UIC_COMMAND_RETRIES - retries);
3593 EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
3596 * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
3597 * @hba: per adapter instance
3598 * @attr_sel: uic command argument1
3599 * @mib_val: the value of the attribute as returned by the UIC command
3600 * @peer: indicate whether peer or local
3602 * Returns 0 on success, non-zero value on failure
3604 int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
3605 u32 *mib_val, u8 peer)
3607 struct uic_command uic_cmd = {0};
3608 static const char *const action[] = {
3612 const char *get = action[!!peer];
3614 int retries = UFS_UIC_COMMAND_RETRIES;
3615 struct ufs_pa_layer_attr orig_pwr_info;
3616 struct ufs_pa_layer_attr temp_pwr_info;
3617 bool pwr_mode_change = false;
3619 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)) {
3620 orig_pwr_info = hba->pwr_info;
3621 temp_pwr_info = orig_pwr_info;
3623 if (orig_pwr_info.pwr_tx == FAST_MODE ||
3624 orig_pwr_info.pwr_rx == FAST_MODE) {
3625 temp_pwr_info.pwr_tx = FASTAUTO_MODE;
3626 temp_pwr_info.pwr_rx = FASTAUTO_MODE;
3627 pwr_mode_change = true;
3628 } else if (orig_pwr_info.pwr_tx == SLOW_MODE ||
3629 orig_pwr_info.pwr_rx == SLOW_MODE) {
3630 temp_pwr_info.pwr_tx = SLOWAUTO_MODE;
3631 temp_pwr_info.pwr_rx = SLOWAUTO_MODE;
3632 pwr_mode_change = true;
3634 if (pwr_mode_change) {
3635 ret = ufshcd_change_power_mode(hba, &temp_pwr_info);
3641 uic_cmd.command = peer ?
3642 UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
3643 uic_cmd.argument1 = attr_sel;
3646 /* for peer attributes we retry upon failure */
3647 ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
3649 dev_dbg(hba->dev, "%s: attr-id 0x%x error code %d\n",
3650 get, UIC_GET_ATTR_ID(attr_sel), ret);
3651 } while (ret && peer && --retries);
3654 dev_err(hba->dev, "%s: attr-id 0x%x failed %d retries\n",
3655 get, UIC_GET_ATTR_ID(attr_sel),
3656 UFS_UIC_COMMAND_RETRIES - retries);
3658 if (mib_val && !ret)
3659 *mib_val = uic_cmd.argument3;
3661 if (peer && (hba->quirks & UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE)
3663 ufshcd_change_power_mode(hba, &orig_pwr_info);
3667 EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
3670 * ufshcd_uic_pwr_ctrl - executes UIC commands (which affects the link power
3671 * state) and waits for it to take effect.
3673 * @hba: per adapter instance
3674 * @cmd: UIC command to execute
3676 * DME operations like DME_SET(PA_PWRMODE), DME_HIBERNATE_ENTER &
3677 * DME_HIBERNATE_EXIT commands take some time to take its effect on both host
3678 * and device UniPro link and hence it's final completion would be indicated by
3679 * dedicated status bits in Interrupt Status register (UPMS, UHES, UHXS) in
3680 * addition to normal UIC command completion Status (UCCS). This function only
3681 * returns after the relevant status bits indicate the completion.
3683 * Returns 0 on success, non-zero value on failure
3685 static int ufshcd_uic_pwr_ctrl(struct ufs_hba *hba, struct uic_command *cmd)
3687 struct completion uic_async_done;
3688 unsigned long flags;
3691 bool reenable_intr = false;
3693 mutex_lock(&hba->uic_cmd_mutex);
3694 init_completion(&uic_async_done);
3695 ufshcd_add_delay_before_dme_cmd(hba);
3697 spin_lock_irqsave(hba->host->host_lock, flags);
3698 hba->uic_async_done = &uic_async_done;
3699 if (ufshcd_readl(hba, REG_INTERRUPT_ENABLE) & UIC_COMMAND_COMPL) {
3700 ufshcd_disable_intr(hba, UIC_COMMAND_COMPL);
3702 * Make sure UIC command completion interrupt is disabled before
3703 * issuing UIC command.
3706 reenable_intr = true;
3708 ret = __ufshcd_send_uic_cmd(hba, cmd, false);
3709 spin_unlock_irqrestore(hba->host->host_lock, flags);
3712 "pwr ctrl cmd 0x%x with mode 0x%x uic error %d\n",
3713 cmd->command, cmd->argument3, ret);
3717 if (!wait_for_completion_timeout(hba->uic_async_done,
3718 msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
3720 "pwr ctrl cmd 0x%x with mode 0x%x completion timeout\n",
3721 cmd->command, cmd->argument3);
3726 status = ufshcd_get_upmcrs(hba);
3727 if (status != PWR_LOCAL) {
3729 "pwr ctrl cmd 0x%x failed, host upmcrs:0x%x\n",
3730 cmd->command, status);
3731 ret = (status != PWR_OK) ? status : -1;
3735 ufshcd_print_host_state(hba);
3736 ufshcd_print_pwr_info(hba);
3737 ufshcd_print_host_regs(hba);
3740 spin_lock_irqsave(hba->host->host_lock, flags);
3741 hba->active_uic_cmd = NULL;
3742 hba->uic_async_done = NULL;
3744 ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
3745 spin_unlock_irqrestore(hba->host->host_lock, flags);
3746 mutex_unlock(&hba->uic_cmd_mutex);
3752 * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
3753 * using DME_SET primitives.
3754 * @hba: per adapter instance
3755 * @mode: powr mode value
3757 * Returns 0 on success, non-zero value on failure
3759 static int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
3761 struct uic_command uic_cmd = {0};
3764 if (hba->quirks & UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP) {
3765 ret = ufshcd_dme_set(hba,
3766 UIC_ARG_MIB_SEL(PA_RXHSUNTERMCAP, 0), 1);
3768 dev_err(hba->dev, "%s: failed to enable PA_RXHSUNTERMCAP ret %d\n",
3774 uic_cmd.command = UIC_CMD_DME_SET;
3775 uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
3776 uic_cmd.argument3 = mode;
3777 ufshcd_hold(hba, false);
3778 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3779 ufshcd_release(hba);
3785 static int ufshcd_link_recovery(struct ufs_hba *hba)
3788 unsigned long flags;
3790 spin_lock_irqsave(hba->host->host_lock, flags);
3791 hba->ufshcd_state = UFSHCD_STATE_RESET;
3792 ufshcd_set_eh_in_progress(hba);
3793 spin_unlock_irqrestore(hba->host->host_lock, flags);
3795 /* Reset the attached device */
3796 ufshcd_vops_device_reset(hba);
3798 ret = ufshcd_host_reset_and_restore(hba);
3800 spin_lock_irqsave(hba->host->host_lock, flags);
3802 hba->ufshcd_state = UFSHCD_STATE_ERROR;
3803 ufshcd_clear_eh_in_progress(hba);
3804 spin_unlock_irqrestore(hba->host->host_lock, flags);
3807 dev_err(hba->dev, "%s: link recovery failed, err %d",
3813 static int __ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3816 struct uic_command uic_cmd = {0};
3817 ktime_t start = ktime_get();
3819 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER, PRE_CHANGE);
3821 uic_cmd.command = UIC_CMD_DME_HIBER_ENTER;
3822 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3823 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "enter",
3824 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3829 dev_err(hba->dev, "%s: hibern8 enter failed. ret = %d\n",
3833 * If link recovery fails then return error code returned from
3834 * ufshcd_link_recovery().
3835 * If link recovery succeeds then return -EAGAIN to attempt
3836 * hibern8 enter retry again.
3838 err = ufshcd_link_recovery(hba);
3840 dev_err(hba->dev, "%s: link recovery failed", __func__);
3846 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_ENTER,
3852 static int ufshcd_uic_hibern8_enter(struct ufs_hba *hba)
3854 int ret = 0, retries;
3856 for (retries = UIC_HIBERN8_ENTER_RETRIES; retries > 0; retries--) {
3857 ret = __ufshcd_uic_hibern8_enter(hba);
3865 static int ufshcd_uic_hibern8_exit(struct ufs_hba *hba)
3867 struct uic_command uic_cmd = {0};
3869 ktime_t start = ktime_get();
3871 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT, PRE_CHANGE);
3873 uic_cmd.command = UIC_CMD_DME_HIBER_EXIT;
3874 ret = ufshcd_uic_pwr_ctrl(hba, &uic_cmd);
3875 trace_ufshcd_profile_hibern8(dev_name(hba->dev), "exit",
3876 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
3879 dev_err(hba->dev, "%s: hibern8 exit failed. ret = %d\n",
3881 ret = ufshcd_link_recovery(hba);
3883 ufshcd_vops_hibern8_notify(hba, UIC_CMD_DME_HIBER_EXIT,
3885 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_get();
3886 hba->ufs_stats.hibern8_exit_cnt++;
3892 void ufshcd_auto_hibern8_enable(struct ufs_hba *hba)
3894 unsigned long flags;
3896 if (!ufshcd_is_auto_hibern8_supported(hba) || !hba->ahit)
3899 spin_lock_irqsave(hba->host->host_lock, flags);
3900 ufshcd_writel(hba, hba->ahit, REG_AUTO_HIBERNATE_IDLE_TIMER);
3901 spin_unlock_irqrestore(hba->host->host_lock, flags);
3905 * ufshcd_init_pwr_info - setting the POR (power on reset)
3906 * values in hba power info
3907 * @hba: per-adapter instance
3909 static void ufshcd_init_pwr_info(struct ufs_hba *hba)
3911 hba->pwr_info.gear_rx = UFS_PWM_G1;
3912 hba->pwr_info.gear_tx = UFS_PWM_G1;
3913 hba->pwr_info.lane_rx = 1;
3914 hba->pwr_info.lane_tx = 1;
3915 hba->pwr_info.pwr_rx = SLOWAUTO_MODE;
3916 hba->pwr_info.pwr_tx = SLOWAUTO_MODE;
3917 hba->pwr_info.hs_rate = 0;
3921 * ufshcd_get_max_pwr_mode - reads the max power mode negotiated with device
3922 * @hba: per-adapter instance
3924 static int ufshcd_get_max_pwr_mode(struct ufs_hba *hba)
3926 struct ufs_pa_layer_attr *pwr_info = &hba->max_pwr_info.info;
3928 if (hba->max_pwr_info.is_valid)
3931 pwr_info->pwr_tx = FAST_MODE;
3932 pwr_info->pwr_rx = FAST_MODE;
3933 pwr_info->hs_rate = PA_HS_MODE_B;
3935 /* Get the connected lane count */
3936 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES),
3937 &pwr_info->lane_rx);
3938 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
3939 &pwr_info->lane_tx);
3941 if (!pwr_info->lane_rx || !pwr_info->lane_tx) {
3942 dev_err(hba->dev, "%s: invalid connected lanes value. rx=%d, tx=%d\n",
3950 * First, get the maximum gears of HS speed.
3951 * If a zero value, it means there is no HSGEAR capability.
3952 * Then, get the maximum gears of PWM speed.
3954 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &pwr_info->gear_rx);
3955 if (!pwr_info->gear_rx) {
3956 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3957 &pwr_info->gear_rx);
3958 if (!pwr_info->gear_rx) {
3959 dev_err(hba->dev, "%s: invalid max pwm rx gear read = %d\n",
3960 __func__, pwr_info->gear_rx);
3963 pwr_info->pwr_rx = SLOW_MODE;
3966 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR),
3967 &pwr_info->gear_tx);
3968 if (!pwr_info->gear_tx) {
3969 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
3970 &pwr_info->gear_tx);
3971 if (!pwr_info->gear_tx) {
3972 dev_err(hba->dev, "%s: invalid max pwm tx gear read = %d\n",
3973 __func__, pwr_info->gear_tx);
3976 pwr_info->pwr_tx = SLOW_MODE;
3979 hba->max_pwr_info.is_valid = true;
3983 static int ufshcd_change_power_mode(struct ufs_hba *hba,
3984 struct ufs_pa_layer_attr *pwr_mode)
3988 /* if already configured to the requested pwr_mode */
3989 if (pwr_mode->gear_rx == hba->pwr_info.gear_rx &&
3990 pwr_mode->gear_tx == hba->pwr_info.gear_tx &&
3991 pwr_mode->lane_rx == hba->pwr_info.lane_rx &&
3992 pwr_mode->lane_tx == hba->pwr_info.lane_tx &&
3993 pwr_mode->pwr_rx == hba->pwr_info.pwr_rx &&
3994 pwr_mode->pwr_tx == hba->pwr_info.pwr_tx &&
3995 pwr_mode->hs_rate == hba->pwr_info.hs_rate) {
3996 dev_dbg(hba->dev, "%s: power already configured\n", __func__);
4001 * Configure attributes for power mode change with below.
4002 * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
4003 * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
4006 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), pwr_mode->gear_rx);
4007 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES),
4009 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4010 pwr_mode->pwr_rx == FAST_MODE)
4011 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
4013 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), FALSE);
4015 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), pwr_mode->gear_tx);
4016 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES),
4018 if (pwr_mode->pwr_tx == FASTAUTO_MODE ||
4019 pwr_mode->pwr_tx == FAST_MODE)
4020 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
4022 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), FALSE);
4024 if (pwr_mode->pwr_rx == FASTAUTO_MODE ||
4025 pwr_mode->pwr_tx == FASTAUTO_MODE ||
4026 pwr_mode->pwr_rx == FAST_MODE ||
4027 pwr_mode->pwr_tx == FAST_MODE)
4028 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES),
4031 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA0),
4032 DL_FC0ProtectionTimeOutVal_Default);
4033 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA1),
4034 DL_TC0ReplayTimeOutVal_Default);
4035 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA2),
4036 DL_AFC0ReqTimeOutVal_Default);
4037 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA3),
4038 DL_FC1ProtectionTimeOutVal_Default);
4039 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA4),
4040 DL_TC1ReplayTimeOutVal_Default);
4041 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_PWRMODEUSERDATA5),
4042 DL_AFC1ReqTimeOutVal_Default);
4044 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalFC0ProtectionTimeOutVal),
4045 DL_FC0ProtectionTimeOutVal_Default);
4046 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalTC0ReplayTimeOutVal),
4047 DL_TC0ReplayTimeOutVal_Default);
4048 ufshcd_dme_set(hba, UIC_ARG_MIB(DME_LocalAFC0ReqTimeOutVal),
4049 DL_AFC0ReqTimeOutVal_Default);
4051 ret = ufshcd_uic_change_pwr_mode(hba, pwr_mode->pwr_rx << 4
4052 | pwr_mode->pwr_tx);
4056 "%s: power mode change failed %d\n", __func__, ret);
4058 ufshcd_vops_pwr_change_notify(hba, POST_CHANGE, NULL,
4061 memcpy(&hba->pwr_info, pwr_mode,
4062 sizeof(struct ufs_pa_layer_attr));
4069 * ufshcd_config_pwr_mode - configure a new power mode
4070 * @hba: per-adapter instance
4071 * @desired_pwr_mode: desired power configuration
4073 int ufshcd_config_pwr_mode(struct ufs_hba *hba,
4074 struct ufs_pa_layer_attr *desired_pwr_mode)
4076 struct ufs_pa_layer_attr final_params = { 0 };
4079 ret = ufshcd_vops_pwr_change_notify(hba, PRE_CHANGE,
4080 desired_pwr_mode, &final_params);
4083 memcpy(&final_params, desired_pwr_mode, sizeof(final_params));
4085 ret = ufshcd_change_power_mode(hba, &final_params);
4087 ufshcd_print_pwr_info(hba);
4091 EXPORT_SYMBOL_GPL(ufshcd_config_pwr_mode);
4094 * ufshcd_complete_dev_init() - checks device readiness
4095 * @hba: per-adapter instance
4097 * Set fDeviceInit flag and poll until device toggles it.
4099 static int ufshcd_complete_dev_init(struct ufs_hba *hba)
4105 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4106 QUERY_FLAG_IDN_FDEVICEINIT, NULL);
4109 "%s setting fDeviceInit flag failed with error %d\n",
4114 /* poll for max. 1000 iterations for fDeviceInit flag to clear */
4115 for (i = 0; i < 1000 && !err && flag_res; i++)
4116 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
4117 QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
4121 "%s reading fDeviceInit flag failed with error %d\n",
4125 "%s fDeviceInit was not cleared by the device\n",
4133 * ufshcd_make_hba_operational - Make UFS controller operational
4134 * @hba: per adapter instance
4136 * To bring UFS host controller to operational state,
4137 * 1. Enable required interrupts
4138 * 2. Configure interrupt aggregation
4139 * 3. Program UTRL and UTMRL base address
4140 * 4. Configure run-stop-registers
4142 * Returns 0 on success, non-zero value on failure
4144 static int ufshcd_make_hba_operational(struct ufs_hba *hba)
4149 /* Enable required interrupts */
4150 ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
4152 /* Configure interrupt aggregation */
4153 if (ufshcd_is_intr_aggr_allowed(hba))
4154 ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
4156 ufshcd_disable_intr_aggr(hba);
4158 /* Configure UTRL and UTMRL base address registers */
4159 ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
4160 REG_UTP_TRANSFER_REQ_LIST_BASE_L);
4161 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
4162 REG_UTP_TRANSFER_REQ_LIST_BASE_H);
4163 ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
4164 REG_UTP_TASK_REQ_LIST_BASE_L);
4165 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
4166 REG_UTP_TASK_REQ_LIST_BASE_H);
4169 * Make sure base address and interrupt setup are updated before
4170 * enabling the run/stop registers below.
4175 * UCRDY, UTMRLDY and UTRLRDY bits must be 1
4177 reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
4178 if (!(ufshcd_get_lists_status(reg))) {
4179 ufshcd_enable_run_stop_reg(hba);
4182 "Host controller not ready to process requests");
4192 * ufshcd_hba_stop - Send controller to reset state
4193 * @hba: per adapter instance
4194 * @can_sleep: perform sleep or just spin
4196 static inline void ufshcd_hba_stop(struct ufs_hba *hba, bool can_sleep)
4200 ufshcd_writel(hba, CONTROLLER_DISABLE, REG_CONTROLLER_ENABLE);
4201 err = ufshcd_wait_for_register(hba, REG_CONTROLLER_ENABLE,
4202 CONTROLLER_ENABLE, CONTROLLER_DISABLE,
4205 dev_err(hba->dev, "%s: Controller disable failed\n", __func__);
4209 * ufshcd_hba_execute_hce - initialize the controller
4210 * @hba: per adapter instance
4212 * The controller resets itself and controller firmware initialization
4213 * sequence kicks off. When controller is ready it will set
4214 * the Host Controller Enable bit to 1.
4216 * Returns 0 on success, non-zero value on failure
4218 static int ufshcd_hba_execute_hce(struct ufs_hba *hba)
4222 if (!ufshcd_is_hba_active(hba))
4223 /* change controller state to "reset state" */
4224 ufshcd_hba_stop(hba, true);
4226 /* UniPro link is disabled at this point */
4227 ufshcd_set_link_off(hba);
4229 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4231 /* start controller initialization sequence */
4232 ufshcd_hba_start(hba);
4235 * To initialize a UFS host controller HCE bit must be set to 1.
4236 * During initialization the HCE bit value changes from 1->0->1.
4237 * When the host controller completes initialization sequence
4238 * it sets the value of HCE bit to 1. The same HCE bit is read back
4239 * to check if the controller has completed initialization sequence.
4240 * So without this delay the value HCE = 1, set in the previous
4241 * instruction might be read back.
4242 * This delay can be changed based on the controller.
4244 usleep_range(1000, 1100);
4246 /* wait for the host controller to complete initialization */
4248 while (ufshcd_is_hba_active(hba)) {
4253 "Controller enable failed\n");
4256 usleep_range(5000, 5100);
4259 /* enable UIC related interrupts */
4260 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4262 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4267 static int ufshcd_hba_enable(struct ufs_hba *hba)
4271 if (hba->quirks & UFSHCI_QUIRK_BROKEN_HCE) {
4272 ufshcd_set_link_off(hba);
4273 ufshcd_vops_hce_enable_notify(hba, PRE_CHANGE);
4275 /* enable UIC related interrupts */
4276 ufshcd_enable_intr(hba, UFSHCD_UIC_MASK);
4277 ret = ufshcd_dme_reset(hba);
4279 ret = ufshcd_dme_enable(hba);
4281 ufshcd_vops_hce_enable_notify(hba, POST_CHANGE);
4284 "Host controller enable failed with non-hce\n");
4287 ret = ufshcd_hba_execute_hce(hba);
4292 static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
4294 int tx_lanes, i, err = 0;
4297 ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4300 ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
4302 for (i = 0; i < tx_lanes; i++) {
4304 err = ufshcd_dme_set(hba,
4305 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4306 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4309 err = ufshcd_dme_peer_set(hba,
4310 UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
4311 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
4314 dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d",
4315 __func__, peer, i, err);
4323 static inline int ufshcd_disable_device_tx_lcc(struct ufs_hba *hba)
4325 return ufshcd_disable_tx_lcc(hba, true);
4328 static void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist,
4331 reg_hist->reg[reg_hist->pos] = reg;
4332 reg_hist->tstamp[reg_hist->pos] = ktime_get();
4333 reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH;
4337 * ufshcd_link_startup - Initialize unipro link startup
4338 * @hba: per adapter instance
4340 * Returns 0 for success, non-zero in case of failure
4342 static int ufshcd_link_startup(struct ufs_hba *hba)
4345 int retries = DME_LINKSTARTUP_RETRIES;
4346 bool link_startup_again = false;
4349 * If UFS device isn't active then we will have to issue link startup
4350 * 2 times to make sure the device state move to active.
4352 if (!ufshcd_is_ufs_dev_active(hba))
4353 link_startup_again = true;
4357 ufshcd_vops_link_startup_notify(hba, PRE_CHANGE);
4359 ret = ufshcd_dme_link_startup(hba);
4361 /* check if device is detected by inter-connect layer */
4362 if (!ret && !ufshcd_is_device_present(hba)) {
4363 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4365 dev_err(hba->dev, "%s: Device not present\n", __func__);
4371 * DME link lost indication is only received when link is up,
4372 * but we can't be sure if the link is up until link startup
4373 * succeeds. So reset the local Uni-Pro and try again.
4375 if (ret && ufshcd_hba_enable(hba)) {
4376 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4380 } while (ret && retries--);
4383 /* failed to get the link up... retire */
4384 ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err,
4389 if (link_startup_again) {
4390 link_startup_again = false;
4391 retries = DME_LINKSTARTUP_RETRIES;
4395 /* Mark that link is up in PWM-G1, 1-lane, SLOW-AUTO mode */
4396 ufshcd_init_pwr_info(hba);
4397 ufshcd_print_pwr_info(hba);
4399 if (hba->quirks & UFSHCD_QUIRK_BROKEN_LCC) {
4400 ret = ufshcd_disable_device_tx_lcc(hba);
4405 /* Include any host controller configuration via UIC commands */
4406 ret = ufshcd_vops_link_startup_notify(hba, POST_CHANGE);
4410 ret = ufshcd_make_hba_operational(hba);
4413 dev_err(hba->dev, "link startup failed %d\n", ret);
4414 ufshcd_print_host_state(hba);
4415 ufshcd_print_pwr_info(hba);
4416 ufshcd_print_host_regs(hba);
4422 * ufshcd_verify_dev_init() - Verify device initialization
4423 * @hba: per-adapter instance
4425 * Send NOP OUT UPIU and wait for NOP IN response to check whether the
4426 * device Transport Protocol (UTP) layer is ready after a reset.
4427 * If the UTP layer at the device side is not initialized, it may
4428 * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
4429 * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
4431 static int ufshcd_verify_dev_init(struct ufs_hba *hba)
4436 ufshcd_hold(hba, false);
4437 mutex_lock(&hba->dev_cmd.lock);
4438 for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
4439 err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
4442 if (!err || err == -ETIMEDOUT)
4445 dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
4447 mutex_unlock(&hba->dev_cmd.lock);
4448 ufshcd_release(hba);
4451 dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
4456 * ufshcd_set_queue_depth - set lun queue depth
4457 * @sdev: pointer to SCSI device
4459 * Read bLUQueueDepth value and activate scsi tagged command
4460 * queueing. For WLUN, queue depth is set to 1. For best-effort
4461 * cases (bLUQueueDepth = 0) the queue depth is set to a maximum
4462 * value that host can queue.
4464 static void ufshcd_set_queue_depth(struct scsi_device *sdev)
4468 struct ufs_hba *hba;
4470 hba = shost_priv(sdev->host);
4472 lun_qdepth = hba->nutrs;
4473 ret = ufshcd_read_unit_desc_param(hba,
4474 ufshcd_scsi_to_upiu_lun(sdev->lun),
4475 UNIT_DESC_PARAM_LU_Q_DEPTH,
4477 sizeof(lun_qdepth));
4479 /* Some WLUN doesn't support unit descriptor */
4480 if (ret == -EOPNOTSUPP)
4482 else if (!lun_qdepth)
4483 /* eventually, we can figure out the real queue depth */
4484 lun_qdepth = hba->nutrs;
4486 lun_qdepth = min_t(int, lun_qdepth, hba->nutrs);
4488 dev_dbg(hba->dev, "%s: activate tcq with queue depth %d\n",
4489 __func__, lun_qdepth);
4490 scsi_change_queue_depth(sdev, lun_qdepth);
4494 * ufshcd_get_lu_wp - returns the "b_lu_write_protect" from UNIT DESCRIPTOR
4495 * @hba: per-adapter instance
4496 * @lun: UFS device lun id
4497 * @b_lu_write_protect: pointer to buffer to hold the LU's write protect info
4499 * Returns 0 in case of success and b_lu_write_protect status would be returned
4500 * @b_lu_write_protect parameter.
4501 * Returns -ENOTSUPP if reading b_lu_write_protect is not supported.
4502 * Returns -EINVAL in case of invalid parameters passed to this function.
4504 static int ufshcd_get_lu_wp(struct ufs_hba *hba,
4506 u8 *b_lu_write_protect)
4510 if (!b_lu_write_protect)
4513 * According to UFS device spec, RPMB LU can't be write
4514 * protected so skip reading bLUWriteProtect parameter for
4515 * it. For other W-LUs, UNIT DESCRIPTOR is not available.
4517 else if (lun >= UFS_UPIU_MAX_GENERAL_LUN)
4520 ret = ufshcd_read_unit_desc_param(hba,
4522 UNIT_DESC_PARAM_LU_WR_PROTECT,
4524 sizeof(*b_lu_write_protect));
4529 * ufshcd_get_lu_power_on_wp_status - get LU's power on write protect
4531 * @hba: per-adapter instance
4532 * @sdev: pointer to SCSI device
4535 static inline void ufshcd_get_lu_power_on_wp_status(struct ufs_hba *hba,
4536 struct scsi_device *sdev)
4538 if (hba->dev_info.f_power_on_wp_en &&
4539 !hba->dev_info.is_lu_power_on_wp) {
4540 u8 b_lu_write_protect;
4542 if (!ufshcd_get_lu_wp(hba, ufshcd_scsi_to_upiu_lun(sdev->lun),
4543 &b_lu_write_protect) &&
4544 (b_lu_write_protect == UFS_LU_POWER_ON_WP))
4545 hba->dev_info.is_lu_power_on_wp = true;
4550 * ufshcd_slave_alloc - handle initial SCSI device configurations
4551 * @sdev: pointer to SCSI device
4555 static int ufshcd_slave_alloc(struct scsi_device *sdev)
4557 struct ufs_hba *hba;
4559 hba = shost_priv(sdev->host);
4561 /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
4562 sdev->use_10_for_ms = 1;
4564 /* DBD field should be set to 1 in mode sense(10) */
4565 sdev->set_dbd_for_ms = 1;
4567 /* allow SCSI layer to restart the device in case of errors */
4568 sdev->allow_restart = 1;
4570 /* REPORT SUPPORTED OPERATION CODES is not supported */
4571 sdev->no_report_opcodes = 1;
4573 /* WRITE_SAME command is not supported */
4574 sdev->no_write_same = 1;
4576 ufshcd_set_queue_depth(sdev);
4578 ufshcd_get_lu_power_on_wp_status(hba, sdev);
4584 * ufshcd_change_queue_depth - change queue depth
4585 * @sdev: pointer to SCSI device
4586 * @depth: required depth to set
4588 * Change queue depth and make sure the max. limits are not crossed.
4590 static int ufshcd_change_queue_depth(struct scsi_device *sdev, int depth)
4592 struct ufs_hba *hba = shost_priv(sdev->host);
4594 if (depth > hba->nutrs)
4596 return scsi_change_queue_depth(sdev, depth);
4600 * ufshcd_slave_configure - adjust SCSI device configurations
4601 * @sdev: pointer to SCSI device
4603 static int ufshcd_slave_configure(struct scsi_device *sdev)
4605 struct ufs_hba *hba = shost_priv(sdev->host);
4606 struct request_queue *q = sdev->request_queue;
4608 blk_queue_update_dma_pad(q, PRDT_DATA_BYTE_COUNT_PAD - 1);
4610 if (ufshcd_is_rpm_autosuspend_allowed(hba))
4611 sdev->rpm_autosuspend = 1;
4617 * ufshcd_slave_destroy - remove SCSI device configurations
4618 * @sdev: pointer to SCSI device
4620 static void ufshcd_slave_destroy(struct scsi_device *sdev)
4622 struct ufs_hba *hba;
4624 hba = shost_priv(sdev->host);
4625 /* Drop the reference as it won't be needed anymore */
4626 if (ufshcd_scsi_to_upiu_lun(sdev->lun) == UFS_UPIU_UFS_DEVICE_WLUN) {
4627 unsigned long flags;
4629 spin_lock_irqsave(hba->host->host_lock, flags);
4630 hba->sdev_ufs_device = NULL;
4631 spin_unlock_irqrestore(hba->host->host_lock, flags);
4636 * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
4637 * @lrbp: pointer to local reference block of completed command
4638 * @scsi_status: SCSI command status
4640 * Returns value base on SCSI command status
4643 ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
4647 switch (scsi_status) {
4648 case SAM_STAT_CHECK_CONDITION:
4649 ufshcd_copy_sense_data(lrbp);
4652 result |= DID_OK << 16 |
4653 COMMAND_COMPLETE << 8 |
4656 case SAM_STAT_TASK_SET_FULL:
4658 case SAM_STAT_TASK_ABORTED:
4659 ufshcd_copy_sense_data(lrbp);
4660 result |= scsi_status;
4663 result |= DID_ERROR << 16;
4665 } /* end of switch */
4671 * ufshcd_transfer_rsp_status - Get overall status of the response
4672 * @hba: per adapter instance
4673 * @lrbp: pointer to local reference block of completed command
4675 * Returns result of the command to notify SCSI midlayer
4678 ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
4684 /* overall command status of utrd */
4685 ocs = ufshcd_get_tr_ocs(lrbp);
4689 result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
4690 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
4692 case UPIU_TRANSACTION_RESPONSE:
4694 * get the response UPIU result to extract
4695 * the SCSI command status
4697 result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
4700 * get the result based on SCSI status response
4701 * to notify the SCSI midlayer of the command status
4703 scsi_status = result & MASK_SCSI_STATUS;
4704 result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
4707 * Currently we are only supporting BKOPs exception
4708 * events hence we can ignore BKOPs exception event
4709 * during power management callbacks. BKOPs exception
4710 * event is not expected to be raised in runtime suspend
4711 * callback as it allows the urgent bkops.
4712 * During system suspend, we are anyway forcefully
4713 * disabling the bkops and if urgent bkops is needed
4714 * it will be enabled on system resume. Long term
4715 * solution could be to abort the system suspend if
4716 * UFS device needs urgent BKOPs.
4718 if (!hba->pm_op_in_progress &&
4719 ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
4720 schedule_work(&hba->eeh_work);
4722 case UPIU_TRANSACTION_REJECT_UPIU:
4723 /* TODO: handle Reject UPIU Response */
4724 result = DID_ERROR << 16;
4726 "Reject UPIU not fully implemented\n");
4730 "Unexpected request response code = %x\n",
4732 result = DID_ERROR << 16;
4737 result |= DID_ABORT << 16;
4739 case OCS_INVALID_COMMAND_STATUS:
4740 result |= DID_REQUEUE << 16;
4742 case OCS_INVALID_CMD_TABLE_ATTR:
4743 case OCS_INVALID_PRDT_ATTR:
4744 case OCS_MISMATCH_DATA_BUF_SIZE:
4745 case OCS_MISMATCH_RESP_UPIU_SIZE:
4746 case OCS_PEER_COMM_FAILURE:
4747 case OCS_FATAL_ERROR:
4749 result |= DID_ERROR << 16;
4751 "OCS error from controller = %x for tag %d\n",
4752 ocs, lrbp->task_tag);
4753 ufshcd_print_host_regs(hba);
4754 ufshcd_print_host_state(hba);
4756 } /* end of switch */
4758 if ((host_byte(result) != DID_OK) && !hba->silence_err_logs)
4759 ufshcd_print_trs(hba, 1 << lrbp->task_tag, true);
4764 * ufshcd_uic_cmd_compl - handle completion of uic command
4765 * @hba: per adapter instance
4766 * @intr_status: interrupt status generated by the controller
4769 * IRQ_HANDLED - If interrupt is valid
4770 * IRQ_NONE - If invalid interrupt
4772 static irqreturn_t ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
4774 irqreturn_t retval = IRQ_NONE;
4776 if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
4777 hba->active_uic_cmd->argument2 |=
4778 ufshcd_get_uic_cmd_result(hba);
4779 hba->active_uic_cmd->argument3 =
4780 ufshcd_get_dme_attr_val(hba);
4781 complete(&hba->active_uic_cmd->done);
4782 retval = IRQ_HANDLED;
4785 if ((intr_status & UFSHCD_UIC_PWR_MASK) && hba->uic_async_done) {
4786 complete(hba->uic_async_done);
4787 retval = IRQ_HANDLED;
4793 * __ufshcd_transfer_req_compl - handle SCSI and query command completion
4794 * @hba: per adapter instance
4795 * @completed_reqs: requests to complete
4797 static void __ufshcd_transfer_req_compl(struct ufs_hba *hba,
4798 unsigned long completed_reqs)
4800 struct ufshcd_lrb *lrbp;
4801 struct scsi_cmnd *cmd;
4805 for_each_set_bit(index, &completed_reqs, hba->nutrs) {
4806 lrbp = &hba->lrb[index];
4809 ufshcd_add_command_trace(hba, index, "complete");
4810 result = ufshcd_transfer_rsp_status(hba, lrbp);
4811 scsi_dma_unmap(cmd);
4812 cmd->result = result;
4813 /* Mark completed command as NULL in LRB */
4815 lrbp->compl_time_stamp = ktime_get();
4816 /* Do not touch lrbp after scsi done */
4817 cmd->scsi_done(cmd);
4818 __ufshcd_release(hba);
4819 } else if (lrbp->command_type == UTP_CMD_TYPE_DEV_MANAGE ||
4820 lrbp->command_type == UTP_CMD_TYPE_UFS_STORAGE) {
4821 lrbp->compl_time_stamp = ktime_get();
4822 if (hba->dev_cmd.complete) {
4823 ufshcd_add_command_trace(hba, index,
4825 complete(hba->dev_cmd.complete);
4828 if (ufshcd_is_clkscaling_supported(hba))
4829 hba->clk_scaling.active_reqs--;
4832 /* clear corresponding bits of completed commands */
4833 hba->outstanding_reqs ^= completed_reqs;
4835 ufshcd_clk_scaling_update_busy(hba);
4839 * ufshcd_transfer_req_compl - handle SCSI and query command completion
4840 * @hba: per adapter instance
4843 * IRQ_HANDLED - If interrupt is valid
4844 * IRQ_NONE - If invalid interrupt
4846 static irqreturn_t ufshcd_transfer_req_compl(struct ufs_hba *hba)
4848 unsigned long completed_reqs;
4851 /* Resetting interrupt aggregation counters first and reading the
4852 * DOOR_BELL afterward allows us to handle all the completed requests.
4853 * In order to prevent other interrupts starvation the DB is read once
4854 * after reset. The down side of this solution is the possibility of
4855 * false interrupt if device completes another request after resetting
4856 * aggregation and before reading the DB.
4858 if (ufshcd_is_intr_aggr_allowed(hba) &&
4859 !(hba->quirks & UFSHCI_QUIRK_SKIP_RESET_INTR_AGGR))
4860 ufshcd_reset_intr_aggr(hba);
4862 tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
4863 completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
4865 if (completed_reqs) {
4866 __ufshcd_transfer_req_compl(hba, completed_reqs);
4874 * ufshcd_disable_ee - disable exception event
4875 * @hba: per-adapter instance
4876 * @mask: exception event to disable
4878 * Disables exception event in the device so that the EVENT_ALERT
4881 * Returns zero on success, non-zero error value on failure.
4883 static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
4888 if (!(hba->ee_ctrl_mask & mask))
4891 val = hba->ee_ctrl_mask & ~mask;
4892 val &= MASK_EE_STATUS;
4893 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4894 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4896 hba->ee_ctrl_mask &= ~mask;
4902 * ufshcd_enable_ee - enable exception event
4903 * @hba: per-adapter instance
4904 * @mask: exception event to enable
4906 * Enable corresponding exception event in the device to allow
4907 * device to alert host in critical scenarios.
4909 * Returns zero on success, non-zero error value on failure.
4911 static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
4916 if (hba->ee_ctrl_mask & mask)
4919 val = hba->ee_ctrl_mask | mask;
4920 val &= MASK_EE_STATUS;
4921 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
4922 QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
4924 hba->ee_ctrl_mask |= mask;
4930 * ufshcd_enable_auto_bkops - Allow device managed BKOPS
4931 * @hba: per-adapter instance
4933 * Allow device to manage background operations on its own. Enabling
4934 * this might lead to inconsistent latencies during normal data transfers
4935 * as the device is allowed to manage its own way of handling background
4938 * Returns zero on success, non-zero on failure.
4940 static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
4944 if (hba->auto_bkops_enabled)
4947 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_SET_FLAG,
4948 QUERY_FLAG_IDN_BKOPS_EN, NULL);
4950 dev_err(hba->dev, "%s: failed to enable bkops %d\n",
4955 hba->auto_bkops_enabled = true;
4956 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Enabled");
4958 /* No need of URGENT_BKOPS exception from the device */
4959 err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
4961 dev_err(hba->dev, "%s: failed to disable exception event %d\n",
4968 * ufshcd_disable_auto_bkops - block device in doing background operations
4969 * @hba: per-adapter instance
4971 * Disabling background operations improves command response latency but
4972 * has drawback of device moving into critical state where the device is
4973 * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
4974 * host is idle so that BKOPS are managed effectively without any negative
4977 * Returns zero on success, non-zero on failure.
4979 static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
4983 if (!hba->auto_bkops_enabled)
4987 * If host assisted BKOPs is to be enabled, make sure
4988 * urgent bkops exception is allowed.
4990 err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
4992 dev_err(hba->dev, "%s: failed to enable exception event %d\n",
4997 err = ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
4998 QUERY_FLAG_IDN_BKOPS_EN, NULL);
5000 dev_err(hba->dev, "%s: failed to disable bkops %d\n",
5002 ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
5006 hba->auto_bkops_enabled = false;
5007 trace_ufshcd_auto_bkops_state(dev_name(hba->dev), "Disabled");
5008 hba->is_urgent_bkops_lvl_checked = false;
5014 * ufshcd_force_reset_auto_bkops - force reset auto bkops state
5015 * @hba: per adapter instance
5017 * After a device reset the device may toggle the BKOPS_EN flag
5018 * to default value. The s/w tracking variables should be updated
5019 * as well. This function would change the auto-bkops state based on
5020 * UFSHCD_CAP_KEEP_AUTO_BKOPS_ENABLED_EXCEPT_SUSPEND.
5022 static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
5024 if (ufshcd_keep_autobkops_enabled_except_suspend(hba)) {
5025 hba->auto_bkops_enabled = false;
5026 hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
5027 ufshcd_enable_auto_bkops(hba);
5029 hba->auto_bkops_enabled = true;
5030 hba->ee_ctrl_mask &= ~MASK_EE_URGENT_BKOPS;
5031 ufshcd_disable_auto_bkops(hba);
5033 hba->is_urgent_bkops_lvl_checked = false;
5036 static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
5038 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5039 QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
5043 * ufshcd_bkops_ctrl - control the auto bkops based on current bkops status
5044 * @hba: per-adapter instance
5045 * @status: bkops_status value
5047 * Read the bkops_status from the UFS device and Enable fBackgroundOpsEn
5048 * flag in the device to permit background operations if the device
5049 * bkops_status is greater than or equal to "status" argument passed to
5050 * this function, disable otherwise.
5052 * Returns 0 for success, non-zero in case of failure.
5054 * NOTE: Caller of this function can check the "hba->auto_bkops_enabled" flag
5055 * to know whether auto bkops is enabled or disabled after this function
5056 * returns control to it.
5058 static int ufshcd_bkops_ctrl(struct ufs_hba *hba,
5059 enum bkops_status status)
5062 u32 curr_status = 0;
5064 err = ufshcd_get_bkops_status(hba, &curr_status);
5066 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5069 } else if (curr_status > BKOPS_STATUS_MAX) {
5070 dev_err(hba->dev, "%s: invalid BKOPS status %d\n",
5071 __func__, curr_status);
5076 if (curr_status >= status)
5077 err = ufshcd_enable_auto_bkops(hba);
5079 err = ufshcd_disable_auto_bkops(hba);
5080 hba->urgent_bkops_lvl = curr_status;
5086 * ufshcd_urgent_bkops - handle urgent bkops exception event
5087 * @hba: per-adapter instance
5089 * Enable fBackgroundOpsEn flag in the device to permit background
5092 * If BKOPs is enabled, this function returns 0, 1 if the bkops in not enabled
5093 * and negative error value for any other failure.
5095 static int ufshcd_urgent_bkops(struct ufs_hba *hba)
5097 return ufshcd_bkops_ctrl(hba, hba->urgent_bkops_lvl);
5100 static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
5102 return ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
5103 QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
5106 static void ufshcd_bkops_exception_event_handler(struct ufs_hba *hba)
5109 u32 curr_status = 0;
5111 if (hba->is_urgent_bkops_lvl_checked)
5112 goto enable_auto_bkops;
5114 err = ufshcd_get_bkops_status(hba, &curr_status);
5116 dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
5122 * We are seeing that some devices are raising the urgent bkops
5123 * exception events even when BKOPS status doesn't indicate performace
5124 * impacted or critical. Handle these device by determining their urgent
5125 * bkops status at runtime.
5127 if (curr_status < BKOPS_STATUS_PERF_IMPACT) {
5128 dev_err(hba->dev, "%s: device raised urgent BKOPS exception for bkops status %d\n",
5129 __func__, curr_status);
5130 /* update the current status as the urgent bkops level */
5131 hba->urgent_bkops_lvl = curr_status;
5132 hba->is_urgent_bkops_lvl_checked = true;
5136 err = ufshcd_enable_auto_bkops(hba);
5139 dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
5144 * ufshcd_exception_event_handler - handle exceptions raised by device
5145 * @work: pointer to work data
5147 * Read bExceptionEventStatus attribute from the device and handle the
5148 * exception event accordingly.
5150 static void ufshcd_exception_event_handler(struct work_struct *work)
5152 struct ufs_hba *hba;
5155 hba = container_of(work, struct ufs_hba, eeh_work);
5157 pm_runtime_get_sync(hba->dev);
5158 scsi_block_requests(hba->host);
5159 err = ufshcd_get_ee_status(hba, &status);
5161 dev_err(hba->dev, "%s: failed to get exception status %d\n",
5166 status &= hba->ee_ctrl_mask;
5168 if (status & MASK_EE_URGENT_BKOPS)
5169 ufshcd_bkops_exception_event_handler(hba);
5172 scsi_unblock_requests(hba->host);
5173 pm_runtime_put_sync(hba->dev);
5177 /* Complete requests that have door-bell cleared */
5178 static void ufshcd_complete_requests(struct ufs_hba *hba)
5180 ufshcd_transfer_req_compl(hba);
5181 ufshcd_tmc_handler(hba);
5185 * ufshcd_quirk_dl_nac_errors - This function checks if error handling is
5186 * to recover from the DL NAC errors or not.
5187 * @hba: per-adapter instance
5189 * Returns true if error handling is required, false otherwise
5191 static bool ufshcd_quirk_dl_nac_errors(struct ufs_hba *hba)
5193 unsigned long flags;
5194 bool err_handling = true;
5196 spin_lock_irqsave(hba->host->host_lock, flags);
5198 * UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS only workaround the
5199 * device fatal error and/or DL NAC & REPLAY timeout errors.
5201 if (hba->saved_err & (CONTROLLER_FATAL_ERROR | SYSTEM_BUS_FATAL_ERROR))
5204 if ((hba->saved_err & DEVICE_FATAL_ERROR) ||
5205 ((hba->saved_err & UIC_ERROR) &&
5206 (hba->saved_uic_err & UFSHCD_UIC_DL_TCx_REPLAY_ERROR)))
5209 if ((hba->saved_err & UIC_ERROR) &&
5210 (hba->saved_uic_err & UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)) {
5213 * wait for 50ms to see if we can get any other errors or not.
5215 spin_unlock_irqrestore(hba->host->host_lock, flags);
5217 spin_lock_irqsave(hba->host->host_lock, flags);
5220 * now check if we have got any other severe errors other than
5223 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5224 ((hba->saved_err & UIC_ERROR) &&
5225 (hba->saved_uic_err & ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)))
5229 * As DL NAC is the only error received so far, send out NOP
5230 * command to confirm if link is still active or not.
5231 * - If we don't get any response then do error recovery.
5232 * - If we get response then clear the DL NAC error bit.
5235 spin_unlock_irqrestore(hba->host->host_lock, flags);
5236 err = ufshcd_verify_dev_init(hba);
5237 spin_lock_irqsave(hba->host->host_lock, flags);
5242 /* Link seems to be alive hence ignore the DL NAC errors */
5243 if (hba->saved_uic_err == UFSHCD_UIC_DL_NAC_RECEIVED_ERROR)
5244 hba->saved_err &= ~UIC_ERROR;
5245 /* clear NAC error */
5246 hba->saved_uic_err &= ~UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5247 if (!hba->saved_uic_err) {
5248 err_handling = false;
5253 spin_unlock_irqrestore(hba->host->host_lock, flags);
5254 return err_handling;
5258 * ufshcd_err_handler - handle UFS errors that require s/w attention
5259 * @work: pointer to work structure
5261 static void ufshcd_err_handler(struct work_struct *work)
5263 struct ufs_hba *hba;
5264 unsigned long flags;
5269 bool needs_reset = false;
5271 hba = container_of(work, struct ufs_hba, eh_work);
5273 pm_runtime_get_sync(hba->dev);
5274 ufshcd_hold(hba, false);
5276 spin_lock_irqsave(hba->host->host_lock, flags);
5277 if (hba->ufshcd_state == UFSHCD_STATE_RESET)
5280 hba->ufshcd_state = UFSHCD_STATE_RESET;
5281 ufshcd_set_eh_in_progress(hba);
5283 /* Complete requests that have door-bell cleared by h/w */
5284 ufshcd_complete_requests(hba);
5286 if (hba->dev_quirks & UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5289 spin_unlock_irqrestore(hba->host->host_lock, flags);
5290 /* release the lock as ufshcd_quirk_dl_nac_errors() may sleep */
5291 ret = ufshcd_quirk_dl_nac_errors(hba);
5292 spin_lock_irqsave(hba->host->host_lock, flags);
5294 goto skip_err_handling;
5296 if ((hba->saved_err & INT_FATAL_ERRORS) ||
5297 (hba->saved_err & UFSHCD_UIC_HIBERN8_MASK) ||
5298 ((hba->saved_err & UIC_ERROR) &&
5299 (hba->saved_uic_err & (UFSHCD_UIC_DL_PA_INIT_ERROR |
5300 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR |
5301 UFSHCD_UIC_DL_TCx_REPLAY_ERROR))))
5305 * if host reset is required then skip clearing the pending
5306 * transfers forcefully because they will get cleared during
5307 * host reset and restore
5310 goto skip_pending_xfer_clear;
5312 /* release lock as clear command might sleep */
5313 spin_unlock_irqrestore(hba->host->host_lock, flags);
5314 /* Clear pending transfer requests */
5315 for_each_set_bit(tag, &hba->outstanding_reqs, hba->nutrs) {
5316 if (ufshcd_clear_cmd(hba, tag)) {
5318 goto lock_skip_pending_xfer_clear;
5322 /* Clear pending task management requests */
5323 for_each_set_bit(tag, &hba->outstanding_tasks, hba->nutmrs) {
5324 if (ufshcd_clear_tm_cmd(hba, tag)) {
5326 goto lock_skip_pending_xfer_clear;
5330 lock_skip_pending_xfer_clear:
5331 spin_lock_irqsave(hba->host->host_lock, flags);
5333 /* Complete the requests that are cleared by s/w */
5334 ufshcd_complete_requests(hba);
5336 if (err_xfer || err_tm)
5339 skip_pending_xfer_clear:
5340 /* Fatal errors need reset */
5342 unsigned long max_doorbells = (1UL << hba->nutrs) - 1;
5345 * ufshcd_reset_and_restore() does the link reinitialization
5346 * which will need atleast one empty doorbell slot to send the
5347 * device management commands (NOP and query commands).
5348 * If there is no slot empty at this moment then free up last
5351 if (hba->outstanding_reqs == max_doorbells)
5352 __ufshcd_transfer_req_compl(hba,
5353 (1UL << (hba->nutrs - 1)));
5355 spin_unlock_irqrestore(hba->host->host_lock, flags);
5356 err = ufshcd_reset_and_restore(hba);
5357 spin_lock_irqsave(hba->host->host_lock, flags);
5359 dev_err(hba->dev, "%s: reset and restore failed\n",
5361 hba->ufshcd_state = UFSHCD_STATE_ERROR;
5364 * Inform scsi mid-layer that we did reset and allow to handle
5365 * Unit Attention properly.
5367 scsi_report_bus_reset(hba->host, 0);
5369 hba->saved_uic_err = 0;
5374 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
5375 if (hba->saved_err || hba->saved_uic_err)
5376 dev_err_ratelimited(hba->dev, "%s: exit: saved_err 0x%x saved_uic_err 0x%x",
5377 __func__, hba->saved_err, hba->saved_uic_err);
5380 ufshcd_clear_eh_in_progress(hba);
5383 spin_unlock_irqrestore(hba->host->host_lock, flags);
5384 ufshcd_scsi_unblock_requests(hba);
5385 ufshcd_release(hba);
5386 pm_runtime_put_sync(hba->dev);
5390 * ufshcd_update_uic_error - check and set fatal UIC error flags.
5391 * @hba: per-adapter instance
5394 * IRQ_HANDLED - If interrupt is valid
5395 * IRQ_NONE - If invalid interrupt
5397 static irqreturn_t ufshcd_update_uic_error(struct ufs_hba *hba)
5400 irqreturn_t retval = IRQ_NONE;
5402 /* PHY layer lane error */
5403 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_PHY_ADAPTER_LAYER);
5404 /* Ignore LINERESET indication, as this is not an error */
5405 if ((reg & UIC_PHY_ADAPTER_LAYER_ERROR) &&
5406 (reg & UIC_PHY_ADAPTER_LAYER_LANE_ERR_MASK)) {
5408 * To know whether this error is fatal or not, DB timeout
5409 * must be checked but this error is handled separately.
5411 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__);
5412 ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg);
5413 retval |= IRQ_HANDLED;
5416 /* PA_INIT_ERROR is fatal and needs UIC reset */
5417 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
5418 if ((reg & UIC_DATA_LINK_LAYER_ERROR) &&
5419 (reg & UIC_DATA_LINK_LAYER_ERROR_CODE_MASK)) {
5420 ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg);
5422 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
5423 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR;
5424 else if (hba->dev_quirks &
5425 UFS_DEVICE_QUIRK_RECOVERY_FROM_DL_NAC_ERRORS) {
5426 if (reg & UIC_DATA_LINK_LAYER_ERROR_NAC_RECEIVED)
5428 UFSHCD_UIC_DL_NAC_RECEIVED_ERROR;
5429 else if (reg & UIC_DATA_LINK_LAYER_ERROR_TCx_REPLAY_TIMEOUT)
5430 hba->uic_error |= UFSHCD_UIC_DL_TCx_REPLAY_ERROR;
5432 retval |= IRQ_HANDLED;
5435 /* UIC NL/TL/DME errors needs software retry */
5436 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER);
5437 if ((reg & UIC_NETWORK_LAYER_ERROR) &&
5438 (reg & UIC_NETWORK_LAYER_ERROR_CODE_MASK)) {
5439 ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg);
5440 hba->uic_error |= UFSHCD_UIC_NL_ERROR;
5441 retval |= IRQ_HANDLED;
5444 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER);
5445 if ((reg & UIC_TRANSPORT_LAYER_ERROR) &&
5446 (reg & UIC_TRANSPORT_LAYER_ERROR_CODE_MASK)) {
5447 ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg);
5448 hba->uic_error |= UFSHCD_UIC_TL_ERROR;
5449 retval |= IRQ_HANDLED;
5452 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME);
5453 if ((reg & UIC_DME_ERROR) &&
5454 (reg & UIC_DME_ERROR_CODE_MASK)) {
5455 ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg);
5456 hba->uic_error |= UFSHCD_UIC_DME_ERROR;
5457 retval |= IRQ_HANDLED;
5460 dev_dbg(hba->dev, "%s: UIC error flags = 0x%08x\n",
5461 __func__, hba->uic_error);
5465 static bool ufshcd_is_auto_hibern8_error(struct ufs_hba *hba,
5468 if (!ufshcd_is_auto_hibern8_supported(hba))
5471 if (!(intr_mask & UFSHCD_UIC_HIBERN8_MASK))
5474 if (hba->active_uic_cmd &&
5475 (hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_ENTER ||
5476 hba->active_uic_cmd->command == UIC_CMD_DME_HIBER_EXIT))
5483 * ufshcd_check_errors - Check for errors that need s/w attention
5484 * @hba: per-adapter instance
5487 * IRQ_HANDLED - If interrupt is valid
5488 * IRQ_NONE - If invalid interrupt
5490 static irqreturn_t ufshcd_check_errors(struct ufs_hba *hba)
5492 bool queue_eh_work = false;
5493 irqreturn_t retval = IRQ_NONE;
5495 if (hba->errors & INT_FATAL_ERRORS) {
5496 ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors);
5497 queue_eh_work = true;
5500 if (hba->errors & UIC_ERROR) {
5502 retval = ufshcd_update_uic_error(hba);
5504 queue_eh_work = true;
5507 if (hba->errors & UFSHCD_UIC_HIBERN8_MASK) {
5509 "%s: Auto Hibern8 %s failed - status: 0x%08x, upmcrs: 0x%08x\n",
5510 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ?
5512 hba->errors, ufshcd_get_upmcrs(hba));
5513 ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err,
5515 queue_eh_work = true;
5518 if (queue_eh_work) {
5520 * update the transfer error masks to sticky bits, let's do this
5521 * irrespective of current ufshcd_state.
5523 hba->saved_err |= hba->errors;
5524 hba->saved_uic_err |= hba->uic_error;
5526 /* handle fatal errors only when link is functional */
5527 if (hba->ufshcd_state == UFSHCD_STATE_OPERATIONAL) {
5528 /* block commands from scsi mid-layer */
5529 ufshcd_scsi_block_requests(hba);
5531 hba->ufshcd_state = UFSHCD_STATE_EH_SCHEDULED;
5533 /* dump controller state before resetting */
5534 if (hba->saved_err & (INT_FATAL_ERRORS | UIC_ERROR)) {
5535 bool pr_prdt = !!(hba->saved_err &
5536 SYSTEM_BUS_FATAL_ERROR);
5538 dev_err(hba->dev, "%s: saved_err 0x%x saved_uic_err 0x%x\n",
5539 __func__, hba->saved_err,
5540 hba->saved_uic_err);
5542 ufshcd_print_host_regs(hba);
5543 ufshcd_print_pwr_info(hba);
5544 ufshcd_print_tmrs(hba, hba->outstanding_tasks);
5545 ufshcd_print_trs(hba, hba->outstanding_reqs,
5548 schedule_work(&hba->eh_work);
5550 retval |= IRQ_HANDLED;
5553 * if (!queue_eh_work) -
5554 * Other errors are either non-fatal where host recovers
5555 * itself without s/w intervention or errors that will be
5556 * handled by the SCSI core layer.
5562 struct ufs_hba *hba;
5563 unsigned long pending;
5567 static bool ufshcd_compl_tm(struct request *req, void *priv, bool reserved)
5569 struct ctm_info *const ci = priv;
5570 struct completion *c;
5572 WARN_ON_ONCE(reserved);
5573 if (test_bit(req->tag, &ci->pending))
5576 c = req->end_io_data;
5583 * ufshcd_tmc_handler - handle task management function completion
5584 * @hba: per adapter instance
5587 * IRQ_HANDLED - If interrupt is valid
5588 * IRQ_NONE - If invalid interrupt
5590 static irqreturn_t ufshcd_tmc_handler(struct ufs_hba *hba)
5592 struct request_queue *q = hba->tmf_queue;
5593 struct ctm_info ci = {
5595 .pending = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL),
5598 blk_mq_tagset_busy_iter(q->tag_set, ufshcd_compl_tm, &ci);
5599 return ci.ncpl ? IRQ_HANDLED : IRQ_NONE;
5603 * ufshcd_sl_intr - Interrupt service routine
5604 * @hba: per adapter instance
5605 * @intr_status: contains interrupts generated by the controller
5608 * IRQ_HANDLED - If interrupt is valid
5609 * IRQ_NONE - If invalid interrupt
5611 static irqreturn_t ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
5613 irqreturn_t retval = IRQ_NONE;
5615 hba->errors = UFSHCD_ERROR_MASK & intr_status;
5617 if (ufshcd_is_auto_hibern8_error(hba, intr_status))
5618 hba->errors |= (UFSHCD_UIC_HIBERN8_MASK & intr_status);
5621 retval |= ufshcd_check_errors(hba);
5623 if (intr_status & UFSHCD_UIC_MASK)
5624 retval |= ufshcd_uic_cmd_compl(hba, intr_status);
5626 if (intr_status & UTP_TASK_REQ_COMPL)
5627 retval |= ufshcd_tmc_handler(hba);
5629 if (intr_status & UTP_TRANSFER_REQ_COMPL)
5630 retval |= ufshcd_transfer_req_compl(hba);
5636 * ufshcd_intr - Main interrupt service routine
5638 * @__hba: pointer to adapter instance
5641 * IRQ_HANDLED - If interrupt is valid
5642 * IRQ_NONE - If invalid interrupt
5644 static irqreturn_t ufshcd_intr(int irq, void *__hba)
5646 u32 intr_status, enabled_intr_status;
5647 irqreturn_t retval = IRQ_NONE;
5648 struct ufs_hba *hba = __hba;
5649 int retries = hba->nutrs;
5651 spin_lock(hba->host->host_lock);
5652 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5655 * There could be max of hba->nutrs reqs in flight and in worst case
5656 * if the reqs get finished 1 by 1 after the interrupt status is
5657 * read, make sure we handle them by checking the interrupt status
5658 * again in a loop until we process all of the reqs before returning.
5661 enabled_intr_status =
5662 intr_status & ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
5664 ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
5665 if (enabled_intr_status)
5666 retval |= ufshcd_sl_intr(hba, enabled_intr_status);
5668 intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
5669 } while (intr_status && --retries);
5671 if (retval == IRQ_NONE) {
5672 dev_err(hba->dev, "%s: Unhandled interrupt 0x%08x\n",
5673 __func__, intr_status);
5674 ufshcd_dump_regs(hba, 0, UFSHCI_REG_SPACE_SIZE, "host_regs: ");
5677 spin_unlock(hba->host->host_lock);
5681 static int ufshcd_clear_tm_cmd(struct ufs_hba *hba, int tag)
5684 u32 mask = 1 << tag;
5685 unsigned long flags;
5687 if (!test_bit(tag, &hba->outstanding_tasks))
5690 spin_lock_irqsave(hba->host->host_lock, flags);
5691 ufshcd_utmrl_clear(hba, tag);
5692 spin_unlock_irqrestore(hba->host->host_lock, flags);
5694 /* poll for max. 1 sec to clear door bell register by h/w */
5695 err = ufshcd_wait_for_register(hba,
5696 REG_UTP_TASK_REQ_DOOR_BELL,
5697 mask, 0, 1000, 1000, true);
5702 static int __ufshcd_issue_tm_cmd(struct ufs_hba *hba,
5703 struct utp_task_req_desc *treq, u8 tm_function)
5705 struct request_queue *q = hba->tmf_queue;
5706 struct Scsi_Host *host = hba->host;
5707 DECLARE_COMPLETION_ONSTACK(wait);
5708 struct request *req;
5709 unsigned long flags;
5710 int free_slot, task_tag, err;
5713 * Get free slot, sleep if slots are unavailable.
5714 * Even though we use wait_event() which sleeps indefinitely,
5715 * the maximum wait time is bounded by %TM_CMD_TIMEOUT.
5717 req = blk_get_request(q, REQ_OP_DRV_OUT, BLK_MQ_REQ_RESERVED);
5718 req->end_io_data = &wait;
5719 free_slot = req->tag;
5720 WARN_ON_ONCE(free_slot < 0 || free_slot >= hba->nutmrs);
5721 ufshcd_hold(hba, false);
5723 spin_lock_irqsave(host->host_lock, flags);
5724 task_tag = hba->nutrs + free_slot;
5726 treq->req_header.dword_0 |= cpu_to_be32(task_tag);
5728 memcpy(hba->utmrdl_base_addr + free_slot, treq, sizeof(*treq));
5729 ufshcd_vops_setup_task_mgmt(hba, free_slot, tm_function);
5731 /* send command to the controller */
5732 __set_bit(free_slot, &hba->outstanding_tasks);
5734 /* Make sure descriptors are ready before ringing the task doorbell */
5737 ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
5738 /* Make sure that doorbell is committed immediately */
5741 spin_unlock_irqrestore(host->host_lock, flags);
5743 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_send");
5745 /* wait until the task management command is completed */
5746 err = wait_for_completion_io_timeout(&wait,
5747 msecs_to_jiffies(TM_CMD_TIMEOUT));
5750 * Make sure that ufshcd_compl_tm() does not trigger a
5753 req->end_io_data = NULL;
5754 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete_err");
5755 dev_err(hba->dev, "%s: task management cmd 0x%.2x timed-out\n",
5756 __func__, tm_function);
5757 if (ufshcd_clear_tm_cmd(hba, free_slot))
5758 dev_WARN(hba->dev, "%s: unable clear tm cmd (slot %d) after timeout\n",
5759 __func__, free_slot);
5763 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq));
5765 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete");
5768 spin_lock_irqsave(hba->host->host_lock, flags);
5769 __clear_bit(free_slot, &hba->outstanding_tasks);
5770 spin_unlock_irqrestore(hba->host->host_lock, flags);
5772 blk_put_request(req);
5774 ufshcd_release(hba);
5779 * ufshcd_issue_tm_cmd - issues task management commands to controller
5780 * @hba: per adapter instance
5781 * @lun_id: LUN ID to which TM command is sent
5782 * @task_id: task ID to which the TM command is applicable
5783 * @tm_function: task management function opcode
5784 * @tm_response: task management service response return value
5786 * Returns non-zero value on error, zero on success.
5788 static int ufshcd_issue_tm_cmd(struct ufs_hba *hba, int lun_id, int task_id,
5789 u8 tm_function, u8 *tm_response)
5791 struct utp_task_req_desc treq = { { 0 }, };
5794 /* Configure task request descriptor */
5795 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5796 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5798 /* Configure task request UPIU */
5799 treq.req_header.dword_0 = cpu_to_be32(lun_id << 8) |
5800 cpu_to_be32(UPIU_TRANSACTION_TASK_REQ << 24);
5801 treq.req_header.dword_1 = cpu_to_be32(tm_function << 16);
5804 * The host shall provide the same value for LUN field in the basic
5805 * header and for Input Parameter.
5807 treq.input_param1 = cpu_to_be32(lun_id);
5808 treq.input_param2 = cpu_to_be32(task_id);
5810 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_function);
5811 if (err == -ETIMEDOUT)
5814 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
5815 if (ocs_value != OCS_SUCCESS)
5816 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n",
5817 __func__, ocs_value);
5818 else if (tm_response)
5819 *tm_response = be32_to_cpu(treq.output_param1) &
5820 MASK_TM_SERVICE_RESP;
5825 * ufshcd_issue_devman_upiu_cmd - API for sending "utrd" type requests
5826 * @hba: per-adapter instance
5827 * @req_upiu: upiu request
5828 * @rsp_upiu: upiu reply
5829 * @desc_buff: pointer to descriptor buffer, NULL if NA
5830 * @buff_len: descriptor size, 0 if NA
5831 * @cmd_type: specifies the type (NOP, Query...)
5832 * @desc_op: descriptor operation
5834 * Those type of requests uses UTP Transfer Request Descriptor - utrd.
5835 * Therefore, it "rides" the device management infrastructure: uses its tag and
5836 * tasks work queues.
5838 * Since there is only one available tag for device management commands,
5839 * the caller is expected to hold the hba->dev_cmd.lock mutex.
5841 static int ufshcd_issue_devman_upiu_cmd(struct ufs_hba *hba,
5842 struct utp_upiu_req *req_upiu,
5843 struct utp_upiu_req *rsp_upiu,
5844 u8 *desc_buff, int *buff_len,
5845 enum dev_cmd_type cmd_type,
5846 enum query_opcode desc_op)
5848 struct request_queue *q = hba->cmd_queue;
5849 struct request *req;
5850 struct ufshcd_lrb *lrbp;
5853 struct completion wait;
5854 unsigned long flags;
5857 down_read(&hba->clk_scaling_lock);
5859 req = blk_get_request(q, REQ_OP_DRV_OUT, 0);
5865 WARN_ON_ONCE(!ufshcd_valid_tag(hba, tag));
5867 init_completion(&wait);
5868 lrbp = &hba->lrb[tag];
5872 lrbp->sense_bufflen = 0;
5873 lrbp->sense_buffer = NULL;
5874 lrbp->task_tag = tag;
5876 lrbp->intr_cmd = true;
5877 hba->dev_cmd.type = cmd_type;
5879 switch (hba->ufs_version) {
5880 case UFSHCI_VERSION_10:
5881 case UFSHCI_VERSION_11:
5882 lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
5885 lrbp->command_type = UTP_CMD_TYPE_UFS_STORAGE;
5889 /* update the task tag in the request upiu */
5890 req_upiu->header.dword_0 |= cpu_to_be32(tag);
5892 ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
5894 /* just copy the upiu request as it is */
5895 memcpy(lrbp->ucd_req_ptr, req_upiu, sizeof(*lrbp->ucd_req_ptr));
5896 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_WRITE_DESC) {
5897 /* The Data Segment Area is optional depending upon the query
5898 * function value. for WRITE DESCRIPTOR, the data segment
5899 * follows right after the tsf.
5901 memcpy(lrbp->ucd_req_ptr + 1, desc_buff, *buff_len);
5905 memset(lrbp->ucd_rsp_ptr, 0, sizeof(struct utp_upiu_rsp));
5907 hba->dev_cmd.complete = &wait;
5909 /* Make sure descriptors are ready before ringing the doorbell */
5911 spin_lock_irqsave(hba->host->host_lock, flags);
5912 ufshcd_send_command(hba, tag);
5913 spin_unlock_irqrestore(hba->host->host_lock, flags);
5916 * ignore the returning value here - ufshcd_check_query_response is
5917 * bound to fail since dev_cmd.query and dev_cmd.type were left empty.
5918 * read the response directly ignoring all errors.
5920 ufshcd_wait_for_dev_cmd(hba, lrbp, QUERY_REQ_TIMEOUT);
5922 /* just copy the upiu response as it is */
5923 memcpy(rsp_upiu, lrbp->ucd_rsp_ptr, sizeof(*rsp_upiu));
5924 if (desc_buff && desc_op == UPIU_QUERY_OPCODE_READ_DESC) {
5925 u8 *descp = (u8 *)lrbp->ucd_rsp_ptr + sizeof(*rsp_upiu);
5926 u16 resp_len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
5927 MASK_QUERY_DATA_SEG_LEN;
5929 if (*buff_len >= resp_len) {
5930 memcpy(desc_buff, descp, resp_len);
5931 *buff_len = resp_len;
5934 "%s: rsp size %d is bigger than buffer size %d",
5935 __func__, resp_len, *buff_len);
5941 blk_put_request(req);
5943 up_read(&hba->clk_scaling_lock);
5948 * ufshcd_exec_raw_upiu_cmd - API function for sending raw upiu commands
5949 * @hba: per-adapter instance
5950 * @req_upiu: upiu request
5951 * @rsp_upiu: upiu reply - only 8 DW as we do not support scsi commands
5952 * @msgcode: message code, one of UPIU Transaction Codes Initiator to Target
5953 * @desc_buff: pointer to descriptor buffer, NULL if NA
5954 * @buff_len: descriptor size, 0 if NA
5955 * @desc_op: descriptor operation
5957 * Supports UTP Transfer requests (nop and query), and UTP Task
5958 * Management requests.
5959 * It is up to the caller to fill the upiu conent properly, as it will
5960 * be copied without any further input validations.
5962 int ufshcd_exec_raw_upiu_cmd(struct ufs_hba *hba,
5963 struct utp_upiu_req *req_upiu,
5964 struct utp_upiu_req *rsp_upiu,
5966 u8 *desc_buff, int *buff_len,
5967 enum query_opcode desc_op)
5970 enum dev_cmd_type cmd_type = DEV_CMD_TYPE_QUERY;
5971 struct utp_task_req_desc treq = { { 0 }, };
5973 u8 tm_f = be32_to_cpu(req_upiu->header.dword_1) >> 16 & MASK_TM_FUNC;
5976 case UPIU_TRANSACTION_NOP_OUT:
5977 cmd_type = DEV_CMD_TYPE_NOP;
5979 case UPIU_TRANSACTION_QUERY_REQ:
5980 ufshcd_hold(hba, false);
5981 mutex_lock(&hba->dev_cmd.lock);
5982 err = ufshcd_issue_devman_upiu_cmd(hba, req_upiu, rsp_upiu,
5983 desc_buff, buff_len,
5985 mutex_unlock(&hba->dev_cmd.lock);
5986 ufshcd_release(hba);
5989 case UPIU_TRANSACTION_TASK_REQ:
5990 treq.header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
5991 treq.header.dword_2 = cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
5993 memcpy(&treq.req_header, req_upiu, sizeof(*req_upiu));
5995 err = __ufshcd_issue_tm_cmd(hba, &treq, tm_f);
5996 if (err == -ETIMEDOUT)
5999 ocs_value = le32_to_cpu(treq.header.dword_2) & MASK_OCS;
6000 if (ocs_value != OCS_SUCCESS) {
6001 dev_err(hba->dev, "%s: failed, ocs = 0x%x\n", __func__,
6006 memcpy(rsp_upiu, &treq.rsp_header, sizeof(*rsp_upiu));
6019 * ufshcd_eh_device_reset_handler - device reset handler registered to
6021 * @cmd: SCSI command pointer
6023 * Returns SUCCESS/FAILED
6025 static int ufshcd_eh_device_reset_handler(struct scsi_cmnd *cmd)
6027 struct Scsi_Host *host;
6028 struct ufs_hba *hba;
6033 struct ufshcd_lrb *lrbp;
6034 unsigned long flags;
6036 host = cmd->device->host;
6037 hba = shost_priv(host);
6038 tag = cmd->request->tag;
6040 lrbp = &hba->lrb[tag];
6041 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, 0, UFS_LOGICAL_RESET, &resp);
6042 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6048 /* clear the commands that were pending for corresponding LUN */
6049 for_each_set_bit(pos, &hba->outstanding_reqs, hba->nutrs) {
6050 if (hba->lrb[pos].lun == lrbp->lun) {
6051 err = ufshcd_clear_cmd(hba, pos);
6056 spin_lock_irqsave(host->host_lock, flags);
6057 ufshcd_transfer_req_compl(hba);
6058 spin_unlock_irqrestore(host->host_lock, flags);
6061 hba->req_abort_count = 0;
6062 ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err);
6066 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6072 static void ufshcd_set_req_abort_skip(struct ufs_hba *hba, unsigned long bitmap)
6074 struct ufshcd_lrb *lrbp;
6077 for_each_set_bit(tag, &bitmap, hba->nutrs) {
6078 lrbp = &hba->lrb[tag];
6079 lrbp->req_abort_skip = true;
6084 * ufshcd_abort - abort a specific command
6085 * @cmd: SCSI command pointer
6087 * Abort the pending command in device by sending UFS_ABORT_TASK task management
6088 * command, and in host controller by clearing the door-bell register. There can
6089 * be race between controller sending the command to the device while abort is
6090 * issued. To avoid that, first issue UFS_QUERY_TASK to check if the command is
6091 * really issued and then try to abort it.
6093 * Returns SUCCESS/FAILED
6095 static int ufshcd_abort(struct scsi_cmnd *cmd)
6097 struct Scsi_Host *host;
6098 struct ufs_hba *hba;
6099 unsigned long flags;
6104 struct ufshcd_lrb *lrbp;
6107 host = cmd->device->host;
6108 hba = shost_priv(host);
6109 tag = cmd->request->tag;
6110 lrbp = &hba->lrb[tag];
6111 if (!ufshcd_valid_tag(hba, tag)) {
6113 "%s: invalid command tag %d: cmd=0x%p, cmd->request=0x%p",
6114 __func__, tag, cmd, cmd->request);
6119 * Task abort to the device W-LUN is illegal. When this command
6120 * will fail, due to spec violation, scsi err handling next step
6121 * will be to send LU reset which, again, is a spec violation.
6122 * To avoid these unnecessary/illegal step we skip to the last error
6123 * handling stage: reset and restore.
6125 if (lrbp->lun == UFS_UPIU_UFS_DEVICE_WLUN)
6126 return ufshcd_eh_host_reset_handler(cmd);
6128 ufshcd_hold(hba, false);
6129 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6130 /* If command is already aborted/completed, return SUCCESS */
6131 if (!(test_bit(tag, &hba->outstanding_reqs))) {
6133 "%s: cmd at tag %d already completed, outstanding=0x%lx, doorbell=0x%x\n",
6134 __func__, tag, hba->outstanding_reqs, reg);
6138 if (!(reg & (1 << tag))) {
6140 "%s: cmd was completed, but without a notifying intr, tag = %d",
6144 /* Print Transfer Request of aborted task */
6145 dev_err(hba->dev, "%s: Device abort task at tag %d\n", __func__, tag);
6148 * Print detailed info about aborted request.
6149 * As more than one request might get aborted at the same time,
6150 * print full information only for the first aborted request in order
6151 * to reduce repeated printouts. For other aborted requests only print
6154 scsi_print_command(hba->lrb[tag].cmd);
6155 if (!hba->req_abort_count) {
6156 ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0);
6157 ufshcd_print_host_regs(hba);
6158 ufshcd_print_host_state(hba);
6159 ufshcd_print_pwr_info(hba);
6160 ufshcd_print_trs(hba, 1 << tag, true);
6162 ufshcd_print_trs(hba, 1 << tag, false);
6164 hba->req_abort_count++;
6166 /* Skip task abort in case previous aborts failed and report failure */
6167 if (lrbp->req_abort_skip) {
6172 for (poll_cnt = 100; poll_cnt; poll_cnt--) {
6173 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6174 UFS_QUERY_TASK, &resp);
6175 if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED) {
6176 /* cmd pending in the device */
6177 dev_err(hba->dev, "%s: cmd pending in the device. tag = %d\n",
6180 } else if (!err && resp == UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6182 * cmd not pending in the device, check if it is
6185 dev_err(hba->dev, "%s: cmd at tag %d not pending in the device.\n",
6187 reg = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
6188 if (reg & (1 << tag)) {
6189 /* sleep for max. 200us to stabilize */
6190 usleep_range(100, 200);
6193 /* command completed already */
6194 dev_err(hba->dev, "%s: cmd at tag %d successfully cleared from DB.\n",
6199 "%s: no response from device. tag = %d, err %d\n",
6200 __func__, tag, err);
6202 err = resp; /* service response error */
6212 err = ufshcd_issue_tm_cmd(hba, lrbp->lun, lrbp->task_tag,
6213 UFS_ABORT_TASK, &resp);
6214 if (err || resp != UPIU_TASK_MANAGEMENT_FUNC_COMPL) {
6216 err = resp; /* service response error */
6217 dev_err(hba->dev, "%s: issued. tag = %d, err %d\n",
6218 __func__, tag, err);
6223 err = ufshcd_clear_cmd(hba, tag);
6225 dev_err(hba->dev, "%s: Failed clearing cmd at tag %d, err %d\n",
6226 __func__, tag, err);
6230 scsi_dma_unmap(cmd);
6232 spin_lock_irqsave(host->host_lock, flags);
6233 ufshcd_outstanding_req_clear(hba, tag);
6234 hba->lrb[tag].cmd = NULL;
6235 spin_unlock_irqrestore(host->host_lock, flags);
6241 dev_err(hba->dev, "%s: failed with err %d\n", __func__, err);
6242 ufshcd_set_req_abort_skip(hba, hba->outstanding_reqs);
6247 * This ufshcd_release() corresponds to the original scsi cmd that got
6248 * aborted here (as we won't get any IRQ for it).
6250 ufshcd_release(hba);
6255 * ufshcd_host_reset_and_restore - reset and restore host controller
6256 * @hba: per-adapter instance
6258 * Note that host controller reset may issue DME_RESET to
6259 * local and remote (device) Uni-Pro stack and the attributes
6260 * are reset to default state.
6262 * Returns zero on success, non-zero on failure
6264 static int ufshcd_host_reset_and_restore(struct ufs_hba *hba)
6267 unsigned long flags;
6270 * Stop the host controller and complete the requests
6273 spin_lock_irqsave(hba->host->host_lock, flags);
6274 ufshcd_hba_stop(hba, false);
6275 hba->silence_err_logs = true;
6276 ufshcd_complete_requests(hba);
6277 hba->silence_err_logs = false;
6278 spin_unlock_irqrestore(hba->host->host_lock, flags);
6280 /* scale up clocks to max frequency before full reinitialization */
6281 ufshcd_scale_clks(hba, true);
6283 err = ufshcd_hba_enable(hba);
6287 /* Establish the link again and restore the device */
6288 err = ufshcd_probe_hba(hba);
6290 if (!err && (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL))
6294 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err);
6295 ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err);
6300 * ufshcd_reset_and_restore - reset and re-initialize host/device
6301 * @hba: per-adapter instance
6303 * Reset and recover device, host and re-establish link. This
6304 * is helpful to recover the communication in fatal error conditions.
6306 * Returns zero on success, non-zero on failure
6308 static int ufshcd_reset_and_restore(struct ufs_hba *hba)
6311 int retries = MAX_HOST_RESET_RETRIES;
6314 /* Reset the attached device */
6315 ufshcd_vops_device_reset(hba);
6317 err = ufshcd_host_reset_and_restore(hba);
6318 } while (err && --retries);
6324 * ufshcd_eh_host_reset_handler - host reset handler registered to scsi layer
6325 * @cmd: SCSI command pointer
6327 * Returns SUCCESS/FAILED
6329 static int ufshcd_eh_host_reset_handler(struct scsi_cmnd *cmd)
6332 unsigned long flags;
6333 struct ufs_hba *hba;
6335 hba = shost_priv(cmd->device->host);
6337 ufshcd_hold(hba, false);
6339 * Check if there is any race with fatal error handling.
6340 * If so, wait for it to complete. Even though fatal error
6341 * handling does reset and restore in some cases, don't assume
6342 * anything out of it. We are just avoiding race here.
6345 spin_lock_irqsave(hba->host->host_lock, flags);
6346 if (!(work_pending(&hba->eh_work) ||
6347 hba->ufshcd_state == UFSHCD_STATE_RESET ||
6348 hba->ufshcd_state == UFSHCD_STATE_EH_SCHEDULED))
6350 spin_unlock_irqrestore(hba->host->host_lock, flags);
6351 dev_dbg(hba->dev, "%s: reset in progress\n", __func__);
6352 flush_work(&hba->eh_work);
6355 hba->ufshcd_state = UFSHCD_STATE_RESET;
6356 ufshcd_set_eh_in_progress(hba);
6357 spin_unlock_irqrestore(hba->host->host_lock, flags);
6359 err = ufshcd_reset_and_restore(hba);
6361 spin_lock_irqsave(hba->host->host_lock, flags);
6364 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6367 hba->ufshcd_state = UFSHCD_STATE_ERROR;
6369 ufshcd_clear_eh_in_progress(hba);
6370 spin_unlock_irqrestore(hba->host->host_lock, flags);
6372 ufshcd_release(hba);
6377 * ufshcd_get_max_icc_level - calculate the ICC level
6378 * @sup_curr_uA: max. current supported by the regulator
6379 * @start_scan: row at the desc table to start scan from
6380 * @buff: power descriptor buffer
6382 * Returns calculated max ICC level for specific regulator
6384 static u32 ufshcd_get_max_icc_level(int sup_curr_uA, u32 start_scan, char *buff)
6391 for (i = start_scan; i >= 0; i--) {
6392 data = be16_to_cpup((__be16 *)&buff[2 * i]);
6393 unit = (data & ATTR_ICC_LVL_UNIT_MASK) >>
6394 ATTR_ICC_LVL_UNIT_OFFSET;
6395 curr_uA = data & ATTR_ICC_LVL_VALUE_MASK;
6397 case UFSHCD_NANO_AMP:
6398 curr_uA = curr_uA / 1000;
6400 case UFSHCD_MILI_AMP:
6401 curr_uA = curr_uA * 1000;
6404 curr_uA = curr_uA * 1000 * 1000;
6406 case UFSHCD_MICRO_AMP:
6410 if (sup_curr_uA >= curr_uA)
6415 pr_err("%s: Couldn't find valid icc_level = %d", __func__, i);
6422 * ufshcd_calc_icc_level - calculate the max ICC level
6423 * In case regulators are not initialized we'll return 0
6424 * @hba: per-adapter instance
6425 * @desc_buf: power descriptor buffer to extract ICC levels from.
6426 * @len: length of desc_buff
6428 * Returns calculated ICC level
6430 static u32 ufshcd_find_max_sup_active_icc_level(struct ufs_hba *hba,
6431 u8 *desc_buf, int len)
6435 if (!hba->vreg_info.vcc || !hba->vreg_info.vccq ||
6436 !hba->vreg_info.vccq2) {
6438 "%s: Regulator capability was not set, actvIccLevel=%d",
6439 __func__, icc_level);
6443 if (hba->vreg_info.vcc && hba->vreg_info.vcc->max_uA)
6444 icc_level = ufshcd_get_max_icc_level(
6445 hba->vreg_info.vcc->max_uA,
6446 POWER_DESC_MAX_ACTV_ICC_LVLS - 1,
6447 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCC_0]);
6449 if (hba->vreg_info.vccq && hba->vreg_info.vccq->max_uA)
6450 icc_level = ufshcd_get_max_icc_level(
6451 hba->vreg_info.vccq->max_uA,
6453 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ_0]);
6455 if (hba->vreg_info.vccq2 && hba->vreg_info.vccq2->max_uA)
6456 icc_level = ufshcd_get_max_icc_level(
6457 hba->vreg_info.vccq2->max_uA,
6459 &desc_buf[PWR_DESC_ACTIVE_LVLS_VCCQ2_0]);
6464 static void ufshcd_init_icc_levels(struct ufs_hba *hba)
6467 int buff_len = hba->desc_size.pwr_desc;
6470 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6474 ret = ufshcd_read_power_desc(hba, desc_buf, buff_len);
6477 "%s: Failed reading power descriptor.len = %d ret = %d",
6478 __func__, buff_len, ret);
6482 hba->init_prefetch_data.icc_level =
6483 ufshcd_find_max_sup_active_icc_level(hba,
6484 desc_buf, buff_len);
6485 dev_dbg(hba->dev, "%s: setting icc_level 0x%x",
6486 __func__, hba->init_prefetch_data.icc_level);
6488 ret = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6489 QUERY_ATTR_IDN_ACTIVE_ICC_LVL, 0, 0,
6490 &hba->init_prefetch_data.icc_level);
6494 "%s: Failed configuring bActiveICCLevel = %d ret = %d",
6495 __func__, hba->init_prefetch_data.icc_level , ret);
6502 * ufshcd_scsi_add_wlus - Adds required W-LUs
6503 * @hba: per-adapter instance
6505 * UFS device specification requires the UFS devices to support 4 well known
6507 * "REPORT_LUNS" (address: 01h)
6508 * "UFS Device" (address: 50h)
6509 * "RPMB" (address: 44h)
6510 * "BOOT" (address: 30h)
6511 * UFS device's power management needs to be controlled by "POWER CONDITION"
6512 * field of SSU (START STOP UNIT) command. But this "power condition" field
6513 * will take effect only when its sent to "UFS device" well known logical unit
6514 * hence we require the scsi_device instance to represent this logical unit in
6515 * order for the UFS host driver to send the SSU command for power management.
6517 * We also require the scsi_device instance for "RPMB" (Replay Protected Memory
6518 * Block) LU so user space process can control this LU. User space may also
6519 * want to have access to BOOT LU.
6521 * This function adds scsi device instances for each of all well known LUs
6522 * (except "REPORT LUNS" LU).
6524 * Returns zero on success (all required W-LUs are added successfully),
6525 * non-zero error value on failure (if failed to add any of the required W-LU).
6527 static int ufshcd_scsi_add_wlus(struct ufs_hba *hba)
6530 struct scsi_device *sdev_rpmb;
6531 struct scsi_device *sdev_boot;
6533 hba->sdev_ufs_device = __scsi_add_device(hba->host, 0, 0,
6534 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_UFS_DEVICE_WLUN), NULL);
6535 if (IS_ERR(hba->sdev_ufs_device)) {
6536 ret = PTR_ERR(hba->sdev_ufs_device);
6537 hba->sdev_ufs_device = NULL;
6540 scsi_device_put(hba->sdev_ufs_device);
6542 sdev_rpmb = __scsi_add_device(hba->host, 0, 0,
6543 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_RPMB_WLUN), NULL);
6544 if (IS_ERR(sdev_rpmb)) {
6545 ret = PTR_ERR(sdev_rpmb);
6546 goto remove_sdev_ufs_device;
6548 scsi_device_put(sdev_rpmb);
6550 sdev_boot = __scsi_add_device(hba->host, 0, 0,
6551 ufshcd_upiu_wlun_to_scsi_wlun(UFS_UPIU_BOOT_WLUN), NULL);
6552 if (IS_ERR(sdev_boot))
6553 dev_err(hba->dev, "%s: BOOT WLUN not found\n", __func__);
6555 scsi_device_put(sdev_boot);
6558 remove_sdev_ufs_device:
6559 scsi_remove_device(hba->sdev_ufs_device);
6564 static int ufs_get_device_desc(struct ufs_hba *hba,
6565 struct ufs_dev_desc *dev_desc)
6575 buff_len = max_t(size_t, hba->desc_size.dev_desc,
6576 QUERY_DESC_MAX_SIZE + 1);
6577 desc_buf = kmalloc(buff_len, GFP_KERNEL);
6583 err = ufshcd_read_device_desc(hba, desc_buf, hba->desc_size.dev_desc);
6585 dev_err(hba->dev, "%s: Failed reading Device Desc. err = %d\n",
6591 * getting vendor (manufacturerID) and Bank Index in big endian
6594 dev_desc->wmanufacturerid = desc_buf[DEVICE_DESC_PARAM_MANF_ID] << 8 |
6595 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1];
6597 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME];
6598 err = ufshcd_read_string_desc(hba, model_index,
6599 &dev_desc->model, SD_ASCII_STD);
6601 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n",
6607 * ufshcd_read_string_desc returns size of the string
6608 * reset the error value
6617 static void ufs_put_device_desc(struct ufs_dev_desc *dev_desc)
6619 kfree(dev_desc->model);
6620 dev_desc->model = NULL;
6623 static void ufs_fixup_device_setup(struct ufs_hba *hba,
6624 struct ufs_dev_desc *dev_desc)
6626 struct ufs_dev_fix *f;
6628 for (f = ufs_fixups; f->quirk; f++) {
6629 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid ||
6630 f->card.wmanufacturerid == UFS_ANY_VENDOR) &&
6631 ((dev_desc->model &&
6632 STR_PRFX_EQUAL(f->card.model, dev_desc->model)) ||
6633 !strcmp(f->card.model, UFS_ANY_MODEL)))
6634 hba->dev_quirks |= f->quirk;
6639 * ufshcd_tune_pa_tactivate - Tunes PA_TActivate of local UniPro
6640 * @hba: per-adapter instance
6642 * PA_TActivate parameter can be tuned manually if UniPro version is less than
6643 * 1.61. PA_TActivate needs to be greater than or equal to peerM-PHY's
6644 * RX_MIN_ACTIVATETIME_CAPABILITY attribute. This optimal value can help reduce
6645 * the hibern8 exit latency.
6647 * Returns zero on success, non-zero error value on failure.
6649 static int ufshcd_tune_pa_tactivate(struct ufs_hba *hba)
6652 u32 peer_rx_min_activatetime = 0, tuned_pa_tactivate;
6654 ret = ufshcd_dme_peer_get(hba,
6656 RX_MIN_ACTIVATETIME_CAPABILITY,
6657 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6658 &peer_rx_min_activatetime);
6662 /* make sure proper unit conversion is applied */
6663 tuned_pa_tactivate =
6664 ((peer_rx_min_activatetime * RX_MIN_ACTIVATETIME_UNIT_US)
6665 / PA_TACTIVATE_TIME_UNIT_US);
6666 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6667 tuned_pa_tactivate);
6674 * ufshcd_tune_pa_hibern8time - Tunes PA_Hibern8Time of local UniPro
6675 * @hba: per-adapter instance
6677 * PA_Hibern8Time parameter can be tuned manually if UniPro version is less than
6678 * 1.61. PA_Hibern8Time needs to be maximum of local M-PHY's
6679 * TX_HIBERN8TIME_CAPABILITY & peer M-PHY's RX_HIBERN8TIME_CAPABILITY.
6680 * This optimal value can help reduce the hibern8 exit latency.
6682 * Returns zero on success, non-zero error value on failure.
6684 static int ufshcd_tune_pa_hibern8time(struct ufs_hba *hba)
6687 u32 local_tx_hibern8_time_cap = 0, peer_rx_hibern8_time_cap = 0;
6688 u32 max_hibern8_time, tuned_pa_hibern8time;
6690 ret = ufshcd_dme_get(hba,
6691 UIC_ARG_MIB_SEL(TX_HIBERN8TIME_CAPABILITY,
6692 UIC_ARG_MPHY_TX_GEN_SEL_INDEX(0)),
6693 &local_tx_hibern8_time_cap);
6697 ret = ufshcd_dme_peer_get(hba,
6698 UIC_ARG_MIB_SEL(RX_HIBERN8TIME_CAPABILITY,
6699 UIC_ARG_MPHY_RX_GEN_SEL_INDEX(0)),
6700 &peer_rx_hibern8_time_cap);
6704 max_hibern8_time = max(local_tx_hibern8_time_cap,
6705 peer_rx_hibern8_time_cap);
6706 /* make sure proper unit conversion is applied */
6707 tuned_pa_hibern8time = ((max_hibern8_time * HIBERN8TIME_UNIT_US)
6708 / PA_HIBERN8_TIME_UNIT_US);
6709 ret = ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HIBERN8TIME),
6710 tuned_pa_hibern8time);
6716 * ufshcd_quirk_tune_host_pa_tactivate - Ensures that host PA_TACTIVATE is
6717 * less than device PA_TACTIVATE time.
6718 * @hba: per-adapter instance
6720 * Some UFS devices require host PA_TACTIVATE to be lower than device
6721 * PA_TACTIVATE, we need to enable UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE quirk
6724 * Returns zero on success, non-zero error value on failure.
6726 static int ufshcd_quirk_tune_host_pa_tactivate(struct ufs_hba *hba)
6729 u32 granularity, peer_granularity;
6730 u32 pa_tactivate, peer_pa_tactivate;
6731 u32 pa_tactivate_us, peer_pa_tactivate_us;
6732 u8 gran_to_us_table[] = {1, 4, 8, 16, 32, 100};
6734 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6739 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_GRANULARITY),
6744 if ((granularity < PA_GRANULARITY_MIN_VAL) ||
6745 (granularity > PA_GRANULARITY_MAX_VAL)) {
6746 dev_err(hba->dev, "%s: invalid host PA_GRANULARITY %d",
6747 __func__, granularity);
6751 if ((peer_granularity < PA_GRANULARITY_MIN_VAL) ||
6752 (peer_granularity > PA_GRANULARITY_MAX_VAL)) {
6753 dev_err(hba->dev, "%s: invalid device PA_GRANULARITY %d",
6754 __func__, peer_granularity);
6758 ret = ufshcd_dme_get(hba, UIC_ARG_MIB(PA_TACTIVATE), &pa_tactivate);
6762 ret = ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_TACTIVATE),
6763 &peer_pa_tactivate);
6767 pa_tactivate_us = pa_tactivate * gran_to_us_table[granularity - 1];
6768 peer_pa_tactivate_us = peer_pa_tactivate *
6769 gran_to_us_table[peer_granularity - 1];
6771 if (pa_tactivate_us > peer_pa_tactivate_us) {
6772 u32 new_peer_pa_tactivate;
6774 new_peer_pa_tactivate = pa_tactivate_us /
6775 gran_to_us_table[peer_granularity - 1];
6776 new_peer_pa_tactivate++;
6777 ret = ufshcd_dme_peer_set(hba, UIC_ARG_MIB(PA_TACTIVATE),
6778 new_peer_pa_tactivate);
6785 static void ufshcd_tune_unipro_params(struct ufs_hba *hba)
6787 if (ufshcd_is_unipro_pa_params_tuning_req(hba)) {
6788 ufshcd_tune_pa_tactivate(hba);
6789 ufshcd_tune_pa_hibern8time(hba);
6792 if (hba->dev_quirks & UFS_DEVICE_QUIRK_PA_TACTIVATE)
6793 /* set 1ms timeout for PA_TACTIVATE */
6794 ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TACTIVATE), 10);
6796 if (hba->dev_quirks & UFS_DEVICE_QUIRK_HOST_PA_TACTIVATE)
6797 ufshcd_quirk_tune_host_pa_tactivate(hba);
6799 ufshcd_vops_apply_dev_quirks(hba);
6802 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba)
6804 hba->ufs_stats.hibern8_exit_cnt = 0;
6805 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0);
6806 hba->req_abort_count = 0;
6809 static void ufshcd_init_desc_sizes(struct ufs_hba *hba)
6813 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_DEVICE, 0,
6814 &hba->desc_size.dev_desc);
6816 hba->desc_size.dev_desc = QUERY_DESC_DEVICE_DEF_SIZE;
6818 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_POWER, 0,
6819 &hba->desc_size.pwr_desc);
6821 hba->desc_size.pwr_desc = QUERY_DESC_POWER_DEF_SIZE;
6823 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_INTERCONNECT, 0,
6824 &hba->desc_size.interc_desc);
6826 hba->desc_size.interc_desc = QUERY_DESC_INTERCONNECT_DEF_SIZE;
6828 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_CONFIGURATION, 0,
6829 &hba->desc_size.conf_desc);
6831 hba->desc_size.conf_desc = QUERY_DESC_CONFIGURATION_DEF_SIZE;
6833 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_UNIT, 0,
6834 &hba->desc_size.unit_desc);
6836 hba->desc_size.unit_desc = QUERY_DESC_UNIT_DEF_SIZE;
6838 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_GEOMETRY, 0,
6839 &hba->desc_size.geom_desc);
6841 hba->desc_size.geom_desc = QUERY_DESC_GEOMETRY_DEF_SIZE;
6843 err = ufshcd_read_desc_length(hba, QUERY_DESC_IDN_HEALTH, 0,
6844 &hba->desc_size.hlth_desc);
6846 hba->desc_size.hlth_desc = QUERY_DESC_HEALTH_DEF_SIZE;
6849 static struct ufs_ref_clk ufs_ref_clk_freqs[] = {
6850 {19200000, REF_CLK_FREQ_19_2_MHZ},
6851 {26000000, REF_CLK_FREQ_26_MHZ},
6852 {38400000, REF_CLK_FREQ_38_4_MHZ},
6853 {52000000, REF_CLK_FREQ_52_MHZ},
6854 {0, REF_CLK_FREQ_INVAL},
6857 static enum ufs_ref_clk_freq
6858 ufs_get_bref_clk_from_hz(unsigned long freq)
6862 for (i = 0; ufs_ref_clk_freqs[i].freq_hz; i++)
6863 if (ufs_ref_clk_freqs[i].freq_hz == freq)
6864 return ufs_ref_clk_freqs[i].val;
6866 return REF_CLK_FREQ_INVAL;
6869 void ufshcd_parse_dev_ref_clk_freq(struct ufs_hba *hba, struct clk *refclk)
6873 freq = clk_get_rate(refclk);
6875 hba->dev_ref_clk_freq =
6876 ufs_get_bref_clk_from_hz(freq);
6878 if (hba->dev_ref_clk_freq == REF_CLK_FREQ_INVAL)
6880 "invalid ref_clk setting = %ld\n", freq);
6883 static int ufshcd_set_dev_ref_clk(struct ufs_hba *hba)
6887 u32 freq = hba->dev_ref_clk_freq;
6889 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_READ_ATTR,
6890 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &ref_clk);
6893 dev_err(hba->dev, "failed reading bRefClkFreq. err = %d\n",
6898 if (ref_clk == freq)
6899 goto out; /* nothing to update */
6901 err = ufshcd_query_attr_retry(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
6902 QUERY_ATTR_IDN_REF_CLK_FREQ, 0, 0, &freq);
6905 dev_err(hba->dev, "bRefClkFreq setting to %lu Hz failed\n",
6906 ufs_ref_clk_freqs[freq].freq_hz);
6910 dev_dbg(hba->dev, "bRefClkFreq setting to %lu Hz succeeded\n",
6911 ufs_ref_clk_freqs[freq].freq_hz);
6918 * ufshcd_probe_hba - probe hba to detect device and initialize
6919 * @hba: per-adapter instance
6921 * Execute link-startup and verify device initialization
6923 static int ufshcd_probe_hba(struct ufs_hba *hba)
6925 struct ufs_dev_desc card = {0};
6927 ktime_t start = ktime_get();
6929 ret = ufshcd_link_startup(hba);
6933 /* set the default level for urgent bkops */
6934 hba->urgent_bkops_lvl = BKOPS_STATUS_PERF_IMPACT;
6935 hba->is_urgent_bkops_lvl_checked = false;
6937 /* Debug counters initialization */
6938 ufshcd_clear_dbg_ufs_stats(hba);
6940 /* UniPro link is active now */
6941 ufshcd_set_link_active(hba);
6943 ret = ufshcd_verify_dev_init(hba);
6947 ret = ufshcd_complete_dev_init(hba);
6951 /* Init check for device descriptor sizes */
6952 ufshcd_init_desc_sizes(hba);
6954 ret = ufs_get_device_desc(hba, &card);
6956 dev_err(hba->dev, "%s: Failed getting device info. err = %d\n",
6961 ufs_fixup_device_setup(hba, &card);
6962 ufs_put_device_desc(&card);
6964 ufshcd_tune_unipro_params(hba);
6966 /* UFS device is also active now */
6967 ufshcd_set_ufs_dev_active(hba);
6968 ufshcd_force_reset_auto_bkops(hba);
6969 hba->wlun_dev_clr_ua = true;
6971 if (ufshcd_get_max_pwr_mode(hba)) {
6973 "%s: Failed getting max supported power mode\n",
6977 * Set the right value to bRefClkFreq before attempting to
6978 * switch to HS gears.
6980 if (hba->dev_ref_clk_freq != REF_CLK_FREQ_INVAL)
6981 ufshcd_set_dev_ref_clk(hba);
6982 ret = ufshcd_config_pwr_mode(hba, &hba->max_pwr_info.info);
6984 dev_err(hba->dev, "%s: Failed setting power mode, err = %d\n",
6990 /* set the state as operational after switching to desired gear */
6991 hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
6993 /* Enable Auto-Hibernate if configured */
6994 ufshcd_auto_hibern8_enable(hba);
6997 * If we are in error handling context or in power management callbacks
6998 * context, no need to scan the host
7000 if (!ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7003 /* clear any previous UFS device information */
7004 memset(&hba->dev_info, 0, sizeof(hba->dev_info));
7005 if (!ufshcd_query_flag_retry(hba, UPIU_QUERY_OPCODE_READ_FLAG,
7006 QUERY_FLAG_IDN_PWR_ON_WPE, &flag))
7007 hba->dev_info.f_power_on_wp_en = flag;
7009 if (!hba->is_init_prefetch)
7010 ufshcd_init_icc_levels(hba);
7012 /* Add required well known logical units to scsi mid layer */
7013 if (ufshcd_scsi_add_wlus(hba))
7016 /* Initialize devfreq after UFS device is detected */
7017 if (ufshcd_is_clkscaling_supported(hba)) {
7018 memcpy(&hba->clk_scaling.saved_pwr_info.info,
7020 sizeof(struct ufs_pa_layer_attr));
7021 hba->clk_scaling.saved_pwr_info.is_valid = true;
7022 if (!hba->devfreq) {
7023 ret = ufshcd_devfreq_init(hba);
7027 hba->clk_scaling.is_allowed = true;
7032 scsi_scan_host(hba->host);
7033 pm_runtime_put_sync(hba->dev);
7036 if (!hba->is_init_prefetch)
7037 hba->is_init_prefetch = true;
7041 * If we failed to initialize the device or the device is not
7042 * present, turn off the power/clocks etc.
7044 if (ret && !ufshcd_eh_in_progress(hba) && !hba->pm_op_in_progress) {
7045 pm_runtime_put_sync(hba->dev);
7046 ufshcd_exit_clk_scaling(hba);
7047 ufshcd_hba_exit(hba);
7050 trace_ufshcd_init(dev_name(hba->dev), ret,
7051 ktime_to_us(ktime_sub(ktime_get(), start)),
7052 hba->curr_dev_pwr_mode, hba->uic_link_state);
7057 * ufshcd_async_scan - asynchronous execution for probing hba
7058 * @data: data pointer to pass to this function
7059 * @cookie: cookie data
7061 static void ufshcd_async_scan(void *data, async_cookie_t cookie)
7063 struct ufs_hba *hba = (struct ufs_hba *)data;
7065 ufshcd_probe_hba(hba);
7068 static enum blk_eh_timer_return ufshcd_eh_timed_out(struct scsi_cmnd *scmd)
7070 unsigned long flags;
7071 struct Scsi_Host *host;
7072 struct ufs_hba *hba;
7076 if (!scmd || !scmd->device || !scmd->device->host)
7079 host = scmd->device->host;
7080 hba = shost_priv(host);
7084 spin_lock_irqsave(host->host_lock, flags);
7086 for_each_set_bit(index, &hba->outstanding_reqs, hba->nutrs) {
7087 if (hba->lrb[index].cmd == scmd) {
7093 spin_unlock_irqrestore(host->host_lock, flags);
7096 * Bypass SCSI error handling and reset the block layer timer if this
7097 * SCSI command was not actually dispatched to UFS driver, otherwise
7098 * let SCSI layer handle the error as usual.
7100 return found ? BLK_EH_DONE : BLK_EH_RESET_TIMER;
7103 static const struct attribute_group *ufshcd_driver_groups[] = {
7104 &ufs_sysfs_unit_descriptor_group,
7105 &ufs_sysfs_lun_attributes_group,
7109 static struct scsi_host_template ufshcd_driver_template = {
7110 .module = THIS_MODULE,
7112 .proc_name = UFSHCD,
7113 .queuecommand = ufshcd_queuecommand,
7114 .slave_alloc = ufshcd_slave_alloc,
7115 .slave_configure = ufshcd_slave_configure,
7116 .slave_destroy = ufshcd_slave_destroy,
7117 .change_queue_depth = ufshcd_change_queue_depth,
7118 .eh_abort_handler = ufshcd_abort,
7119 .eh_device_reset_handler = ufshcd_eh_device_reset_handler,
7120 .eh_host_reset_handler = ufshcd_eh_host_reset_handler,
7121 .eh_timed_out = ufshcd_eh_timed_out,
7123 .sg_tablesize = SG_ALL,
7124 .cmd_per_lun = UFSHCD_CMD_PER_LUN,
7125 .can_queue = UFSHCD_CAN_QUEUE,
7126 .max_segment_size = PRDT_DATA_BYTE_COUNT_MAX,
7127 .max_host_blocked = 1,
7128 .track_queue_depth = 1,
7129 .sdev_groups = ufshcd_driver_groups,
7130 .dma_boundary = PAGE_SIZE - 1,
7131 .rpm_autosuspend_delay = RPM_AUTOSUSPEND_DELAY_MS,
7134 static int ufshcd_config_vreg_load(struct device *dev, struct ufs_vreg *vreg,
7143 * "set_load" operation shall be required on those regulators
7144 * which specifically configured current limitation. Otherwise
7145 * zero max_uA may cause unexpected behavior when regulator is
7146 * enabled or set as high power mode.
7151 ret = regulator_set_load(vreg->reg, ua);
7153 dev_err(dev, "%s: %s set load (ua=%d) failed, err=%d\n",
7154 __func__, vreg->name, ua, ret);
7160 static inline int ufshcd_config_vreg_lpm(struct ufs_hba *hba,
7161 struct ufs_vreg *vreg)
7163 return ufshcd_config_vreg_load(hba->dev, vreg, UFS_VREG_LPM_LOAD_UA);
7166 static inline int ufshcd_config_vreg_hpm(struct ufs_hba *hba,
7167 struct ufs_vreg *vreg)
7172 return ufshcd_config_vreg_load(hba->dev, vreg, vreg->max_uA);
7175 static int ufshcd_config_vreg(struct device *dev,
7176 struct ufs_vreg *vreg, bool on)
7179 struct regulator *reg;
7181 int min_uV, uA_load;
7188 if (regulator_count_voltages(reg) > 0) {
7189 if (vreg->min_uV && vreg->max_uV) {
7190 min_uV = on ? vreg->min_uV : 0;
7191 ret = regulator_set_voltage(reg, min_uV, vreg->max_uV);
7194 "%s: %s set voltage failed, err=%d\n",
7195 __func__, name, ret);
7200 uA_load = on ? vreg->max_uA : 0;
7201 ret = ufshcd_config_vreg_load(dev, vreg, uA_load);
7209 static int ufshcd_enable_vreg(struct device *dev, struct ufs_vreg *vreg)
7213 if (!vreg || vreg->enabled)
7216 ret = ufshcd_config_vreg(dev, vreg, true);
7218 ret = regulator_enable(vreg->reg);
7221 vreg->enabled = true;
7223 dev_err(dev, "%s: %s enable failed, err=%d\n",
7224 __func__, vreg->name, ret);
7229 static int ufshcd_disable_vreg(struct device *dev, struct ufs_vreg *vreg)
7233 if (!vreg || !vreg->enabled)
7236 ret = regulator_disable(vreg->reg);
7239 /* ignore errors on applying disable config */
7240 ufshcd_config_vreg(dev, vreg, false);
7241 vreg->enabled = false;
7243 dev_err(dev, "%s: %s disable failed, err=%d\n",
7244 __func__, vreg->name, ret);
7250 static int ufshcd_setup_vreg(struct ufs_hba *hba, bool on)
7253 struct device *dev = hba->dev;
7254 struct ufs_vreg_info *info = &hba->vreg_info;
7256 ret = ufshcd_toggle_vreg(dev, info->vcc, on);
7260 ret = ufshcd_toggle_vreg(dev, info->vccq, on);
7264 ret = ufshcd_toggle_vreg(dev, info->vccq2, on);
7270 ufshcd_toggle_vreg(dev, info->vccq2, false);
7271 ufshcd_toggle_vreg(dev, info->vccq, false);
7272 ufshcd_toggle_vreg(dev, info->vcc, false);
7277 static int ufshcd_setup_hba_vreg(struct ufs_hba *hba, bool on)
7279 struct ufs_vreg_info *info = &hba->vreg_info;
7281 return ufshcd_toggle_vreg(hba->dev, info->vdd_hba, on);
7284 static int ufshcd_get_vreg(struct device *dev, struct ufs_vreg *vreg)
7291 vreg->reg = devm_regulator_get(dev, vreg->name);
7292 if (IS_ERR(vreg->reg)) {
7293 ret = PTR_ERR(vreg->reg);
7294 dev_err(dev, "%s: %s get failed, err=%d\n",
7295 __func__, vreg->name, ret);
7301 static int ufshcd_init_vreg(struct ufs_hba *hba)
7304 struct device *dev = hba->dev;
7305 struct ufs_vreg_info *info = &hba->vreg_info;
7307 ret = ufshcd_get_vreg(dev, info->vcc);
7311 ret = ufshcd_get_vreg(dev, info->vccq);
7315 ret = ufshcd_get_vreg(dev, info->vccq2);
7320 static int ufshcd_init_hba_vreg(struct ufs_hba *hba)
7322 struct ufs_vreg_info *info = &hba->vreg_info;
7325 return ufshcd_get_vreg(hba->dev, info->vdd_hba);
7330 static int __ufshcd_setup_clocks(struct ufs_hba *hba, bool on,
7334 struct ufs_clk_info *clki;
7335 struct list_head *head = &hba->clk_list_head;
7336 unsigned long flags;
7337 ktime_t start = ktime_get();
7338 bool clk_state_changed = false;
7340 if (list_empty(head))
7344 * vendor specific setup_clocks ops may depend on clocks managed by
7345 * this standard driver hence call the vendor specific setup_clocks
7346 * before disabling the clocks managed here.
7349 ret = ufshcd_vops_setup_clocks(hba, on, PRE_CHANGE);
7354 list_for_each_entry(clki, head, list) {
7355 if (!IS_ERR_OR_NULL(clki->clk)) {
7356 if (skip_ref_clk && !strcmp(clki->name, "ref_clk"))
7359 clk_state_changed = on ^ clki->enabled;
7360 if (on && !clki->enabled) {
7361 ret = clk_prepare_enable(clki->clk);
7363 dev_err(hba->dev, "%s: %s prepare enable failed, %d\n",
7364 __func__, clki->name, ret);
7367 } else if (!on && clki->enabled) {
7368 clk_disable_unprepare(clki->clk);
7371 dev_dbg(hba->dev, "%s: clk: %s %sabled\n", __func__,
7372 clki->name, on ? "en" : "dis");
7377 * vendor specific setup_clocks ops may depend on clocks managed by
7378 * this standard driver hence call the vendor specific setup_clocks
7379 * after enabling the clocks managed here.
7382 ret = ufshcd_vops_setup_clocks(hba, on, POST_CHANGE);
7389 list_for_each_entry(clki, head, list) {
7390 if (!IS_ERR_OR_NULL(clki->clk) && clki->enabled)
7391 clk_disable_unprepare(clki->clk);
7393 } else if (!ret && on) {
7394 spin_lock_irqsave(hba->host->host_lock, flags);
7395 hba->clk_gating.state = CLKS_ON;
7396 trace_ufshcd_clk_gating(dev_name(hba->dev),
7397 hba->clk_gating.state);
7398 spin_unlock_irqrestore(hba->host->host_lock, flags);
7401 if (clk_state_changed)
7402 trace_ufshcd_profile_clk_gating(dev_name(hba->dev),
7403 (on ? "on" : "off"),
7404 ktime_to_us(ktime_sub(ktime_get(), start)), ret);
7408 static int ufshcd_setup_clocks(struct ufs_hba *hba, bool on)
7410 return __ufshcd_setup_clocks(hba, on, false);
7413 static int ufshcd_init_clocks(struct ufs_hba *hba)
7416 struct ufs_clk_info *clki;
7417 struct device *dev = hba->dev;
7418 struct list_head *head = &hba->clk_list_head;
7420 if (list_empty(head))
7423 list_for_each_entry(clki, head, list) {
7427 clki->clk = devm_clk_get(dev, clki->name);
7428 if (IS_ERR(clki->clk)) {
7429 ret = PTR_ERR(clki->clk);
7430 dev_err(dev, "%s: %s clk get failed, %d\n",
7431 __func__, clki->name, ret);
7436 * Parse device ref clk freq as per device tree "ref_clk".
7437 * Default dev_ref_clk_freq is set to REF_CLK_FREQ_INVAL
7438 * in ufshcd_alloc_host().
7440 if (!strcmp(clki->name, "ref_clk"))
7441 ufshcd_parse_dev_ref_clk_freq(hba, clki->clk);
7443 if (clki->max_freq) {
7444 ret = clk_set_rate(clki->clk, clki->max_freq);
7446 dev_err(hba->dev, "%s: %s clk set rate(%dHz) failed, %d\n",
7447 __func__, clki->name,
7448 clki->max_freq, ret);
7451 clki->curr_freq = clki->max_freq;
7453 dev_dbg(dev, "%s: clk: %s, rate: %lu\n", __func__,
7454 clki->name, clk_get_rate(clki->clk));
7460 static int ufshcd_variant_hba_init(struct ufs_hba *hba)
7467 err = ufshcd_vops_init(hba);
7471 err = ufshcd_vops_setup_regulators(hba, true);
7478 ufshcd_vops_exit(hba);
7481 dev_err(hba->dev, "%s: variant %s init failed err %d\n",
7482 __func__, ufshcd_get_var_name(hba), err);
7486 static void ufshcd_variant_hba_exit(struct ufs_hba *hba)
7491 ufshcd_vops_setup_regulators(hba, false);
7493 ufshcd_vops_exit(hba);
7496 static int ufshcd_hba_init(struct ufs_hba *hba)
7501 * Handle host controller power separately from the UFS device power
7502 * rails as it will help controlling the UFS host controller power
7503 * collapse easily which is different than UFS device power collapse.
7504 * Also, enable the host controller power before we go ahead with rest
7505 * of the initialization here.
7507 err = ufshcd_init_hba_vreg(hba);
7511 err = ufshcd_setup_hba_vreg(hba, true);
7515 err = ufshcd_init_clocks(hba);
7517 goto out_disable_hba_vreg;
7519 err = ufshcd_setup_clocks(hba, true);
7521 goto out_disable_hba_vreg;
7523 err = ufshcd_init_vreg(hba);
7525 goto out_disable_clks;
7527 err = ufshcd_setup_vreg(hba, true);
7529 goto out_disable_clks;
7531 err = ufshcd_variant_hba_init(hba);
7533 goto out_disable_vreg;
7535 hba->is_powered = true;
7539 ufshcd_setup_vreg(hba, false);
7541 ufshcd_setup_clocks(hba, false);
7542 out_disable_hba_vreg:
7543 ufshcd_setup_hba_vreg(hba, false);
7548 static void ufshcd_hba_exit(struct ufs_hba *hba)
7550 if (hba->is_powered) {
7551 ufshcd_variant_hba_exit(hba);
7552 ufshcd_setup_vreg(hba, false);
7553 ufshcd_suspend_clkscaling(hba);
7554 if (ufshcd_is_clkscaling_supported(hba))
7556 ufshcd_suspend_clkscaling(hba);
7557 ufshcd_setup_clocks(hba, false);
7558 ufshcd_setup_hba_vreg(hba, false);
7559 hba->is_powered = false;
7564 ufshcd_send_request_sense(struct ufs_hba *hba, struct scsi_device *sdp)
7566 unsigned char cmd[6] = {REQUEST_SENSE,
7575 buffer = kzalloc(UFS_SENSE_SIZE, GFP_KERNEL);
7581 ret = scsi_execute(sdp, cmd, DMA_FROM_DEVICE, buffer,
7582 UFS_SENSE_SIZE, NULL, NULL,
7583 msecs_to_jiffies(1000), 3, 0, RQF_PM, NULL);
7585 pr_err("%s: failed with err %d\n", __func__, ret);
7593 * ufshcd_set_dev_pwr_mode - sends START STOP UNIT command to set device
7595 * @hba: per adapter instance
7596 * @pwr_mode: device power mode to set
7598 * Returns 0 if requested power mode is set successfully
7599 * Returns non-zero if failed to set the requested power mode
7601 static int ufshcd_set_dev_pwr_mode(struct ufs_hba *hba,
7602 enum ufs_dev_pwr_mode pwr_mode)
7604 unsigned char cmd[6] = { START_STOP };
7605 struct scsi_sense_hdr sshdr;
7606 struct scsi_device *sdp;
7607 unsigned long flags;
7610 spin_lock_irqsave(hba->host->host_lock, flags);
7611 sdp = hba->sdev_ufs_device;
7613 ret = scsi_device_get(sdp);
7614 if (!ret && !scsi_device_online(sdp)) {
7616 scsi_device_put(sdp);
7621 spin_unlock_irqrestore(hba->host->host_lock, flags);
7627 * If scsi commands fail, the scsi mid-layer schedules scsi error-
7628 * handling, which would wait for host to be resumed. Since we know
7629 * we are functional while we are here, skip host resume in error
7632 hba->host->eh_noresume = 1;
7633 if (hba->wlun_dev_clr_ua) {
7634 ret = ufshcd_send_request_sense(hba, sdp);
7637 /* Unit attention condition is cleared now */
7638 hba->wlun_dev_clr_ua = false;
7641 cmd[4] = pwr_mode << 4;
7644 * Current function would be generally called from the power management
7645 * callbacks hence set the RQF_PM flag so that it doesn't resume the
7646 * already suspended childs.
7648 ret = scsi_execute(sdp, cmd, DMA_NONE, NULL, 0, NULL, &sshdr,
7649 START_STOP_TIMEOUT, 0, 0, RQF_PM, NULL);
7651 sdev_printk(KERN_WARNING, sdp,
7652 "START_STOP failed for power mode: %d, result %x\n",
7654 if (driver_byte(ret) == DRIVER_SENSE)
7655 scsi_print_sense_hdr(sdp, NULL, &sshdr);
7659 hba->curr_dev_pwr_mode = pwr_mode;
7661 scsi_device_put(sdp);
7662 hba->host->eh_noresume = 0;
7666 static int ufshcd_link_state_transition(struct ufs_hba *hba,
7667 enum uic_link_state req_link_state,
7668 int check_for_bkops)
7672 if (req_link_state == hba->uic_link_state)
7675 if (req_link_state == UIC_LINK_HIBERN8_STATE) {
7676 ret = ufshcd_uic_hibern8_enter(hba);
7678 ufshcd_set_link_hibern8(hba);
7683 * If autobkops is enabled, link can't be turned off because
7684 * turning off the link would also turn off the device.
7686 else if ((req_link_state == UIC_LINK_OFF_STATE) &&
7687 (!check_for_bkops || (check_for_bkops &&
7688 !hba->auto_bkops_enabled))) {
7690 * Let's make sure that link is in low power mode, we are doing
7691 * this currently by putting the link in Hibern8. Otherway to
7692 * put the link in low power mode is to send the DME end point
7693 * to device and then send the DME reset command to local
7694 * unipro. But putting the link in hibern8 is much faster.
7696 ret = ufshcd_uic_hibern8_enter(hba);
7700 * Change controller state to "reset state" which
7701 * should also put the link in off/reset state
7703 ufshcd_hba_stop(hba, true);
7705 * TODO: Check if we need any delay to make sure that
7706 * controller is reset
7708 ufshcd_set_link_off(hba);
7715 static void ufshcd_vreg_set_lpm(struct ufs_hba *hba)
7718 * It seems some UFS devices may keep drawing more than sleep current
7719 * (atleast for 500us) from UFS rails (especially from VCCQ rail).
7720 * To avoid this situation, add 2ms delay before putting these UFS
7721 * rails in LPM mode.
7723 if (!ufshcd_is_link_active(hba) &&
7724 hba->dev_quirks & UFS_DEVICE_QUIRK_DELAY_BEFORE_LPM)
7725 usleep_range(2000, 2100);
7728 * If UFS device is either in UFS_Sleep turn off VCC rail to save some
7731 * If UFS device and link is in OFF state, all power supplies (VCC,
7732 * VCCQ, VCCQ2) can be turned off if power on write protect is not
7733 * required. If UFS link is inactive (Hibern8 or OFF state) and device
7734 * is in sleep state, put VCCQ & VCCQ2 rails in LPM mode.
7736 * Ignore the error returned by ufshcd_toggle_vreg() as device is anyway
7737 * in low power state which would save some power.
7739 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7740 !hba->dev_info.is_lu_power_on_wp) {
7741 ufshcd_setup_vreg(hba, false);
7742 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7743 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7744 if (!ufshcd_is_link_active(hba)) {
7745 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7746 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq2);
7751 static int ufshcd_vreg_set_hpm(struct ufs_hba *hba)
7755 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba) &&
7756 !hba->dev_info.is_lu_power_on_wp) {
7757 ret = ufshcd_setup_vreg(hba, true);
7758 } else if (!ufshcd_is_ufs_dev_active(hba)) {
7759 if (!ret && !ufshcd_is_link_active(hba)) {
7760 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq);
7763 ret = ufshcd_config_vreg_hpm(hba, hba->vreg_info.vccq2);
7767 ret = ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, true);
7772 ufshcd_config_vreg_lpm(hba, hba->vreg_info.vccq);
7774 ufshcd_toggle_vreg(hba->dev, hba->vreg_info.vcc, false);
7779 static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba)
7781 if (ufshcd_is_link_off(hba))
7782 ufshcd_setup_hba_vreg(hba, false);
7785 static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba)
7787 if (ufshcd_is_link_off(hba))
7788 ufshcd_setup_hba_vreg(hba, true);
7792 * ufshcd_suspend - helper function for suspend operations
7793 * @hba: per adapter instance
7794 * @pm_op: desired low power operation type
7796 * This function will try to put the UFS device and link into low power
7797 * mode based on the "rpm_lvl" (Runtime PM level) or "spm_lvl"
7798 * (System PM level).
7800 * If this function is called during shutdown, it will make sure that
7801 * both UFS device and UFS link is powered off.
7803 * NOTE: UFS device & link must be active before we enter in this function.
7805 * Returns 0 for success and non-zero for failure
7807 static int ufshcd_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7810 enum ufs_pm_level pm_lvl;
7811 enum ufs_dev_pwr_mode req_dev_pwr_mode;
7812 enum uic_link_state req_link_state;
7814 hba->pm_op_in_progress = 1;
7815 if (!ufshcd_is_shutdown_pm(pm_op)) {
7816 pm_lvl = ufshcd_is_runtime_pm(pm_op) ?
7817 hba->rpm_lvl : hba->spm_lvl;
7818 req_dev_pwr_mode = ufs_get_pm_lvl_to_dev_pwr_mode(pm_lvl);
7819 req_link_state = ufs_get_pm_lvl_to_link_pwr_state(pm_lvl);
7821 req_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE;
7822 req_link_state = UIC_LINK_OFF_STATE;
7826 * If we can't transition into any of the low power modes
7827 * just gate the clocks.
7829 ufshcd_hold(hba, false);
7830 hba->clk_gating.is_suspended = true;
7832 if (hba->clk_scaling.is_allowed) {
7833 cancel_work_sync(&hba->clk_scaling.suspend_work);
7834 cancel_work_sync(&hba->clk_scaling.resume_work);
7835 ufshcd_suspend_clkscaling(hba);
7838 if (req_dev_pwr_mode == UFS_ACTIVE_PWR_MODE &&
7839 req_link_state == UIC_LINK_ACTIVE_STATE) {
7843 if ((req_dev_pwr_mode == hba->curr_dev_pwr_mode) &&
7844 (req_link_state == hba->uic_link_state))
7847 /* UFS device & link must be active before we enter in this function */
7848 if (!ufshcd_is_ufs_dev_active(hba) || !ufshcd_is_link_active(hba)) {
7853 if (ufshcd_is_runtime_pm(pm_op)) {
7854 if (ufshcd_can_autobkops_during_suspend(hba)) {
7856 * The device is idle with no requests in the queue,
7857 * allow background operations if bkops status shows
7858 * that performance might be impacted.
7860 ret = ufshcd_urgent_bkops(hba);
7864 /* make sure that auto bkops is disabled */
7865 ufshcd_disable_auto_bkops(hba);
7869 if ((req_dev_pwr_mode != hba->curr_dev_pwr_mode) &&
7870 ((ufshcd_is_runtime_pm(pm_op) && !hba->auto_bkops_enabled) ||
7871 !ufshcd_is_runtime_pm(pm_op))) {
7872 /* ensure that bkops is disabled */
7873 ufshcd_disable_auto_bkops(hba);
7874 ret = ufshcd_set_dev_pwr_mode(hba, req_dev_pwr_mode);
7879 ret = ufshcd_link_state_transition(hba, req_link_state, 1);
7881 goto set_dev_active;
7883 ufshcd_vreg_set_lpm(hba);
7887 * Call vendor specific suspend callback. As these callbacks may access
7888 * vendor specific host controller register space call them before the
7889 * host clocks are ON.
7891 ret = ufshcd_vops_suspend(hba, pm_op);
7893 goto set_link_active;
7895 if (!ufshcd_is_link_active(hba))
7896 ufshcd_setup_clocks(hba, false);
7898 /* If link is active, device ref_clk can't be switched off */
7899 __ufshcd_setup_clocks(hba, false, true);
7901 hba->clk_gating.state = CLKS_OFF;
7902 trace_ufshcd_clk_gating(dev_name(hba->dev), hba->clk_gating.state);
7904 * Disable the host irq as host controller as there won't be any
7905 * host controller transaction expected till resume.
7907 ufshcd_disable_irq(hba);
7908 /* Put the host controller in low power mode if possible */
7909 ufshcd_hba_vreg_set_lpm(hba);
7913 if (hba->clk_scaling.is_allowed)
7914 ufshcd_resume_clkscaling(hba);
7915 ufshcd_vreg_set_hpm(hba);
7916 if (ufshcd_is_link_hibern8(hba) && !ufshcd_uic_hibern8_exit(hba))
7917 ufshcd_set_link_active(hba);
7918 else if (ufshcd_is_link_off(hba))
7919 ufshcd_host_reset_and_restore(hba);
7921 if (!ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE))
7922 ufshcd_disable_auto_bkops(hba);
7924 if (hba->clk_scaling.is_allowed)
7925 ufshcd_resume_clkscaling(hba);
7926 hba->clk_gating.is_suspended = false;
7927 ufshcd_release(hba);
7929 hba->pm_op_in_progress = 0;
7931 ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret);
7936 * ufshcd_resume - helper function for resume operations
7937 * @hba: per adapter instance
7938 * @pm_op: runtime PM or system PM
7940 * This function basically brings the UFS device, UniPro link and controller
7943 * Returns 0 for success and non-zero for failure
7945 static int ufshcd_resume(struct ufs_hba *hba, enum ufs_pm_op pm_op)
7948 enum uic_link_state old_link_state;
7950 hba->pm_op_in_progress = 1;
7951 old_link_state = hba->uic_link_state;
7953 ufshcd_hba_vreg_set_hpm(hba);
7954 /* Make sure clocks are enabled before accessing controller */
7955 ret = ufshcd_setup_clocks(hba, true);
7959 /* enable the host irq as host controller would be active soon */
7960 ufshcd_enable_irq(hba);
7962 ret = ufshcd_vreg_set_hpm(hba);
7964 goto disable_irq_and_vops_clks;
7967 * Call vendor specific resume callback. As these callbacks may access
7968 * vendor specific host controller register space call them when the
7969 * host clocks are ON.
7971 ret = ufshcd_vops_resume(hba, pm_op);
7975 if (ufshcd_is_link_hibern8(hba)) {
7976 ret = ufshcd_uic_hibern8_exit(hba);
7978 ufshcd_set_link_active(hba);
7980 goto vendor_suspend;
7981 } else if (ufshcd_is_link_off(hba)) {
7982 ret = ufshcd_host_reset_and_restore(hba);
7984 * ufshcd_host_reset_and_restore() should have already
7985 * set the link state as active
7987 if (ret || !ufshcd_is_link_active(hba))
7988 goto vendor_suspend;
7991 if (!ufshcd_is_ufs_dev_active(hba)) {
7992 ret = ufshcd_set_dev_pwr_mode(hba, UFS_ACTIVE_PWR_MODE);
7994 goto set_old_link_state;
7997 if (ufshcd_keep_autobkops_enabled_except_suspend(hba))
7998 ufshcd_enable_auto_bkops(hba);
8001 * If BKOPs operations are urgently needed at this moment then
8002 * keep auto-bkops enabled or else disable it.
8004 ufshcd_urgent_bkops(hba);
8006 hba->clk_gating.is_suspended = false;
8008 if (hba->clk_scaling.is_allowed)
8009 ufshcd_resume_clkscaling(hba);
8011 /* Enable Auto-Hibernate if configured */
8012 ufshcd_auto_hibern8_enable(hba);
8014 /* Schedule clock gating in case of no access to UFS device yet */
8015 ufshcd_release(hba);
8020 ufshcd_link_state_transition(hba, old_link_state, 0);
8022 ufshcd_vops_suspend(hba, pm_op);
8024 ufshcd_vreg_set_lpm(hba);
8025 disable_irq_and_vops_clks:
8026 ufshcd_disable_irq(hba);
8027 if (hba->clk_scaling.is_allowed)
8028 ufshcd_suspend_clkscaling(hba);
8029 ufshcd_setup_clocks(hba, false);
8031 hba->pm_op_in_progress = 0;
8033 ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret);
8038 * ufshcd_system_suspend - system suspend routine
8039 * @hba: per adapter instance
8041 * Check the description of ufshcd_suspend() function for more details.
8043 * Returns 0 for success and non-zero for failure
8045 int ufshcd_system_suspend(struct ufs_hba *hba)
8048 ktime_t start = ktime_get();
8050 if (!hba || !hba->is_powered)
8053 if ((ufs_get_pm_lvl_to_dev_pwr_mode(hba->spm_lvl) ==
8054 hba->curr_dev_pwr_mode) &&
8055 (ufs_get_pm_lvl_to_link_pwr_state(hba->spm_lvl) ==
8056 hba->uic_link_state))
8059 if (pm_runtime_suspended(hba->dev)) {
8061 * UFS device and/or UFS link low power states during runtime
8062 * suspend seems to be different than what is expected during
8063 * system suspend. Hence runtime resume the devic & link and
8064 * let the system suspend low power states to take effect.
8065 * TODO: If resume takes longer time, we might have optimize
8066 * it in future by not resuming everything if possible.
8068 ret = ufshcd_runtime_resume(hba);
8073 ret = ufshcd_suspend(hba, UFS_SYSTEM_PM);
8075 trace_ufshcd_system_suspend(dev_name(hba->dev), ret,
8076 ktime_to_us(ktime_sub(ktime_get(), start)),
8077 hba->curr_dev_pwr_mode, hba->uic_link_state);
8079 hba->is_sys_suspended = true;
8082 EXPORT_SYMBOL(ufshcd_system_suspend);
8085 * ufshcd_system_resume - system resume routine
8086 * @hba: per adapter instance
8088 * Returns 0 for success and non-zero for failure
8091 int ufshcd_system_resume(struct ufs_hba *hba)
8094 ktime_t start = ktime_get();
8099 if (!hba->is_powered || pm_runtime_suspended(hba->dev))
8101 * Let the runtime resume take care of resuming
8102 * if runtime suspended.
8106 ret = ufshcd_resume(hba, UFS_SYSTEM_PM);
8108 trace_ufshcd_system_resume(dev_name(hba->dev), ret,
8109 ktime_to_us(ktime_sub(ktime_get(), start)),
8110 hba->curr_dev_pwr_mode, hba->uic_link_state);
8112 hba->is_sys_suspended = false;
8115 EXPORT_SYMBOL(ufshcd_system_resume);
8118 * ufshcd_runtime_suspend - runtime suspend routine
8119 * @hba: per adapter instance
8121 * Check the description of ufshcd_suspend() function for more details.
8123 * Returns 0 for success and non-zero for failure
8125 int ufshcd_runtime_suspend(struct ufs_hba *hba)
8128 ktime_t start = ktime_get();
8133 if (!hba->is_powered)
8136 ret = ufshcd_suspend(hba, UFS_RUNTIME_PM);
8138 trace_ufshcd_runtime_suspend(dev_name(hba->dev), ret,
8139 ktime_to_us(ktime_sub(ktime_get(), start)),
8140 hba->curr_dev_pwr_mode, hba->uic_link_state);
8143 EXPORT_SYMBOL(ufshcd_runtime_suspend);
8146 * ufshcd_runtime_resume - runtime resume routine
8147 * @hba: per adapter instance
8149 * This function basically brings the UFS device, UniPro link and controller
8150 * to active state. Following operations are done in this function:
8152 * 1. Turn on all the controller related clocks
8153 * 2. Bring the UniPro link out of Hibernate state
8154 * 3. If UFS device is in sleep state, turn ON VCC rail and bring the UFS device
8156 * 4. If auto-bkops is enabled on the device, disable it.
8158 * So following would be the possible power state after this function return
8160 * S1: UFS device in Active state with VCC rail ON
8161 * UniPro link in Active state
8162 * All the UFS/UniPro controller clocks are ON
8164 * Returns 0 for success and non-zero for failure
8166 int ufshcd_runtime_resume(struct ufs_hba *hba)
8169 ktime_t start = ktime_get();
8174 if (!hba->is_powered)
8177 ret = ufshcd_resume(hba, UFS_RUNTIME_PM);
8179 trace_ufshcd_runtime_resume(dev_name(hba->dev), ret,
8180 ktime_to_us(ktime_sub(ktime_get(), start)),
8181 hba->curr_dev_pwr_mode, hba->uic_link_state);
8184 EXPORT_SYMBOL(ufshcd_runtime_resume);
8186 int ufshcd_runtime_idle(struct ufs_hba *hba)
8190 EXPORT_SYMBOL(ufshcd_runtime_idle);
8193 * ufshcd_shutdown - shutdown routine
8194 * @hba: per adapter instance
8196 * This function would power off both UFS device and UFS link.
8198 * Returns 0 always to allow force shutdown even in case of errors.
8200 int ufshcd_shutdown(struct ufs_hba *hba)
8204 if (!hba->is_powered)
8207 if (ufshcd_is_ufs_dev_poweroff(hba) && ufshcd_is_link_off(hba))
8210 if (pm_runtime_suspended(hba->dev)) {
8211 ret = ufshcd_runtime_resume(hba);
8216 ret = ufshcd_suspend(hba, UFS_SHUTDOWN_PM);
8219 dev_err(hba->dev, "%s failed, err %d\n", __func__, ret);
8220 /* allow force shutdown even in case of errors */
8223 EXPORT_SYMBOL(ufshcd_shutdown);
8226 * ufshcd_remove - de-allocate SCSI host and host memory space
8227 * data structure memory
8228 * @hba: per adapter instance
8230 void ufshcd_remove(struct ufs_hba *hba)
8232 ufs_bsg_remove(hba);
8233 ufs_sysfs_remove_nodes(hba->dev);
8234 blk_cleanup_queue(hba->tmf_queue);
8235 blk_mq_free_tag_set(&hba->tmf_tag_set);
8236 blk_cleanup_queue(hba->cmd_queue);
8237 scsi_remove_host(hba->host);
8238 /* disable interrupts */
8239 ufshcd_disable_intr(hba, hba->intr_mask);
8240 ufshcd_hba_stop(hba, true);
8242 ufshcd_exit_clk_scaling(hba);
8243 ufshcd_exit_clk_gating(hba);
8244 if (ufshcd_is_clkscaling_supported(hba))
8245 device_remove_file(hba->dev, &hba->clk_scaling.enable_attr);
8246 ufshcd_hba_exit(hba);
8248 EXPORT_SYMBOL_GPL(ufshcd_remove);
8251 * ufshcd_dealloc_host - deallocate Host Bus Adapter (HBA)
8252 * @hba: pointer to Host Bus Adapter (HBA)
8254 void ufshcd_dealloc_host(struct ufs_hba *hba)
8256 scsi_host_put(hba->host);
8258 EXPORT_SYMBOL_GPL(ufshcd_dealloc_host);
8261 * ufshcd_set_dma_mask - Set dma mask based on the controller
8262 * addressing capability
8263 * @hba: per adapter instance
8265 * Returns 0 for success, non-zero for failure
8267 static int ufshcd_set_dma_mask(struct ufs_hba *hba)
8269 if (hba->capabilities & MASK_64_ADDRESSING_SUPPORT) {
8270 if (!dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(64)))
8273 return dma_set_mask_and_coherent(hba->dev, DMA_BIT_MASK(32));
8277 * ufshcd_alloc_host - allocate Host Bus Adapter (HBA)
8278 * @dev: pointer to device handle
8279 * @hba_handle: driver private handle
8280 * Returns 0 on success, non-zero value on failure
8282 int ufshcd_alloc_host(struct device *dev, struct ufs_hba **hba_handle)
8284 struct Scsi_Host *host;
8285 struct ufs_hba *hba;
8290 "Invalid memory reference for dev is NULL\n");
8295 host = scsi_host_alloc(&ufshcd_driver_template,
8296 sizeof(struct ufs_hba));
8298 dev_err(dev, "scsi_host_alloc failed\n");
8302 hba = shost_priv(host);
8306 hba->dev_ref_clk_freq = REF_CLK_FREQ_INVAL;
8308 INIT_LIST_HEAD(&hba->clk_list_head);
8313 EXPORT_SYMBOL(ufshcd_alloc_host);
8315 /* This function exists because blk_mq_alloc_tag_set() requires this. */
8316 static blk_status_t ufshcd_queue_tmf(struct blk_mq_hw_ctx *hctx,
8317 const struct blk_mq_queue_data *qd)
8320 return BLK_STS_NOTSUPP;
8323 static const struct blk_mq_ops ufshcd_tmf_ops = {
8324 .queue_rq = ufshcd_queue_tmf,
8328 * ufshcd_init - Driver initialization routine
8329 * @hba: per-adapter instance
8330 * @mmio_base: base register address
8331 * @irq: Interrupt line of device
8332 * Returns 0 on success, non-zero value on failure
8334 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq)
8337 struct Scsi_Host *host = hba->host;
8338 struct device *dev = hba->dev;
8342 "Invalid memory reference for mmio_base is NULL\n");
8347 hba->mmio_base = mmio_base;
8350 err = ufshcd_hba_init(hba);
8354 /* Read capabilities registers */
8355 ufshcd_hba_capabilities(hba);
8357 /* Get UFS version supported by the controller */
8358 hba->ufs_version = ufshcd_get_ufs_version(hba);
8360 if ((hba->ufs_version != UFSHCI_VERSION_10) &&
8361 (hba->ufs_version != UFSHCI_VERSION_11) &&
8362 (hba->ufs_version != UFSHCI_VERSION_20) &&
8363 (hba->ufs_version != UFSHCI_VERSION_21))
8364 dev_err(hba->dev, "invalid UFS version 0x%x\n",
8367 /* Get Interrupt bit mask per version */
8368 hba->intr_mask = ufshcd_get_intr_mask(hba);
8370 err = ufshcd_set_dma_mask(hba);
8372 dev_err(hba->dev, "set dma mask failed\n");
8376 /* Allocate memory for host memory space */
8377 err = ufshcd_memory_alloc(hba);
8379 dev_err(hba->dev, "Memory allocation failed\n");
8384 ufshcd_host_memory_configure(hba);
8386 host->can_queue = hba->nutrs;
8387 host->cmd_per_lun = hba->nutrs;
8388 host->max_id = UFSHCD_MAX_ID;
8389 host->max_lun = UFS_MAX_LUNS;
8390 host->max_channel = UFSHCD_MAX_CHANNEL;
8391 host->unique_id = host->host_no;
8392 host->max_cmd_len = UFS_CDB_SIZE;
8394 hba->max_pwr_info.is_valid = false;
8396 /* Initialize work queues */
8397 INIT_WORK(&hba->eh_work, ufshcd_err_handler);
8398 INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
8400 /* Initialize UIC command mutex */
8401 mutex_init(&hba->uic_cmd_mutex);
8403 /* Initialize mutex for device management commands */
8404 mutex_init(&hba->dev_cmd.lock);
8406 init_rwsem(&hba->clk_scaling_lock);
8408 ufshcd_init_clk_gating(hba);
8410 ufshcd_init_clk_scaling(hba);
8413 * In order to avoid any spurious interrupt immediately after
8414 * registering UFS controller interrupt handler, clear any pending UFS
8415 * interrupt status and disable all the UFS interrupts.
8417 ufshcd_writel(hba, ufshcd_readl(hba, REG_INTERRUPT_STATUS),
8418 REG_INTERRUPT_STATUS);
8419 ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
8421 * Make sure that UFS interrupts are disabled and any pending interrupt
8422 * status is cleared before registering UFS interrupt handler.
8426 /* IRQ registration */
8427 err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
8429 dev_err(hba->dev, "request irq failed\n");
8432 hba->is_irq_enabled = true;
8435 err = scsi_add_host(host, hba->dev);
8437 dev_err(hba->dev, "scsi_add_host failed\n");
8441 hba->cmd_queue = blk_mq_init_queue(&hba->host->tag_set);
8442 if (IS_ERR(hba->cmd_queue)) {
8443 err = PTR_ERR(hba->cmd_queue);
8444 goto out_remove_scsi_host;
8447 hba->tmf_tag_set = (struct blk_mq_tag_set) {
8449 .queue_depth = hba->nutmrs,
8450 .ops = &ufshcd_tmf_ops,
8451 .flags = BLK_MQ_F_NO_SCHED,
8453 err = blk_mq_alloc_tag_set(&hba->tmf_tag_set);
8455 goto free_cmd_queue;
8456 hba->tmf_queue = blk_mq_init_queue(&hba->tmf_tag_set);
8457 if (IS_ERR(hba->tmf_queue)) {
8458 err = PTR_ERR(hba->tmf_queue);
8459 goto free_tmf_tag_set;
8462 /* Reset the attached device */
8463 ufshcd_vops_device_reset(hba);
8465 /* Host controller enable */
8466 err = ufshcd_hba_enable(hba);
8468 dev_err(hba->dev, "Host controller enable failed\n");
8469 ufshcd_print_host_regs(hba);
8470 ufshcd_print_host_state(hba);
8471 goto free_tmf_queue;
8475 * Set the default power management level for runtime and system PM.
8476 * Default power saving mode is to keep UFS link in Hibern8 state
8477 * and UFS device in sleep state.
8479 hba->rpm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8481 UIC_LINK_HIBERN8_STATE);
8482 hba->spm_lvl = ufs_get_desired_pm_lvl_for_dev_link_state(
8484 UIC_LINK_HIBERN8_STATE);
8486 /* Set the default auto-hiberate idle timer value to 150 ms */
8487 if (ufshcd_is_auto_hibern8_supported(hba) && !hba->ahit) {
8488 hba->ahit = FIELD_PREP(UFSHCI_AHIBERN8_TIMER_MASK, 150) |
8489 FIELD_PREP(UFSHCI_AHIBERN8_SCALE_MASK, 3);
8492 /* Hold auto suspend until async scan completes */
8493 pm_runtime_get_sync(dev);
8494 atomic_set(&hba->scsi_block_reqs_cnt, 0);
8496 * We are assuming that device wasn't put in sleep/power-down
8497 * state exclusively during the boot stage before kernel.
8498 * This assumption helps avoid doing link startup twice during
8499 * ufshcd_probe_hba().
8501 ufshcd_set_ufs_dev_active(hba);
8503 async_schedule(ufshcd_async_scan, hba);
8504 ufs_sysfs_add_nodes(hba->dev);
8509 blk_cleanup_queue(hba->tmf_queue);
8511 blk_mq_free_tag_set(&hba->tmf_tag_set);
8513 blk_cleanup_queue(hba->cmd_queue);
8514 out_remove_scsi_host:
8515 scsi_remove_host(hba->host);
8517 ufshcd_exit_clk_scaling(hba);
8518 ufshcd_exit_clk_gating(hba);
8520 hba->is_irq_enabled = false;
8521 ufshcd_hba_exit(hba);
8525 EXPORT_SYMBOL_GPL(ufshcd_init);
8527 MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
8528 MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
8529 MODULE_DESCRIPTION("Generic UFS host controller driver Core");
8530 MODULE_LICENSE("GPL");
8531 MODULE_VERSION(UFSHCD_DRIVER_VERSION);