2 * Intel IXP4xx Queue Manager driver for Linux
4 * Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl>
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
11 #include <linux/ioport.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
16 #include <mach/qmgr.h>
18 /* FIXME: get rid of these static assigments */
19 #define IRQ_IXP4XX_BASE 16
20 #define IRQ_IXP4XX_QM1 (IRQ_IXP4XX_BASE + 3)
21 #define IRQ_IXP4XX_QM2 (IRQ_IXP4XX_BASE + 4)
23 static struct qmgr_regs __iomem *qmgr_regs = IXP4XX_QMGR_BASE_VIRT;
24 static struct resource *mem_res;
25 static spinlock_t qmgr_lock;
26 static u32 used_sram_bitmap[4]; /* 128 16-dword pages */
27 static void (*irq_handlers[QUEUES])(void *pdev);
28 static void *irq_pdevs[QUEUES];
31 char qmgr_queue_descs[QUEUES][32];
34 void qmgr_set_irq(unsigned int queue, int src,
35 void (*handler)(void *pdev), void *pdev)
39 spin_lock_irqsave(&qmgr_lock, flags);
40 if (queue < HALF_QUEUES) {
43 BUG_ON(src > QUEUE_IRQ_SRC_NOT_FULL);
44 reg = &qmgr_regs->irqsrc[queue >> 3]; /* 8 queues per u32 */
45 bit = (queue % 8) * 4; /* 3 bits + 1 reserved bit per queue */
46 __raw_writel((__raw_readl(reg) & ~(7 << bit)) | (src << bit),
49 /* IRQ source for queues 32-63 is fixed */
50 BUG_ON(src != QUEUE_IRQ_SRC_NOT_NEARLY_EMPTY);
52 irq_handlers[queue] = handler;
53 irq_pdevs[queue] = pdev;
54 spin_unlock_irqrestore(&qmgr_lock, flags);
58 static irqreturn_t qmgr_irq1_a0(int irq, void *pdev)
61 u32 en_bitmap, src, stat;
63 /* ACK - it may clear any bits so don't rely on it */
64 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[0]);
66 en_bitmap = qmgr_regs->irqen[0];
68 i = __fls(en_bitmap); /* number of the last "low" queue */
70 src = qmgr_regs->irqsrc[i >> 3];
71 stat = qmgr_regs->stat1[i >> 3];
72 if (src & 4) /* the IRQ condition is inverted */
74 if (stat & BIT(src & 3)) {
75 irq_handlers[i](irq_pdevs[i]);
83 static irqreturn_t qmgr_irq2_a0(int irq, void *pdev)
88 /* ACK - it may clear any bits so don't rely on it */
89 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[1]);
91 req_bitmap = qmgr_regs->irqen[1] & qmgr_regs->statne_h;
93 i = __fls(req_bitmap); /* number of the last "high" queue */
94 req_bitmap &= ~BIT(i);
95 irq_handlers[HALF_QUEUES + i](irq_pdevs[HALF_QUEUES + i]);
102 static irqreturn_t qmgr_irq(int irq, void *pdev)
104 int i, half = (irq == IRQ_IXP4XX_QM1 ? 0 : 1);
105 u32 req_bitmap = __raw_readl(&qmgr_regs->irqstat[half]);
109 __raw_writel(req_bitmap, &qmgr_regs->irqstat[half]); /* ACK */
112 i = __fls(req_bitmap); /* number of the last queue */
113 req_bitmap &= ~BIT(i);
114 i += half * HALF_QUEUES;
115 irq_handlers[i](irq_pdevs[i]);
121 void qmgr_enable_irq(unsigned int queue)
124 int half = queue / 32;
125 u32 mask = 1 << (queue & (HALF_QUEUES - 1));
127 spin_lock_irqsave(&qmgr_lock, flags);
128 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) | mask,
129 &qmgr_regs->irqen[half]);
130 spin_unlock_irqrestore(&qmgr_lock, flags);
133 void qmgr_disable_irq(unsigned int queue)
136 int half = queue / 32;
137 u32 mask = 1 << (queue & (HALF_QUEUES - 1));
139 spin_lock_irqsave(&qmgr_lock, flags);
140 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) & ~mask,
141 &qmgr_regs->irqen[half]);
142 __raw_writel(mask, &qmgr_regs->irqstat[half]); /* clear */
143 spin_unlock_irqrestore(&qmgr_lock, flags);
146 static inline void shift_mask(u32 *mask)
148 mask[3] = mask[3] << 1 | mask[2] >> 31;
149 mask[2] = mask[2] << 1 | mask[1] >> 31;
150 mask[1] = mask[1] << 1 | mask[0] >> 31;
155 int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
156 unsigned int nearly_empty_watermark,
157 unsigned int nearly_full_watermark,
158 const char *desc_format, const char* name)
160 int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
161 unsigned int nearly_empty_watermark,
162 unsigned int nearly_full_watermark)
165 u32 cfg, addr = 0, mask[4]; /* in 16-dwords */
168 BUG_ON(queue >= QUEUES);
170 if ((nearly_empty_watermark | nearly_full_watermark) & ~7)
194 cfg |= nearly_empty_watermark << 26;
195 cfg |= nearly_full_watermark << 29;
196 len /= 16; /* in 16-dwords: 1, 2, 4 or 8 */
197 mask[1] = mask[2] = mask[3] = 0;
199 if (!try_module_get(THIS_MODULE))
202 spin_lock_irq(&qmgr_lock);
203 if (__raw_readl(&qmgr_regs->sram[queue])) {
209 if (!(used_sram_bitmap[0] & mask[0]) &&
210 !(used_sram_bitmap[1] & mask[1]) &&
211 !(used_sram_bitmap[2] & mask[2]) &&
212 !(used_sram_bitmap[3] & mask[3]))
213 break; /* found free space */
217 if (addr + len > ARRAY_SIZE(qmgr_regs->sram)) {
218 printk(KERN_ERR "qmgr: no free SRAM space for"
219 " queue %i\n", queue);
225 used_sram_bitmap[0] |= mask[0];
226 used_sram_bitmap[1] |= mask[1];
227 used_sram_bitmap[2] |= mask[2];
228 used_sram_bitmap[3] |= mask[3];
229 __raw_writel(cfg | (addr << 14), &qmgr_regs->sram[queue]);
231 snprintf(qmgr_queue_descs[queue], sizeof(qmgr_queue_descs[0]),
233 printk(KERN_DEBUG "qmgr: requested queue %s(%i) addr = 0x%02X\n",
234 qmgr_queue_descs[queue], queue, addr);
236 spin_unlock_irq(&qmgr_lock);
240 spin_unlock_irq(&qmgr_lock);
241 module_put(THIS_MODULE);
245 void qmgr_release_queue(unsigned int queue)
247 u32 cfg, addr, mask[4];
249 BUG_ON(queue >= QUEUES); /* not in valid range */
251 spin_lock_irq(&qmgr_lock);
252 cfg = __raw_readl(&qmgr_regs->sram[queue]);
253 addr = (cfg >> 14) & 0xFF;
255 BUG_ON(!addr); /* not requested */
257 switch ((cfg >> 24) & 3) {
258 case 0: mask[0] = 0x1; break;
259 case 1: mask[0] = 0x3; break;
260 case 2: mask[0] = 0xF; break;
261 case 3: mask[0] = 0xFF; break;
264 mask[1] = mask[2] = mask[3] = 0;
270 printk(KERN_DEBUG "qmgr: releasing queue %s(%i)\n",
271 qmgr_queue_descs[queue], queue);
272 qmgr_queue_descs[queue][0] = '\x0';
275 while ((addr = qmgr_get_entry(queue)))
276 printk(KERN_ERR "qmgr: released queue %i not empty: 0x%08X\n",
279 __raw_writel(0, &qmgr_regs->sram[queue]);
281 used_sram_bitmap[0] &= ~mask[0];
282 used_sram_bitmap[1] &= ~mask[1];
283 used_sram_bitmap[2] &= ~mask[2];
284 used_sram_bitmap[3] &= ~mask[3];
285 irq_handlers[queue] = NULL; /* catch IRQ bugs */
286 spin_unlock_irq(&qmgr_lock);
288 module_put(THIS_MODULE);
291 static int qmgr_init(void)
294 irq_handler_t handler1, handler2;
296 /* This driver does not work with device tree */
297 if (of_have_populated_dt())
300 mem_res = request_mem_region(IXP4XX_QMGR_BASE_PHYS,
301 IXP4XX_QMGR_REGION_SIZE,
302 "IXP4xx Queue Manager");
306 /* reset qmgr registers */
307 for (i = 0; i < 4; i++) {
308 __raw_writel(0x33333333, &qmgr_regs->stat1[i]);
309 __raw_writel(0, &qmgr_regs->irqsrc[i]);
311 for (i = 0; i < 2; i++) {
312 __raw_writel(0, &qmgr_regs->stat2[i]);
313 __raw_writel(0xFFFFFFFF, &qmgr_regs->irqstat[i]); /* clear */
314 __raw_writel(0, &qmgr_regs->irqen[i]);
317 __raw_writel(0xFFFFFFFF, &qmgr_regs->statne_h);
318 __raw_writel(0, &qmgr_regs->statf_h);
320 for (i = 0; i < QUEUES; i++)
321 __raw_writel(0, &qmgr_regs->sram[i]);
323 if (cpu_is_ixp42x_rev_a0()) {
324 handler1 = qmgr_irq1_a0;
325 handler2 = qmgr_irq2_a0;
327 handler1 = handler2 = qmgr_irq;
329 err = request_irq(IRQ_IXP4XX_QM1, handler1, 0, "IXP4xx Queue Manager",
332 printk(KERN_ERR "qmgr: failed to request IRQ%i (%i)\n",
333 IRQ_IXP4XX_QM1, err);
337 err = request_irq(IRQ_IXP4XX_QM2, handler2, 0, "IXP4xx Queue Manager",
340 printk(KERN_ERR "qmgr: failed to request IRQ%i (%i)\n",
341 IRQ_IXP4XX_QM2, err);
345 used_sram_bitmap[0] = 0xF; /* 4 first pages reserved for config */
346 spin_lock_init(&qmgr_lock);
348 printk(KERN_INFO "IXP4xx Queue Manager initialized.\n");
352 free_irq(IRQ_IXP4XX_QM1, NULL);
354 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
358 static void qmgr_remove(void)
360 free_irq(IRQ_IXP4XX_QM1, NULL);
361 free_irq(IRQ_IXP4XX_QM2, NULL);
362 synchronize_irq(IRQ_IXP4XX_QM1);
363 synchronize_irq(IRQ_IXP4XX_QM2);
364 release_mem_region(IXP4XX_QMGR_BASE_PHYS, IXP4XX_QMGR_REGION_SIZE);
367 module_init(qmgr_init);
368 module_exit(qmgr_remove);
370 MODULE_LICENSE("GPL v2");
371 MODULE_AUTHOR("Krzysztof Halasa");
373 EXPORT_SYMBOL(qmgr_set_irq);
374 EXPORT_SYMBOL(qmgr_enable_irq);
375 EXPORT_SYMBOL(qmgr_disable_irq);
377 EXPORT_SYMBOL(qmgr_queue_descs);
378 EXPORT_SYMBOL(qmgr_request_queue);
380 EXPORT_SYMBOL(__qmgr_request_queue);
382 EXPORT_SYMBOL(qmgr_release_queue);