4 #define OCTEON_SPI_MAX_BYTES 9
5 #define OCTEON_SPI_MAX_CLOCK_HZ 16000000
7 struct octeon_spi_regs {
15 void __iomem *register_base;
19 struct octeon_spi_regs regs;
22 #define OCTEON_SPI_CFG(x) (x->regs.config)
23 #define OCTEON_SPI_STS(x) (x->regs.status)
24 #define OCTEON_SPI_TX(x) (x->regs.tx)
25 #define OCTEON_SPI_DAT0(x) (x->regs.data)
27 int octeon_spi_transfer_one_message(struct spi_master *master,
28 struct spi_message *msg);
30 /* MPI register descriptions */
32 #define CVMX_MPI_CFG (CVMX_ADD_IO_SEG(0x0001070000001000ull))
33 #define CVMX_MPI_DATX(offset) (CVMX_ADD_IO_SEG(0x0001070000001080ull) + ((offset) & 15) * 8)
34 #define CVMX_MPI_STS (CVMX_ADD_IO_SEG(0x0001070000001008ull))
35 #define CVMX_MPI_TX (CVMX_ADD_IO_SEG(0x0001070000001010ull))
39 struct cvmx_mpi_cfg_s {
40 #ifdef __BIG_ENDIAN_BITFIELD
41 uint64_t reserved_29_63:35;
75 uint64_t reserved_29_63:35;
78 struct cvmx_mpi_cfg_cn30xx {
79 #ifdef __BIG_ENDIAN_BITFIELD
80 uint64_t reserved_29_63:35;
82 uint64_t reserved_12_15:4;
106 uint64_t reserved_12_15:4;
108 uint64_t reserved_29_63:35;
111 struct cvmx_mpi_cfg_cn31xx {
112 #ifdef __BIG_ENDIAN_BITFIELD
113 uint64_t reserved_29_63:35;
115 uint64_t reserved_11_15:5;
137 uint64_t reserved_11_15:5;
139 uint64_t reserved_29_63:35;
142 struct cvmx_mpi_cfg_cn30xx cn50xx;
143 struct cvmx_mpi_cfg_cn61xx {
144 #ifdef __BIG_ENDIAN_BITFIELD
145 uint64_t reserved_29_63:35;
147 uint64_t reserved_14_15:2;
154 uint64_t reserved_6_6:1;
168 uint64_t reserved_6_6:1;
175 uint64_t reserved_14_15:2;
177 uint64_t reserved_29_63:35;
180 struct cvmx_mpi_cfg_cn66xx {
181 #ifdef __BIG_ENDIAN_BITFIELD
182 uint64_t reserved_29_63:35;
186 uint64_t reserved_12_13:2;
191 uint64_t reserved_6_6:1;
205 uint64_t reserved_6_6:1;
210 uint64_t reserved_12_13:2;
214 uint64_t reserved_29_63:35;
217 struct cvmx_mpi_cfg_cn61xx cnf71xx;
220 union cvmx_mpi_datx {
222 struct cvmx_mpi_datx_s {
223 #ifdef __BIG_ENDIAN_BITFIELD
224 uint64_t reserved_8_63:56;
228 uint64_t reserved_8_63:56;
231 struct cvmx_mpi_datx_s cn30xx;
232 struct cvmx_mpi_datx_s cn31xx;
233 struct cvmx_mpi_datx_s cn50xx;
234 struct cvmx_mpi_datx_s cn61xx;
235 struct cvmx_mpi_datx_s cn66xx;
236 struct cvmx_mpi_datx_s cnf71xx;
241 struct cvmx_mpi_sts_s {
242 #ifdef __BIG_ENDIAN_BITFIELD
243 uint64_t reserved_13_63:51;
245 uint64_t reserved_1_7:7;
249 uint64_t reserved_1_7:7;
251 uint64_t reserved_13_63:51;
254 struct cvmx_mpi_sts_s cn30xx;
255 struct cvmx_mpi_sts_s cn31xx;
256 struct cvmx_mpi_sts_s cn50xx;
257 struct cvmx_mpi_sts_s cn61xx;
258 struct cvmx_mpi_sts_s cn66xx;
259 struct cvmx_mpi_sts_s cnf71xx;
264 struct cvmx_mpi_tx_s {
265 #ifdef __BIG_ENDIAN_BITFIELD
266 uint64_t reserved_22_63:42;
268 uint64_t reserved_17_19:3;
270 uint64_t reserved_13_15:3;
272 uint64_t reserved_5_7:3;
276 uint64_t reserved_5_7:3;
278 uint64_t reserved_13_15:3;
280 uint64_t reserved_17_19:3;
282 uint64_t reserved_22_63:42;
285 struct cvmx_mpi_tx_cn30xx {
286 #ifdef __BIG_ENDIAN_BITFIELD
287 uint64_t reserved_17_63:47;
289 uint64_t reserved_13_15:3;
291 uint64_t reserved_5_7:3;
295 uint64_t reserved_5_7:3;
297 uint64_t reserved_13_15:3;
299 uint64_t reserved_17_63:47;
302 struct cvmx_mpi_tx_cn30xx cn31xx;
303 struct cvmx_mpi_tx_cn30xx cn50xx;
304 struct cvmx_mpi_tx_cn61xx {
305 #ifdef __BIG_ENDIAN_BITFIELD
306 uint64_t reserved_21_63:43;
308 uint64_t reserved_17_19:3;
310 uint64_t reserved_13_15:3;
312 uint64_t reserved_5_7:3;
316 uint64_t reserved_5_7:3;
318 uint64_t reserved_13_15:3;
320 uint64_t reserved_17_19:3;
322 uint64_t reserved_21_63:43;
325 struct cvmx_mpi_tx_s cn66xx;
326 struct cvmx_mpi_tx_cn61xx cnf71xx;
329 #endif /* __SPI_CAVIUM_H */