drivers/staging/ccree/ssi_buffer_mgr.c

   1 /*
   2  * Copyright (C) 2012-2017 ARM Limited or its affiliates.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  11  * GNU General Public License for more details.
  12  *
  13  * You should have received a copy of the GNU General Public License
  14  * along with this program; if not, see <http://www.gnu.org/licenses/>.
  15  */
  16
  17 #include <linux/crypto.h>
  18 #include <linux/version.h>
  19 #include <crypto/algapi.h>
  20 #include <crypto/internal/aead.h>
  21 #include <crypto/hash.h>
  22 #include <crypto/authenc.h>
  23 #include <crypto/scatterwalk.h>
  24 #include <linux/dmapool.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/crypto.h>
  27 #include <linux/module.h>
  28 #include <linux/platform_device.h>
  29
  30 #include "ssi_buffer_mgr.h"
  31 #include "cc_lli_defs.h"
  32 #include "ssi_cipher.h"
  33 #include "ssi_hash.h"
  34 #include "ssi_aead.h"
  35
  36 #define LLI_MAX_NUM_OF_DATA_ENTRIES 128
  37 #define LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES 4
  38 #define MLLI_TABLE_MIN_ALIGNMENT 4 /*Force the MLLI table to be align to uint32 */
  39 #define MAX_NUM_OF_BUFFERS_IN_MLLI 4
  40 #define MAX_NUM_OF_TOTAL_MLLI_ENTRIES (2*LLI_MAX_NUM_OF_DATA_ENTRIES + \
  41                                         LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES )
  42
  43 #ifdef CC_DEBUG
  44 #define DUMP_SGL(sg) \
  45         while (sg) { \
  46                 SSI_LOG_DEBUG("page=%lu offset=%u length=%u (dma_len=%u) " \
  47                              "dma_addr=%08x\n", (sg)->page_link, (sg)->offset, \
  48                         (sg)->length, sg_dma_len(sg), (sg)->dma_address); \
  49                 (sg) = sg_next(sg); \
  50         }
  51 #define DUMP_MLLI_TABLE(mlli_p, nents) \
  52         do { \
  53                 SSI_LOG_DEBUG("mlli=%pK nents=%u\n", (mlli_p), (nents)); \
  54                 while((nents)--) { \
  55                         SSI_LOG_DEBUG("addr=0x%08X size=0x%08X\n", \
  56                              (mlli_p)[LLI_WORD0_OFFSET], \
  57                              (mlli_p)[LLI_WORD1_OFFSET]); \
  58                         (mlli_p) += LLI_ENTRY_WORD_SIZE; \
  59                 } \
  60         } while (0)
  61 #define GET_DMA_BUFFER_TYPE(buff_type) ( \
  62         ((buff_type) == SSI_DMA_BUF_NULL) ? "BUF_NULL" : \
  63         ((buff_type) == SSI_DMA_BUF_DLLI) ? "BUF_DLLI" : \
  64         ((buff_type) == SSI_DMA_BUF_MLLI) ? "BUF_MLLI" : "BUF_INVALID")
  65 #else
  66 #define DX_BUFFER_MGR_DUMP_SGL(sg)
  67 #define DX_BUFFER_MGR_DUMP_MLLI_TABLE(mlli_p, nents)
  68 #define GET_DMA_BUFFER_TYPE(buff_type)
  69 #endif
  70
  71
  72 enum dma_buffer_type {
  73         DMA_NULL_TYPE = -1,
  74         DMA_SGL_TYPE = 1,
  75         DMA_BUFF_TYPE = 2,
  76 };
  77
  78 struct buff_mgr_handle {
  79         struct dma_pool *mlli_buffs_pool;
  80 };
  81
  82 union buffer_array_entry {
  83         struct scatterlist *sgl;
  84         dma_addr_t buffer_dma;
  85 };
  86
  87 struct buffer_array {
  88         unsigned int num_of_buffers;
  89         union buffer_array_entry entry[MAX_NUM_OF_BUFFERS_IN_MLLI];
  90         unsigned int offset[MAX_NUM_OF_BUFFERS_IN_MLLI];
  91         int nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
  92         int total_data_len[MAX_NUM_OF_BUFFERS_IN_MLLI];
  93         enum dma_buffer_type type[MAX_NUM_OF_BUFFERS_IN_MLLI];
  94         bool is_last[MAX_NUM_OF_BUFFERS_IN_MLLI];
  95         uint32_t * mlli_nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
  96 };
  97
  98 #ifdef CC_DMA_48BIT_SIM
  99 dma_addr_t ssi_buff_mgr_update_dma_addr(dma_addr_t orig_addr, uint32_t data_len)
 100 {
 101         dma_addr_t tmp_dma_addr;
 102 #ifdef CC_DMA_48BIT_SIM_FULL
 103         /* With this code all addresses will be switched to 48 bits. */
 104         /* The if condition protects from double expention */
 105         if((((orig_addr >> 16) & 0xFFFF) != 0xFFFF) &&
 106                 (data_len <= CC_MAX_MLLI_ENTRY_SIZE)) {
 107 #else
 108         if((!(((orig_addr >> 16) & 0xFF) % 2)) &&
 109                 (data_len <= CC_MAX_MLLI_ENTRY_SIZE)) {
 110 #endif
 111                 tmp_dma_addr = ((orig_addr<<16) | 0xFFFF0000 |
 112                                 (orig_addr & UINT16_MAX));
 113                         SSI_LOG_DEBUG("MAP DMA: orig address=0x%llX "
 114                                     "dma_address=0x%llX\n",
 115                                      orig_addr, tmp_dma_addr);
 116                         return tmp_dma_addr;
 117         }
 118         return orig_addr;
 119 }
 120
 121 dma_addr_t ssi_buff_mgr_restore_dma_addr(dma_addr_t orig_addr)
 122 {
 123         dma_addr_t tmp_dma_addr;
 124 #ifdef CC_DMA_48BIT_SIM_FULL
 125         /* With this code all addresses will be restored from 48 bits. */
 126         /* The if condition protects from double restoring */
 127         if((orig_addr >> 32) & 0xFFFF ) {
 128 #else
 129         if(((orig_addr >> 32) & 0xFFFF) &&
 130                 !(((orig_addr >> 32) & 0xFF) % 2) ) {
 131 #endif
 132                 /*return high 16 bits*/
 133                 tmp_dma_addr = ((orig_addr >> 16));
 134                 /*clean the 0xFFFF in the lower bits (set in the add expansion)*/
 135                 tmp_dma_addr &= 0xFFFF0000;
 136                 /* Set the original 16 bits */
 137                 tmp_dma_addr |= (orig_addr & UINT16_MAX);
 138                 SSI_LOG_DEBUG("Release DMA: orig address=0x%llX "
 139                              "dma_address=0x%llX\n",
 140                              orig_addr, tmp_dma_addr);
 141                         return tmp_dma_addr;
 142         }
 143         return orig_addr;
 144 }
 145 #endif
 146 /**
 147  * ssi_buffer_mgr_get_sgl_nents() - Get scatterlist number of entries.
 148  *
 149  * @sg_list: SG list
 150  * @nbytes: [IN] Total SGL data bytes.
 151  * @lbytes: [OUT] Returns the amount of bytes at the last entry
 152  */
 153 static unsigned int ssi_buffer_mgr_get_sgl_nents(
 154         struct scatterlist *sg_list, unsigned int nbytes, uint32_t *lbytes, bool *is_chained)
 155 {
 156         unsigned int nents = 0;
 157         while (nbytes != 0) {
 158                 if (sg_is_chain(sg_list)) {
 159                         SSI_LOG_ERR("Unexpected chanined entry "
 160                                    "in sg (entry =0x%X) \n", nents);
 161                         BUG();
 162                 }
 163                 if (sg_list->length != 0) {
 164                         nents++;
 165                         /* get the number of bytes in the last entry */
 166                         *lbytes = nbytes;
 167                         nbytes -= ( sg_list->length > nbytes ) ? nbytes : sg_list->length;
 168                         sg_list = sg_next(sg_list);
 169                 } else {
 170                         sg_list = (struct scatterlist *)sg_page(sg_list);
 171                         if (is_chained != NULL) {
 172                                 *is_chained = true;
 173                         }
 174                 }
 175         }
 176         SSI_LOG_DEBUG("nents %d last bytes %d\n",nents, *lbytes);
 177         return nents;
 178 }
 179
 180 /**
 181  * ssi_buffer_mgr_zero_sgl() - Zero scatter scatter list data.
 182  *
 183  * @sgl:
 184  */
 185 void ssi_buffer_mgr_zero_sgl(struct scatterlist *sgl, uint32_t data_len)
 186 {
 187         struct scatterlist *current_sg = sgl;
 188         int sg_index = 0;
 189
 190         while (sg_index <= data_len) {
 191                 if (current_sg == NULL) {
 192                         /* reached the end of the sgl --> just return back */
 193                         return;
 194                 }
 195                 memset(sg_virt(current_sg), 0, current_sg->length);
 196                 sg_index += current_sg->length;
 197                 current_sg = sg_next(current_sg);
 198         }
 199 }
 200
 201 /**
 202  * ssi_buffer_mgr_copy_scatterlist_portion() - Copy scatter list data,
 203  * from to_skip to end, to dest and vice versa
 204  *
 205  * @dest:
 206  * @sg:
 207  * @to_skip:
 208  * @end:
 209  * @direct:
 210  */
 211 void ssi_buffer_mgr_copy_scatterlist_portion(
 212         u8 *dest, struct scatterlist *sg,
 213         uint32_t to_skip,  uint32_t end,
 214         enum ssi_sg_cpy_direct direct)
 215 {
 216         uint32_t nents, lbytes;
 217
 218         nents = ssi_buffer_mgr_get_sgl_nents(sg, end, &lbytes, NULL);
 219         sg_copy_buffer(sg, nents, (void *)dest, (end - to_skip), 0, (direct == SSI_SG_TO_BUF));
 220 }
 221
 222 static inline int ssi_buffer_mgr_render_buff_to_mlli(
 223         dma_addr_t buff_dma, uint32_t buff_size, uint32_t *curr_nents,
 224         uint32_t **mlli_entry_pp)
 225 {
 226         uint32_t *mlli_entry_p = *mlli_entry_pp;
 227         uint32_t new_nents;;
 228
 229         /* Verify there is no memory overflow*/
 230         new_nents = (*curr_nents + buff_size/CC_MAX_MLLI_ENTRY_SIZE + 1);
 231         if (new_nents > MAX_NUM_OF_TOTAL_MLLI_ENTRIES ) {
 232                 return -ENOMEM;
 233         }
 234
 235         /*handle buffer longer than 64 kbytes */
 236         while (buff_size > CC_MAX_MLLI_ENTRY_SIZE ) {
 237                 SSI_UPDATE_DMA_ADDR_TO_48BIT(buff_dma, CC_MAX_MLLI_ENTRY_SIZE);
 238                 LLI_SET_ADDR(mlli_entry_p,buff_dma);
 239                 LLI_SET_SIZE(mlli_entry_p, CC_MAX_MLLI_ENTRY_SIZE);
 240                 SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n",*curr_nents,
 241                            mlli_entry_p[LLI_WORD0_OFFSET],
 242                            mlli_entry_p[LLI_WORD1_OFFSET]);
 243                 SSI_RESTORE_DMA_ADDR_TO_48BIT(buff_dma);
 244                 buff_dma += CC_MAX_MLLI_ENTRY_SIZE;
 245                 buff_size -= CC_MAX_MLLI_ENTRY_SIZE;
 246                 mlli_entry_p = mlli_entry_p + 2;
 247                 (*curr_nents)++;
 248         }
 249         /*Last entry */
 250         SSI_UPDATE_DMA_ADDR_TO_48BIT(buff_dma, buff_size);
 251         LLI_SET_ADDR(mlli_entry_p,buff_dma);
 252         LLI_SET_SIZE(mlli_entry_p, buff_size);
 253         SSI_LOG_DEBUG("entry[%d]: single_buff=0x%08X size=%08X\n",*curr_nents,
 254                    mlli_entry_p[LLI_WORD0_OFFSET],
 255                    mlli_entry_p[LLI_WORD1_OFFSET]);
 256         mlli_entry_p = mlli_entry_p + 2;
 257         *mlli_entry_pp = mlli_entry_p;
 258         (*curr_nents)++;
 259         return 0;
 260 }
 261
 262
 263 static inline int ssi_buffer_mgr_render_scatterlist_to_mlli(
 264         struct scatterlist *sgl, uint32_t sgl_data_len, uint32_t sglOffset, uint32_t *curr_nents,
 265         uint32_t **mlli_entry_pp)
 266 {
 267         struct scatterlist *curr_sgl = sgl;
 268         uint32_t *mlli_entry_p = *mlli_entry_pp;
 269         int32_t rc = 0;
 270
 271         for ( ; (curr_sgl != NULL) && (sgl_data_len != 0);
 272               curr_sgl = sg_next(curr_sgl)) {
 273                 uint32_t entry_data_len =
 274                         (sgl_data_len > sg_dma_len(curr_sgl) - sglOffset) ?
 275                                 sg_dma_len(curr_sgl) - sglOffset : sgl_data_len ;
 276                 sgl_data_len -= entry_data_len;
 277                 rc = ssi_buffer_mgr_render_buff_to_mlli(
 278                         sg_dma_address(curr_sgl) + sglOffset, entry_data_len, curr_nents,
 279                         &mlli_entry_p);
 280                 if(rc != 0) {
 281                         return rc;
 282                 }
 283                 sglOffset=0;
 284         }
 285         *mlli_entry_pp = mlli_entry_p;
 286         return 0;
 287 }
 288
 289 static int ssi_buffer_mgr_generate_mlli(
 290         struct device *dev,
 291         struct buffer_array *sg_data,
 292         struct mlli_params *mlli_params)
 293 {
 294         uint32_t *mlli_p;
 295         uint32_t total_nents = 0,prev_total_nents = 0;
 296         int rc = 0, i;
 297
 298         SSI_LOG_DEBUG("NUM of SG's = %d\n", sg_data->num_of_buffers);
 299
 300         /* Allocate memory from the pointed pool */
 301         mlli_params->mlli_virt_addr = dma_pool_alloc(
 302                         mlli_params->curr_pool, GFP_KERNEL,
 303                         &(mlli_params->mlli_dma_addr));
 304         if (unlikely(mlli_params->mlli_virt_addr == NULL)) {
 305                 SSI_LOG_ERR("dma_pool_alloc() failed\n");
 306                 rc =-ENOMEM;
 307                 goto build_mlli_exit;
 308         }
 309         SSI_UPDATE_DMA_ADDR_TO_48BIT(mlli_params->mlli_dma_addr,
 310                                                 (MAX_NUM_OF_TOTAL_MLLI_ENTRIES*
 311                                                 LLI_ENTRY_BYTE_SIZE));
 312         /* Point to start of MLLI */
 313         mlli_p = (uint32_t *)mlli_params->mlli_virt_addr;
 314         /* go over all SG's and link it to one MLLI table */
 315         for (i = 0; i < sg_data->num_of_buffers; i++) {
 316                 if (sg_data->type[i] == DMA_SGL_TYPE)
 317                         rc = ssi_buffer_mgr_render_scatterlist_to_mlli(
 318                                 sg_data->entry[i].sgl,
 319                                 sg_data->total_data_len[i], sg_data->offset[i], &total_nents,
 320                                 &mlli_p);
 321                 else /*DMA_BUFF_TYPE*/
 322                         rc = ssi_buffer_mgr_render_buff_to_mlli(
 323                                 sg_data->entry[i].buffer_dma,
 324                                 sg_data->total_data_len[i], &total_nents,
 325                                 &mlli_p);
 326                 if(rc != 0) {
 327                         return rc;
 328                 }
 329
 330                 /* set last bit in the current table */
 331                 if (sg_data->mlli_nents[i] != NULL) {
 332                         /*Calculate the current MLLI table length for the
 333                         length field in the descriptor*/
 334                         *(sg_data->mlli_nents[i]) +=
 335                                 (total_nents - prev_total_nents);
 336                         prev_total_nents = total_nents;
 337                 }
 338         }
 339
 340         /* Set MLLI size for the bypass operation */
 341         mlli_params->mlli_len = (total_nents * LLI_ENTRY_BYTE_SIZE);
 342
 343         SSI_LOG_DEBUG("MLLI params: "
 344                      "virt_addr=%pK dma_addr=0x%llX mlli_len=0x%X\n",
 345                    mlli_params->mlli_virt_addr,
 346                    (unsigned long long)mlli_params->mlli_dma_addr,
 347                    mlli_params->mlli_len);
 348
 349 build_mlli_exit:
 350         return rc;
 351 }
 352
 353 static inline void ssi_buffer_mgr_add_buffer_entry(
 354         struct buffer_array *sgl_data,
 355         dma_addr_t buffer_dma, unsigned int buffer_len,
 356         bool is_last_entry, uint32_t *mlli_nents)
 357 {
 358         unsigned int index = sgl_data->num_of_buffers;
 359
 360         SSI_LOG_DEBUG("index=%u single_buff=0x%llX "
 361                      "buffer_len=0x%08X is_last=%d\n",
 362                      index, (unsigned long long)buffer_dma, buffer_len, is_last_entry);
 363         sgl_data->nents[index] = 1;
 364         sgl_data->entry[index].buffer_dma = buffer_dma;
 365         sgl_data->offset[index] = 0;
 366         sgl_data->total_data_len[index] = buffer_len;
 367         sgl_data->type[index] = DMA_BUFF_TYPE;
 368         sgl_data->is_last[index] = is_last_entry;
 369         sgl_data->mlli_nents[index] = mlli_nents;
 370         if (sgl_data->mlli_nents[index] != NULL)
 371                 *sgl_data->mlli_nents[index] = 0;
 372         sgl_data->num_of_buffers++;
 373 }
 374
 375 static inline void ssi_buffer_mgr_add_scatterlist_entry(
 376         struct buffer_array *sgl_data,
 377         unsigned int nents,
 378         struct scatterlist *sgl,
 379         unsigned int data_len,
 380         unsigned int data_offset,
 381         bool is_last_table,
 382         uint32_t *mlli_nents)
 383 {
 384         unsigned int index = sgl_data->num_of_buffers;
 385
 386         SSI_LOG_DEBUG("index=%u nents=%u sgl=%pK data_len=0x%08X is_last=%d\n",
 387                      index, nents, sgl, data_len, is_last_table);
 388         sgl_data->nents[index] = nents;
 389         sgl_data->entry[index].sgl = sgl;
 390         sgl_data->offset[index] = data_offset;
 391         sgl_data->total_data_len[index] = data_len;
 392         sgl_data->type[index] = DMA_SGL_TYPE;
 393         sgl_data->is_last[index] = is_last_table;
 394         sgl_data->mlli_nents[index] = mlli_nents;
 395         if (sgl_data->mlli_nents[index] != NULL)
 396                 *sgl_data->mlli_nents[index] = 0;
 397         sgl_data->num_of_buffers++;
 398 }
 399
 400 static int
 401 ssi_buffer_mgr_dma_map_sg(struct device *dev, struct scatterlist *sg, uint32_t nents,
 402                          enum dma_data_direction direction)
 403 {
 404         uint32_t i , j;
 405         struct scatterlist *l_sg = sg;
 406         for (i = 0; i < nents; i++) {
 407                 if (l_sg == NULL) {
 408                         break;
 409                 }
 410                 if (unlikely(dma_map_sg(dev, l_sg, 1, direction) != 1)){
 411                         SSI_LOG_ERR("dma_map_page() sg buffer failed\n");
 412                         goto err;
 413                 }
 414                 l_sg = sg_next(l_sg);
 415         }
 416         return nents;
 417
 418 err:
 419         /* Restore mapped parts */
 420         for (j = 0; j < i; j++) {
 421                 if (sg == NULL) {
 422                         break;
 423                 }
 424                 dma_unmap_sg(dev,sg,1,direction);
 425                 sg = sg_next(sg);
 426         }
 427         return 0;
 428 }
 429
 430 static int ssi_buffer_mgr_map_scatterlist(
 431         struct device *dev, struct scatterlist *sg,
 432         unsigned int nbytes, int direction,
 433         uint32_t *nents, uint32_t max_sg_nents,
 434         uint32_t *lbytes, uint32_t *mapped_nents)
 435 {
 436         bool is_chained = false;
 437
 438         if (sg_is_last(sg)) {
 439                 /* One entry only case -set to DLLI */
 440                 if (unlikely(dma_map_sg(dev, sg, 1, direction) != 1)) {
 441                         SSI_LOG_ERR("dma_map_sg() single buffer failed\n");
 442                         return -ENOMEM;
 443                 }
 444                 SSI_LOG_DEBUG("Mapped sg: dma_address=0x%llX "
 445                              "page_link=0x%08lX addr=%pK offset=%u "
 446                              "length=%u\n",
 447                              (unsigned long long)sg_dma_address(sg),
 448                              sg->page_link,
 449                              sg_virt(sg),
 450                              sg->offset, sg->length);
 451                 *lbytes = nbytes;
 452                 *nents = 1;
 453                 *mapped_nents = 1;
 454                 SSI_UPDATE_DMA_ADDR_TO_48BIT(sg_dma_address(sg), sg_dma_len(sg));
 455         } else {  /*sg_is_last*/
 456                 *nents = ssi_buffer_mgr_get_sgl_nents(sg, nbytes, lbytes,
 457                                                      &is_chained);
 458                 if (*nents > max_sg_nents) {
 459                         *nents = 0;
 460                         SSI_LOG_ERR("Too many fragments. current %d max %d\n",
 461                                    *nents, max_sg_nents);
 462                         return -ENOMEM;
 463                 }
 464                 if (!is_chained) {
 465                         /* In case of mmu the number of mapped nents might
 466                         be changed from the original sgl nents */
 467                         *mapped_nents = dma_map_sg(dev, sg, *nents, direction);
 468                         if (unlikely(*mapped_nents == 0)){
 469                                 *nents = 0;
 470                                 SSI_LOG_ERR("dma_map_sg() sg buffer failed\n");
 471                                 return -ENOMEM;
 472                         }
 473                 } else {
 474                         /*In this case the driver maps entry by entry so it
 475                         must have the same nents before and after map */
 476                         *mapped_nents = ssi_buffer_mgr_dma_map_sg(dev,
 477                                                                  sg,
 478                                                                  *nents,
 479                                                                  direction);
 480                         if (unlikely(*mapped_nents != *nents)){
 481                                 *nents = *mapped_nents;
 482                                 SSI_LOG_ERR("dma_map_sg() sg buffer failed\n");
 483                                 return -ENOMEM;
 484                         }
 485                 }
 486         }
 487
 488         return 0;
 489 }
 490
 491 static inline int
 492 ssi_aead_handle_config_buf(struct device *dev,
 493         struct aead_req_ctx *areq_ctx,
 494         uint8_t* config_data,
 495         struct buffer_array *sg_data,
 496         unsigned int assoclen)
 497 {
 498         SSI_LOG_DEBUG(" handle additional data config set to   DLLI \n");
 499         /* create sg for the current buffer */
 500         sg_init_one(&areq_ctx->ccm_adata_sg, config_data, AES_BLOCK_SIZE + areq_ctx->ccm_hdr_size);
 501         if (unlikely(dma_map_sg(dev, &areq_ctx->ccm_adata_sg, 1,
 502                                 DMA_TO_DEVICE) != 1)) {
 503                         SSI_LOG_ERR("dma_map_sg() "
 504                            "config buffer failed\n");
 505                         return -ENOMEM;
 506         }
 507         SSI_LOG_DEBUG("Mapped curr_buff: dma_address=0x%llX "
 508                      "page_link=0x%08lX addr=%pK "
 509                      "offset=%u length=%u\n",
 510                      (unsigned long long)sg_dma_address(&areq_ctx->ccm_adata_sg),
 511                      areq_ctx->ccm_adata_sg.page_link,
 512                      sg_virt(&areq_ctx->ccm_adata_sg),
 513                      areq_ctx->ccm_adata_sg.offset,
 514                      areq_ctx->ccm_adata_sg.length);
 515         /* prepare for case of MLLI */
 516         if (assoclen > 0) {
 517                 ssi_buffer_mgr_add_scatterlist_entry(sg_data, 1,
 518                                                     &areq_ctx->ccm_adata_sg,
 519                                                     (AES_BLOCK_SIZE +
 520                                                     areq_ctx->ccm_hdr_size), 0,
 521                                                     false, NULL);
 522         }
 523         return 0;
 524 }
 525
 526
 527 static inline int ssi_ahash_handle_curr_buf(struct device *dev,
 528                                            struct ahash_req_ctx *areq_ctx,
 529                                            uint8_t* curr_buff,
 530                                            uint32_t curr_buff_cnt,
 531                                            struct buffer_array *sg_data)
 532 {
 533         SSI_LOG_DEBUG(" handle curr buff %x set to   DLLI \n", curr_buff_cnt);
 534         /* create sg for the current buffer */
 535         sg_init_one(areq_ctx->buff_sg,curr_buff, curr_buff_cnt);
 536         if (unlikely(dma_map_sg(dev, areq_ctx->buff_sg, 1,
 537                                 DMA_TO_DEVICE) != 1)) {
 538                         SSI_LOG_ERR("dma_map_sg() "
 539                            "src buffer failed\n");
 540                         return -ENOMEM;
 541         }
 542         SSI_LOG_DEBUG("Mapped curr_buff: dma_address=0x%llX "
 543                      "page_link=0x%08lX addr=%pK "
 544                      "offset=%u length=%u\n",
 545                      (unsigned long long)sg_dma_address(areq_ctx->buff_sg),
 546                      areq_ctx->buff_sg->page_link,
 547                      sg_virt(areq_ctx->buff_sg),
 548                      areq_ctx->buff_sg->offset,
 549                      areq_ctx->buff_sg->length);
 550         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
 551         areq_ctx->curr_sg = areq_ctx->buff_sg;
 552         areq_ctx->in_nents = 0;
 553         /* prepare for case of MLLI */
 554         ssi_buffer_mgr_add_scatterlist_entry(sg_data, 1, areq_ctx->buff_sg,
 555                                 curr_buff_cnt, 0, false, NULL);
 556         return 0;
 557 }
 558
 559 void ssi_buffer_mgr_unmap_blkcipher_request(
 560         struct device *dev,
 561         void *ctx,
 562         unsigned int ivsize,
 563         struct scatterlist *src,
 564         struct scatterlist *dst)
 565 {
 566         struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx;
 567
 568         if (likely(req_ctx->gen_ctx.iv_dma_addr != 0)) {
 569                 SSI_LOG_DEBUG("Unmapped iv: iv_dma_addr=0x%llX iv_size=%u\n",
 570                         (unsigned long long)req_ctx->gen_ctx.iv_dma_addr,
 571                         ivsize);
 572                 SSI_RESTORE_DMA_ADDR_TO_48BIT(req_ctx->gen_ctx.iv_dma_addr);
 573                 dma_unmap_single(dev, req_ctx->gen_ctx.iv_dma_addr,
 574                                  ivsize,
 575                                  req_ctx->is_giv ? DMA_BIDIRECTIONAL :
 576                                  DMA_TO_DEVICE);
 577         }
 578         /* Release pool */
 579         if (req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI) {
 580                 SSI_RESTORE_DMA_ADDR_TO_48BIT(req_ctx->mlli_params.mlli_dma_addr);
 581                 dma_pool_free(req_ctx->mlli_params.curr_pool,
 582                               req_ctx->mlli_params.mlli_virt_addr,
 583                               req_ctx->mlli_params.mlli_dma_addr);
 584         }
 585
 586         SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(src));
 587         dma_unmap_sg(dev, src, req_ctx->in_nents,
 588                 DMA_BIDIRECTIONAL);
 589         SSI_LOG_DEBUG("Unmapped req->src=%pK\n",
 590                      sg_virt(src));
 591
 592         if (src != dst) {
 593                 SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(dst));
 594                 dma_unmap_sg(dev, dst, req_ctx->out_nents,
 595                         DMA_BIDIRECTIONAL);
 596                 SSI_LOG_DEBUG("Unmapped req->dst=%pK\n",
 597                         sg_virt(dst));
 598         }
 599 }
 600
 601 int ssi_buffer_mgr_map_blkcipher_request(
 602         struct ssi_drvdata *drvdata,
 603         void *ctx,
 604         unsigned int ivsize,
 605         unsigned int nbytes,
 606         void *info,
 607         struct scatterlist *src,
 608         struct scatterlist *dst)
 609 {
 610         struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx;
 611         struct mlli_params *mlli_params = &req_ctx->mlli_params;
 612         struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
 613         struct device *dev = &drvdata->plat_dev->dev;
 614         struct buffer_array sg_data;
 615         uint32_t dummy = 0;
 616         int rc = 0;
 617         uint32_t mapped_nents = 0;
 618
 619         req_ctx->dma_buf_type = SSI_DMA_BUF_DLLI;
 620         mlli_params->curr_pool = NULL;
 621         sg_data.num_of_buffers = 0;
 622
 623         /* Map IV buffer */
 624         if (likely(ivsize != 0) ) {
 625                 dump_byte_array("iv", (uint8_t *)info, ivsize);
 626                 req_ctx->gen_ctx.iv_dma_addr =
 627                         dma_map_single(dev, (void *)info,
 628                                        ivsize,
 629                                        req_ctx->is_giv ? DMA_BIDIRECTIONAL:
 630                                        DMA_TO_DEVICE);
 631                 if (unlikely(dma_mapping_error(dev,
 632                                         req_ctx->gen_ctx.iv_dma_addr))) {
 633                         SSI_LOG_ERR("Mapping iv %u B at va=%pK "
 634                                    "for DMA failed\n", ivsize, info);
 635                         return -ENOMEM;
 636                 }
 637                 SSI_UPDATE_DMA_ADDR_TO_48BIT(req_ctx->gen_ctx.iv_dma_addr,
 638                                                                 ivsize);
 639                 SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=0x%llX\n",
 640                         ivsize, info,
 641                         (unsigned long long)req_ctx->gen_ctx.iv_dma_addr);
 642         } else
 643                 req_ctx->gen_ctx.iv_dma_addr = 0;
 644
 645         /* Map the src SGL */
 646         rc = ssi_buffer_mgr_map_scatterlist(dev, src,
 647                 nbytes, DMA_BIDIRECTIONAL, &req_ctx->in_nents,
 648                 LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents);
 649         if (unlikely(rc != 0)) {
 650                 rc = -ENOMEM;
 651                 goto ablkcipher_exit;
 652         }
 653         if (mapped_nents > 1)
 654                 req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI;
 655
 656         if (unlikely(src == dst)) {
 657                 /* Handle inplace operation */
 658                 if (unlikely(req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI)) {
 659                         req_ctx->out_nents = 0;
 660                         ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
 661                                 req_ctx->in_nents, src,
 662                                 nbytes, 0, true, &req_ctx->in_mlli_nents);
 663                 }
 664         } else {
 665                 /* Map the dst sg */
 666                 if (unlikely(ssi_buffer_mgr_map_scatterlist(
 667                         dev,dst, nbytes,
 668                         DMA_BIDIRECTIONAL, &req_ctx->out_nents,
 669                         LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy,
 670                         &mapped_nents))){
 671                         rc = -ENOMEM;
 672                         goto ablkcipher_exit;
 673                 }
 674                 if (mapped_nents > 1)
 675                         req_ctx->dma_buf_type = SSI_DMA_BUF_MLLI;
 676
 677                 if (unlikely((req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI))) {
 678                         ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
 679                                 req_ctx->in_nents, src,
 680                                 nbytes, 0, true,
 681                                 &req_ctx->in_mlli_nents);
 682                         ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
 683                                 req_ctx->out_nents, dst,
 684                                 nbytes, 0, true,
 685                                 &req_ctx->out_mlli_nents);
 686                 }
 687         }
 688
 689         if (unlikely(req_ctx->dma_buf_type == SSI_DMA_BUF_MLLI)) {
 690                 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
 691                 rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
 692                 if (unlikely(rc!= 0))
 693                         goto ablkcipher_exit;
 694
 695         }
 696
 697         SSI_LOG_DEBUG("areq_ctx->dma_buf_type = %s\n",
 698                 GET_DMA_BUFFER_TYPE(req_ctx->dma_buf_type));
 699
 700         return 0;
 701
 702 ablkcipher_exit:
 703         ssi_buffer_mgr_unmap_blkcipher_request(dev, req_ctx, ivsize, src, dst);
 704         return rc;
 705 }
 706
 707 void ssi_buffer_mgr_unmap_aead_request(
 708         struct device *dev, struct aead_request *req)
 709 {
 710         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
 711         unsigned int hw_iv_size = areq_ctx->hw_iv_size;
 712         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
 713         uint32_t dummy;
 714         bool chained;
 715         uint32_t size_to_unmap = 0;
 716
 717         if (areq_ctx->mac_buf_dma_addr != 0) {
 718                 SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->mac_buf_dma_addr);
 719                 dma_unmap_single(dev, areq_ctx->mac_buf_dma_addr,
 720                         MAX_MAC_SIZE, DMA_BIDIRECTIONAL);
 721         }
 722
 723 #if SSI_CC_HAS_AES_GCM
 724         if (areq_ctx->cipher_mode == DRV_CIPHER_GCTR) {
 725                 if (areq_ctx->hkey_dma_addr != 0) {
 726                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->hkey_dma_addr);
 727                         dma_unmap_single(dev, areq_ctx->hkey_dma_addr,
 728                                          AES_BLOCK_SIZE, DMA_BIDIRECTIONAL);
 729                 }
 730
 731                 if (areq_ctx->gcm_block_len_dma_addr != 0) {
 732                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_block_len_dma_addr);
 733                         dma_unmap_single(dev, areq_ctx->gcm_block_len_dma_addr,
 734                                          AES_BLOCK_SIZE, DMA_TO_DEVICE);
 735                 }
 736
 737                 if (areq_ctx->gcm_iv_inc1_dma_addr != 0) {
 738                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_iv_inc1_dma_addr);
 739                         dma_unmap_single(dev, areq_ctx->gcm_iv_inc1_dma_addr,
 740                                 AES_BLOCK_SIZE, DMA_TO_DEVICE);
 741                 }
 742
 743                 if (areq_ctx->gcm_iv_inc2_dma_addr != 0) {
 744                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_iv_inc2_dma_addr);
 745                         dma_unmap_single(dev, areq_ctx->gcm_iv_inc2_dma_addr,
 746                                 AES_BLOCK_SIZE, DMA_TO_DEVICE);
 747                 }
 748         }
 749 #endif
 750
 751         if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
 752                 if (areq_ctx->ccm_iv0_dma_addr != 0) {
 753                         SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->ccm_iv0_dma_addr);
 754                         dma_unmap_single(dev, areq_ctx->ccm_iv0_dma_addr,
 755                                 AES_BLOCK_SIZE, DMA_TO_DEVICE);
 756                 }
 757
 758                 if (&areq_ctx->ccm_adata_sg != NULL)
 759                         dma_unmap_sg(dev, &areq_ctx->ccm_adata_sg,
 760                                 1, DMA_TO_DEVICE);
 761         }
 762         if (areq_ctx->gen_ctx.iv_dma_addr != 0) {
 763                 SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->gen_ctx.iv_dma_addr);
 764                 dma_unmap_single(dev, areq_ctx->gen_ctx.iv_dma_addr,
 765                                  hw_iv_size, DMA_BIDIRECTIONAL);
 766         }
 767
 768         /*In case a pool was set, a table was
 769           allocated and should be released */
 770         if (areq_ctx->mlli_params.curr_pool != NULL) {
 771                 SSI_LOG_DEBUG("free MLLI buffer: dma=0x%08llX virt=%pK\n",
 772                         (unsigned long long)areq_ctx->mlli_params.mlli_dma_addr,
 773                         areq_ctx->mlli_params.mlli_virt_addr);
 774                 SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->mlli_params.mlli_dma_addr);
 775                 dma_pool_free(areq_ctx->mlli_params.curr_pool,
 776                               areq_ctx->mlli_params.mlli_virt_addr,
 777                               areq_ctx->mlli_params.mlli_dma_addr);
 778         }
 779
 780         SSI_LOG_DEBUG("Unmapping src sgl: req->src=%pK areq_ctx->src.nents=%u areq_ctx->assoc.nents=%u assoclen:%u cryptlen=%u\n", sg_virt(req->src),areq_ctx->src.nents,areq_ctx->assoc.nents,req->assoclen,req->cryptlen);
 781         SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(req->src));
 782         size_to_unmap = req->assoclen+req->cryptlen;
 783         if(areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT){
 784                 size_to_unmap += areq_ctx->req_authsize;
 785         }
 786         if (areq_ctx->is_gcm4543)
 787                 size_to_unmap += crypto_aead_ivsize(tfm);
 788
 789         dma_unmap_sg(dev, req->src, ssi_buffer_mgr_get_sgl_nents(req->src,size_to_unmap,&dummy,&chained) , DMA_BIDIRECTIONAL);
 790         if (unlikely(req->src != req->dst)) {
 791                 SSI_LOG_DEBUG("Unmapping dst sgl: req->dst=%pK\n",
 792                         sg_virt(req->dst));
 793                 SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(req->dst));
 794                 dma_unmap_sg(dev, req->dst, ssi_buffer_mgr_get_sgl_nents(req->dst,size_to_unmap,&dummy,&chained),
 795                         DMA_BIDIRECTIONAL);
 796         }
 797 #if DX_HAS_ACP
 798         if ((areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) &&
 799             likely(req->src == req->dst))
 800         {
 801                 uint32_t size_to_skip = req->assoclen;
 802                 if (areq_ctx->is_gcm4543) {
 803                         size_to_skip += crypto_aead_ivsize(tfm);
 804                 }
 805                 /* copy mac to a temporary location to deal with possible
 806                   data memory overriding that caused by cache coherence problem. */
 807                 ssi_buffer_mgr_copy_scatterlist_portion(
 808                         areq_ctx->backup_mac, req->src,
 809                         size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
 810                         size_to_skip+ req->cryptlen, SSI_SG_FROM_BUF);
 811         }
 812 #endif
 813 }
 814
 815 static inline int ssi_buffer_mgr_get_aead_icv_nents(
 816         struct scatterlist *sgl,
 817         unsigned int sgl_nents,
 818         unsigned int authsize,
 819         uint32_t last_entry_data_size,
 820         bool *is_icv_fragmented)
 821 {
 822         unsigned int icv_max_size = 0;
 823         unsigned int icv_required_size = authsize > last_entry_data_size ? (authsize - last_entry_data_size) : authsize;
 824         unsigned int nents;
 825         unsigned int i;
 826
 827         if (sgl_nents < MAX_ICV_NENTS_SUPPORTED) {
 828                 *is_icv_fragmented = false;
 829                 return 0;
 830         }
 831
 832         for( i = 0 ; i < (sgl_nents - MAX_ICV_NENTS_SUPPORTED) ; i++) {
 833                 if (sgl == NULL) {
 834                         break;
 835                 }
 836                 sgl = sg_next(sgl);
 837         }
 838
 839         if (sgl != NULL) {
 840                 icv_max_size = sgl->length;
 841         }
 842
 843         if (last_entry_data_size > authsize) {
 844                 nents = 0; /* ICV attached to data in last entry (not fragmented!) */
 845                 *is_icv_fragmented = false;
 846         } else if (last_entry_data_size == authsize) {
 847                 nents = 1; /* ICV placed in whole last entry (not fragmented!) */
 848                 *is_icv_fragmented = false;
 849         } else if (icv_max_size > icv_required_size) {
 850                 nents = 1;
 851                 *is_icv_fragmented = true;
 852         } else if (icv_max_size == icv_required_size) {
 853                 nents = 2;
 854                 *is_icv_fragmented = true;
 855         } else {
 856                 SSI_LOG_ERR("Unsupported num. of ICV fragments (> %d)\n",
 857                         MAX_ICV_NENTS_SUPPORTED);
 858                 nents = -1; /*unsupported*/
 859         }
 860         SSI_LOG_DEBUG("is_frag=%s icv_nents=%u\n",
 861                 (*is_icv_fragmented ? "true" : "false"), nents);
 862
 863         return nents;
 864 }
 865
 866 static inline int ssi_buffer_mgr_aead_chain_iv(
 867         struct ssi_drvdata *drvdata,
 868         struct aead_request *req,
 869         struct buffer_array *sg_data,
 870         bool is_last, bool do_chain)
 871 {
 872         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
 873         unsigned int hw_iv_size = areq_ctx->hw_iv_size;
 874         struct device *dev = &drvdata->plat_dev->dev;
 875         int rc = 0;
 876
 877         if (unlikely(req->iv == NULL)) {
 878                 areq_ctx->gen_ctx.iv_dma_addr = 0;
 879                 goto chain_iv_exit;
 880         }
 881
 882         areq_ctx->gen_ctx.iv_dma_addr = dma_map_single(dev, req->iv,
 883                 hw_iv_size, DMA_BIDIRECTIONAL);
 884         if (unlikely(dma_mapping_error(dev, areq_ctx->gen_ctx.iv_dma_addr))) {
 885                 SSI_LOG_ERR("Mapping iv %u B at va=%pK for DMA failed\n",
 886                         hw_iv_size, req->iv);
 887                 rc = -ENOMEM;
 888                 goto chain_iv_exit;
 889         }
 890         SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->gen_ctx.iv_dma_addr, hw_iv_size);
 891
 892         SSI_LOG_DEBUG("Mapped iv %u B at va=%pK to dma=0x%llX\n",
 893                 hw_iv_size, req->iv,
 894                 (unsigned long long)areq_ctx->gen_ctx.iv_dma_addr);
 895         if (do_chain == true && areq_ctx->plaintext_authenticate_only == true){  // TODO: what about CTR?? ask Ron
 896                 struct crypto_aead *tfm = crypto_aead_reqtfm(req);
 897                 unsigned int iv_size_to_authenc = crypto_aead_ivsize(tfm);
 898                 unsigned int iv_ofs = GCM_BLOCK_RFC4_IV_OFFSET;
 899                 /* Chain to given list */
 900                 ssi_buffer_mgr_add_buffer_entry(
 901                         sg_data, areq_ctx->gen_ctx.iv_dma_addr + iv_ofs,
 902                         iv_size_to_authenc, is_last,
 903                         &areq_ctx->assoc.mlli_nents);
 904                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
 905         }
 906
 907 chain_iv_exit:
 908         return rc;
 909 }
 910
 911 static inline int ssi_buffer_mgr_aead_chain_assoc(
 912         struct ssi_drvdata *drvdata,
 913         struct aead_request *req,
 914         struct buffer_array *sg_data,
 915         bool is_last, bool do_chain)
 916 {
 917         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
 918         int rc = 0;
 919         uint32_t mapped_nents = 0;
 920         struct scatterlist *current_sg = req->src;
 921         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
 922         unsigned int sg_index = 0;
 923         uint32_t size_of_assoc = req->assoclen;
 924
 925         if (areq_ctx->is_gcm4543) {
 926                 size_of_assoc += crypto_aead_ivsize(tfm);
 927         }
 928
 929         if (sg_data == NULL) {
 930                 rc = -EINVAL;
 931                 goto chain_assoc_exit;
 932         }
 933
 934         if (unlikely(req->assoclen == 0)) {
 935                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_NULL;
 936                 areq_ctx->assoc.nents = 0;
 937                 areq_ctx->assoc.mlli_nents = 0;
 938                 SSI_LOG_DEBUG("Chain assoc of length 0: buff_type=%s nents=%u\n",
 939                         GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type),
 940                         areq_ctx->assoc.nents);
 941                 goto chain_assoc_exit;
 942         }
 943
 944         //iterate over the sgl to see how many entries are for associated data
 945         //it is assumed that if we reach here , the sgl is already mapped
 946         sg_index = current_sg->length;
 947         if (sg_index > size_of_assoc) { //the first entry in the scatter list contains all the associated data
 948                 mapped_nents++;
 949         }
 950         else{
 951                 while (sg_index <= size_of_assoc) {
 952                         current_sg = sg_next(current_sg);
 953                         //if have reached the end of the sgl, then this is unexpected
 954                         if (current_sg == NULL) {
 955                                 SSI_LOG_ERR("reached end of sg list. unexpected \n");
 956                                 BUG();
 957                         }
 958                         sg_index += current_sg->length;
 959                         mapped_nents++;
 960                 }
 961         }
 962         if (unlikely(mapped_nents > LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) {
 963                 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
 964                             mapped_nents, LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES);
 965                 return -ENOMEM;
 966         }
 967         areq_ctx->assoc.nents = mapped_nents;
 968
 969         /* in CCM case we have additional entry for
 970         *  ccm header configurations */
 971         if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
 972                 if (unlikely((mapped_nents + 1) >
 973                         LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES)) {
 974
 975                         SSI_LOG_ERR("CCM case.Too many fragments. "
 976                                 "Current %d max %d\n",
 977                                 (areq_ctx->assoc.nents + 1),
 978                                 LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES);
 979                         rc = -ENOMEM;
 980                         goto chain_assoc_exit;
 981                 }
 982         }
 983
 984         if (likely(mapped_nents == 1) &&
 985             (areq_ctx->ccm_hdr_size == ccm_header_size_null))
 986                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_DLLI;
 987         else
 988                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
 989
 990         if (unlikely((do_chain == true) ||
 991                 (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI))) {
 992
 993                 SSI_LOG_DEBUG("Chain assoc: buff_type=%s nents=%u\n",
 994                         GET_DMA_BUFFER_TYPE(areq_ctx->assoc_buff_type),
 995                         areq_ctx->assoc.nents);
 996                 ssi_buffer_mgr_add_scatterlist_entry(
 997                         sg_data, areq_ctx->assoc.nents,
 998                         req->src, req->assoclen, 0, is_last,
 999                         &areq_ctx->assoc.mlli_nents);
1000                 areq_ctx->assoc_buff_type = SSI_DMA_BUF_MLLI;
1001         }
1002
1003 chain_assoc_exit:
1004         return rc;
1005 }
1006
1007 static inline void ssi_buffer_mgr_prepare_aead_data_dlli(
1008         struct aead_request *req,
1009         uint32_t *src_last_bytes, uint32_t *dst_last_bytes)
1010 {
1011         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1012         enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
1013         unsigned int authsize = areq_ctx->req_authsize;
1014
1015         areq_ctx->is_icv_fragmented = false;
1016         if (likely(req->src == req->dst)) {
1017                 /*INPLACE*/
1018                 areq_ctx->icv_dma_addr = sg_dma_address(
1019                         areq_ctx->srcSgl)+
1020                         (*src_last_bytes - authsize);
1021                 areq_ctx->icv_virt_addr = sg_virt(
1022                         areq_ctx->srcSgl) +
1023                         (*src_last_bytes - authsize);
1024         } else if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
1025                 /*NON-INPLACE and DECRYPT*/
1026                 areq_ctx->icv_dma_addr = sg_dma_address(
1027                         areq_ctx->srcSgl) +
1028                         (*src_last_bytes - authsize);
1029                 areq_ctx->icv_virt_addr = sg_virt(
1030                         areq_ctx->srcSgl) +
1031                         (*src_last_bytes - authsize);
1032         } else {
1033                 /*NON-INPLACE and ENCRYPT*/
1034                 areq_ctx->icv_dma_addr = sg_dma_address(
1035                         areq_ctx->dstSgl) +
1036                         (*dst_last_bytes - authsize);
1037                 areq_ctx->icv_virt_addr = sg_virt(
1038                         areq_ctx->dstSgl)+
1039                         (*dst_last_bytes - authsize);
1040         }
1041 }
1042
1043 static inline int ssi_buffer_mgr_prepare_aead_data_mlli(
1044         struct ssi_drvdata *drvdata,
1045         struct aead_request *req,
1046         struct buffer_array *sg_data,
1047         uint32_t *src_last_bytes, uint32_t *dst_last_bytes,
1048         bool is_last_table)
1049 {
1050         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1051         enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
1052         unsigned int authsize = areq_ctx->req_authsize;
1053         int rc = 0, icv_nents;
1054         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
1055
1056         if (likely(req->src == req->dst)) {
1057                 /*INPLACE*/
1058                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1059                         areq_ctx->src.nents, areq_ctx->srcSgl,
1060                         areq_ctx->cryptlen,areq_ctx->srcOffset, is_last_table,
1061                         &areq_ctx->src.mlli_nents);
1062
1063                 icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->srcSgl,
1064                         areq_ctx->src.nents, authsize, *src_last_bytes,
1065                         &areq_ctx->is_icv_fragmented);
1066                 if (unlikely(icv_nents < 0)) {
1067                         rc = -ENOTSUPP;
1068                         goto prepare_data_mlli_exit;
1069                 }
1070
1071                 if (unlikely(areq_ctx->is_icv_fragmented == true)) {
1072                         /* Backup happens only when ICV is fragmented, ICV
1073                            verification is made by CPU compare in order to simplify
1074                            MAC verification upon request completion */
1075                         if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
1076 #if !DX_HAS_ACP
1077                                 /* In ACP platform we already copying ICV
1078                                    for any INPLACE-DECRYPT operation, hence
1079                                    we must neglect this code. */
1080                                 uint32_t size_to_skip = req->assoclen;
1081                                 if (areq_ctx->is_gcm4543) {
1082                                         size_to_skip += crypto_aead_ivsize(tfm);
1083                                 }
1084                                 ssi_buffer_mgr_copy_scatterlist_portion(
1085                                         areq_ctx->backup_mac, req->src,
1086                                         size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
1087                                         size_to_skip+ req->cryptlen, SSI_SG_TO_BUF);
1088 #endif
1089                                 areq_ctx->icv_virt_addr = areq_ctx->backup_mac;
1090                         } else {
1091                                 areq_ctx->icv_virt_addr = areq_ctx->mac_buf;
1092                                 areq_ctx->icv_dma_addr = areq_ctx->mac_buf_dma_addr;
1093                         }
1094                 } else { /* Contig. ICV */
1095                         /*Should hanlde if the sg is not contig.*/
1096                         areq_ctx->icv_dma_addr = sg_dma_address(
1097                                 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1098                                 (*src_last_bytes - authsize);
1099                         areq_ctx->icv_virt_addr = sg_virt(
1100                                 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1101                                 (*src_last_bytes - authsize);
1102                 }
1103
1104         } else if (direct == DRV_CRYPTO_DIRECTION_DECRYPT) {
1105                 /*NON-INPLACE and DECRYPT*/
1106                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1107                         areq_ctx->src.nents, areq_ctx->srcSgl,
1108                         areq_ctx->cryptlen, areq_ctx->srcOffset,is_last_table,
1109                         &areq_ctx->src.mlli_nents);
1110                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1111                         areq_ctx->dst.nents, areq_ctx->dstSgl,
1112                         areq_ctx->cryptlen,areq_ctx->dstOffset, is_last_table,
1113                         &areq_ctx->dst.mlli_nents);
1114
1115                 icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->srcSgl,
1116                         areq_ctx->src.nents, authsize, *src_last_bytes,
1117                         &areq_ctx->is_icv_fragmented);
1118                 if (unlikely(icv_nents < 0)) {
1119                         rc = -ENOTSUPP;
1120                         goto prepare_data_mlli_exit;
1121                 }
1122
1123                 if (unlikely(areq_ctx->is_icv_fragmented == true)) {
1124                         /* Backup happens only when ICV is fragmented, ICV
1125                            verification is made by CPU compare in order to simplify
1126                            MAC verification upon request completion */
1127                           uint32_t size_to_skip = req->assoclen;
1128                           if (areq_ctx->is_gcm4543) {
1129                                   size_to_skip += crypto_aead_ivsize(tfm);
1130                           }
1131                           ssi_buffer_mgr_copy_scatterlist_portion(
1132                                   areq_ctx->backup_mac, req->src,
1133                                   size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
1134                                   size_to_skip+ req->cryptlen, SSI_SG_TO_BUF);
1135                         areq_ctx->icv_virt_addr = areq_ctx->backup_mac;
1136                 } else { /* Contig. ICV */
1137                         /*Should hanlde if the sg is not contig.*/
1138                         areq_ctx->icv_dma_addr = sg_dma_address(
1139                                 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1140                                 (*src_last_bytes - authsize);
1141                         areq_ctx->icv_virt_addr = sg_virt(
1142                                 &areq_ctx->srcSgl[areq_ctx->src.nents - 1]) +
1143                                 (*src_last_bytes - authsize);
1144                 }
1145
1146         } else {
1147                 /*NON-INPLACE and ENCRYPT*/
1148                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1149                         areq_ctx->dst.nents, areq_ctx->dstSgl,
1150                         areq_ctx->cryptlen,areq_ctx->dstOffset, is_last_table,
1151                         &areq_ctx->dst.mlli_nents);
1152                 ssi_buffer_mgr_add_scatterlist_entry(sg_data,
1153                         areq_ctx->src.nents, areq_ctx->srcSgl,
1154                         areq_ctx->cryptlen, areq_ctx->srcOffset,is_last_table,
1155                         &areq_ctx->src.mlli_nents);
1156
1157                 icv_nents = ssi_buffer_mgr_get_aead_icv_nents(areq_ctx->dstSgl,
1158                         areq_ctx->dst.nents, authsize, *dst_last_bytes,
1159                         &areq_ctx->is_icv_fragmented);
1160                 if (unlikely(icv_nents < 0)) {
1161                         rc = -ENOTSUPP;
1162                         goto prepare_data_mlli_exit;
1163                 }
1164
1165                 if (likely(areq_ctx->is_icv_fragmented == false)) {
1166                         /* Contig. ICV */
1167                         areq_ctx->icv_dma_addr = sg_dma_address(
1168                                 &areq_ctx->dstSgl[areq_ctx->dst.nents - 1]) +
1169                                 (*dst_last_bytes - authsize);
1170                         areq_ctx->icv_virt_addr = sg_virt(
1171                                 &areq_ctx->dstSgl[areq_ctx->dst.nents - 1]) +
1172                                 (*dst_last_bytes - authsize);
1173                 } else {
1174                         areq_ctx->icv_dma_addr = areq_ctx->mac_buf_dma_addr;
1175                         areq_ctx->icv_virt_addr = areq_ctx->mac_buf;
1176                 }
1177         }
1178
1179 prepare_data_mlli_exit:
1180         return rc;
1181 }
1182
1183 static inline int ssi_buffer_mgr_aead_chain_data(
1184         struct ssi_drvdata *drvdata,
1185         struct aead_request *req,
1186         struct buffer_array *sg_data,
1187         bool is_last_table, bool do_chain)
1188 {
1189         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1190         struct device *dev = &drvdata->plat_dev->dev;
1191         enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
1192         unsigned int authsize = areq_ctx->req_authsize;
1193         int src_last_bytes = 0, dst_last_bytes = 0;
1194         int rc = 0;
1195         uint32_t src_mapped_nents = 0, dst_mapped_nents = 0;
1196         uint32_t offset = 0;
1197         unsigned int size_for_map = req->assoclen +req->cryptlen; /*non-inplace mode*/
1198         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
1199         uint32_t sg_index = 0;
1200         bool chained = false;
1201         bool is_gcm4543 = areq_ctx->is_gcm4543;
1202         uint32_t size_to_skip = req->assoclen;
1203         if (is_gcm4543) {
1204                 size_to_skip += crypto_aead_ivsize(tfm);
1205         }
1206         offset = size_to_skip;
1207
1208         if (sg_data == NULL) {
1209                 rc = -EINVAL;
1210                 goto chain_data_exit;
1211         }
1212         areq_ctx->srcSgl = req->src;
1213         areq_ctx->dstSgl = req->dst;
1214
1215         if (is_gcm4543) {
1216                 size_for_map += crypto_aead_ivsize(tfm);
1217         }
1218
1219         size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize:0;
1220         src_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->src,size_for_map,&src_last_bytes, &chained);
1221         sg_index = areq_ctx->srcSgl->length;
1222         //check where the data starts
1223         while (sg_index <= size_to_skip) {
1224                 offset -= areq_ctx->srcSgl->length;
1225                 areq_ctx->srcSgl = sg_next(areq_ctx->srcSgl);
1226                 //if have reached the end of the sgl, then this is unexpected
1227                 if (areq_ctx->srcSgl == NULL) {
1228                         SSI_LOG_ERR("reached end of sg list. unexpected \n");
1229                         BUG();
1230                 }
1231                 sg_index += areq_ctx->srcSgl->length;
1232                 src_mapped_nents--;
1233         }
1234         if (unlikely(src_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES))
1235         {
1236                 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
1237                                 src_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES);
1238                         return -ENOMEM;
1239         }
1240
1241         areq_ctx->src.nents = src_mapped_nents;
1242
1243         areq_ctx->srcOffset = offset;
1244
1245         if (req->src != req->dst) {
1246                 size_for_map = req->assoclen +req->cryptlen;
1247                 size_for_map += (direct == DRV_CRYPTO_DIRECTION_ENCRYPT) ? authsize : 0;
1248                 if (is_gcm4543) {
1249                         size_for_map += crypto_aead_ivsize(tfm);
1250                 }
1251
1252                 rc = ssi_buffer_mgr_map_scatterlist(dev, req->dst, size_for_map,
1253                          DMA_BIDIRECTIONAL, &(areq_ctx->dst.nents),
1254                          LLI_MAX_NUM_OF_DATA_ENTRIES, &dst_last_bytes,
1255                                                    &dst_mapped_nents);
1256                 if (unlikely(rc != 0)) {
1257                         rc = -ENOMEM;
1258                         goto chain_data_exit;
1259                 }
1260         }
1261
1262         dst_mapped_nents = ssi_buffer_mgr_get_sgl_nents(req->dst,size_for_map,&dst_last_bytes, &chained);
1263         sg_index = areq_ctx->dstSgl->length;
1264         offset = size_to_skip;
1265
1266         //check where the data starts
1267         while (sg_index <= size_to_skip) {
1268
1269                 offset -= areq_ctx->dstSgl->length;
1270                 areq_ctx->dstSgl = sg_next(areq_ctx->dstSgl);
1271                 //if have reached the end of the sgl, then this is unexpected
1272                 if (areq_ctx->dstSgl == NULL) {
1273                         SSI_LOG_ERR("reached end of sg list. unexpected \n");
1274                         BUG();
1275                 }
1276                 sg_index += areq_ctx->dstSgl->length;
1277                 dst_mapped_nents--;
1278         }
1279         if (unlikely(dst_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES))
1280         {
1281                 SSI_LOG_ERR("Too many fragments. current %d max %d\n",
1282                             dst_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES);
1283                 return -ENOMEM;
1284         }
1285         areq_ctx->dst.nents = dst_mapped_nents;
1286         areq_ctx->dstOffset = offset;
1287         if ((src_mapped_nents > 1) ||
1288             (dst_mapped_nents  > 1) ||
1289             (do_chain == true)) {
1290                 areq_ctx->data_buff_type = SSI_DMA_BUF_MLLI;
1291                 rc = ssi_buffer_mgr_prepare_aead_data_mlli(drvdata, req, sg_data,
1292                         &src_last_bytes, &dst_last_bytes, is_last_table);
1293         } else {
1294                 areq_ctx->data_buff_type = SSI_DMA_BUF_DLLI;
1295                 ssi_buffer_mgr_prepare_aead_data_dlli(
1296                                 req, &src_last_bytes, &dst_last_bytes);
1297         }
1298
1299 chain_data_exit:
1300         return rc;
1301 }
1302
1303 static void ssi_buffer_mgr_update_aead_mlli_nents( struct ssi_drvdata *drvdata,
1304                                            struct aead_request *req)
1305 {
1306         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1307         uint32_t curr_mlli_size = 0;
1308
1309         if (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) {
1310                 areq_ctx->assoc.sram_addr = drvdata->mlli_sram_addr;
1311                 curr_mlli_size = areq_ctx->assoc.mlli_nents *
1312                                                 LLI_ENTRY_BYTE_SIZE;
1313         }
1314
1315         if (areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI) {
1316                 /*Inplace case dst nents equal to src nents*/
1317                 if (req->src == req->dst) {
1318                         areq_ctx->dst.mlli_nents = areq_ctx->src.mlli_nents;
1319                         areq_ctx->src.sram_addr = drvdata->mlli_sram_addr +
1320                                                                 curr_mlli_size;
1321                         areq_ctx->dst.sram_addr = areq_ctx->src.sram_addr;
1322                         if (areq_ctx->is_single_pass == false)
1323                                 areq_ctx->assoc.mlli_nents +=
1324                                         areq_ctx->src.mlli_nents;
1325                 } else {
1326                         if (areq_ctx->gen_ctx.op_type ==
1327                                         DRV_CRYPTO_DIRECTION_DECRYPT) {
1328                                 areq_ctx->src.sram_addr =
1329                                                 drvdata->mlli_sram_addr +
1330                                                                 curr_mlli_size;
1331                                 areq_ctx->dst.sram_addr =
1332                                                 areq_ctx->src.sram_addr +
1333                                                 areq_ctx->src.mlli_nents *
1334                                                 LLI_ENTRY_BYTE_SIZE;
1335                                 if (areq_ctx->is_single_pass == false)
1336                                         areq_ctx->assoc.mlli_nents +=
1337                                                 areq_ctx->src.mlli_nents;
1338                         } else {
1339                                 areq_ctx->dst.sram_addr =
1340                                                 drvdata->mlli_sram_addr +
1341                                                                 curr_mlli_size;
1342                                 areq_ctx->src.sram_addr =
1343                                                 areq_ctx->dst.sram_addr +
1344                                                 areq_ctx->dst.mlli_nents *
1345                                                 LLI_ENTRY_BYTE_SIZE;
1346                                 if (areq_ctx->is_single_pass == false)
1347                                         areq_ctx->assoc.mlli_nents +=
1348                                                 areq_ctx->dst.mlli_nents;
1349                         }
1350                 }
1351         }
1352 }
1353
1354 int ssi_buffer_mgr_map_aead_request(
1355         struct ssi_drvdata *drvdata, struct aead_request *req)
1356 {
1357         struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
1358         struct mlli_params *mlli_params = &areq_ctx->mlli_params;
1359         struct device *dev = &drvdata->plat_dev->dev;
1360         struct buffer_array sg_data;
1361         unsigned int authsize = areq_ctx->req_authsize;
1362         struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
1363         int rc = 0;
1364         struct crypto_aead *tfm = crypto_aead_reqtfm(req);
1365         bool is_gcm4543 = areq_ctx->is_gcm4543;
1366
1367         uint32_t mapped_nents = 0;
1368         uint32_t dummy = 0; /*used for the assoc data fragments */
1369         uint32_t size_to_map = 0;
1370
1371         mlli_params->curr_pool = NULL;
1372         sg_data.num_of_buffers = 0;
1373
1374 #if DX_HAS_ACP
1375         if ((areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) &&
1376             likely(req->src == req->dst))
1377         {
1378                 uint32_t size_to_skip = req->assoclen;
1379                 if (is_gcm4543) {
1380                         size_to_skip += crypto_aead_ivsize(tfm);
1381                 }
1382                 /* copy mac to a temporary location to deal with possible
1383                    data memory overriding that caused by cache coherence problem. */
1384                 ssi_buffer_mgr_copy_scatterlist_portion(
1385                         areq_ctx->backup_mac, req->src,
1386                         size_to_skip+ req->cryptlen - areq_ctx->req_authsize,
1387                         size_to_skip+ req->cryptlen, SSI_SG_TO_BUF);
1388         }
1389 #endif
1390
1391         /* cacluate the size for cipher remove ICV in decrypt*/
1392         areq_ctx->cryptlen = (areq_ctx->gen_ctx.op_type ==
1393                                  DRV_CRYPTO_DIRECTION_ENCRYPT) ?
1394                                 req->cryptlen :
1395                                 (req->cryptlen - authsize);
1396
1397         areq_ctx->mac_buf_dma_addr = dma_map_single(dev,
1398                 areq_ctx->mac_buf, MAX_MAC_SIZE, DMA_BIDIRECTIONAL);
1399         if (unlikely(dma_mapping_error(dev, areq_ctx->mac_buf_dma_addr))) {
1400                 SSI_LOG_ERR("Mapping mac_buf %u B at va=%pK for DMA failed\n",
1401                         MAX_MAC_SIZE, areq_ctx->mac_buf);
1402                 rc = -ENOMEM;
1403                 goto aead_map_failure;
1404         }
1405         SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->mac_buf_dma_addr, MAX_MAC_SIZE);
1406
1407         if (areq_ctx->ccm_hdr_size != ccm_header_size_null) {
1408                 areq_ctx->ccm_iv0_dma_addr = dma_map_single(dev,
1409                         (areq_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET),
1410                         AES_BLOCK_SIZE, DMA_TO_DEVICE);
1411
1412                 if (unlikely(dma_mapping_error(dev, areq_ctx->ccm_iv0_dma_addr))) {
1413                         SSI_LOG_ERR("Mapping mac_buf %u B at va=%pK "
1414                         "for DMA failed\n", AES_BLOCK_SIZE,
1415                         (areq_ctx->ccm_config + CCM_CTR_COUNT_0_OFFSET));
1416                         areq_ctx->ccm_iv0_dma_addr = 0;
1417                         rc = -ENOMEM;
1418                         goto aead_map_failure;
1419                 }
1420                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->ccm_iv0_dma_addr,
1421                                                                 AES_BLOCK_SIZE);
1422                 if (ssi_aead_handle_config_buf(dev, areq_ctx,
1423                         areq_ctx->ccm_config, &sg_data, req->assoclen) != 0) {
1424                         rc = -ENOMEM;
1425                         goto aead_map_failure;
1426                 }
1427         }
1428
1429 #if SSI_CC_HAS_AES_GCM
1430         if (areq_ctx->cipher_mode == DRV_CIPHER_GCTR) {
1431                 areq_ctx->hkey_dma_addr = dma_map_single(dev,
1432                         areq_ctx->hkey, AES_BLOCK_SIZE, DMA_BIDIRECTIONAL);
1433                 if (unlikely(dma_mapping_error(dev, areq_ctx->hkey_dma_addr))) {
1434                         SSI_LOG_ERR("Mapping hkey %u B at va=%pK for DMA failed\n",
1435                                 AES_BLOCK_SIZE, areq_ctx->hkey);
1436                         rc = -ENOMEM;
1437                         goto aead_map_failure;
1438                 }
1439                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->hkey_dma_addr, AES_BLOCK_SIZE);
1440
1441                 areq_ctx->gcm_block_len_dma_addr = dma_map_single(dev,
1442                         &areq_ctx->gcm_len_block, AES_BLOCK_SIZE, DMA_TO_DEVICE);
1443                 if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_block_len_dma_addr))) {
1444                         SSI_LOG_ERR("Mapping gcm_len_block %u B at va=%pK for DMA failed\n",
1445                                 AES_BLOCK_SIZE, &areq_ctx->gcm_len_block);
1446                         rc = -ENOMEM;
1447                         goto aead_map_failure;
1448                 }
1449                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_block_len_dma_addr, AES_BLOCK_SIZE);
1450
1451                 areq_ctx->gcm_iv_inc1_dma_addr = dma_map_single(dev,
1452                         areq_ctx->gcm_iv_inc1,
1453                         AES_BLOCK_SIZE, DMA_TO_DEVICE);
1454
1455                 if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc1_dma_addr))) {
1456                         SSI_LOG_ERR("Mapping gcm_iv_inc1 %u B at va=%pK "
1457                         "for DMA failed\n", AES_BLOCK_SIZE,
1458                         (areq_ctx->gcm_iv_inc1));
1459                         areq_ctx->gcm_iv_inc1_dma_addr = 0;
1460                         rc = -ENOMEM;
1461                         goto aead_map_failure;
1462                 }
1463                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_iv_inc1_dma_addr,
1464                                                                 AES_BLOCK_SIZE);
1465
1466                 areq_ctx->gcm_iv_inc2_dma_addr = dma_map_single(dev,
1467                         areq_ctx->gcm_iv_inc2,
1468                         AES_BLOCK_SIZE, DMA_TO_DEVICE);
1469
1470                 if (unlikely(dma_mapping_error(dev, areq_ctx->gcm_iv_inc2_dma_addr))) {
1471                         SSI_LOG_ERR("Mapping gcm_iv_inc2 %u B at va=%pK "
1472                         "for DMA failed\n", AES_BLOCK_SIZE,
1473                         (areq_ctx->gcm_iv_inc2));
1474                         areq_ctx->gcm_iv_inc2_dma_addr = 0;
1475                         rc = -ENOMEM;
1476                         goto aead_map_failure;
1477                 }
1478                 SSI_UPDATE_DMA_ADDR_TO_48BIT(areq_ctx->gcm_iv_inc2_dma_addr,
1479                                                                 AES_BLOCK_SIZE);
1480         }
1481 #endif /*SSI_CC_HAS_AES_GCM*/
1482
1483         size_to_map = req->cryptlen + req->assoclen;
1484         if (areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_ENCRYPT) {
1485                 size_to_map += authsize;
1486         }
1487         if (is_gcm4543)
1488                 size_to_map += crypto_aead_ivsize(tfm);
1489         rc = ssi_buffer_mgr_map_scatterlist(dev, req->src,
1490                                             size_to_map, DMA_BIDIRECTIONAL, &(areq_ctx->src.nents),
1491                                             LLI_MAX_NUM_OF_ASSOC_DATA_ENTRIES+LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents);
1492         if (unlikely(rc != 0)) {
1493                 rc = -ENOMEM;
1494                 goto aead_map_failure;
1495         }
1496
1497         if (likely(areq_ctx->is_single_pass == true)) {
1498                 /*
1499                 * Create MLLI table for:
1500                 *   (1) Assoc. data
1501                 *   (2) Src/Dst SGLs
1502                 *   Note: IV is contg. buffer (not an SGL)
1503                 */
1504                 rc = ssi_buffer_mgr_aead_chain_assoc(drvdata, req, &sg_data, true, false);
1505                 if (unlikely(rc != 0))
1506                         goto aead_map_failure;
1507                 rc = ssi_buffer_mgr_aead_chain_iv(drvdata, req, &sg_data, true, false);
1508                 if (unlikely(rc != 0))
1509                         goto aead_map_failure;
1510                 rc = ssi_buffer_mgr_aead_chain_data(drvdata, req, &sg_data, true, false);
1511                 if (unlikely(rc != 0))
1512                         goto aead_map_failure;
1513         } else { /* DOUBLE-PASS flow */
1514                 /*
1515                 * Prepare MLLI table(s) in this order:
1516                 *
1517                 * If ENCRYPT/DECRYPT (inplace):
1518                 *   (1) MLLI table for assoc
1519                 *   (2) IV entry (chained right after end of assoc)
1520                 *   (3) MLLI for src/dst (inplace operation)
1521                 *
1522                 * If ENCRYPT (non-inplace)
1523                 *   (1) MLLI table for assoc
1524                 *   (2) IV entry (chained right after end of assoc)
1525                 *   (3) MLLI for dst
1526                 *   (4) MLLI for src
1527                 *
1528                 * If DECRYPT (non-inplace)
1529                 *   (1) MLLI table for assoc
1530                 *   (2) IV entry (chained right after end of assoc)
1531                 *   (3) MLLI for src
1532                 *   (4) MLLI for dst
1533                 */
1534                 rc = ssi_buffer_mgr_aead_chain_assoc(drvdata, req, &sg_data, false, true);
1535                 if (unlikely(rc != 0))
1536                         goto aead_map_failure;
1537                 rc = ssi_buffer_mgr_aead_chain_iv(drvdata, req, &sg_data, false, true);
1538                 if (unlikely(rc != 0))
1539                         goto aead_map_failure;
1540                 rc = ssi_buffer_mgr_aead_chain_data(drvdata, req, &sg_data, true, true);
1541                 if (unlikely(rc != 0))
1542                         goto aead_map_failure;
1543         }
1544
1545         /* Mlli support -start building the MLLI according to the above results */
1546         if (unlikely(
1547                 (areq_ctx->assoc_buff_type == SSI_DMA_BUF_MLLI) ||
1548                 (areq_ctx->data_buff_type == SSI_DMA_BUF_MLLI))) {
1549
1550                 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
1551                 rc = ssi_buffer_mgr_generate_mlli(dev, &sg_data, mlli_params);
1552                 if (unlikely(rc != 0)) {
1553                         goto aead_map_failure;
1554                 }
1555
1556                 ssi_buffer_mgr_update_aead_mlli_nents(drvdata, req);
1557                 SSI_LOG_DEBUG("assoc params mn %d\n",areq_ctx->assoc.mlli_nents);
1558                 SSI_LOG_DEBUG("src params mn %d\n",areq_ctx->src.mlli_nents);
1559                 SSI_LOG_DEBUG("dst params mn %d\n",areq_ctx->dst.mlli_nents);
1560         }
1561         return 0;
1562
1563 aead_map_failure:
1564         ssi_buffer_mgr_unmap_aead_request(dev, req);
1565         return rc;
1566 }
1567
1568 int ssi_buffer_mgr_map_hash_request_final(
1569         struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, bool do_update)
1570 {
1571         struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
1572         struct device *dev = &drvdata->plat_dev->dev;
1573         uint8_t* curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
1574                         areq_ctx->buff0;
1575         uint32_t *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
1576                         &areq_ctx->buff0_cnt;
1577         struct mlli_params *mlli_params = &areq_ctx->mlli_params;
1578         struct buffer_array sg_data;
1579         struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
1580         uint32_t dummy = 0;
1581         uint32_t mapped_nents = 0;
1582
1583         SSI_LOG_DEBUG(" final params : curr_buff=%pK "
1584                      "curr_buff_cnt=0x%X nbytes = 0x%X "
1585                      "src=%pK curr_index=%u\n",
1586                      curr_buff, *curr_buff_cnt, nbytes,
1587                      src, areq_ctx->buff_index);
1588         /* Init the type of the dma buffer */
1589         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL;
1590         mlli_params->curr_pool = NULL;
1591         sg_data.num_of_buffers = 0;
1592         areq_ctx->in_nents = 0;
1593
1594         if (unlikely(nbytes == 0 && *curr_buff_cnt == 0)) {
1595                 /* nothing to do */
1596                 return 0;
1597         }
1598
1599         /*TODO: copy data in case that buffer is enough for operation */
1600         /* map the previous buffer */
1601         if (*curr_buff_cnt != 0 ) {
1602                 if (ssi_ahash_handle_curr_buf(dev, areq_ctx, curr_buff,
1603                                             *curr_buff_cnt, &sg_data) != 0) {
1604                         return -ENOMEM;
1605                 }
1606         }
1607
1608         if (src && (nbytes > 0) && do_update) {
1609                 if ( unlikely( ssi_buffer_mgr_map_scatterlist( dev,src,
1610                                           nbytes,
1611                                           DMA_TO_DEVICE,
1612                                           &areq_ctx->in_nents,
1613                                           LLI_MAX_NUM_OF_DATA_ENTRIES,
1614                                           &dummy, &mapped_nents))){
1615                         goto unmap_curr_buff;
1616                 }
1617                 if ( src && (mapped_nents == 1)
1618                      && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) ) {
1619                         memcpy(areq_ctx->buff_sg,src,
1620                                sizeof(struct scatterlist));
1621                         areq_ctx->buff_sg->length = nbytes;
1622                         areq_ctx->curr_sg = areq_ctx->buff_sg;
1623                         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
1624                 } else {
1625                         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI;
1626                 }
1627
1628         }
1629
1630         /*build mlli */
1631         if (unlikely(areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI)) {
1632                 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
1633                 /* add the src data to the sg_data */
1634                 ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
1635                                         areq_ctx->in_nents,
1636                                         src,
1637                                         nbytes, 0,
1638                                         true, &areq_ctx->mlli_nents);
1639                 if (unlikely(ssi_buffer_mgr_generate_mlli(dev, &sg_data,
1640                                                   mlli_params) != 0)) {
1641                         goto fail_unmap_din;
1642                 }
1643         }
1644         /* change the buffer index for the unmap function */
1645         areq_ctx->buff_index = (areq_ctx->buff_index^1);
1646         SSI_LOG_DEBUG("areq_ctx->data_dma_buf_type = %s\n",
1647                 GET_DMA_BUFFER_TYPE(areq_ctx->data_dma_buf_type));
1648         return 0;
1649
1650 fail_unmap_din:
1651         dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
1652
1653 unmap_curr_buff:
1654         if (*curr_buff_cnt != 0 ) {
1655                 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
1656         }
1657         return -ENOMEM;
1658 }
1659
1660 int ssi_buffer_mgr_map_hash_request_update(
1661         struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, unsigned int block_size)
1662 {
1663         struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
1664         struct device *dev = &drvdata->plat_dev->dev;
1665         uint8_t* curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
1666                         areq_ctx->buff0;
1667         uint32_t *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
1668                         &areq_ctx->buff0_cnt;
1669         uint8_t* next_buff = areq_ctx->buff_index ? areq_ctx->buff0 :
1670                         areq_ctx->buff1;
1671         uint32_t *next_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff0_cnt :
1672                         &areq_ctx->buff1_cnt;
1673         struct mlli_params *mlli_params = &areq_ctx->mlli_params;
1674         unsigned int update_data_len;
1675         uint32_t total_in_len = nbytes + *curr_buff_cnt;
1676         struct buffer_array sg_data;
1677         struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
1678         unsigned int swap_index = 0;
1679         uint32_t dummy = 0;
1680         uint32_t mapped_nents = 0;
1681
1682         SSI_LOG_DEBUG(" update params : curr_buff=%pK "
1683                      "curr_buff_cnt=0x%X nbytes=0x%X "
1684                      "src=%pK curr_index=%u \n",
1685                      curr_buff, *curr_buff_cnt, nbytes,
1686                      src, areq_ctx->buff_index);
1687         /* Init the type of the dma buffer */
1688         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_NULL;
1689         mlli_params->curr_pool = NULL;
1690         areq_ctx->curr_sg = NULL;
1691         sg_data.num_of_buffers = 0;
1692         areq_ctx->in_nents = 0;
1693
1694         if (unlikely(total_in_len < block_size)) {
1695                 SSI_LOG_DEBUG(" less than one block: curr_buff=%pK "
1696                              "*curr_buff_cnt=0x%X copy_to=%pK\n",
1697                         curr_buff, *curr_buff_cnt,
1698                         &curr_buff[*curr_buff_cnt]);
1699                 areq_ctx->in_nents =
1700                         ssi_buffer_mgr_get_sgl_nents(src,
1701                                                     nbytes,
1702                                                     &dummy, NULL);
1703                 sg_copy_to_buffer(src, areq_ctx->in_nents,
1704                                   &curr_buff[*curr_buff_cnt], nbytes);
1705                 *curr_buff_cnt += nbytes;
1706                 return 1;
1707         }
1708
1709         /* Calculate the residue size*/
1710         *next_buff_cnt = total_in_len & (block_size - 1);
1711         /* update data len */
1712         update_data_len = total_in_len - *next_buff_cnt;
1713
1714         SSI_LOG_DEBUG(" temp length : *next_buff_cnt=0x%X "
1715                      "update_data_len=0x%X\n",
1716                 *next_buff_cnt, update_data_len);
1717
1718         /* Copy the new residue to next buffer */
1719         if (*next_buff_cnt != 0) {
1720                 SSI_LOG_DEBUG(" handle residue: next buff %pK skip data %u"
1721                              " residue %u \n", next_buff,
1722                              (update_data_len - *curr_buff_cnt),
1723                              *next_buff_cnt);
1724                 ssi_buffer_mgr_copy_scatterlist_portion(next_buff, src,
1725                              (update_data_len -*curr_buff_cnt),
1726                              nbytes,SSI_SG_TO_BUF);
1727                 /* change the buffer index for next operation */
1728                 swap_index = 1;
1729         }
1730
1731         if (*curr_buff_cnt != 0) {
1732                 if (ssi_ahash_handle_curr_buf(dev, areq_ctx, curr_buff,
1733                                             *curr_buff_cnt, &sg_data) != 0) {
1734                         return -ENOMEM;
1735                 }
1736                 /* change the buffer index for next operation */
1737                 swap_index = 1;
1738         }
1739
1740         if ( update_data_len > *curr_buff_cnt ) {
1741                 if ( unlikely( ssi_buffer_mgr_map_scatterlist( dev,src,
1742                                           (update_data_len -*curr_buff_cnt),
1743                                           DMA_TO_DEVICE,
1744                                           &areq_ctx->in_nents,
1745                                           LLI_MAX_NUM_OF_DATA_ENTRIES,
1746                                           &dummy, &mapped_nents))){
1747                         goto unmap_curr_buff;
1748                 }
1749                 if ( (mapped_nents == 1)
1750                      && (areq_ctx->data_dma_buf_type == SSI_DMA_BUF_NULL) ) {
1751                         /* only one entry in the SG and no previous data */
1752                         memcpy(areq_ctx->buff_sg,src,
1753                                sizeof(struct scatterlist));
1754                         areq_ctx->buff_sg->length = update_data_len;
1755                         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_DLLI;
1756                         areq_ctx->curr_sg = areq_ctx->buff_sg;
1757                 } else {
1758                         areq_ctx->data_dma_buf_type = SSI_DMA_BUF_MLLI;
1759                 }
1760         }
1761
1762         if (unlikely(areq_ctx->data_dma_buf_type == SSI_DMA_BUF_MLLI)) {
1763                 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
1764                 /* add the src data to the sg_data */
1765                 ssi_buffer_mgr_add_scatterlist_entry(&sg_data,
1766                                         areq_ctx->in_nents,
1767                                         src,
1768                                         (update_data_len - *curr_buff_cnt), 0,
1769                                         true, &areq_ctx->mlli_nents);
1770                 if (unlikely(ssi_buffer_mgr_generate_mlli(dev, &sg_data,
1771                                                   mlli_params) != 0)) {
1772                         goto fail_unmap_din;
1773                 }
1774
1775         }
1776         areq_ctx->buff_index = (areq_ctx->buff_index^swap_index);
1777
1778         return 0;
1779
1780 fail_unmap_din:
1781         dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
1782
1783 unmap_curr_buff:
1784         if (*curr_buff_cnt != 0 ) {
1785                 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
1786         }
1787         return -ENOMEM;
1788 }
1789
1790 void ssi_buffer_mgr_unmap_hash_request(
1791         struct device *dev, void *ctx, struct scatterlist *src, bool do_revert)
1792 {
1793         struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
1794         uint32_t *prev_len = areq_ctx->buff_index ?  &areq_ctx->buff0_cnt :
1795                                                 &areq_ctx->buff1_cnt;
1796
1797         /*In case a pool was set, a table was
1798           allocated and should be released */
1799         if (areq_ctx->mlli_params.curr_pool != NULL) {
1800                 SSI_LOG_DEBUG("free MLLI buffer: dma=0x%llX virt=%pK\n",
1801                              (unsigned long long)areq_ctx->mlli_params.mlli_dma_addr,
1802                              areq_ctx->mlli_params.mlli_virt_addr);
1803                 SSI_RESTORE_DMA_ADDR_TO_48BIT(areq_ctx->mlli_params.mlli_dma_addr);
1804                 dma_pool_free(areq_ctx->mlli_params.curr_pool,
1805                               areq_ctx->mlli_params.mlli_virt_addr,
1806                               areq_ctx->mlli_params.mlli_dma_addr);
1807         }
1808
1809         if ((src) && likely(areq_ctx->in_nents != 0)) {
1810                 SSI_LOG_DEBUG("Unmapped sg src: virt=%pK dma=0x%llX len=0x%X\n",
1811                              sg_virt(src),
1812                              (unsigned long long)sg_dma_address(src),
1813                              sg_dma_len(src));
1814                 SSI_RESTORE_DMA_ADDR_TO_48BIT(sg_dma_address(src));
1815                 dma_unmap_sg(dev, src,
1816                              areq_ctx->in_nents, DMA_TO_DEVICE);
1817         }
1818
1819         if (*prev_len != 0) {
1820                 SSI_LOG_DEBUG("Unmapped buffer: areq_ctx->buff_sg=%pK"
1821                              "dma=0x%llX len 0x%X\n",
1822                                 sg_virt(areq_ctx->buff_sg),
1823                                 (unsigned long long)sg_dma_address(areq_ctx->buff_sg),
1824                                 sg_dma_len(areq_ctx->buff_sg));
1825                 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
1826                 if (!do_revert) {
1827                         /* clean the previous data length for update operation */
1828                         *prev_len = 0;
1829                 } else {
1830                         areq_ctx->buff_index ^= 1;
1831                 }
1832         }
1833 }
1834
1835 int ssi_buffer_mgr_init(struct ssi_drvdata *drvdata)
1836 {
1837         struct buff_mgr_handle *buff_mgr_handle;
1838         struct device *dev = &drvdata->plat_dev->dev;
1839
1840         buff_mgr_handle = (struct buff_mgr_handle *)
1841                 kmalloc(sizeof(struct buff_mgr_handle), GFP_KERNEL);
1842         if (buff_mgr_handle == NULL)
1843                 return -ENOMEM;
1844
1845         drvdata->buff_mgr_handle = buff_mgr_handle;
1846
1847         buff_mgr_handle->mlli_buffs_pool = dma_pool_create(
1848                                 "dx_single_mlli_tables", dev,
1849                                 MAX_NUM_OF_TOTAL_MLLI_ENTRIES *
1850                                 LLI_ENTRY_BYTE_SIZE,
1851                                 MLLI_TABLE_MIN_ALIGNMENT, 0);
1852
1853         if (unlikely(buff_mgr_handle->mlli_buffs_pool == NULL))
1854                 goto error;
1855
1856         return 0;
1857
1858 error:
1859         ssi_buffer_mgr_fini(drvdata);
1860         return -ENOMEM;
1861 }
1862
1863 int ssi_buffer_mgr_fini(struct ssi_drvdata *drvdata)
1864 {
1865         struct buff_mgr_handle *buff_mgr_handle = drvdata->buff_mgr_handle;
1866
1867         if (buff_mgr_handle  != NULL) {
1868                 if (buff_mgr_handle->mlli_buffs_pool != NULL)
1869                         dma_pool_destroy(buff_mgr_handle->mlli_buffs_pool);
1870                 kfree(drvdata->buff_mgr_handle);
1871                 drvdata->buff_mgr_handle = NULL;
1872
1873         }
1874         return 0;
1875 }
1876