1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/usb/gadget/emxx_udc.c
4 * EMXX FCD (Function Controller Driver) for USB.
6 * Copyright (C) 2010 Renesas Electronics Corporation
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/platform_device.h>
12 #include <linux/delay.h>
13 #include <linux/ioport.h>
14 #include <linux/slab.h>
15 #include <linux/errno.h>
16 #include <linux/list.h>
17 #include <linux/interrupt.h>
18 #include <linux/proc_fs.h>
19 #include <linux/clk.h>
20 #include <linux/ctype.h>
21 #include <linux/string.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/workqueue.h>
24 #include <linux/device.h>
26 #include <linux/usb/ch9.h>
27 #include <linux/usb/gadget.h>
29 #include <linux/irq.h>
30 #include <linux/gpio/consumer.h>
34 #define DRIVER_DESC "EMXX UDC driver"
35 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
37 static const char driver_name[] = "emxx_udc";
38 static const char driver_desc[] = DRIVER_DESC;
40 /*===========================================================================*/
42 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *, struct nbu2ss_ep *);
43 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *);
44 /*static void _nbu2ss_ep0_disable(struct nbu2ss_udc *);*/
45 static void _nbu2ss_ep_done(struct nbu2ss_ep *, struct nbu2ss_req *, int);
46 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *, u32 mode);
47 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs);
49 static int _nbu2ss_pullup(struct nbu2ss_udc *, int);
50 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *, struct nbu2ss_ep *);
52 /*===========================================================================*/
54 #define _nbu2ss_zero_len_pkt(udc, epnum) \
55 _nbu2ss_ep_in_end(udc, epnum, 0, 0)
57 /*===========================================================================*/
59 static struct nbu2ss_udc udc_controller;
61 /*-------------------------------------------------------------------------*/
63 static inline u32 _nbu2ss_readl(void __iomem *address)
65 return __raw_readl(address);
68 /*-------------------------------------------------------------------------*/
70 static inline void _nbu2ss_writel(void __iomem *address, u32 udata)
72 __raw_writel(udata, address);
75 /*-------------------------------------------------------------------------*/
77 static inline void _nbu2ss_bitset(void __iomem *address, u32 udata)
79 u32 reg_dt = __raw_readl(address) | (udata);
81 __raw_writel(reg_dt, address);
84 /*-------------------------------------------------------------------------*/
86 static inline void _nbu2ss_bitclr(void __iomem *address, u32 udata)
88 u32 reg_dt = __raw_readl(address) & ~(udata);
90 __raw_writel(reg_dt, address);
94 /*-------------------------------------------------------------------------*/
95 static void _nbu2ss_dump_register(struct nbu2ss_udc *udc)
100 pr_info("=== %s()\n", __func__);
103 pr_err("%s udc == NULL\n", __func__);
107 spin_unlock(&udc->lock);
109 dev_dbg(&udc->dev, "\n-USB REG-\n");
110 for (i = 0x0 ; i < USB_BASE_SIZE ; i += 16) {
111 reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i));
112 dev_dbg(&udc->dev, "USB%04x =%08x", i, (int)reg_data);
114 reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i + 4));
115 dev_dbg(&udc->dev, " %08x", (int)reg_data);
117 reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i + 8));
118 dev_dbg(&udc->dev, " %08x", (int)reg_data);
120 reg_data = _nbu2ss_readl(IO_ADDRESS(USB_BASE_ADDRESS + i + 12));
121 dev_dbg(&udc->dev, " %08x\n", (int)reg_data);
124 spin_lock(&udc->lock);
126 #endif /* UDC_DEBUG_DUMP */
128 /*-------------------------------------------------------------------------*/
129 /* Endpoint 0 Callback (Complete) */
130 static void _nbu2ss_ep0_complete(struct usb_ep *_ep, struct usb_request *_req)
136 struct usb_ctrlrequest *p_ctrl;
137 struct nbu2ss_udc *udc;
142 udc = (struct nbu2ss_udc *)_req->context;
144 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
145 if (p_ctrl->bRequest == USB_REQ_SET_FEATURE) {
146 /*-------------------------------------------------*/
148 recipient = (u8)(p_ctrl->bRequestType & USB_RECIP_MASK);
149 selector = le16_to_cpu(p_ctrl->wValue);
150 if ((recipient == USB_RECIP_DEVICE) &&
151 (selector == USB_DEVICE_TEST_MODE)) {
152 wIndex = le16_to_cpu(p_ctrl->wIndex);
153 test_mode = (u32)(wIndex >> 8);
154 _nbu2ss_set_test_mode(udc, test_mode);
160 /*-------------------------------------------------------------------------*/
161 /* Initialization usb_request */
162 static void _nbu2ss_create_ep0_packet(struct nbu2ss_udc *udc,
163 void *p_buf, unsigned int length)
165 udc->ep0_req.req.buf = p_buf;
166 udc->ep0_req.req.length = length;
167 udc->ep0_req.req.dma = 0;
168 udc->ep0_req.req.zero = true;
169 udc->ep0_req.req.complete = _nbu2ss_ep0_complete;
170 udc->ep0_req.req.status = -EINPROGRESS;
171 udc->ep0_req.req.context = udc;
172 udc->ep0_req.req.actual = 0;
175 /*-------------------------------------------------------------------------*/
176 /* Acquisition of the first address of RAM(FIFO) */
177 static u32 _nbu2ss_get_begin_ram_address(struct nbu2ss_udc *udc)
180 u32 data, last_ram_adr, use_ram_size;
182 struct ep_regs __iomem *p_ep_regs;
184 last_ram_adr = (D_RAM_SIZE_CTRL / sizeof(u32)) * 2;
187 for (num = 0; num < NUM_ENDPOINTS - 1; num++) {
188 p_ep_regs = &udc->p_regs->EP_REGS[num];
189 data = _nbu2ss_readl(&p_ep_regs->EP_PCKT_ADRS);
190 buf_type = _nbu2ss_readl(&p_ep_regs->EP_CONTROL) & EPN_BUF_TYPE;
193 use_ram_size += (data & EPN_MPKT) / sizeof(u32);
196 use_ram_size += ((data & EPN_MPKT) / sizeof(u32)) * 2;
199 if ((data >> 16) > last_ram_adr)
200 last_ram_adr = data >> 16;
203 return last_ram_adr + use_ram_size;
206 /*-------------------------------------------------------------------------*/
207 /* Construction of Endpoint */
208 static int _nbu2ss_ep_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
219 /*-------------------------------------------------------------*/
220 /* RAM Transfer Address */
221 begin_adrs = _nbu2ss_get_begin_ram_address(udc);
222 data = (begin_adrs << 16) | ep->ep.maxpacket;
223 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, data);
225 /*-------------------------------------------------------------*/
226 /* Interrupt Enable */
227 data = 1 << (ep->epnum + 8);
228 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, data);
230 /*-------------------------------------------------------------*/
231 /* Endpoint Type(Mode) */
232 /* Bulk, Interrupt, ISO */
233 switch (ep->ep_type) {
234 case USB_ENDPOINT_XFER_BULK:
238 case USB_ENDPOINT_XFER_INT:
239 data = EPN_BUF_SINGLE | EPN_INTERRUPT;
242 case USB_ENDPOINT_XFER_ISOC:
251 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
252 _nbu2ss_endpoint_toggle_reset(udc, (ep->epnum | ep->direct));
254 if (ep->direct == USB_DIR_OUT) {
255 /*---------------------------------------------------------*/
257 data = EPN_EN | EPN_BCLR | EPN_DIR0;
258 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
260 data = EPN_ONAK | EPN_OSTL_EN | EPN_OSTL;
261 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
263 data = EPN_OUT_EN | EPN_OUT_END_EN;
264 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
266 /*---------------------------------------------------------*/
268 data = EPN_EN | EPN_BCLR | EPN_AUTO;
269 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
272 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
274 data = EPN_IN_EN | EPN_IN_END_EN;
275 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
281 /*-------------------------------------------------------------------------*/
282 /* Release of Endpoint */
283 static int _nbu2ss_epn_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
288 if ((ep->epnum == 0) || (udc->vbus_active == 0))
293 /*-------------------------------------------------------------*/
294 /* RAM Transfer Address */
295 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_PCKT_ADRS, 0);
297 /*-------------------------------------------------------------*/
298 /* Interrupt Disable */
299 data = 1 << (ep->epnum + 8);
300 _nbu2ss_bitclr(&udc->p_regs->USB_INT_ENA, data);
302 if (ep->direct == USB_DIR_OUT) {
303 /*---------------------------------------------------------*/
305 data = EPN_ONAK | EPN_BCLR;
306 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
308 data = EPN_EN | EPN_DIR0;
309 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
311 data = EPN_OUT_EN | EPN_OUT_END_EN;
312 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
314 /*---------------------------------------------------------*/
317 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
319 data = EPN_EN | EPN_AUTO;
320 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
322 data = EPN_IN_EN | EPN_IN_END_EN;
323 _nbu2ss_bitclr(&udc->p_regs->EP_REGS[num].EP_INT_ENA, data);
329 /*-------------------------------------------------------------------------*/
330 /* DMA setting (without Endpoint 0) */
331 static void _nbu2ss_ep_dma_init(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
336 data = _nbu2ss_readl(&udc->p_regs->USBSSCONF);
337 if (((ep->epnum == 0) || (data & (1 << ep->epnum)) == 0))
338 return; /* Not Support DMA */
342 if (ep->direct == USB_DIR_OUT) {
343 /*---------------------------------------------------------*/
345 data = ep->ep.maxpacket;
346 _nbu2ss_writel(&udc->p_regs->EP_DCR[num].EP_DCR2, data);
348 /*---------------------------------------------------------*/
349 /* Transfer Direct */
350 data = DCR1_EPN_DIR0;
351 _nbu2ss_bitset(&udc->p_regs->EP_DCR[num].EP_DCR1, data);
353 /*---------------------------------------------------------*/
355 data = EPN_STOP_MODE | EPN_STOP_SET | EPN_DMAMODE0;
356 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
358 /*---------------------------------------------------------*/
360 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, EPN_AUTO);
362 /*---------------------------------------------------------*/
364 data = EPN_BURST_SET | EPN_DMAMODE0;
365 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_DMA_CTRL, data);
369 /*-------------------------------------------------------------------------*/
370 /* DMA setting release */
371 static void _nbu2ss_ep_dma_exit(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
375 struct fc_regs __iomem *preg = udc->p_regs;
377 if (udc->vbus_active == 0)
378 return; /* VBUS OFF */
380 data = _nbu2ss_readl(&preg->USBSSCONF);
381 if ((ep->epnum == 0) || ((data & (1 << ep->epnum)) == 0))
382 return; /* Not Support DMA */
386 _nbu2ss_ep_dma_abort(udc, ep);
388 if (ep->direct == USB_DIR_OUT) {
389 /*---------------------------------------------------------*/
391 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, 0);
392 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPN_DIR0);
393 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
395 /*---------------------------------------------------------*/
397 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
398 _nbu2ss_writel(&preg->EP_REGS[num].EP_DMA_CTRL, 0);
402 /*-------------------------------------------------------------------------*/
404 static void _nbu2ss_ep_dma_abort(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
406 struct fc_regs __iomem *preg = udc->p_regs;
408 _nbu2ss_bitclr(&preg->EP_DCR[ep->epnum - 1].EP_DCR1, DCR1_EPN_REQEN);
409 mdelay(DMA_DISABLE_TIME); /* DCR1_EPN_REQEN Clear */
410 _nbu2ss_bitclr(&preg->EP_REGS[ep->epnum - 1].EP_DMA_CTRL, EPN_DMA_EN);
413 /*-------------------------------------------------------------------------*/
414 /* Start IN Transfer */
415 static void _nbu2ss_ep_in_end(struct nbu2ss_udc *udc,
416 u32 epnum, u32 data32, u32 length)
420 struct fc_regs __iomem *preg = udc->p_regs;
422 if (length >= sizeof(u32))
426 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_AUTO);
428 /* Writing of 1-4 bytes */
430 _nbu2ss_writel(&preg->EP0_WRITE, data32);
432 data = ((length << 5) & EP0_DW) | EP0_DEND;
433 _nbu2ss_writel(&preg->EP0_CONTROL, data);
435 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_AUTO);
439 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
441 /* Writing of 1-4 bytes */
443 _nbu2ss_writel(&preg->EP_REGS[num].EP_WRITE, data32);
445 data = (((length) << 5) & EPN_DW) | EPN_DEND;
446 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
448 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, EPN_AUTO);
453 /*-------------------------------------------------------------------------*/
454 static void _nbu2ss_dma_map_single(struct nbu2ss_udc *udc,
455 struct nbu2ss_ep *ep,
456 struct nbu2ss_req *req, u8 direct)
458 if (req->req.dma == DMA_ADDR_INVALID) {
459 if (req->unaligned) {
460 req->req.dma = ep->phys_buf;
462 req->req.dma = dma_map_single(udc->gadget.dev.parent,
465 (direct == USB_DIR_IN)
472 dma_sync_single_for_device(udc->gadget.dev.parent,
475 (direct == USB_DIR_IN)
483 /*-------------------------------------------------------------------------*/
484 static void _nbu2ss_dma_unmap_single(struct nbu2ss_udc *udc,
485 struct nbu2ss_ep *ep,
486 struct nbu2ss_req *req, u8 direct)
492 if (direct == USB_DIR_OUT) {
493 count = req->req.actual % 4;
496 p += (req->req.actual - count);
497 memcpy(data, p, count);
502 if (req->unaligned) {
503 if (direct == USB_DIR_OUT)
504 memcpy(req->req.buf, ep->virt_buf,
505 req->req.actual & 0xfffffffc);
507 dma_unmap_single(udc->gadget.dev.parent,
508 req->req.dma, req->req.length,
509 (direct == USB_DIR_IN)
513 req->req.dma = DMA_ADDR_INVALID;
517 dma_sync_single_for_cpu(udc->gadget.dev.parent,
518 req->req.dma, req->req.length,
519 (direct == USB_DIR_IN)
526 p += (req->req.actual - count);
527 memcpy(p, data, count);
532 /*-------------------------------------------------------------------------*/
533 /* Endpoint 0 OUT Transfer (PIO) */
534 static int ep0_out_pio(struct nbu2ss_udc *udc, u8 *buf, u32 length)
537 u32 numreads = length / sizeof(u32);
538 union usb_reg_access *buf32 = (union usb_reg_access *)buf;
544 for (i = 0; i < numreads; i++) {
545 buf32->dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
549 return numreads * sizeof(u32);
552 /*-------------------------------------------------------------------------*/
553 /* Endpoint 0 OUT Transfer (PIO, OverBytes) */
554 static int ep0_out_overbytes(struct nbu2ss_udc *udc, u8 *p_buf, u32 length)
558 union usb_reg_access temp_32;
559 union usb_reg_access *p_buf_32 = (union usb_reg_access *)p_buf;
561 if ((length > 0) && (length < sizeof(u32))) {
562 temp_32.dw = _nbu2ss_readl(&udc->p_regs->EP0_READ);
563 for (i = 0 ; i < length ; i++)
564 p_buf_32->byte.DATA[i] = temp_32.byte.DATA[i];
565 i_read_size += length;
571 /*-------------------------------------------------------------------------*/
572 /* Endpoint 0 IN Transfer (PIO) */
573 static int EP0_in_PIO(struct nbu2ss_udc *udc, u8 *p_buf, u32 length)
576 u32 i_max_length = EP0_PACKETSIZE;
577 u32 i_word_length = 0;
578 u32 i_write_length = 0;
579 union usb_reg_access *p_buf_32 = (union usb_reg_access *)p_buf;
581 /*------------------------------------------------------------*/
582 /* Transfer Length */
583 if (i_max_length < length)
584 i_word_length = i_max_length / sizeof(u32);
586 i_word_length = length / sizeof(u32);
588 /*------------------------------------------------------------*/
590 for (i = 0; i < i_word_length; i++) {
591 _nbu2ss_writel(&udc->p_regs->EP0_WRITE, p_buf_32->dw);
593 i_write_length += sizeof(u32);
596 return i_write_length;
599 /*-------------------------------------------------------------------------*/
600 /* Endpoint 0 IN Transfer (PIO, OverBytes) */
601 static int ep0_in_overbytes(struct nbu2ss_udc *udc,
606 union usb_reg_access temp_32;
607 union usb_reg_access *p_buf_32 = (union usb_reg_access *)p_buf;
609 if ((i_remain_size > 0) && (i_remain_size < sizeof(u32))) {
610 for (i = 0 ; i < i_remain_size ; i++)
611 temp_32.byte.DATA[i] = p_buf_32->byte.DATA[i];
612 _nbu2ss_ep_in_end(udc, 0, temp_32.dw, i_remain_size);
614 return i_remain_size;
620 /*-------------------------------------------------------------------------*/
621 /* Transfer NULL Packet (Epndoint 0) */
622 static int EP0_send_NULL(struct nbu2ss_udc *udc, bool pid_flag)
626 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
627 data &= ~(u32)EP0_INAK;
630 data |= (EP0_INAK_EN | EP0_PIDCLR | EP0_DEND);
632 data |= (EP0_INAK_EN | EP0_DEND);
634 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
639 /*-------------------------------------------------------------------------*/
640 /* Receive NULL Packet (Endpoint 0) */
641 static int EP0_receive_NULL(struct nbu2ss_udc *udc, bool pid_flag)
645 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
646 data &= ~(u32)EP0_ONAK;
651 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
656 /*-------------------------------------------------------------------------*/
657 static int _nbu2ss_ep0_in_transfer(struct nbu2ss_udc *udc,
658 struct nbu2ss_req *req)
660 u8 *p_buffer; /* IN Data Buffer */
662 u32 i_remain_size = 0;
665 /*-------------------------------------------------------------*/
666 /* End confirmation */
667 if (req->req.actual == req->req.length) {
668 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
671 EP0_send_NULL(udc, false);
676 return 0; /* Transfer End */
679 /*-------------------------------------------------------------*/
681 data = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
683 data &= ~(u32)EP0_INAK;
684 _nbu2ss_writel(&udc->p_regs->EP0_CONTROL, data);
686 i_remain_size = req->req.length - req->req.actual;
687 p_buffer = (u8 *)req->req.buf;
688 p_buffer += req->req.actual;
690 /*-------------------------------------------------------------*/
692 result = EP0_in_PIO(udc, p_buffer, i_remain_size);
694 req->div_len = result;
695 i_remain_size -= result;
697 if (i_remain_size == 0) {
698 EP0_send_NULL(udc, false);
702 if ((i_remain_size < sizeof(u32)) && (result != EP0_PACKETSIZE)) {
704 result += ep0_in_overbytes(udc, p_buffer, i_remain_size);
705 req->div_len = result;
711 /*-------------------------------------------------------------------------*/
712 static int _nbu2ss_ep0_out_transfer(struct nbu2ss_udc *udc,
713 struct nbu2ss_req *req)
721 /*-------------------------------------------------------------*/
722 /* Receive data confirmation */
723 i_recv_length = _nbu2ss_readl(&udc->p_regs->EP0_LENGTH) & EP0_LDATA;
724 if (i_recv_length != 0) {
727 i_remain_size = req->req.length - req->req.actual;
728 p_buffer = (u8 *)req->req.buf;
729 p_buffer += req->req.actual;
731 result = ep0_out_pio(udc, p_buffer
732 , min(i_remain_size, i_recv_length));
736 req->req.actual += result;
737 i_recv_length -= result;
739 if ((i_recv_length > 0) && (i_recv_length < sizeof(u32))) {
741 i_remain_size -= result;
743 result = ep0_out_overbytes(udc, p_buffer
744 , min(i_remain_size, i_recv_length));
745 req->req.actual += result;
751 /*-------------------------------------------------------------*/
752 /* End confirmation */
753 if (req->req.actual == req->req.length) {
754 if ((req->req.actual % EP0_PACKETSIZE) == 0) {
757 EP0_receive_NULL(udc, false);
762 return 0; /* Transfer End */
765 if ((req->req.actual % EP0_PACKETSIZE) != 0)
766 return 0; /* Short Packet Transfer End */
768 if (req->req.actual > req->req.length) {
769 dev_err(udc->dev, " *** Overrun Error\n");
773 if (f_rcv_zero != 0) {
774 i_remain_size = _nbu2ss_readl(&udc->p_regs->EP0_CONTROL);
775 if (i_remain_size & EP0_ONAK) {
776 /*---------------------------------------------------*/
778 _nbu2ss_bitclr(&udc->p_regs->EP0_CONTROL, EP0_ONAK);
786 /*-------------------------------------------------------------------------*/
787 static int _nbu2ss_out_dma(struct nbu2ss_udc *udc, struct nbu2ss_req *req,
796 int result = -EINVAL;
797 struct fc_regs __iomem *preg = udc->p_regs;
800 return 1; /* DMA is forwarded */
802 req->dma_flag = true;
803 p_buffer = req->req.dma;
804 p_buffer += req->req.actual;
807 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)p_buffer);
809 /* Number of transfer packets */
810 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPN_MPKT;
811 dmacnt = length / mpkt;
812 lmpkt = (length % mpkt) & ~(u32)0x03;
814 if (dmacnt > DMA_MAX_COUNT) {
815 dmacnt = DMA_MAX_COUNT;
817 } else if (lmpkt != 0) {
819 burst = 0; /* Burst OFF */
823 data = mpkt | (lmpkt << 16);
824 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
826 data = ((dmacnt & 0xff) << 16) | DCR1_EPN_DIR0 | DCR1_EPN_REQEN;
827 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
830 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, 0);
831 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_BURST_SET);
833 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT
835 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_BURST_SET);
837 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_DMA_EN);
839 result = length & ~(u32)0x03;
840 req->div_len = result;
845 /*-------------------------------------------------------------------------*/
846 static int _nbu2ss_epn_out_pio(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep,
847 struct nbu2ss_req *req, u32 length)
853 union usb_reg_access temp_32;
854 union usb_reg_access *p_buf_32;
856 struct fc_regs __iomem *preg = udc->p_regs;
859 return 1; /* DMA is forwarded */
864 p_buffer = (u8 *)req->req.buf;
865 p_buf_32 = (union usb_reg_access *)(p_buffer + req->req.actual);
867 i_word_length = length / sizeof(u32);
868 if (i_word_length > 0) {
869 /*---------------------------------------------------------*/
870 /* Copy of every four bytes */
871 for (i = 0; i < i_word_length; i++) {
873 _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
876 result = i_word_length * sizeof(u32);
879 data = length - result;
881 /*---------------------------------------------------------*/
882 /* Copy of fraction byte */
884 _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_READ);
885 for (i = 0 ; i < data ; i++)
886 p_buf_32->byte.DATA[i] = temp_32.byte.DATA[i];
890 req->req.actual += result;
892 if ((req->req.actual == req->req.length) ||
893 ((req->req.actual % ep->ep.maxpacket) != 0)) {
900 /*-------------------------------------------------------------------------*/
901 static int _nbu2ss_epn_out_data(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep,
902 struct nbu2ss_req *req, u32 data_size)
913 i_buf_size = min((req->req.length - req->req.actual), data_size);
915 if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
916 (i_buf_size >= sizeof(u32))) {
917 nret = _nbu2ss_out_dma(udc, req, num, i_buf_size);
919 i_buf_size = min_t(u32, i_buf_size, ep->ep.maxpacket);
920 nret = _nbu2ss_epn_out_pio(udc, ep, req, i_buf_size);
926 /*-------------------------------------------------------------------------*/
927 static int _nbu2ss_epn_out_transfer(struct nbu2ss_udc *udc,
928 struct nbu2ss_ep *ep,
929 struct nbu2ss_req *req)
934 struct fc_regs __iomem *preg = udc->p_regs;
941 /*-------------------------------------------------------------*/
944 _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT) & EPN_LDATA;
946 if (i_recv_length != 0) {
947 result = _nbu2ss_epn_out_data(udc, ep, req, i_recv_length);
948 if (i_recv_length < ep->ep.maxpacket) {
949 if (i_recv_length == result) {
950 req->req.actual += result;
955 if ((req->req.actual == req->req.length) ||
956 ((req->req.actual % ep->ep.maxpacket) != 0)) {
962 if ((req->req.actual % ep->ep.maxpacket) == 0) {
970 if (req->req.actual > req->req.length) {
971 dev_err(udc->dev, " Overrun Error\n");
972 dev_err(udc->dev, " actual = %d, length = %d\n",
973 req->req.actual, req->req.length);
980 /*-------------------------------------------------------------------------*/
981 static int _nbu2ss_in_dma(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep,
982 struct nbu2ss_req *req, u32 num, u32 length)
985 u32 mpkt; /* MaxPacketSize */
986 u32 lmpkt; /* Last Packet Data Size */
987 u32 dmacnt; /* IN Data Size */
990 int result = -EINVAL;
991 struct fc_regs __iomem *preg = udc->p_regs;
994 return 1; /* DMA is forwarded */
997 if (req->req.actual == 0)
998 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_IN);
1000 req->dma_flag = true;
1002 /* MAX Packet Size */
1003 mpkt = _nbu2ss_readl(&preg->EP_REGS[num].EP_PCKT_ADRS) & EPN_MPKT;
1005 if ((DMA_MAX_COUNT * mpkt) < length)
1006 i_write_length = DMA_MAX_COUNT * mpkt;
1008 i_write_length = length;
1010 /*------------------------------------------------------------*/
1011 /* Number of transmission packets */
1012 if (mpkt < i_write_length) {
1013 dmacnt = i_write_length / mpkt;
1014 lmpkt = (i_write_length % mpkt) & ~(u32)0x3;
1018 lmpkt = mpkt & ~(u32)0x3;
1022 lmpkt = i_write_length & ~(u32)0x3;
1025 /* Packet setting */
1026 data = mpkt | (lmpkt << 16);
1027 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR2, data);
1029 /* Address setting */
1030 p_buffer = req->req.dma;
1031 p_buffer += req->req.actual;
1032 _nbu2ss_writel(&preg->EP_DCR[num].EP_TADR, (u32)p_buffer);
1034 /* Packet and DMA setting */
1035 data = ((dmacnt & 0xff) << 16) | DCR1_EPN_REQEN;
1036 _nbu2ss_writel(&preg->EP_DCR[num].EP_DCR1, data);
1038 /* Packet setting of EPC */
1039 data = dmacnt << 16;
1040 _nbu2ss_writel(&preg->EP_REGS[num].EP_LEN_DCNT, data);
1042 /*DMA setting of EPC */
1043 _nbu2ss_bitset(&preg->EP_REGS[num].EP_DMA_CTRL, EPN_DMA_EN);
1045 result = i_write_length & ~(u32)0x3;
1046 req->div_len = result;
1051 /*-------------------------------------------------------------------------*/
1052 static int _nbu2ss_epn_in_pio(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep,
1053 struct nbu2ss_req *req, u32 length)
1059 union usb_reg_access temp_32;
1060 union usb_reg_access *p_buf_32 = NULL;
1062 struct fc_regs __iomem *preg = udc->p_regs;
1065 return 1; /* DMA is forwarded */
1068 p_buffer = (u8 *)req->req.buf;
1069 p_buf_32 = (union usb_reg_access *)(p_buffer + req->req.actual);
1071 i_word_length = length / sizeof(u32);
1072 if (i_word_length > 0) {
1073 for (i = 0; i < i_word_length; i++) {
1075 &preg->EP_REGS[ep->epnum - 1].EP_WRITE,
1080 result = i_word_length * sizeof(u32);
1084 if (result != ep->ep.maxpacket) {
1085 data = length - result;
1087 for (i = 0 ; i < data ; i++)
1088 temp_32.byte.DATA[i] = p_buf_32->byte.DATA[i];
1090 _nbu2ss_ep_in_end(udc, ep->epnum, temp_32.dw, data);
1094 req->div_len = result;
1099 /*-------------------------------------------------------------------------*/
1100 static int _nbu2ss_epn_in_data(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep,
1101 struct nbu2ss_req *req, u32 data_size)
1109 num = ep->epnum - 1;
1111 if ((ep->ep_type != USB_ENDPOINT_XFER_INT) && (req->req.dma != 0) &&
1112 (data_size >= sizeof(u32))) {
1113 nret = _nbu2ss_in_dma(udc, ep, req, num, data_size);
1115 data_size = min_t(u32, data_size, ep->ep.maxpacket);
1116 nret = _nbu2ss_epn_in_pio(udc, ep, req, data_size);
1122 /*-------------------------------------------------------------------------*/
1123 static int _nbu2ss_epn_in_transfer(struct nbu2ss_udc *udc,
1124 struct nbu2ss_ep *ep, struct nbu2ss_req *req)
1134 num = ep->epnum - 1;
1136 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
1138 /*-------------------------------------------------------------*/
1139 /* State confirmation of FIFO */
1140 if (req->req.actual == 0) {
1141 if ((status & EPN_IN_EMPTY) == 0)
1142 return 1; /* Not Empty */
1145 if ((status & EPN_IN_FULL) != 0)
1146 return 1; /* Not Empty */
1149 /*-------------------------------------------------------------*/
1150 /* Start transfer */
1151 i_buf_size = req->req.length - req->req.actual;
1153 result = _nbu2ss_epn_in_data(udc, ep, req, i_buf_size);
1154 else if (req->req.length == 0)
1155 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1160 /*-------------------------------------------------------------------------*/
1161 static int _nbu2ss_start_transfer(struct nbu2ss_udc *udc,
1162 struct nbu2ss_ep *ep,
1163 struct nbu2ss_req *req,
1168 req->dma_flag = false;
1171 if (req->req.length == 0) {
1174 if ((req->req.length % ep->ep.maxpacket) == 0)
1175 req->zero = req->req.zero;
1180 if (ep->epnum == 0) {
1182 switch (udc->ep0state) {
1183 case EP0_IN_DATA_PHASE:
1184 nret = _nbu2ss_ep0_in_transfer(udc, req);
1187 case EP0_OUT_DATA_PHASE:
1188 nret = _nbu2ss_ep0_out_transfer(udc, req);
1191 case EP0_IN_STATUS_PHASE:
1192 nret = EP0_send_NULL(udc, true);
1201 if (ep->direct == USB_DIR_OUT) {
1204 nret = _nbu2ss_epn_out_transfer(udc, ep, req);
1207 nret = _nbu2ss_epn_in_transfer(udc, ep, req);
1214 /*-------------------------------------------------------------------------*/
1215 static void _nbu2ss_restert_transfer(struct nbu2ss_ep *ep)
1219 struct nbu2ss_req *req;
1221 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1225 if (ep->epnum > 0) {
1226 length = _nbu2ss_readl(
1227 &ep->udc->p_regs->EP_REGS[ep->epnum - 1].EP_LEN_DCNT);
1229 length &= EPN_LDATA;
1230 if (length < ep->ep.maxpacket)
1234 _nbu2ss_start_transfer(ep->udc, ep, req, bflag);
1237 /*-------------------------------------------------------------------------*/
1238 /* Endpoint Toggle Reset */
1239 static void _nbu2ss_endpoint_toggle_reset(struct nbu2ss_udc *udc, u8 ep_adrs)
1244 if ((ep_adrs == 0) || (ep_adrs == 0x80))
1247 num = (ep_adrs & 0x7F) - 1;
1249 if (ep_adrs & USB_DIR_IN)
1252 data = EPN_BCLR | EPN_OPIDCLR;
1254 _nbu2ss_bitset(&udc->p_regs->EP_REGS[num].EP_CONTROL, data);
1257 /*-------------------------------------------------------------------------*/
1258 /* Endpoint STALL set */
1259 static void _nbu2ss_set_endpoint_stall(struct nbu2ss_udc *udc,
1260 u8 ep_adrs, bool bstall)
1264 struct nbu2ss_ep *ep;
1265 struct fc_regs __iomem *preg = udc->p_regs;
1267 if ((ep_adrs == 0) || (ep_adrs == 0x80)) {
1270 _nbu2ss_bitset(&preg->EP0_CONTROL, EP0_STL);
1273 _nbu2ss_bitclr(&preg->EP0_CONTROL, EP0_STL);
1276 epnum = ep_adrs & USB_ENDPOINT_NUMBER_MASK;
1278 ep = &udc->ep[epnum];
1284 if (ep_adrs & USB_DIR_IN)
1285 data = EPN_BCLR | EPN_ISTL;
1287 data = EPN_OSTL_EN | EPN_OSTL;
1289 _nbu2ss_bitset(&preg->EP_REGS[num].EP_CONTROL, data);
1292 ep->stalled = false;
1293 if (ep_adrs & USB_DIR_IN) {
1294 _nbu2ss_bitclr(&preg->EP_REGS[num].EP_CONTROL
1298 _nbu2ss_readl(&preg->EP_REGS[num].EP_CONTROL);
1301 data |= EPN_OSTL_EN;
1303 _nbu2ss_writel(&preg->EP_REGS[num].EP_CONTROL
1307 ep->stalled = false;
1310 _nbu2ss_restert_transfer(ep);
1316 /*-------------------------------------------------------------------------*/
1317 static void _nbu2ss_set_test_mode(struct nbu2ss_udc *udc, u32 mode)
1321 if (mode > MAX_TEST_MODE_NUM)
1324 dev_info(udc->dev, "SET FEATURE : test mode = %d\n", mode);
1326 data = _nbu2ss_readl(&udc->p_regs->USB_CONTROL);
1327 data &= ~TEST_FORCE_ENABLE;
1328 data |= mode << TEST_MODE_SHIFT;
1330 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, data);
1331 _nbu2ss_bitset(&udc->p_regs->TEST_CONTROL, CS_TESTMODEEN);
1334 /*-------------------------------------------------------------------------*/
1335 static int _nbu2ss_set_feature_device(struct nbu2ss_udc *udc,
1336 u16 selector, u16 wIndex)
1338 int result = -EOPNOTSUPP;
1341 case USB_DEVICE_REMOTE_WAKEUP:
1342 if (wIndex == 0x0000) {
1343 udc->remote_wakeup = U2F_ENABLE;
1348 case USB_DEVICE_TEST_MODE:
1350 if (wIndex <= MAX_TEST_MODE_NUM)
1361 /*-------------------------------------------------------------------------*/
1362 static int _nbu2ss_get_ep_stall(struct nbu2ss_udc *udc, u8 ep_adrs)
1365 u32 data = 0, bit_data;
1366 struct fc_regs __iomem *preg = udc->p_regs;
1368 epnum = ep_adrs & ~USB_ENDPOINT_DIR_MASK;
1370 data = _nbu2ss_readl(&preg->EP0_CONTROL);
1374 data = _nbu2ss_readl(&preg->EP_REGS[epnum - 1].EP_CONTROL);
1375 if ((data & EPN_EN) == 0)
1378 if (ep_adrs & USB_ENDPOINT_DIR_MASK)
1379 bit_data = EPN_ISTL;
1381 bit_data = EPN_OSTL;
1384 if ((data & bit_data) == 0)
1389 /*-------------------------------------------------------------------------*/
1390 static inline int _nbu2ss_req_feature(struct nbu2ss_udc *udc, bool bset)
1392 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1393 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1394 u16 selector = le16_to_cpu(udc->ctrl.wValue);
1395 u16 wIndex = le16_to_cpu(udc->ctrl.wIndex);
1397 int result = -EOPNOTSUPP;
1399 if ((udc->ctrl.wLength != 0x0000) ||
1400 (direction != USB_DIR_OUT)) {
1404 switch (recipient) {
1405 case USB_RECIP_DEVICE:
1408 _nbu2ss_set_feature_device(udc, selector, wIndex);
1411 case USB_RECIP_ENDPOINT:
1412 if (0x0000 == (wIndex & 0xFF70)) {
1413 if (selector == USB_ENDPOINT_HALT) {
1414 ep_adrs = wIndex & 0xFF;
1416 _nbu2ss_endpoint_toggle_reset(udc,
1420 _nbu2ss_set_endpoint_stall(udc, ep_adrs, bset);
1432 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1437 /*-------------------------------------------------------------------------*/
1438 static inline enum usb_device_speed _nbu2ss_get_speed(struct nbu2ss_udc *udc)
1441 enum usb_device_speed speed = USB_SPEED_FULL;
1443 data = _nbu2ss_readl(&udc->p_regs->USB_STATUS);
1444 if (data & HIGH_SPEED)
1445 speed = USB_SPEED_HIGH;
1450 /*-------------------------------------------------------------------------*/
1451 static void _nbu2ss_epn_set_stall(struct nbu2ss_udc *udc,
1452 struct nbu2ss_ep *ep)
1458 struct fc_regs __iomem *preg = udc->p_regs;
1460 if (ep->direct == USB_DIR_IN) {
1462 ; limit_cnt < IN_DATA_EMPTY_COUNT
1464 regdata = _nbu2ss_readl(
1465 &preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1467 if ((regdata & EPN_IN_DATA) == 0)
1474 ep_adrs = ep->epnum | ep->direct;
1475 _nbu2ss_set_endpoint_stall(udc, ep_adrs, 1);
1478 /*-------------------------------------------------------------------------*/
1479 static int std_req_get_status(struct nbu2ss_udc *udc)
1482 u16 status_data = 0;
1483 u8 recipient = (u8)(udc->ctrl.bRequestType & USB_RECIP_MASK);
1484 u8 direction = (u8)(udc->ctrl.bRequestType & USB_DIR_IN);
1486 int result = -EINVAL;
1488 if ((udc->ctrl.wValue != 0x0000) || (direction != USB_DIR_IN))
1492 min_t(u16, le16_to_cpu(udc->ctrl.wLength), sizeof(status_data));
1493 switch (recipient) {
1494 case USB_RECIP_DEVICE:
1495 if (udc->ctrl.wIndex == 0x0000) {
1496 if (udc->gadget.is_selfpowered)
1497 status_data |= BIT(USB_DEVICE_SELF_POWERED);
1499 if (udc->remote_wakeup)
1500 status_data |= BIT(USB_DEVICE_REMOTE_WAKEUP);
1506 case USB_RECIP_ENDPOINT:
1507 if (0x0000 == (le16_to_cpu(udc->ctrl.wIndex) & 0xFF70)) {
1508 ep_adrs = (u8)(le16_to_cpu(udc->ctrl.wIndex) & 0xFF);
1509 result = _nbu2ss_get_ep_stall(udc, ep_adrs);
1512 status_data |= BIT(USB_ENDPOINT_HALT);
1521 memcpy(udc->ep0_buf, &status_data, length);
1522 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, length);
1523 _nbu2ss_ep0_in_transfer(udc, &udc->ep0_req);
1526 dev_err(udc->dev, " Error GET_STATUS\n");
1532 /*-------------------------------------------------------------------------*/
1533 static int std_req_clear_feature(struct nbu2ss_udc *udc)
1535 return _nbu2ss_req_feature(udc, false);
1538 /*-------------------------------------------------------------------------*/
1539 static int std_req_set_feature(struct nbu2ss_udc *udc)
1541 return _nbu2ss_req_feature(udc, true);
1544 /*-------------------------------------------------------------------------*/
1545 static int std_req_set_address(struct nbu2ss_udc *udc)
1548 u32 wValue = le16_to_cpu(udc->ctrl.wValue);
1550 if ((udc->ctrl.bRequestType != 0x00) ||
1551 (udc->ctrl.wIndex != 0x0000) ||
1552 (udc->ctrl.wLength != 0x0000)) {
1556 if (wValue != (wValue & 0x007F))
1559 wValue <<= USB_ADRS_SHIFT;
1561 _nbu2ss_writel(&udc->p_regs->USB_ADDRESS, wValue);
1562 _nbu2ss_create_ep0_packet(udc, udc->ep0_buf, 0);
1567 /*-------------------------------------------------------------------------*/
1568 static int std_req_set_configuration(struct nbu2ss_udc *udc)
1570 u32 config_value = (u32)(le16_to_cpu(udc->ctrl.wValue) & 0x00ff);
1572 if ((udc->ctrl.wIndex != 0x0000) ||
1573 (udc->ctrl.wLength != 0x0000) ||
1574 (udc->ctrl.bRequestType != 0x00)) {
1578 udc->curr_config = config_value;
1580 if (config_value > 0) {
1581 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, CONF);
1582 udc->devstate = USB_STATE_CONFIGURED;
1585 _nbu2ss_bitclr(&udc->p_regs->USB_CONTROL, CONF);
1586 udc->devstate = USB_STATE_ADDRESS;
1592 /*-------------------------------------------------------------------------*/
1593 static inline void _nbu2ss_read_request_data(struct nbu2ss_udc *udc, u32 *pdata)
1595 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA0);
1597 *pdata = _nbu2ss_readl(&udc->p_regs->SETUP_DATA1);
1600 /*-------------------------------------------------------------------------*/
1601 static inline int _nbu2ss_decode_request(struct nbu2ss_udc *udc)
1603 bool bcall_back = true;
1605 struct usb_ctrlrequest *p_ctrl;
1607 p_ctrl = &udc->ctrl;
1608 _nbu2ss_read_request_data(udc, (u32 *)p_ctrl);
1610 /* ep0 state control */
1611 if (p_ctrl->wLength == 0) {
1612 udc->ep0state = EP0_IN_STATUS_PHASE;
1615 if (p_ctrl->bRequestType & USB_DIR_IN)
1616 udc->ep0state = EP0_IN_DATA_PHASE;
1618 udc->ep0state = EP0_OUT_DATA_PHASE;
1621 if ((p_ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
1622 switch (p_ctrl->bRequest) {
1623 case USB_REQ_GET_STATUS:
1624 nret = std_req_get_status(udc);
1628 case USB_REQ_CLEAR_FEATURE:
1629 nret = std_req_clear_feature(udc);
1633 case USB_REQ_SET_FEATURE:
1634 nret = std_req_set_feature(udc);
1638 case USB_REQ_SET_ADDRESS:
1639 nret = std_req_set_address(udc);
1643 case USB_REQ_SET_CONFIGURATION:
1644 nret = std_req_set_configuration(udc);
1653 if (udc->ep0state == EP0_IN_STATUS_PHASE) {
1655 /*--------------------------------------*/
1657 nret = EP0_send_NULL(udc, true);
1662 spin_unlock(&udc->lock);
1663 nret = udc->driver->setup(&udc->gadget, &udc->ctrl);
1664 spin_lock(&udc->lock);
1668 udc->ep0state = EP0_IDLE;
1673 /*-------------------------------------------------------------------------*/
1674 static inline int _nbu2ss_ep0_in_data_stage(struct nbu2ss_udc *udc)
1677 struct nbu2ss_req *req;
1678 struct nbu2ss_ep *ep = &udc->ep[0];
1680 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1682 req = &udc->ep0_req;
1684 req->req.actual += req->div_len;
1687 nret = _nbu2ss_ep0_in_transfer(udc, req);
1689 udc->ep0state = EP0_OUT_STATUS_PAHSE;
1690 EP0_receive_NULL(udc, true);
1696 /*-------------------------------------------------------------------------*/
1697 static inline int _nbu2ss_ep0_out_data_stage(struct nbu2ss_udc *udc)
1700 struct nbu2ss_req *req;
1701 struct nbu2ss_ep *ep = &udc->ep[0];
1703 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1705 req = &udc->ep0_req;
1707 nret = _nbu2ss_ep0_out_transfer(udc, req);
1709 udc->ep0state = EP0_IN_STATUS_PHASE;
1710 EP0_send_NULL(udc, true);
1712 } else if (nret < 0) {
1713 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, EP0_BCLR);
1714 req->req.status = nret;
1720 /*-------------------------------------------------------------------------*/
1721 static inline int _nbu2ss_ep0_status_stage(struct nbu2ss_udc *udc)
1723 struct nbu2ss_req *req;
1724 struct nbu2ss_ep *ep = &udc->ep[0];
1726 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
1728 req = &udc->ep0_req;
1729 if (req->req.complete)
1730 req->req.complete(&ep->ep, &req->req);
1733 if (req->req.complete)
1734 _nbu2ss_ep_done(ep, req, 0);
1737 udc->ep0state = EP0_IDLE;
1742 /*-------------------------------------------------------------------------*/
1743 static inline void _nbu2ss_ep0_int(struct nbu2ss_udc *udc)
1750 status = _nbu2ss_readl(&udc->p_regs->EP0_STATUS);
1751 intr = status & EP0_STATUS_RW_BIT;
1752 _nbu2ss_writel(&udc->p_regs->EP0_STATUS, ~intr);
1754 status &= (SETUP_INT | EP0_IN_INT | EP0_OUT_INT
1755 | STG_END_INT | EP0_OUT_NULL_INT);
1758 dev_info(udc->dev, "%s Not Decode Interrupt\n", __func__);
1759 dev_info(udc->dev, "EP0_STATUS = 0x%08x\n", intr);
1763 if (udc->gadget.speed == USB_SPEED_UNKNOWN)
1764 udc->gadget.speed = _nbu2ss_get_speed(udc);
1766 for (i = 0; i < EP0_END_XFER; i++) {
1767 switch (udc->ep0state) {
1769 if (status & SETUP_INT) {
1771 nret = _nbu2ss_decode_request(udc);
1775 case EP0_IN_DATA_PHASE:
1776 if (status & EP0_IN_INT) {
1777 status &= ~EP0_IN_INT;
1778 nret = _nbu2ss_ep0_in_data_stage(udc);
1782 case EP0_OUT_DATA_PHASE:
1783 if (status & EP0_OUT_INT) {
1784 status &= ~EP0_OUT_INT;
1785 nret = _nbu2ss_ep0_out_data_stage(udc);
1789 case EP0_IN_STATUS_PHASE:
1790 if ((status & STG_END_INT) || (status & SETUP_INT)) {
1791 status &= ~(STG_END_INT | EP0_IN_INT);
1792 nret = _nbu2ss_ep0_status_stage(udc);
1796 case EP0_OUT_STATUS_PAHSE:
1797 if ((status & STG_END_INT) || (status & SETUP_INT) ||
1798 (status & EP0_OUT_NULL_INT)) {
1799 status &= ~(STG_END_INT
1801 | EP0_OUT_NULL_INT);
1803 nret = _nbu2ss_ep0_status_stage(udc);
1819 _nbu2ss_set_endpoint_stall(udc, 0, true);
1823 /*-------------------------------------------------------------------------*/
1824 static void _nbu2ss_ep_done(struct nbu2ss_ep *ep,
1825 struct nbu2ss_req *req,
1828 struct nbu2ss_udc *udc = ep->udc;
1830 list_del_init(&req->queue);
1832 if (status == -ECONNRESET)
1833 _nbu2ss_fifo_flush(udc, ep);
1835 if (likely(req->req.status == -EINPROGRESS))
1836 req->req.status = status;
1839 _nbu2ss_epn_set_stall(udc, ep);
1841 if (!list_empty(&ep->queue))
1842 _nbu2ss_restert_transfer(ep);
1846 if ((ep->direct == USB_DIR_OUT) && (ep->epnum > 0) &&
1847 (req->req.dma != 0))
1848 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_OUT);
1851 spin_unlock(&udc->lock);
1852 req->req.complete(&ep->ep, &req->req);
1853 spin_lock(&udc->lock);
1856 /*-------------------------------------------------------------------------*/
1857 static inline void _nbu2ss_epn_in_int(struct nbu2ss_udc *udc,
1858 struct nbu2ss_ep *ep,
1859 struct nbu2ss_req *req)
1864 struct fc_regs __iomem *preg = udc->p_regs;
1867 return; /* DMA is forwarded */
1869 req->req.actual += req->div_len;
1872 if (req->req.actual != req->req.length) {
1873 /*---------------------------------------------------------*/
1874 /* remainder of data */
1875 result = _nbu2ss_epn_in_transfer(udc, ep, req);
1878 if (req->zero && ((req->req.actual % ep->ep.maxpacket) == 0)) {
1880 _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_STATUS);
1882 if ((status & EPN_IN_FULL) == 0) {
1883 /*-----------------------------------------*/
1884 /* 0 Length Packet */
1886 _nbu2ss_zero_len_pkt(udc, ep->epnum);
1893 /*---------------------------------------------------------*/
1895 _nbu2ss_ep_done(ep, req, result);
1899 /*-------------------------------------------------------------------------*/
1900 static inline void _nbu2ss_epn_out_int(struct nbu2ss_udc *udc,
1901 struct nbu2ss_ep *ep,
1902 struct nbu2ss_req *req)
1906 result = _nbu2ss_epn_out_transfer(udc, ep, req);
1908 _nbu2ss_ep_done(ep, req, result);
1911 /*-------------------------------------------------------------------------*/
1912 static inline void _nbu2ss_epn_in_dma_int(struct nbu2ss_udc *udc,
1913 struct nbu2ss_ep *ep,
1914 struct nbu2ss_req *req)
1918 struct usb_request *preq;
1925 preq->actual += req->div_len;
1927 req->dma_flag = false;
1930 _nbu2ss_dma_unmap_single(udc, ep, req, USB_DIR_IN);
1933 if (preq->actual != preq->length) {
1934 _nbu2ss_epn_in_transfer(udc, ep, req);
1936 mpkt = ep->ep.maxpacket;
1937 size = preq->actual % mpkt;
1939 if (((preq->actual & 0x03) == 0) && (size < mpkt))
1940 _nbu2ss_ep_in_end(udc, ep->epnum, 0, 0);
1942 _nbu2ss_epn_in_int(udc, ep, req);
1947 /*-------------------------------------------------------------------------*/
1948 static inline void _nbu2ss_epn_out_dma_int(struct nbu2ss_udc *udc,
1949 struct nbu2ss_ep *ep,
1950 struct nbu2ss_req *req)
1954 u32 dmacnt, ep_dmacnt;
1956 struct fc_regs __iomem *preg = udc->p_regs;
1958 num = ep->epnum - 1;
1960 if (req->req.actual == req->req.length) {
1961 if ((req->req.length % ep->ep.maxpacket) && !req->zero) {
1963 req->dma_flag = false;
1964 _nbu2ss_ep_done(ep, req, 0);
1969 ep_dmacnt = _nbu2ss_readl(&preg->EP_REGS[num].EP_LEN_DCNT)
1973 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
1974 dmacnt = _nbu2ss_readl(&preg->EP_DCR[num].EP_DCR1)
1977 if (ep_dmacnt == dmacnt)
1981 _nbu2ss_bitclr(&preg->EP_DCR[num].EP_DCR1, DCR1_EPN_REQEN);
1984 mpkt = ep->ep.maxpacket;
1985 if ((req->div_len % mpkt) == 0)
1986 req->div_len -= mpkt * dmacnt;
1989 if ((req->req.actual % ep->ep.maxpacket) > 0) {
1990 if (req->req.actual == req->div_len) {
1992 req->dma_flag = false;
1993 _nbu2ss_ep_done(ep, req, 0);
1998 req->req.actual += req->div_len;
2000 req->dma_flag = false;
2002 _nbu2ss_epn_out_int(udc, ep, req);
2005 /*-------------------------------------------------------------------------*/
2006 static inline void _nbu2ss_epn_int(struct nbu2ss_udc *udc, u32 epnum)
2011 struct nbu2ss_req *req;
2012 struct nbu2ss_ep *ep = &udc->ep[epnum];
2016 /* Interrupt Status */
2017 status = _nbu2ss_readl(&udc->p_regs->EP_REGS[num].EP_STATUS);
2019 /* Interrupt Clear */
2020 _nbu2ss_writel(&udc->p_regs->EP_REGS[num].EP_STATUS, ~status);
2022 req = list_first_entry_or_null(&ep->queue, struct nbu2ss_req, queue);
2024 /* pr_warn("=== %s(%d) req == NULL\n", __func__, epnum); */
2028 if (status & EPN_OUT_END_INT) {
2029 status &= ~EPN_OUT_INT;
2030 _nbu2ss_epn_out_dma_int(udc, ep, req);
2033 if (status & EPN_OUT_INT)
2034 _nbu2ss_epn_out_int(udc, ep, req);
2036 if (status & EPN_IN_END_INT) {
2037 status &= ~EPN_IN_INT;
2038 _nbu2ss_epn_in_dma_int(udc, ep, req);
2041 if (status & EPN_IN_INT)
2042 _nbu2ss_epn_in_int(udc, ep, req);
2045 /*-------------------------------------------------------------------------*/
2046 static inline void _nbu2ss_ep_int(struct nbu2ss_udc *udc, u32 epnum)
2049 _nbu2ss_ep0_int(udc);
2051 _nbu2ss_epn_int(udc, epnum);
2054 /*-------------------------------------------------------------------------*/
2055 static void _nbu2ss_ep0_enable(struct nbu2ss_udc *udc)
2057 _nbu2ss_bitset(&udc->p_regs->EP0_CONTROL, (EP0_AUTO | EP0_BCLR));
2058 _nbu2ss_writel(&udc->p_regs->EP0_INT_ENA, EP0_INT_EN_BIT);
2061 /*-------------------------------------------------------------------------*/
2062 static int _nbu2ss_nuke(struct nbu2ss_udc *udc,
2063 struct nbu2ss_ep *ep,
2066 struct nbu2ss_req *req;
2068 /* Endpoint Disable */
2069 _nbu2ss_epn_exit(udc, ep);
2072 _nbu2ss_ep_dma_exit(udc, ep);
2074 if (list_empty(&ep->queue))
2077 /* called with irqs blocked */
2078 list_for_each_entry(req, &ep->queue, queue) {
2079 _nbu2ss_ep_done(ep, req, status);
2085 /*-------------------------------------------------------------------------*/
2086 static void _nbu2ss_quiesce(struct nbu2ss_udc *udc)
2088 struct nbu2ss_ep *ep;
2090 udc->gadget.speed = USB_SPEED_UNKNOWN;
2092 _nbu2ss_nuke(udc, &udc->ep[0], -ESHUTDOWN);
2095 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
2096 _nbu2ss_nuke(udc, ep, -ESHUTDOWN);
2100 /*-------------------------------------------------------------------------*/
2101 static int _nbu2ss_pullup(struct nbu2ss_udc *udc, int is_on)
2105 if (udc->vbus_active == 0)
2111 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL)
2112 | PUE2) & ~(u32)CONNECTB;
2114 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2119 reg_dt = (_nbu2ss_readl(&udc->p_regs->USB_CONTROL) | CONNECTB)
2122 _nbu2ss_writel(&udc->p_regs->USB_CONTROL, reg_dt);
2123 udc->gadget.speed = USB_SPEED_UNKNOWN;
2129 /*-------------------------------------------------------------------------*/
2130 static void _nbu2ss_fifo_flush(struct nbu2ss_udc *udc, struct nbu2ss_ep *ep)
2132 struct fc_regs __iomem *p = udc->p_regs;
2134 if (udc->vbus_active == 0)
2137 if (ep->epnum == 0) {
2139 _nbu2ss_bitset(&p->EP0_CONTROL, EP0_BCLR);
2143 _nbu2ss_ep_dma_abort(udc, ep);
2144 _nbu2ss_bitset(&p->EP_REGS[ep->epnum - 1].EP_CONTROL, EPN_BCLR);
2148 /*-------------------------------------------------------------------------*/
2149 static int _nbu2ss_enable_controller(struct nbu2ss_udc *udc)
2153 if (udc->udc_enabled)
2157 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2158 udelay(EPC_RST_DISABLE_TIME); /* 1us wait */
2160 _nbu2ss_bitclr(&udc->p_regs->EPCTR, DIRPD);
2161 mdelay(EPC_DIRPD_DISABLE_TIME); /* 1ms wait */
2163 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2165 _nbu2ss_writel(&udc->p_regs->AHBSCTR, WAIT_MODE);
2167 _nbu2ss_writel(&udc->p_regs->AHBMCTR,
2168 HBUSREQ_MODE | HTRANS_MODE | WBURST_TYPE);
2170 while (!(_nbu2ss_readl(&udc->p_regs->EPCTR) & PLL_LOCK)) {
2172 udelay(1); /* 1us wait */
2173 if (waitcnt == EPC_PLL_LOCK_COUNT) {
2174 dev_err(udc->dev, "*** Reset Cancel failed\n");
2179 _nbu2ss_bitset(&udc->p_regs->UTMI_CHARACTER_1, USB_SQUSET);
2181 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, (INT_SEL | SOF_RCV));
2184 _nbu2ss_ep0_enable(udc);
2186 /* USB Interrupt Enable */
2187 _nbu2ss_bitset(&udc->p_regs->USB_INT_ENA, USB_INT_EN_BIT);
2189 udc->udc_enabled = true;
2194 /*-------------------------------------------------------------------------*/
2195 static void _nbu2ss_reset_controller(struct nbu2ss_udc *udc)
2197 _nbu2ss_bitset(&udc->p_regs->EPCTR, EPC_RST);
2198 _nbu2ss_bitclr(&udc->p_regs->EPCTR, EPC_RST);
2201 /*-------------------------------------------------------------------------*/
2202 static void _nbu2ss_disable_controller(struct nbu2ss_udc *udc)
2204 if (udc->udc_enabled) {
2205 udc->udc_enabled = false;
2206 _nbu2ss_reset_controller(udc);
2207 _nbu2ss_bitset(&udc->p_regs->EPCTR, (DIRPD | EPC_RST));
2211 /*-------------------------------------------------------------------------*/
2212 static inline void _nbu2ss_check_vbus(struct nbu2ss_udc *udc)
2218 mdelay(VBUS_CHATTERING_MDELAY); /* wait (ms) */
2221 reg_dt = gpiod_get_value(vbus_gpio);
2223 udc->linux_suspended = 0;
2225 _nbu2ss_reset_controller(udc);
2226 dev_info(udc->dev, " ----- VBUS OFF\n");
2228 if (udc->vbus_active == 1) {
2230 udc->vbus_active = 0;
2231 if (udc->usb_suspended) {
2232 udc->usb_suspended = 0;
2233 /* _nbu2ss_reset_controller(udc); */
2235 udc->devstate = USB_STATE_NOTATTACHED;
2237 _nbu2ss_quiesce(udc);
2239 spin_unlock(&udc->lock);
2240 udc->driver->disconnect(&udc->gadget);
2241 spin_lock(&udc->lock);
2244 _nbu2ss_disable_controller(udc);
2247 mdelay(5); /* wait (5ms) */
2248 reg_dt = gpiod_get_value(vbus_gpio);
2252 dev_info(udc->dev, " ----- VBUS ON\n");
2254 if (udc->linux_suspended)
2257 if (udc->vbus_active == 0) {
2259 udc->vbus_active = 1;
2260 udc->devstate = USB_STATE_POWERED;
2262 nret = _nbu2ss_enable_controller(udc);
2264 _nbu2ss_disable_controller(udc);
2265 udc->vbus_active = 0;
2269 _nbu2ss_pullup(udc, 1);
2271 #ifdef UDC_DEBUG_DUMP
2272 _nbu2ss_dump_register(udc);
2273 #endif /* UDC_DEBUG_DUMP */
2276 if (udc->devstate == USB_STATE_POWERED)
2277 _nbu2ss_pullup(udc, 1);
2282 /*-------------------------------------------------------------------------*/
2283 static inline void _nbu2ss_int_bus_reset(struct nbu2ss_udc *udc)
2285 udc->devstate = USB_STATE_DEFAULT;
2286 udc->remote_wakeup = 0;
2288 _nbu2ss_quiesce(udc);
2290 udc->ep0state = EP0_IDLE;
2293 /*-------------------------------------------------------------------------*/
2294 static inline void _nbu2ss_int_usb_resume(struct nbu2ss_udc *udc)
2296 if (udc->usb_suspended == 1) {
2297 udc->usb_suspended = 0;
2298 if (udc->driver && udc->driver->resume) {
2299 spin_unlock(&udc->lock);
2300 udc->driver->resume(&udc->gadget);
2301 spin_lock(&udc->lock);
2306 /*-------------------------------------------------------------------------*/
2307 static inline void _nbu2ss_int_usb_suspend(struct nbu2ss_udc *udc)
2311 if (udc->usb_suspended == 0) {
2312 reg_dt = gpiod_get_value(vbus_gpio);
2317 udc->usb_suspended = 1;
2318 if (udc->driver && udc->driver->suspend) {
2319 spin_unlock(&udc->lock);
2320 udc->driver->suspend(&udc->gadget);
2321 spin_lock(&udc->lock);
2324 _nbu2ss_bitset(&udc->p_regs->USB_CONTROL, SUSPEND);
2328 /*-------------------------------------------------------------------------*/
2329 /* VBUS (GPIO153) Interrupt */
2330 static irqreturn_t _nbu2ss_vbus_irq(int irq, void *_udc)
2332 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2334 spin_lock(&udc->lock);
2335 _nbu2ss_check_vbus(udc);
2336 spin_unlock(&udc->lock);
2341 /*-------------------------------------------------------------------------*/
2342 /* Interrupt (udc) */
2343 static irqreturn_t _nbu2ss_udc_irq(int irq, void *_udc)
2345 u8 suspend_flag = 0;
2349 struct nbu2ss_udc *udc = (struct nbu2ss_udc *)_udc;
2350 struct fc_regs __iomem *preg = udc->p_regs;
2352 if (gpiod_get_value(vbus_gpio) == 0) {
2353 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2354 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2358 spin_lock(&udc->lock);
2361 if (gpiod_get_value(vbus_gpio) == 0) {
2362 _nbu2ss_writel(&preg->USB_INT_STA, ~USB_INT_STA_RW);
2363 _nbu2ss_writel(&preg->USB_INT_ENA, 0);
2366 status = _nbu2ss_readl(&preg->USB_INT_STA);
2372 _nbu2ss_writel(&preg->USB_INT_STA, ~(status & USB_INT_STA_RW));
2374 if (status & USB_RST_INT) {
2376 _nbu2ss_int_bus_reset(udc);
2379 if (status & RSUM_INT) {
2381 _nbu2ss_int_usb_resume(udc);
2384 if (status & SPND_INT) {
2389 if (status & EPN_INT) {
2391 int_bit = status >> 8;
2393 for (epnum = 0; epnum < NUM_ENDPOINTS; epnum++) {
2395 _nbu2ss_ep_int(udc, epnum);
2406 _nbu2ss_int_usb_suspend(udc);
2408 spin_unlock(&udc->lock);
2413 /*-------------------------------------------------------------------------*/
2415 static int nbu2ss_ep_enable(struct usb_ep *_ep,
2416 const struct usb_endpoint_descriptor *desc)
2419 unsigned long flags;
2421 struct nbu2ss_ep *ep;
2422 struct nbu2ss_udc *udc;
2424 if (!_ep || !desc) {
2425 pr_err(" *** %s, bad param\n", __func__);
2429 ep = container_of(_ep, struct nbu2ss_ep, ep);
2431 pr_err(" *** %s, ep == NULL !!\n", __func__);
2435 ep_type = usb_endpoint_type(desc);
2436 if ((ep_type == USB_ENDPOINT_XFER_CONTROL) ||
2437 (ep_type == USB_ENDPOINT_XFER_ISOC)) {
2438 pr_err(" *** %s, bat bmAttributes\n", __func__);
2443 if (udc->vbus_active == 0)
2446 if ((!udc->driver) || (udc->gadget.speed == USB_SPEED_UNKNOWN)) {
2447 dev_err(ep->udc->dev, " *** %s, udc !!\n", __func__);
2451 spin_lock_irqsave(&udc->lock, flags);
2454 ep->epnum = usb_endpoint_num(desc);
2455 ep->direct = desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK;
2456 ep->ep_type = ep_type;
2459 ep->stalled = false;
2461 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
2464 _nbu2ss_ep_dma_init(udc, ep);
2466 /* Endpoint setting */
2467 _nbu2ss_ep_init(udc, ep);
2469 spin_unlock_irqrestore(&udc->lock, flags);
2474 /*-------------------------------------------------------------------------*/
2475 static int nbu2ss_ep_disable(struct usb_ep *_ep)
2477 struct nbu2ss_ep *ep;
2478 struct nbu2ss_udc *udc;
2479 unsigned long flags;
2482 pr_err(" *** %s, bad param\n", __func__);
2486 ep = container_of(_ep, struct nbu2ss_ep, ep);
2488 pr_err("udc: *** %s, ep == NULL !!\n", __func__);
2493 if (udc->vbus_active == 0)
2496 spin_lock_irqsave(&udc->lock, flags);
2497 _nbu2ss_nuke(udc, ep, -EINPROGRESS); /* dequeue request */
2498 spin_unlock_irqrestore(&udc->lock, flags);
2503 /*-------------------------------------------------------------------------*/
2504 static struct usb_request *nbu2ss_ep_alloc_request(struct usb_ep *ep,
2507 struct nbu2ss_req *req;
2509 req = kzalloc(sizeof(*req), gfp_flags);
2514 req->req.dma = DMA_ADDR_INVALID;
2516 INIT_LIST_HEAD(&req->queue);
2521 /*-------------------------------------------------------------------------*/
2522 static void nbu2ss_ep_free_request(struct usb_ep *_ep,
2523 struct usb_request *_req)
2525 struct nbu2ss_req *req;
2528 req = container_of(_req, struct nbu2ss_req, req);
2534 /*-------------------------------------------------------------------------*/
2535 static int nbu2ss_ep_queue(struct usb_ep *_ep,
2536 struct usb_request *_req, gfp_t gfp_flags)
2538 struct nbu2ss_req *req;
2539 struct nbu2ss_ep *ep;
2540 struct nbu2ss_udc *udc;
2541 unsigned long flags;
2543 int result = -EINVAL;
2545 /* catch various bogus parameters */
2546 if (!_ep || !_req) {
2548 pr_err("udc: %s --- _ep == NULL\n", __func__);
2551 pr_err("udc: %s --- _req == NULL\n", __func__);
2556 req = container_of(_req, struct nbu2ss_req, req);
2557 if (unlikely(!_req->complete ||
2559 !list_empty(&req->queue))) {
2560 if (!_req->complete)
2561 pr_err("udc: %s --- !_req->complete\n", __func__);
2564 pr_err("udc:%s --- !_req->buf\n", __func__);
2566 if (!list_empty(&req->queue))
2567 pr_err("%s --- !list_empty(&req->queue)\n", __func__);
2572 ep = container_of(_ep, struct nbu2ss_ep, ep);
2575 if (udc->vbus_active == 0) {
2576 dev_info(udc->dev, "Can't ep_queue (VBUS OFF)\n");
2580 if (unlikely(!udc->driver)) {
2581 dev_err(udc->dev, "%s, bogus device state %p\n", __func__,
2586 spin_lock_irqsave(&udc->lock, flags);
2589 if ((uintptr_t)req->req.buf & 0x3)
2590 req->unaligned = true;
2592 req->unaligned = false;
2594 if (req->unaligned) {
2596 ep->virt_buf = dma_alloc_coherent(NULL, PAGE_SIZE,
2598 GFP_ATOMIC | GFP_DMA);
2599 if (ep->epnum > 0) {
2600 if (ep->direct == USB_DIR_IN)
2601 memcpy(ep->virt_buf, req->req.buf,
2606 if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT) &&
2607 (req->req.dma != 0))
2608 _nbu2ss_dma_map_single(udc, ep, req, USB_DIR_OUT);
2611 _req->status = -EINPROGRESS;
2614 bflag = list_empty(&ep->queue);
2615 list_add_tail(&req->queue, &ep->queue);
2617 if (bflag && !ep->stalled) {
2618 result = _nbu2ss_start_transfer(udc, ep, req, false);
2620 dev_err(udc->dev, " *** %s, result = %d\n", __func__,
2622 list_del(&req->queue);
2623 } else if ((ep->epnum > 0) && (ep->direct == USB_DIR_OUT)) {
2625 if (req->req.length < 4 &&
2626 req->req.length == req->req.actual)
2628 if (req->req.length == req->req.actual)
2630 _nbu2ss_ep_done(ep, req, result);
2634 spin_unlock_irqrestore(&udc->lock, flags);
2639 /*-------------------------------------------------------------------------*/
2640 static int nbu2ss_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
2642 struct nbu2ss_req *req;
2643 struct nbu2ss_ep *ep;
2644 struct nbu2ss_udc *udc;
2645 unsigned long flags;
2647 /* catch various bogus parameters */
2648 if (!_ep || !_req) {
2649 /* pr_err("%s, bad param(1)\n", __func__); */
2653 ep = container_of(_ep, struct nbu2ss_ep, ep);
2659 spin_lock_irqsave(&udc->lock, flags);
2661 /* make sure it's actually queued on this endpoint */
2662 list_for_each_entry(req, &ep->queue, queue) {
2663 if (&req->req == _req) {
2664 _nbu2ss_ep_done(ep, req, -ECONNRESET);
2665 spin_unlock_irqrestore(&udc->lock, flags);
2670 spin_unlock_irqrestore(&udc->lock, flags);
2672 pr_debug("%s no queue(EINVAL)\n", __func__);
2677 /*-------------------------------------------------------------------------*/
2678 static int nbu2ss_ep_set_halt(struct usb_ep *_ep, int value)
2681 unsigned long flags;
2683 struct nbu2ss_ep *ep;
2684 struct nbu2ss_udc *udc;
2687 pr_err("%s, bad param\n", __func__);
2691 ep = container_of(_ep, struct nbu2ss_ep, ep);
2695 dev_err(ep->udc->dev, " *** %s, bad udc\n", __func__);
2699 spin_lock_irqsave(&udc->lock, flags);
2701 ep_adrs = ep->epnum | ep->direct;
2703 _nbu2ss_set_endpoint_stall(udc, ep_adrs, value);
2704 ep->stalled = false;
2706 if (list_empty(&ep->queue))
2707 _nbu2ss_epn_set_stall(udc, ep);
2715 spin_unlock_irqrestore(&udc->lock, flags);
2720 static int nbu2ss_ep_set_wedge(struct usb_ep *_ep)
2722 return nbu2ss_ep_set_halt(_ep, 1);
2725 /*-------------------------------------------------------------------------*/
2726 static int nbu2ss_ep_fifo_status(struct usb_ep *_ep)
2729 struct nbu2ss_ep *ep;
2730 struct nbu2ss_udc *udc;
2731 unsigned long flags;
2732 struct fc_regs __iomem *preg;
2735 pr_err("%s, bad param\n", __func__);
2739 ep = container_of(_ep, struct nbu2ss_ep, ep);
2743 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2749 data = gpiod_get_value(vbus_gpio);
2753 spin_lock_irqsave(&udc->lock, flags);
2755 if (ep->epnum == 0) {
2756 data = _nbu2ss_readl(&preg->EP0_LENGTH) & EP0_LDATA;
2759 data = _nbu2ss_readl(&preg->EP_REGS[ep->epnum - 1].EP_LEN_DCNT)
2763 spin_unlock_irqrestore(&udc->lock, flags);
2768 /*-------------------------------------------------------------------------*/
2769 static void nbu2ss_ep_fifo_flush(struct usb_ep *_ep)
2772 struct nbu2ss_ep *ep;
2773 struct nbu2ss_udc *udc;
2774 unsigned long flags;
2777 pr_err("udc: %s, bad param\n", __func__);
2781 ep = container_of(_ep, struct nbu2ss_ep, ep);
2785 dev_err(ep->udc->dev, "%s, bad udc\n", __func__);
2789 data = gpiod_get_value(vbus_gpio);
2793 spin_lock_irqsave(&udc->lock, flags);
2794 _nbu2ss_fifo_flush(udc, ep);
2795 spin_unlock_irqrestore(&udc->lock, flags);
2798 /*-------------------------------------------------------------------------*/
2799 static const struct usb_ep_ops nbu2ss_ep_ops = {
2800 .enable = nbu2ss_ep_enable,
2801 .disable = nbu2ss_ep_disable,
2803 .alloc_request = nbu2ss_ep_alloc_request,
2804 .free_request = nbu2ss_ep_free_request,
2806 .queue = nbu2ss_ep_queue,
2807 .dequeue = nbu2ss_ep_dequeue,
2809 .set_halt = nbu2ss_ep_set_halt,
2810 .set_wedge = nbu2ss_ep_set_wedge,
2812 .fifo_status = nbu2ss_ep_fifo_status,
2813 .fifo_flush = nbu2ss_ep_fifo_flush,
2816 /*-------------------------------------------------------------------------*/
2817 /* usb_gadget_ops */
2819 /*-------------------------------------------------------------------------*/
2820 static int nbu2ss_gad_get_frame(struct usb_gadget *pgadget)
2823 struct nbu2ss_udc *udc;
2826 pr_err("udc: %s, bad param\n", __func__);
2830 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2831 data = gpiod_get_value(vbus_gpio);
2835 return _nbu2ss_readl(&udc->p_regs->USB_ADDRESS) & FRAME;
2838 /*-------------------------------------------------------------------------*/
2839 static int nbu2ss_gad_wakeup(struct usb_gadget *pgadget)
2844 struct nbu2ss_udc *udc;
2847 pr_err("%s, bad param\n", __func__);
2851 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2853 data = gpiod_get_value(vbus_gpio);
2855 dev_warn(&pgadget->dev, "VBUS LEVEL = %d\n", data);
2859 _nbu2ss_bitset(&udc->p_regs->EPCTR, PLL_RESUME);
2861 for (i = 0; i < EPC_PLL_LOCK_COUNT; i++) {
2862 data = _nbu2ss_readl(&udc->p_regs->EPCTR);
2864 if (data & PLL_LOCK)
2868 _nbu2ss_bitclr(&udc->p_regs->EPCTR, PLL_RESUME);
2873 /*-------------------------------------------------------------------------*/
2874 static int nbu2ss_gad_set_selfpowered(struct usb_gadget *pgadget,
2877 struct nbu2ss_udc *udc;
2878 unsigned long flags;
2881 pr_err("%s, bad param\n", __func__);
2885 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2887 spin_lock_irqsave(&udc->lock, flags);
2888 pgadget->is_selfpowered = (is_selfpowered != 0);
2889 spin_unlock_irqrestore(&udc->lock, flags);
2894 /*-------------------------------------------------------------------------*/
2895 static int nbu2ss_gad_vbus_session(struct usb_gadget *pgadget, int is_active)
2900 /*-------------------------------------------------------------------------*/
2901 static int nbu2ss_gad_vbus_draw(struct usb_gadget *pgadget, unsigned int mA)
2903 struct nbu2ss_udc *udc;
2904 unsigned long flags;
2907 pr_err("%s, bad param\n", __func__);
2911 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2913 spin_lock_irqsave(&udc->lock, flags);
2915 spin_unlock_irqrestore(&udc->lock, flags);
2920 /*-------------------------------------------------------------------------*/
2921 static int nbu2ss_gad_pullup(struct usb_gadget *pgadget, int is_on)
2923 struct nbu2ss_udc *udc;
2924 unsigned long flags;
2927 pr_err("%s, bad param\n", __func__);
2931 udc = container_of(pgadget, struct nbu2ss_udc, gadget);
2934 pr_warn("%s, Not Regist Driver\n", __func__);
2938 if (udc->vbus_active == 0)
2941 spin_lock_irqsave(&udc->lock, flags);
2942 _nbu2ss_pullup(udc, is_on);
2943 spin_unlock_irqrestore(&udc->lock, flags);
2948 /*-------------------------------------------------------------------------*/
2949 static int nbu2ss_gad_ioctl(struct usb_gadget *pgadget,
2950 unsigned int code, unsigned long param)
2955 static const struct usb_gadget_ops nbu2ss_gadget_ops = {
2956 .get_frame = nbu2ss_gad_get_frame,
2957 .wakeup = nbu2ss_gad_wakeup,
2958 .set_selfpowered = nbu2ss_gad_set_selfpowered,
2959 .vbus_session = nbu2ss_gad_vbus_session,
2960 .vbus_draw = nbu2ss_gad_vbus_draw,
2961 .pullup = nbu2ss_gad_pullup,
2962 .ioctl = nbu2ss_gad_ioctl,
2965 static const struct {
2967 const struct usb_ep_caps caps;
2968 } ep_info[NUM_ENDPOINTS] = {
2969 #define EP_INFO(_name, _caps) \
2976 USB_EP_CAPS(USB_EP_CAPS_TYPE_CONTROL, USB_EP_CAPS_DIR_ALL)),
2978 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
2980 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
2981 EP_INFO("ep3in-int",
2982 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
2984 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
2986 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
2988 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
2990 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
2991 EP_INFO("ep8in-int",
2992 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
2994 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
2996 USB_EP_CAPS(USB_EP_CAPS_TYPE_ISO, USB_EP_CAPS_DIR_ALL)),
2998 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3000 USB_EP_CAPS(USB_EP_CAPS_TYPE_BULK, USB_EP_CAPS_DIR_ALL)),
3001 EP_INFO("epdin-int",
3002 USB_EP_CAPS(USB_EP_CAPS_TYPE_INT, USB_EP_CAPS_DIR_IN)),
3007 /*-------------------------------------------------------------------------*/
3008 static void nbu2ss_drv_ep_init(struct nbu2ss_udc *udc)
3012 INIT_LIST_HEAD(&udc->gadget.ep_list);
3013 udc->gadget.ep0 = &udc->ep[0].ep;
3015 for (i = 0; i < NUM_ENDPOINTS; i++) {
3016 struct nbu2ss_ep *ep = &udc->ep[i];
3021 ep->ep.driver_data = NULL;
3022 ep->ep.name = ep_info[i].name;
3023 ep->ep.caps = ep_info[i].caps;
3024 ep->ep.ops = &nbu2ss_ep_ops;
3026 usb_ep_set_maxpacket_limit(&ep->ep,
3027 i == 0 ? EP0_PACKETSIZE
3030 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
3031 INIT_LIST_HEAD(&ep->queue);
3034 list_del_init(&udc->ep[0].ep.ep_list);
3037 /*-------------------------------------------------------------------------*/
3038 /* platform_driver */
3039 static int nbu2ss_drv_contest_init(struct platform_device *pdev,
3040 struct nbu2ss_udc *udc)
3042 spin_lock_init(&udc->lock);
3043 udc->dev = &pdev->dev;
3045 udc->gadget.is_selfpowered = 1;
3046 udc->devstate = USB_STATE_NOTATTACHED;
3050 udc->pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
3053 nbu2ss_drv_ep_init(udc);
3056 udc->gadget.ops = &nbu2ss_gadget_ops;
3057 udc->gadget.ep0 = &udc->ep[0].ep;
3058 udc->gadget.speed = USB_SPEED_UNKNOWN;
3059 udc->gadget.name = driver_name;
3060 /* udc->gadget.is_dualspeed = 1; */
3062 device_initialize(&udc->gadget.dev);
3064 dev_set_name(&udc->gadget.dev, "gadget");
3065 udc->gadget.dev.parent = &pdev->dev;
3066 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
3072 * probe - binds to the platform device
3074 static int nbu2ss_drv_probe(struct platform_device *pdev)
3076 int status = -ENODEV;
3077 struct nbu2ss_udc *udc;
3079 void __iomem *mmio_base;
3081 udc = &udc_controller;
3082 memset(udc, 0, sizeof(struct nbu2ss_udc));
3084 platform_set_drvdata(pdev, udc);
3086 /* require I/O memory and IRQ to be provided as resources */
3087 mmio_base = devm_platform_ioremap_resource(pdev, 0);
3088 if (IS_ERR(mmio_base))
3089 return PTR_ERR(mmio_base);
3091 irq = platform_get_irq(pdev, 0);
3094 status = devm_request_irq(&pdev->dev, irq, _nbu2ss_udc_irq,
3095 0, driver_name, udc);
3098 udc->p_regs = (struct fc_regs __iomem *)mmio_base;
3100 /* USB Function Controller Interrupt */
3102 dev_err(udc->dev, "request_irq(USB_UDC_IRQ_1) failed\n");
3106 /* Driver Initialization */
3107 status = nbu2ss_drv_contest_init(pdev, udc);
3113 /* VBUS Interrupt */
3114 vbus_irq = gpiod_to_irq(vbus_gpio);
3115 irq_set_irq_type(vbus_irq, IRQ_TYPE_EDGE_BOTH);
3116 status = request_irq(vbus_irq,
3117 _nbu2ss_vbus_irq, IRQF_SHARED, driver_name, udc);
3120 dev_err(udc->dev, "request_irq(vbus_irq) failed\n");
3127 /*-------------------------------------------------------------------------*/
3128 static void nbu2ss_drv_shutdown(struct platform_device *pdev)
3130 struct nbu2ss_udc *udc;
3132 udc = platform_get_drvdata(pdev);
3136 _nbu2ss_disable_controller(udc);
3139 /*-------------------------------------------------------------------------*/
3140 static int nbu2ss_drv_remove(struct platform_device *pdev)
3142 struct nbu2ss_udc *udc;
3143 struct nbu2ss_ep *ep;
3146 udc = &udc_controller;
3148 for (i = 0; i < NUM_ENDPOINTS; i++) {
3151 dma_free_coherent(NULL, PAGE_SIZE, (void *)ep->virt_buf,
3155 /* Interrupt Handler - Release */
3156 free_irq(vbus_irq, udc);
3161 /*-------------------------------------------------------------------------*/
3162 static int nbu2ss_drv_suspend(struct platform_device *pdev, pm_message_t state)
3164 struct nbu2ss_udc *udc;
3166 udc = platform_get_drvdata(pdev);
3170 if (udc->vbus_active) {
3171 udc->vbus_active = 0;
3172 udc->devstate = USB_STATE_NOTATTACHED;
3173 udc->linux_suspended = 1;
3175 if (udc->usb_suspended) {
3176 udc->usb_suspended = 0;
3177 _nbu2ss_reset_controller(udc);
3180 _nbu2ss_quiesce(udc);
3182 _nbu2ss_disable_controller(udc);
3187 /*-------------------------------------------------------------------------*/
3188 static int nbu2ss_drv_resume(struct platform_device *pdev)
3191 struct nbu2ss_udc *udc;
3193 udc = platform_get_drvdata(pdev);
3197 data = gpiod_get_value(vbus_gpio);
3199 udc->vbus_active = 1;
3200 udc->devstate = USB_STATE_POWERED;
3201 _nbu2ss_enable_controller(udc);
3202 _nbu2ss_pullup(udc, 1);
3205 udc->linux_suspended = 0;
3210 static struct platform_driver udc_driver = {
3211 .probe = nbu2ss_drv_probe,
3212 .shutdown = nbu2ss_drv_shutdown,
3213 .remove = nbu2ss_drv_remove,
3214 .suspend = nbu2ss_drv_suspend,
3215 .resume = nbu2ss_drv_resume,
3217 .name = driver_name,
3221 module_platform_driver(udc_driver);
3223 MODULE_DESCRIPTION(DRIVER_DESC);
3224 MODULE_AUTHOR("Renesas Electronics Corporation");
3225 MODULE_LICENSE("GPL");