1 // SPDX-License-Identifier: GPL-2.0+
3 * FB driver for the ST7735R LCD Controller
5 * Copyright (C) 2013 Noralf Tronnes
8 #include <linux/module.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <video/mipi_display.h>
15 #define DRVNAME "fb_st7735r"
16 #define DEFAULT_GAMMA "0F 1A 0F 18 2F 28 20 22 1F 1B 23 37 00 07 02 10\n" \
17 "0F 1B 0F 17 33 2C 29 2E 30 30 39 3F 00 07 03 10"
19 static const s16 default_init_sequence[] = {
20 -1, MIPI_DCS_SOFT_RESET,
23 -1, MIPI_DCS_EXIT_SLEEP_MODE,
26 /* FRMCTR1 - frame rate control: normal mode
27 * frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D)
29 -1, 0xB1, 0x01, 0x2C, 0x2D,
31 /* FRMCTR2 - frame rate control: idle mode
32 * frame rate = fosc / (1 x 2 + 40) * (LINE + 2C + 2D)
34 -1, 0xB2, 0x01, 0x2C, 0x2D,
36 /* FRMCTR3 - frame rate control - partial mode
37 * dot inversion mode, line inversion mode
39 -1, 0xB3, 0x01, 0x2C, 0x2D, 0x01, 0x2C, 0x2D,
41 /* INVCTR - display inversion control
46 /* PWCTR1 - Power Control
49 -1, 0xC0, 0xA2, 0x02, 0x84,
51 /* PWCTR2 - Power Control
52 * VGH25 = 2.4C VGSEL = -10 VGH = 3 * AVDD
56 /* PWCTR3 - Power Control
57 * Opamp current small, Boost frequency
61 /* PWCTR4 - Power Control
62 * BCLK/2, Opamp current small & Medium low
66 /* PWCTR5 - Power Control */
69 /* VMCTR1 - Power Control */
72 -1, MIPI_DCS_EXIT_INVERT_MODE,
74 -1, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT,
76 -1, MIPI_DCS_SET_DISPLAY_ON,
79 -1, MIPI_DCS_ENTER_NORMAL_MODE,
86 static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
88 write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
89 xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
91 write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
92 ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
94 write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
100 static int set_var(struct fbtft_par *par)
102 /* MADCTL - Memory data access control
104 * 1. Mode selection pin SRGB
105 * RGB H/W pin for color filter setting: 0=RGB, 1=BGR
107 * RGB-BGR ORDER color filter panel: 0=RGB, 1=BGR
109 switch (par->info->var.rotate) {
111 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
112 MX | MY | (par->bgr << 3));
115 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
116 MY | MV | (par->bgr << 3));
119 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
123 write_reg(par, MIPI_DCS_SET_ADDRESS_MODE,
124 MX | MV | (par->bgr << 3));
132 * Gamma string format:
133 * VRF0P VOS0P PK0P PK1P PK2P PK3P PK4P PK5P PK6P PK7P PK8P PK9P SELV0P SELV1P SELV62P SELV63P
134 * VRF0N VOS0N PK0N PK1N PK2N PK3N PK4N PK5N PK6N PK7N PK8N PK9N SELV0N SELV1N SELV62N SELV63N
136 #define CURVE(num, idx) curves[(num) * par->gamma.num_values + (idx)]
137 static int set_gamma(struct fbtft_par *par, u32 *curves)
142 for (i = 0; i < par->gamma.num_curves; i++)
143 for (j = 0; j < par->gamma.num_values; j++)
146 for (i = 0; i < par->gamma.num_curves; i++)
147 write_reg(par, 0xE0 + i,
148 CURVE(i, 0), CURVE(i, 1),
149 CURVE(i, 2), CURVE(i, 3),
150 CURVE(i, 4), CURVE(i, 5),
151 CURVE(i, 6), CURVE(i, 7),
152 CURVE(i, 8), CURVE(i, 9),
153 CURVE(i, 10), CURVE(i, 11),
154 CURVE(i, 12), CURVE(i, 13),
155 CURVE(i, 14), CURVE(i, 15));
162 static struct fbtft_display display = {
166 .init_sequence = default_init_sequence,
169 .gamma = DEFAULT_GAMMA,
171 .set_addr_win = set_addr_win,
173 .set_gamma = set_gamma,
177 FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7735r", &display);
179 MODULE_ALIAS("spi:" DRVNAME);
180 MODULE_ALIAS("platform:" DRVNAME);
181 MODULE_ALIAS("spi:st7735r");
182 MODULE_ALIAS("platform:st7735r");
184 MODULE_DESCRIPTION("FB driver for the ST7735R LCD Controller");
185 MODULE_AUTHOR("Noralf Tronnes");
186 MODULE_LICENSE("GPL");