1 /* SPDX-License-Identifier: BSD-3-Clause */
3 * Copyright (c) 2015-2016 Google Inc.
6 * This is a special protocol for configuring communication over the
7 * I2S bus between the DSP on the MSM8994 and APBridgeA. Therefore,
8 * we can predefine several low-level attributes of the communication
9 * because we know that they are supported. In particular, the following
10 * assumptions are made:
11 * - there are two channels (i.e., stereo)
12 * - the low-level protocol is I2S as defined by Philips/NXP
13 * - the DSP on the MSM8994 is the clock master for MCLK, BCLK, and WCLK
14 * - WCLK changes on the falling edge of BCLK
15 * - WCLK low for left channel; high for right channel
16 * - TX data is sent on the falling edge of BCLK
17 * - RX data is received/latched on the rising edge of BCLK
20 #ifndef __AUDIO_APBRIDGEA_H
21 #define __AUDIO_APBRIDGEA_H
23 #define AUDIO_APBRIDGEA_TYPE_SET_CONFIG 0x01
24 #define AUDIO_APBRIDGEA_TYPE_REGISTER_CPORT 0x02
25 #define AUDIO_APBRIDGEA_TYPE_UNREGISTER_CPORT 0x03
26 #define AUDIO_APBRIDGEA_TYPE_SET_TX_DATA_SIZE 0x04
28 #define AUDIO_APBRIDGEA_TYPE_PREPARE_TX 0x06
29 #define AUDIO_APBRIDGEA_TYPE_START_TX 0x07
30 #define AUDIO_APBRIDGEA_TYPE_STOP_TX 0x08
31 #define AUDIO_APBRIDGEA_TYPE_SHUTDOWN_TX 0x09
32 #define AUDIO_APBRIDGEA_TYPE_SET_RX_DATA_SIZE 0x0a
34 #define AUDIO_APBRIDGEA_TYPE_PREPARE_RX 0x0c
35 #define AUDIO_APBRIDGEA_TYPE_START_RX 0x0d
36 #define AUDIO_APBRIDGEA_TYPE_STOP_RX 0x0e
37 #define AUDIO_APBRIDGEA_TYPE_SHUTDOWN_RX 0x0f
39 #define AUDIO_APBRIDGEA_PCM_FMT_8 BIT(0)
40 #define AUDIO_APBRIDGEA_PCM_FMT_16 BIT(1)
41 #define AUDIO_APBRIDGEA_PCM_FMT_24 BIT(2)
42 #define AUDIO_APBRIDGEA_PCM_FMT_32 BIT(3)
43 #define AUDIO_APBRIDGEA_PCM_FMT_64 BIT(4)
45 #define AUDIO_APBRIDGEA_PCM_RATE_5512 BIT(0)
46 #define AUDIO_APBRIDGEA_PCM_RATE_8000 BIT(1)
47 #define AUDIO_APBRIDGEA_PCM_RATE_11025 BIT(2)
48 #define AUDIO_APBRIDGEA_PCM_RATE_16000 BIT(3)
49 #define AUDIO_APBRIDGEA_PCM_RATE_22050 BIT(4)
50 #define AUDIO_APBRIDGEA_PCM_RATE_32000 BIT(5)
51 #define AUDIO_APBRIDGEA_PCM_RATE_44100 BIT(6)
52 #define AUDIO_APBRIDGEA_PCM_RATE_48000 BIT(7)
53 #define AUDIO_APBRIDGEA_PCM_RATE_64000 BIT(8)
54 #define AUDIO_APBRIDGEA_PCM_RATE_88200 BIT(9)
55 #define AUDIO_APBRIDGEA_PCM_RATE_96000 BIT(10)
56 #define AUDIO_APBRIDGEA_PCM_RATE_176400 BIT(11)
57 #define AUDIO_APBRIDGEA_PCM_RATE_192000 BIT(12)
59 #define AUDIO_APBRIDGEA_DIRECTION_TX BIT(0)
60 #define AUDIO_APBRIDGEA_DIRECTION_RX BIT(1)
62 /* The I2S port is passed in the 'index' parameter of the USB request */
63 /* The CPort is passed in the 'value' parameter of the USB request */
65 struct audio_apbridgea_hdr {
71 struct audio_apbridgea_set_config_request {
72 struct audio_apbridgea_hdr hdr;
73 __le32 format; /* AUDIO_APBRIDGEA_PCM_FMT_* */
74 __le32 rate; /* AUDIO_APBRIDGEA_PCM_RATE_* */
75 __le32 mclk_freq; /* XXX Remove? */
78 struct audio_apbridgea_register_cport_request {
79 struct audio_apbridgea_hdr hdr;
84 struct audio_apbridgea_unregister_cport_request {
85 struct audio_apbridgea_hdr hdr;
90 struct audio_apbridgea_set_tx_data_size_request {
91 struct audio_apbridgea_hdr hdr;
95 struct audio_apbridgea_prepare_tx_request {
96 struct audio_apbridgea_hdr hdr;
99 struct audio_apbridgea_start_tx_request {
100 struct audio_apbridgea_hdr hdr;
104 struct audio_apbridgea_stop_tx_request {
105 struct audio_apbridgea_hdr hdr;
108 struct audio_apbridgea_shutdown_tx_request {
109 struct audio_apbridgea_hdr hdr;
112 struct audio_apbridgea_set_rx_data_size_request {
113 struct audio_apbridgea_hdr hdr;
117 struct audio_apbridgea_prepare_rx_request {
118 struct audio_apbridgea_hdr hdr;
121 struct audio_apbridgea_start_rx_request {
122 struct audio_apbridgea_hdr hdr;
125 struct audio_apbridgea_stop_rx_request {
126 struct audio_apbridgea_hdr hdr;
129 struct audio_apbridgea_shutdown_rx_request {
130 struct audio_apbridgea_hdr hdr;
133 #endif /*__AUDIO_APBRIDGEA_H */