2 * cxd2099.c: Driver for the CXD2099AR Common Interface Controller
4 * Copyright (C) 2010-2013 Digital Devices GmbH
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 only, as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
22 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
25 #include <linux/slab.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/i2c.h>
29 #include <linux/wait.h>
30 #include <linux/delay.h>
31 #include <linux/mutex.h>
36 /* comment this line to deactivate the cxd2099ar buffer mode */
39 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount);
42 struct dvb_ca_en50221 en;
44 struct i2c_adapter *i2c;
45 struct cxd2099_cfg cfg;
67 static int i2c_write_reg(struct i2c_adapter *adapter, u8 adr,
70 u8 m[2] = {reg, data};
71 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = m, .len = 2};
73 if (i2c_transfer(adapter, &msg, 1) != 1) {
74 dev_err(&adapter->dev,
75 "Failed to write to I2C register %02x@%02x!\n",
82 static int i2c_write(struct i2c_adapter *adapter, u8 adr,
85 struct i2c_msg msg = {.addr = adr, .flags = 0, .buf = data, .len = len};
87 if (i2c_transfer(adapter, &msg, 1) != 1) {
88 dev_err(&adapter->dev, "Failed to write to I2C!\n");
94 static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr,
97 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
98 .buf = ®, .len = 1},
99 {.addr = adr, .flags = I2C_M_RD,
100 .buf = val, .len = 1} };
102 if (i2c_transfer(adapter, msgs, 2) != 2) {
103 dev_err(&adapter->dev, "error in i2c_read_reg\n");
109 static int i2c_read(struct i2c_adapter *adapter, u8 adr,
110 u8 reg, u8 *data, u16 n)
112 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
113 .buf = ®, .len = 1},
114 {.addr = adr, .flags = I2C_M_RD,
115 .buf = data, .len = n} };
117 if (i2c_transfer(adapter, msgs, 2) != 2) {
118 dev_err(&adapter->dev, "error in i2c_read\n");
124 static int read_block(struct cxd *ci, u8 adr, u8 *data, u16 n)
128 if (ci->lastaddress != adr)
129 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
131 ci->lastaddress = adr;
136 if (ci->cfg.max_i2c && (len > ci->cfg.max_i2c))
137 len = ci->cfg.max_i2c;
138 status = i2c_read(ci->i2c, ci->cfg.adr, 1, data, len);
148 static int read_reg(struct cxd *ci, u8 reg, u8 *val)
150 return read_block(ci, reg, val, 1);
153 static int read_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
156 u8 addr[3] = {2, address & 0xff, address >> 8};
158 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
160 status = i2c_read(ci->i2c, ci->cfg.adr, 3, data, n);
164 static int write_pccard(struct cxd *ci, u16 address, u8 *data, u8 n)
167 u8 addr[3] = {2, address & 0xff, address >> 8};
169 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
173 memcpy(buf + 1, data, n);
174 status = i2c_write(ci->i2c, ci->cfg.adr, buf, n + 1);
179 static int read_io(struct cxd *ci, u16 address, u8 *val)
182 u8 addr[3] = {2, address & 0xff, address >> 8};
184 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
186 status = i2c_read(ci->i2c, ci->cfg.adr, 3, val, 1);
190 static int write_io(struct cxd *ci, u16 address, u8 val)
193 u8 addr[3] = {2, address & 0xff, address >> 8};
194 u8 buf[2] = {3, val};
196 status = i2c_write(ci->i2c, ci->cfg.adr, addr, 3);
198 status = i2c_write(ci->i2c, ci->cfg.adr, buf, 2);
202 static int write_regm(struct cxd *ci, u8 reg, u8 val, u8 mask)
206 if (ci->lastaddress != reg)
207 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, reg);
208 if (!status && reg >= 6 && reg <= 8 && mask != 0xff)
209 status = i2c_read_reg(ci->i2c, ci->cfg.adr, 1, &ci->regs[reg]);
210 ci->lastaddress = reg;
211 ci->regs[reg] = (ci->regs[reg] & (~mask)) | val;
213 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 1, ci->regs[reg]);
215 ci->regs[reg] &= 0x7f;
219 static int write_reg(struct cxd *ci, u8 reg, u8 val)
221 return write_regm(ci, reg, val, 0xff);
225 static int write_block(struct cxd *ci, u8 adr, u8 *data, u16 n)
230 if (ci->lastaddress != adr)
231 status = i2c_write_reg(ci->i2c, ci->cfg.adr, 0, adr);
235 ci->lastaddress = adr;
240 if (ci->cfg.max_i2c && (len + 1 > ci->cfg.max_i2c))
241 len = ci->cfg.max_i2c - 1;
242 memcpy(buf + 1, data, len);
243 status = i2c_write(ci->i2c, ci->cfg.adr, buf, len + 1);
253 static void set_mode(struct cxd *ci, int mode)
255 if (mode == ci->mode)
259 case 0x00: /* IO mem */
260 write_regm(ci, 0x06, 0x00, 0x07);
262 case 0x01: /* ATT mem */
263 write_regm(ci, 0x06, 0x02, 0x07);
271 static void cam_mode(struct cxd *ci, int mode)
275 if (mode == ci->cammode)
280 write_regm(ci, 0x20, 0x80, 0x80);
283 if (!ci->en.read_data)
286 dev_info(&ci->i2c->dev, "enable cam buffer mode\n");
287 write_reg(ci, 0x0d, 0x00);
288 write_reg(ci, 0x0e, 0x01);
289 write_regm(ci, 0x08, 0x40, 0x40);
290 read_reg(ci, 0x12, &dummy);
291 write_regm(ci, 0x08, 0x80, 0x80);
299 static int init(struct cxd *ci)
303 mutex_lock(&ci->lock);
306 status = write_reg(ci, 0x00, 0x00);
309 status = write_reg(ci, 0x01, 0x00);
312 status = write_reg(ci, 0x02, 0x10);
315 status = write_reg(ci, 0x03, 0x00);
318 status = write_reg(ci, 0x05, 0xFF);
321 status = write_reg(ci, 0x06, 0x1F);
324 status = write_reg(ci, 0x07, 0x1F);
327 status = write_reg(ci, 0x08, 0x28);
330 status = write_reg(ci, 0x14, 0x20);
334 /* TOSTRT = 8, Mode B (gated clock), falling Edge,
335 * Serial, POL=HIGH, MSB
337 status = write_reg(ci, 0x0A, 0xA7);
341 status = write_reg(ci, 0x0B, 0x33);
344 status = write_reg(ci, 0x0C, 0x33);
348 status = write_regm(ci, 0x14, 0x00, 0x0F);
351 status = write_reg(ci, 0x15, ci->clk_reg_b);
354 status = write_regm(ci, 0x16, 0x00, 0x0F);
357 status = write_reg(ci, 0x17, ci->clk_reg_f);
361 if (ci->cfg.clock_mode == 2) {
362 /* bitrate*2^13/ 72000 */
363 u32 reg = ((ci->cfg.bitrate << 13) + 71999) / 72000;
365 if (ci->cfg.polarity) {
366 status = write_reg(ci, 0x09, 0x6f);
370 status = write_reg(ci, 0x09, 0x6d);
374 status = write_reg(ci, 0x20, 0x08);
377 status = write_reg(ci, 0x21, (reg >> 8) & 0xff);
380 status = write_reg(ci, 0x22, reg & 0xff);
383 } else if (ci->cfg.clock_mode == 1) {
384 if (ci->cfg.polarity) {
385 status = write_reg(ci, 0x09, 0x6f); /* D */
389 status = write_reg(ci, 0x09, 0x6d);
393 status = write_reg(ci, 0x20, 0x68);
396 status = write_reg(ci, 0x21, 0x00);
399 status = write_reg(ci, 0x22, 0x02);
403 if (ci->cfg.polarity) {
404 status = write_reg(ci, 0x09, 0x4f); /* C */
408 status = write_reg(ci, 0x09, 0x4d);
412 status = write_reg(ci, 0x20, 0x28);
415 status = write_reg(ci, 0x21, 0x00);
418 status = write_reg(ci, 0x22, 0x07);
423 status = write_regm(ci, 0x20, 0x80, 0x80);
426 status = write_regm(ci, 0x03, 0x02, 0x02);
429 status = write_reg(ci, 0x01, 0x04);
432 status = write_reg(ci, 0x00, 0x31);
436 /* Put TS in bypass */
437 status = write_regm(ci, 0x09, 0x08, 0x08);
443 mutex_unlock(&ci->lock);
448 static int read_attribute_mem(struct dvb_ca_en50221 *ca,
449 int slot, int address)
451 struct cxd *ci = ca->data;
454 mutex_lock(&ci->lock);
456 read_pccard(ci, address, &val, 1);
457 mutex_unlock(&ci->lock);
461 static int write_attribute_mem(struct dvb_ca_en50221 *ca, int slot,
462 int address, u8 value)
464 struct cxd *ci = ca->data;
466 mutex_lock(&ci->lock);
468 write_pccard(ci, address, &value, 1);
469 mutex_unlock(&ci->lock);
473 static int read_cam_control(struct dvb_ca_en50221 *ca,
474 int slot, u8 address)
476 struct cxd *ci = ca->data;
479 mutex_lock(&ci->lock);
481 read_io(ci, address, &val);
482 mutex_unlock(&ci->lock);
486 static int write_cam_control(struct dvb_ca_en50221 *ca, int slot,
487 u8 address, u8 value)
489 struct cxd *ci = ca->data;
491 mutex_lock(&ci->lock);
493 write_io(ci, address, value);
494 mutex_unlock(&ci->lock);
498 static int slot_reset(struct dvb_ca_en50221 *ca, int slot)
500 struct cxd *ci = ca->data;
503 read_data(ca, slot, ci->rbuf, 0);
505 mutex_lock(&ci->lock);
507 write_reg(ci, 0x00, 0x21);
508 write_reg(ci, 0x06, 0x1F);
509 write_reg(ci, 0x00, 0x31);
510 write_regm(ci, 0x20, 0x80, 0x80);
511 write_reg(ci, 0x03, 0x02);
517 for (i = 0; i < 100; i++) {
518 usleep_range(10000, 11000);
523 mutex_unlock(&ci->lock);
527 static int slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
529 struct cxd *ci = ca->data;
531 dev_info(&ci->i2c->dev, "%s\n", __func__);
533 read_data(ca, slot, ci->rbuf, 0);
534 mutex_lock(&ci->lock);
535 write_reg(ci, 0x00, 0x21);
536 write_reg(ci, 0x06, 0x1F);
539 write_regm(ci, 0x09, 0x08, 0x08);
540 write_regm(ci, 0x20, 0x80, 0x80); /* Reset CAM Mode */
541 write_regm(ci, 0x06, 0x07, 0x07); /* Clear IO Mode */
545 mutex_unlock(&ci->lock);
549 static int slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
551 struct cxd *ci = ca->data;
553 mutex_lock(&ci->lock);
554 write_regm(ci, 0x09, 0x00, 0x08);
557 mutex_unlock(&ci->lock);
561 static int campoll(struct cxd *ci)
565 read_reg(ci, 0x04, &istat);
568 write_reg(ci, 0x05, istat);
578 read_reg(ci, 0x01, &slotstat);
579 if (!(2 & slotstat)) {
580 if (!ci->slot_stat) {
582 DVB_CA_EN50221_POLL_CAM_PRESENT;
583 write_regm(ci, 0x03, 0x08, 0x08);
589 write_regm(ci, 0x03, 0x00, 0x08);
590 dev_info(&ci->i2c->dev, "NO CAM\n");
595 (ci->slot_stat == DVB_CA_EN50221_POLL_CAM_PRESENT)) {
597 ci->slot_stat |= DVB_CA_EN50221_POLL_CAM_READY;
603 static int poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
605 struct cxd *ci = ca->data;
608 mutex_lock(&ci->lock);
610 read_reg(ci, 0x01, &slotstat);
611 mutex_unlock(&ci->lock);
613 return ci->slot_stat;
616 static int read_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
618 struct cxd *ci = ca->data;
622 mutex_lock(&ci->lock);
624 mutex_unlock(&ci->lock);
629 mutex_lock(&ci->lock);
630 read_reg(ci, 0x0f, &msb);
631 read_reg(ci, 0x10, &lsb);
632 len = ((u16)msb << 8) | lsb;
633 if (len > ecount || len < 2) {
634 /* read it anyway or cxd may hang */
635 read_block(ci, 0x12, ci->rbuf, len);
636 mutex_unlock(&ci->lock);
639 read_block(ci, 0x12, ebuf, len);
641 mutex_unlock(&ci->lock);
647 static int write_data(struct dvb_ca_en50221 *ca, int slot, u8 *ebuf, int ecount)
649 struct cxd *ci = ca->data;
653 mutex_lock(&ci->lock);
654 write_reg(ci, 0x0d, ecount >> 8);
655 write_reg(ci, 0x0e, ecount & 0xff);
656 write_block(ci, 0x11, ebuf, ecount);
658 mutex_unlock(&ci->lock);
663 static struct dvb_ca_en50221 en_templ = {
664 .read_attribute_mem = read_attribute_mem,
665 .write_attribute_mem = write_attribute_mem,
666 .read_cam_control = read_cam_control,
667 .write_cam_control = write_cam_control,
668 .slot_reset = slot_reset,
669 .slot_shutdown = slot_shutdown,
670 .slot_ts_enable = slot_ts_enable,
671 .poll_slot_status = poll_slot_status,
673 .read_data = read_data,
674 .write_data = write_data,
679 struct dvb_ca_en50221 *cxd2099_attach(struct cxd2099_cfg *cfg,
681 struct i2c_adapter *i2c)
686 if (i2c_read_reg(i2c, cfg->adr, 0, &val) < 0) {
687 dev_info(&i2c->dev, "No CXD2099 detected at %02x\n", cfg->adr);
691 ci = kzalloc(sizeof(*ci), GFP_KERNEL);
695 mutex_init(&ci->lock);
698 ci->lastaddress = 0xff;
699 ci->clk_reg_b = 0x4a;
700 ci->clk_reg_f = 0x1b;
705 dev_info(&i2c->dev, "Attached CXD2099AR at %02x\n", ci->cfg.adr);
708 EXPORT_SYMBOL(cxd2099_attach);
710 MODULE_DESCRIPTION("cxd2099");
711 MODULE_AUTHOR("Ralph Metzler");
712 MODULE_LICENSE("GPL");