1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Rockchip VPU codec driver
5 * Copyright 2018 Google LLC.
6 * Tomasz Figa <tfiga@chromium.org>
8 * Based on s5p-mfc driver by Samsung Electronics Co., Ltd.
9 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
12 #ifndef ROCKCHIP_VPU_H_
13 #define ROCKCHIP_VPU_H_
15 #include <linux/platform_device.h>
16 #include <linux/videodev2.h>
17 #include <linux/wait.h>
18 #include <linux/clk.h>
20 #include <media/v4l2-ctrls.h>
21 #include <media/v4l2-device.h>
22 #include <media/v4l2-ioctl.h>
23 #include <media/videobuf2-core.h>
24 #include <media/videobuf2-dma-contig.h>
26 #include "rockchip_vpu_hw.h"
28 #define ROCKCHIP_VPU_MAX_CLOCKS 4
30 #define MPEG2_MB_DIM 16
31 #define MPEG2_MB_WIDTH(w) DIV_ROUND_UP(w, MPEG2_MB_DIM)
32 #define MPEG2_MB_HEIGHT(h) DIV_ROUND_UP(h, MPEG2_MB_DIM)
34 #define JPEG_MB_DIM 16
35 #define JPEG_MB_WIDTH(w) DIV_ROUND_UP(w, JPEG_MB_DIM)
36 #define JPEG_MB_HEIGHT(h) DIV_ROUND_UP(h, JPEG_MB_DIM)
38 struct rockchip_vpu_ctx;
39 struct rockchip_vpu_codec_ops;
41 #define RK_VPU_JPEG_ENCODER BIT(0)
42 #define RK_VPU_ENCODERS 0x0000ffff
44 #define RK_VPU_MPEG2_DECODER BIT(16)
45 #define RK_VPU_DECODERS 0xffff0000
48 * struct rockchip_vpu_variant - information about VPU hardware variant
50 * @enc_offset: Offset from VPU base to encoder registers.
51 * @dec_offset: Offset from VPU base to decoder registers.
52 * @enc_fmts: Encoder formats.
53 * @num_enc_fmts: Number of encoder formats.
54 * @dec_fmts: Decoder formats.
55 * @num_dec_fmts: Number of decoder formats.
56 * @codec: Supported codecs
57 * @codec_ops: Codec ops.
58 * @init: Initialize hardware.
59 * @vepu_irq: encoder interrupt handler
60 * @vdpu_irq: decoder interrupt handler
61 * @clk_names: array of clock names
62 * @num_clocks: number of clocks in the array
64 struct rockchip_vpu_variant {
65 unsigned int enc_offset;
66 unsigned int dec_offset;
67 const struct rockchip_vpu_fmt *enc_fmts;
68 unsigned int num_enc_fmts;
69 const struct rockchip_vpu_fmt *dec_fmts;
70 unsigned int num_dec_fmts;
72 const struct rockchip_vpu_codec_ops *codec_ops;
73 int (*init)(struct rockchip_vpu_dev *vpu);
74 irqreturn_t (*vepu_irq)(int irq, void *priv);
75 irqreturn_t (*vdpu_irq)(int irq, void *priv);
76 const char *clk_names[ROCKCHIP_VPU_MAX_CLOCKS];
81 * enum rockchip_vpu_codec_mode - codec operating mode.
82 * @RK_VPU_MODE_NONE: No operating mode. Used for RAW video formats.
83 * @RK_VPU_MODE_JPEG_ENC: JPEG encoder.
84 * @RK_VPU_MODE_MPEG2_DEC: MPEG-2 decoder.
86 enum rockchip_vpu_codec_mode {
87 RK_VPU_MODE_NONE = -1,
89 RK_VPU_MODE_MPEG2_DEC,
93 * struct rockchip_vpu_ctrl - helper type to declare supported controls
94 * @id: V4L2 control ID (V4L2_CID_xxx)
95 * @codec: codec id this control belong to (RK_VPU_JPEG_ENCODER, etc.)
96 * @cfg: control configuration
98 struct rockchip_vpu_ctrl {
101 struct v4l2_ctrl_config cfg;
105 * struct rockchip_vpu_func - rockchip VPU functionality
107 * @id: processing functionality ID (can be
108 * %MEDIA_ENT_F_PROC_VIDEO_ENCODER or
109 * %MEDIA_ENT_F_PROC_VIDEO_DECODER)
110 * @vdev: &struct video_device that exposes the encoder or
111 * decoder functionality
112 * @source_pad: &struct media_pad with the source pad.
113 * @sink: &struct media_entity pointer with the sink entity
114 * @sink_pad: &struct media_pad with the sink pad.
115 * @proc: &struct media_entity pointer with the M2M device itself.
116 * @proc_pads: &struct media_pad with the @proc pads.
117 * @intf_devnode: &struct media_intf devnode pointer with the interface
118 * with controls the M2M device.
120 * Contains everything needed to attach the video device to the media device.
122 struct rockchip_vpu_func {
124 struct video_device vdev;
125 struct media_pad source_pad;
126 struct media_entity sink;
127 struct media_pad sink_pad;
128 struct media_entity proc;
129 struct media_pad proc_pads[2];
130 struct media_intf_devnode *intf_devnode;
133 static inline struct rockchip_vpu_func *
134 rockchip_vpu_vdev_to_func(struct video_device *vdev)
136 return container_of(vdev, struct rockchip_vpu_func, vdev);
140 * struct rockchip_vpu_dev - driver data
141 * @v4l2_dev: V4L2 device to register video devices for.
142 * @m2m_dev: mem2mem device associated to this device.
143 * @mdev: media device associated to this device.
144 * @encoder: encoder functionality.
145 * @decoder: decoder functionality.
146 * @pdev: Pointer to VPU platform device.
147 * @dev: Pointer to device for convenient logging using
149 * @clocks: Array of clock handles.
150 * @base: Mapped address of VPU registers.
151 * @enc_base: Mapped address of VPU encoder register for convenience.
152 * @dec_base: Mapped address of VPU decoder register for convenience.
153 * @vpu_mutex: Mutex to synchronize V4L2 calls.
154 * @irqlock: Spinlock to synchronize access to data structures
155 * shared with interrupt handlers.
156 * @variant: Hardware variant-specific parameters.
157 * @watchdog_work: Delayed work for hardware timeout handling.
159 struct rockchip_vpu_dev {
160 struct v4l2_device v4l2_dev;
161 struct v4l2_m2m_dev *m2m_dev;
162 struct media_device mdev;
163 struct rockchip_vpu_func *encoder;
164 struct rockchip_vpu_func *decoder;
165 struct platform_device *pdev;
167 struct clk_bulk_data clocks[ROCKCHIP_VPU_MAX_CLOCKS];
169 void __iomem *enc_base;
170 void __iomem *dec_base;
172 struct mutex vpu_mutex; /* video_device lock */
174 const struct rockchip_vpu_variant *variant;
175 struct delayed_work watchdog_work;
179 * struct rockchip_vpu_ctx - Context (instance) private data.
181 * @dev: VPU driver data to which the context belongs.
182 * @fh: V4L2 file handler.
184 * @sequence_cap: Sequence counter for capture queue
185 * @sequence_out: Sequence counter for output queue
187 * @vpu_src_fmt: Descriptor of active source format.
188 * @src_fmt: V4L2 pixel format of active source format.
189 * @vpu_dst_fmt: Descriptor of active destination format.
190 * @dst_fmt: V4L2 pixel format of active destination format.
192 * @ctrl_handler: Control handler used to register controls.
193 * @jpeg_quality: User-specified JPEG compression quality.
195 * @buf_finish: Buffer finish. This depends on encoder or decoder
196 * context, and it's called right before
197 * calling v4l2_m2m_job_finish.
198 * @codec_ops: Set of operations related to codec mode.
199 * @jpeg_enc: JPEG-encoding context.
200 * @mpeg2_dec: MPEG-2-decoding context.
202 struct rockchip_vpu_ctx {
203 struct rockchip_vpu_dev *dev;
209 const struct rockchip_vpu_fmt *vpu_src_fmt;
210 struct v4l2_pix_format_mplane src_fmt;
211 const struct rockchip_vpu_fmt *vpu_dst_fmt;
212 struct v4l2_pix_format_mplane dst_fmt;
214 struct v4l2_ctrl_handler ctrl_handler;
217 int (*buf_finish)(struct rockchip_vpu_ctx *ctx,
218 struct vb2_buffer *buf,
219 unsigned int bytesused);
221 const struct rockchip_vpu_codec_ops *codec_ops;
223 /* Specific for particular codec modes. */
225 struct rockchip_vpu_jpeg_enc_hw_ctx jpeg_enc;
226 struct rockchip_vpu_mpeg2_dec_hw_ctx mpeg2_dec;
231 * struct rockchip_vpu_fmt - information about supported video formats.
232 * @name: Human readable name of the format.
233 * @fourcc: FourCC code of the format. See V4L2_PIX_FMT_*.
234 * @codec_mode: Codec mode related to this format. See
235 * enum rockchip_vpu_codec_mode.
236 * @header_size: Optional header size. Currently used by JPEG encoder.
237 * @max_depth: Maximum depth, for bitstream formats
238 * @enc_fmt: Format identifier for encoder registers.
239 * @frmsize: Supported range of frame sizes (only for bitstream formats).
241 struct rockchip_vpu_fmt {
244 enum rockchip_vpu_codec_mode codec_mode;
247 enum rockchip_vpu_enc_fmt enc_fmt;
248 struct v4l2_frmsize_stepwise frmsize;
251 /* Logging helpers */
254 * debug - Module parameter to control level of debugging messages.
256 * Level of debugging messages can be controlled by bits of
257 * module parameter called "debug". Meaning of particular
258 * bits is as follows:
260 * bit 0 - global information: mode, size, init, release
261 * bit 1 - each run start/result information
262 * bit 2 - contents of small controls from userspace
263 * bit 3 - contents of big controls from userspace
264 * bit 4 - detail fmt, ctrl, buffer q/dq information
265 * bit 5 - detail function enter/leave trace information
266 * bit 6 - register write/read information
268 extern int rockchip_vpu_debug;
270 #define vpu_debug(level, fmt, args...) \
272 if (rockchip_vpu_debug & BIT(level)) \
273 pr_info("%s:%d: " fmt, \
274 __func__, __LINE__, ##args); \
277 #define vpu_err(fmt, args...) \
278 pr_err("%s:%d: " fmt, __func__, __LINE__, ##args)
280 /* Structure access helpers. */
281 static inline struct rockchip_vpu_ctx *fh_to_ctx(struct v4l2_fh *fh)
283 return container_of(fh, struct rockchip_vpu_ctx, fh);
286 /* Register accessors. */
287 static inline void vepu_write_relaxed(struct rockchip_vpu_dev *vpu,
290 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
291 writel_relaxed(val, vpu->enc_base + reg);
294 static inline void vepu_write(struct rockchip_vpu_dev *vpu, u32 val, u32 reg)
296 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
297 writel(val, vpu->enc_base + reg);
300 static inline u32 vepu_read(struct rockchip_vpu_dev *vpu, u32 reg)
302 u32 val = readl(vpu->enc_base + reg);
304 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
308 static inline void vdpu_write_relaxed(struct rockchip_vpu_dev *vpu,
311 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
312 writel_relaxed(val, vpu->dec_base + reg);
315 static inline void vdpu_write(struct rockchip_vpu_dev *vpu, u32 val, u32 reg)
317 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
318 writel(val, vpu->dec_base + reg);
321 static inline u32 vdpu_read(struct rockchip_vpu_dev *vpu, u32 reg)
323 u32 val = readl(vpu->dec_base + reg);
325 vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
329 bool rockchip_vpu_is_encoder_ctx(const struct rockchip_vpu_ctx *ctx);
331 void *rockchip_vpu_get_ctrl(struct rockchip_vpu_ctx *ctx, u32 id);
332 dma_addr_t rockchip_vpu_get_ref(struct vb2_queue *q, u64 ts);
334 #endif /* ROCKCHIP_VPU_H_ */