2 * abstraction of the spi interface of HopeRf rf69 radio module
4 * Copyright (C) 2016 Wolf-Entwicklungen
5 * Marcus Wolf <linux@wolf-entwicklungen.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 /* enable prosa debug info */
20 /* enable print of values on reg access */
22 /* enable print of values on fifo access */
23 #undef DEBUG_FIFO_ACCESS
25 #include <linux/types.h>
26 #include <linux/spi/spi.h>
29 #include "rf69_registers.h"
31 #define F_OSC 32000000 /* in Hz */
32 #define FIFO_SIZE 66 /* in byte */
34 /*-------------------------------------------------------------------------*/
36 static u8 rf69_read_reg(struct spi_device *spi, u8 addr)
40 retval = spi_w8r8(spi, addr);
44 /* should never happen, since we already checked,
45 * that module is connected. Therefore no error
46 * handling, just an optional error message...
48 dev_dbg(&spi->dev, "read 0x%x FAILED\n", addr);
50 dev_dbg(&spi->dev, "read 0x%x from reg 0x%x\n", retval, addr);
56 static int rf69_write_reg(struct spi_device *spi, u8 addr, u8 value)
61 buffer[0] = addr | WRITE_BIT;
64 retval = spi_write(spi, &buffer, 2);
68 /* should never happen, since we already checked,
69 * that module is connected. Therefore no error
70 * handling, just an optional error message...
72 dev_dbg(&spi->dev, "write 0x%x to 0x%x FAILED\n", value, addr);
74 dev_dbg(&spi->dev, "wrote 0x%x to reg 0x%x\n", value, addr);
80 /*-------------------------------------------------------------------------*/
82 static int rf69_set_bit(struct spi_device *spi, u8 reg, u8 mask)
86 tmp = rf69_read_reg(spi, reg);
88 return rf69_write_reg(spi, reg, tmp);
91 static int rf69_clear_bit(struct spi_device *spi, u8 reg, u8 mask)
95 tmp = rf69_read_reg(spi, reg);
97 return rf69_write_reg(spi, reg, tmp);
100 static inline int rf69_read_mod_write(struct spi_device *spi, u8 reg, u8 mask, u8 value)
104 tmp = rf69_read_reg(spi, reg);
105 tmp = (tmp & ~mask) | value;
106 return rf69_write_reg(spi, reg, tmp);
109 /*-------------------------------------------------------------------------*/
111 int rf69_set_mode(struct spi_device *spi, enum mode mode)
115 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE, OPMODE_MODE_TRANSMIT);
117 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE, OPMODE_MODE_RECEIVE);
119 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE, OPMODE_MODE_SYNTHESIZER);
121 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE, OPMODE_MODE_STANDBY);
123 return rf69_read_mod_write(spi, REG_OPMODE, MASK_OPMODE_MODE, OPMODE_MODE_SLEEP);
125 dev_dbg(&spi->dev, "set: illegal input param");
129 // we are using packet mode, so this check is not really needed
130 // but waiting for mode ready is necessary when going from sleep because the FIFO may not be immediately available from previous mode
131 //while (_mode == RF69_MODE_SLEEP && (READ_REG(REG_IRQFLAGS1) & RF_IRQFLAGS1_MODEREADY) == 0x00); // Wait for ModeReady
134 int rf69_set_data_mode(struct spi_device *spi, u8 data_mode)
136 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODE, data_mode);
139 int rf69_set_modulation(struct spi_device *spi, enum modulation modulation)
141 switch (modulation) {
143 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_TYPE, DATAMODUL_MODULATION_TYPE_OOK);
145 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_TYPE, DATAMODUL_MODULATION_TYPE_FSK);
147 dev_dbg(&spi->dev, "set: illegal input param");
152 static enum modulation rf69_get_modulation(struct spi_device *spi)
156 currentValue = rf69_read_reg(spi, REG_DATAMODUL);
158 switch (currentValue & MASK_DATAMODUL_MODULATION_TYPE) {
159 case DATAMODUL_MODULATION_TYPE_OOK:
161 case DATAMODUL_MODULATION_TYPE_FSK:
168 int rf69_set_modulation_shaping(struct spi_device *spi,
169 enum mod_shaping mod_shaping)
171 switch (rf69_get_modulation(spi)) {
173 switch (mod_shaping) {
175 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_SHAPE, DATAMODUL_MODULATION_SHAPE_NONE);
177 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_SHAPE, DATAMODUL_MODULATION_SHAPE_1_0);
179 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_SHAPE, DATAMODUL_MODULATION_SHAPE_0_5);
181 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_SHAPE, DATAMODUL_MODULATION_SHAPE_0_3);
183 dev_dbg(&spi->dev, "set: illegal input param");
187 switch (mod_shaping) {
189 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_SHAPE, DATAMODUL_MODULATION_SHAPE_NONE);
191 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_SHAPE, DATAMODUL_MODULATION_SHAPE_BR);
193 return rf69_read_mod_write(spi, REG_DATAMODUL, MASK_DATAMODUL_MODULATION_SHAPE, DATAMODUL_MODULATION_SHAPE_2BR);
195 dev_dbg(&spi->dev, "set: illegal input param");
199 dev_dbg(&spi->dev, "set: modulation undefined");
204 int rf69_set_bit_rate(struct spi_device *spi, u16 bitRate)
213 bitRate_min = F_OSC / 8388608; // 8388608 = 2^23;
214 if (bitRate < bitRate_min) {
215 dev_dbg(&spi->dev, "setBitRate: illegal input param");
219 // calculate reg settings
220 bitRate_reg = (F_OSC / bitRate);
222 msb = (bitRate_reg & 0xff00) >> 8;
223 lsb = (bitRate_reg & 0xff);
226 retval = rf69_write_reg(spi, REG_BITRATE_MSB, msb);
229 retval = rf69_write_reg(spi, REG_BITRATE_LSB, lsb);
236 int rf69_set_deviation(struct spi_device *spi, u32 deviation)
243 u64 factor = 1000000; // to improve precision of calculation
245 // TODO: Dependency to bitrate
246 if (deviation < 600 || deviation > 500000) {
247 dev_dbg(&spi->dev, "set_deviation: illegal input param");
252 f_step = F_OSC * factor;
253 do_div(f_step, 524288); // 524288 = 2^19
255 // calculate register settings
256 f_reg = deviation * factor;
257 do_div(f_reg, f_step);
259 msb = (f_reg & 0xff00) >> 8;
260 lsb = (f_reg & 0xff);
263 if (msb & ~FDEVMASB_MASK) {
264 dev_dbg(&spi->dev, "set_deviation: err in calc of msb");
269 retval = rf69_write_reg(spi, REG_FDEV_MSB, msb);
272 retval = rf69_write_reg(spi, REG_FDEV_LSB, lsb);
279 int rf69_set_frequency(struct spi_device *spi, u32 frequency)
288 u64 factor = 1000000; // to improve precision of calculation
291 f_step = F_OSC * factor;
292 do_div(f_step, 524288); // 524288 = 2^19
295 f_max = div_u64(f_step * 8388608, factor);
296 if (frequency > f_max) {
297 dev_dbg(&spi->dev, "setFrequency: illegal input param");
301 // calculate reg settings
302 f_reg = frequency * factor;
303 do_div(f_reg, f_step);
305 msb = (f_reg & 0xff0000) >> 16;
306 mid = (f_reg & 0xff00) >> 8;
307 lsb = (f_reg & 0xff);
310 retval = rf69_write_reg(spi, REG_FRF_MSB, msb);
313 retval = rf69_write_reg(spi, REG_FRF_MID, mid);
316 retval = rf69_write_reg(spi, REG_FRF_LSB, lsb);
323 int rf69_enable_amplifier(struct spi_device *spi, u8 amplifier_mask)
325 return rf69_set_bit(spi, REG_PALEVEL, amplifier_mask);
328 int rf69_disable_amplifier(struct spi_device *spi, u8 amplifier_mask)
330 return rf69_clear_bit(spi, REG_PALEVEL, amplifier_mask);
333 int rf69_set_output_power_level(struct spi_device *spi, u8 powerLevel)
335 // TODO: Dependency to PA0,1,2 setting
339 if (powerLevel > 0x1f) {
340 dev_dbg(&spi->dev, "set: illegal input param");
345 return rf69_read_mod_write(spi, REG_PALEVEL, MASK_PALEVEL_OUTPUT_POWER, powerLevel);
348 int rf69_set_pa_ramp(struct spi_device *spi, enum paRamp paRamp)
352 return rf69_write_reg(spi, REG_PARAMP, PARAMP_3400);
354 return rf69_write_reg(spi, REG_PARAMP, PARAMP_2000);
356 return rf69_write_reg(spi, REG_PARAMP, PARAMP_1000);
358 return rf69_write_reg(spi, REG_PARAMP, PARAMP_500);
360 return rf69_write_reg(spi, REG_PARAMP, PARAMP_250);
362 return rf69_write_reg(spi, REG_PARAMP, PARAMP_125);
364 return rf69_write_reg(spi, REG_PARAMP, PARAMP_100);
366 return rf69_write_reg(spi, REG_PARAMP, PARAMP_62);
368 return rf69_write_reg(spi, REG_PARAMP, PARAMP_50);
370 return rf69_write_reg(spi, REG_PARAMP, PARAMP_40);
372 return rf69_write_reg(spi, REG_PARAMP, PARAMP_31);
374 return rf69_write_reg(spi, REG_PARAMP, PARAMP_25);
376 return rf69_write_reg(spi, REG_PARAMP, PARAMP_20);
378 return rf69_write_reg(spi, REG_PARAMP, PARAMP_15);
380 return rf69_write_reg(spi, REG_PARAMP, PARAMP_12);
382 return rf69_write_reg(spi, REG_PARAMP, PARAMP_10);
384 dev_dbg(&spi->dev, "set: illegal input param");
389 int rf69_set_antenna_impedance(struct spi_device *spi, enum antennaImpedance antennaImpedance)
391 switch (antennaImpedance) {
393 return rf69_clear_bit(spi, REG_LNA, MASK_LNA_ZIN);
395 return rf69_set_bit(spi, REG_LNA, MASK_LNA_ZIN);
397 dev_dbg(&spi->dev, "set: illegal input param");
402 int rf69_set_lna_gain(struct spi_device *spi, enum lnaGain lnaGain)
406 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN, LNA_GAIN_AUTO);
408 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN, LNA_GAIN_MAX);
410 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN, LNA_GAIN_MAX_MINUS_6);
412 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN, LNA_GAIN_MAX_MINUS_12);
414 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN, LNA_GAIN_MAX_MINUS_24);
416 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN, LNA_GAIN_MAX_MINUS_36);
418 return rf69_read_mod_write(spi, REG_LNA, MASK_LNA_GAIN, LNA_GAIN_MAX_MINUS_48);
420 dev_dbg(&spi->dev, "set: illegal input param");
425 static int rf69_set_bandwidth_intern(struct spi_device *spi, u8 reg,
426 enum mantisse mantisse, u8 exponent)
430 // check value for mantisse and exponent
432 dev_dbg(&spi->dev, "set: illegal input param");
436 if ((mantisse != mantisse16) &&
437 (mantisse != mantisse20) &&
438 (mantisse != mantisse24)) {
439 dev_dbg(&spi->dev, "set: illegal input param");
444 newValue = rf69_read_reg(spi, reg);
446 // "delete" mantisse and exponent = just keep the DCC setting
447 newValue = newValue & MASK_BW_DCC_FREQ;
452 newValue = newValue | BW_MANT_16;
455 newValue = newValue | BW_MANT_20;
458 newValue = newValue | BW_MANT_24;
463 newValue = newValue | exponent;
466 return rf69_write_reg(spi, reg, newValue);
469 int rf69_set_bandwidth(struct spi_device *spi, enum mantisse mantisse, u8 exponent)
471 return rf69_set_bandwidth_intern(spi, REG_RXBW, mantisse, exponent);
474 int rf69_set_bandwidth_during_afc(struct spi_device *spi, enum mantisse mantisse, u8 exponent)
476 return rf69_set_bandwidth_intern(spi, REG_AFCBW, mantisse, exponent);
479 int rf69_set_ook_threshold_dec(struct spi_device *spi, enum thresholdDecrement thresholdDecrement)
481 switch (thresholdDecrement) {
483 return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_EVERY_8TH);
485 return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_EVERY_4TH);
487 return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_EVERY_2ND);
489 return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_ONCE);
491 return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_TWICE);
493 return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_4_TIMES);
495 return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_8_TIMES);
497 return rf69_read_mod_write(spi, REG_OOKPEAK, MASK_OOKPEAK_THRESDEC, OOKPEAK_THRESHDEC_16_TIMES);
499 dev_dbg(&spi->dev, "set: illegal input param");
504 int rf69_set_dio_mapping(struct spi_device *spi, u8 DIONumber, u8 value)
513 mask = MASK_DIO0; shift = SHIFT_DIO0; regaddr = REG_DIOMAPPING1;
516 mask = MASK_DIO1; shift = SHIFT_DIO1; regaddr = REG_DIOMAPPING1;
519 mask = MASK_DIO2; shift = SHIFT_DIO2; regaddr = REG_DIOMAPPING1;
522 mask = MASK_DIO3; shift = SHIFT_DIO3; regaddr = REG_DIOMAPPING1;
525 mask = MASK_DIO4; shift = SHIFT_DIO4; regaddr = REG_DIOMAPPING2;
528 mask = MASK_DIO5; shift = SHIFT_DIO5; regaddr = REG_DIOMAPPING2;
531 dev_dbg(&spi->dev, "set: illegal input param");
536 regValue = rf69_read_reg(spi, regaddr);
538 regValue = regValue & ~mask;
540 regValue = regValue | value << shift;
542 return rf69_write_reg(spi, regaddr, regValue);
545 bool rf69_get_flag(struct spi_device *spi, enum flag flag)
548 case modeSwitchCompleted:
549 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
551 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
553 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
555 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
556 case rssiExceededThreshold:
557 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
559 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
561 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
562 case syncAddressMatch:
563 return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
565 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
566 /* case fifo_not_empty:
567 * return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY); */
569 return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
570 case fifo_level_below_threshold:
571 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
573 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
575 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
577 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
579 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
581 return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
582 default: return false;
586 int rf69_set_rssi_threshold(struct spi_device *spi, u8 threshold)
588 /* no value check needed - u8 exactly matches register size */
590 return rf69_write_reg(spi, REG_RSSITHRESH, threshold);
593 int rf69_set_preamble_length(struct spi_device *spi, u16 preambleLength)
598 /* no value check needed - u16 exactly matches register size */
600 /* calculate reg settings */
601 msb = (preambleLength & 0xff00) >> 8;
602 lsb = (preambleLength & 0xff);
604 /* transmit to chip */
605 retval = rf69_write_reg(spi, REG_PREAMBLE_MSB, msb);
608 retval = rf69_write_reg(spi, REG_PREAMBLE_LSB, lsb);
613 int rf69_enable_sync(struct spi_device *spi)
615 return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
618 int rf69_disable_sync(struct spi_device *spi)
620 return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
623 int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifo_fill_condition fifo_fill_condition)
625 switch (fifo_fill_condition) {
627 return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
628 case afterSyncInterrupt:
629 return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
631 dev_dbg(&spi->dev, "set: illegal input param");
636 int rf69_set_sync_size(struct spi_device *spi, u8 syncSize)
639 if (syncSize > 0x07) {
640 dev_dbg(&spi->dev, "set: illegal input param");
645 return rf69_read_mod_write(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_SIZE, (syncSize << 3));
648 int rf69_set_sync_values(struct spi_device *spi, u8 syncValues[8])
652 retval += rf69_write_reg(spi, REG_SYNCVALUE1, syncValues[0]);
653 retval += rf69_write_reg(spi, REG_SYNCVALUE2, syncValues[1]);
654 retval += rf69_write_reg(spi, REG_SYNCVALUE3, syncValues[2]);
655 retval += rf69_write_reg(spi, REG_SYNCVALUE4, syncValues[3]);
656 retval += rf69_write_reg(spi, REG_SYNCVALUE5, syncValues[4]);
657 retval += rf69_write_reg(spi, REG_SYNCVALUE6, syncValues[5]);
658 retval += rf69_write_reg(spi, REG_SYNCVALUE7, syncValues[6]);
659 retval += rf69_write_reg(spi, REG_SYNCVALUE8, syncValues[7]);
664 int rf69_set_packet_format(struct spi_device *spi, enum packetFormat packetFormat)
666 switch (packetFormat) {
667 case packetLengthVar:
668 return rf69_set_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
669 case packetLengthFix:
670 return rf69_clear_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_PAKET_FORMAT_VARIABLE);
672 dev_dbg(&spi->dev, "set: illegal input param");
677 int rf69_enable_crc(struct spi_device *spi)
679 return rf69_set_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
682 int rf69_disable_crc(struct spi_device *spi)
684 return rf69_clear_bit(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_CRC_ON);
687 int rf69_set_adressFiltering(struct spi_device *spi, enum addressFiltering addressFiltering)
689 switch (addressFiltering) {
691 return rf69_read_mod_write(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_ADDRESSFILTERING, PACKETCONFIG1_ADDRESSFILTERING_OFF);
693 return rf69_read_mod_write(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_ADDRESSFILTERING, PACKETCONFIG1_ADDRESSFILTERING_NODE);
694 case nodeOrBroadcastAddress:
695 return rf69_read_mod_write(spi, REG_PACKETCONFIG1, MASK_PACKETCONFIG1_ADDRESSFILTERING, PACKETCONFIG1_ADDRESSFILTERING_NODEBROADCAST);
697 dev_dbg(&spi->dev, "set: illegal input param");
702 int rf69_set_payload_length(struct spi_device *spi, u8 payload_length)
704 return rf69_write_reg(spi, REG_PAYLOAD_LENGTH, payload_length);
707 int rf69_set_node_address(struct spi_device *spi, u8 nodeAddress)
709 return rf69_write_reg(spi, REG_NODEADRS, nodeAddress);
712 int rf69_set_broadcast_address(struct spi_device *spi, u8 broadcastAddress)
714 return rf69_write_reg(spi, REG_BROADCASTADRS, broadcastAddress);
717 int rf69_set_tx_start_condition(struct spi_device *spi, enum txStartCondition txStartCondition)
719 switch (txStartCondition) {
721 return rf69_clear_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
723 return rf69_set_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
725 dev_dbg(&spi->dev, "set: illegal input param");
730 int rf69_set_fifo_threshold(struct spi_device *spi, u8 threshold)
734 /* check input value */
735 if (threshold & 0x80) {
736 dev_dbg(&spi->dev, "set: illegal input param");
741 retval = rf69_read_mod_write(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_VALUE, threshold);
745 /* access the fifo to activate new threshold
746 * retval (mis-) used as buffer here
748 return rf69_read_fifo(spi, (u8 *)&retval, 1);
751 int rf69_set_dagc(struct spi_device *spi, enum dagc dagc)
755 return rf69_write_reg(spi, REG_TESTDAGC, DAGC_NORMAL);
757 return rf69_write_reg(spi, REG_TESTDAGC, DAGC_IMPROVED_LOWBETA0);
758 case improve4LowModulationIndex:
759 return rf69_write_reg(spi, REG_TESTDAGC, DAGC_IMPROVED_LOWBETA1);
761 dev_dbg(&spi->dev, "set: illegal input param");
766 /*-------------------------------------------------------------------------*/
768 int rf69_read_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
770 #ifdef DEBUG_FIFO_ACCESS
773 struct spi_transfer transfer;
774 u8 local_buffer[FIFO_SIZE + 1];
777 if (size > FIFO_SIZE) {
778 dev_dbg(&spi->dev, "read fifo: passed in buffer bigger then internal buffer\n");
782 /* prepare a bidirectional transfer */
783 local_buffer[0] = REG_FIFO;
784 memset(&transfer, 0, sizeof(transfer));
785 transfer.tx_buf = local_buffer;
786 transfer.rx_buf = local_buffer;
787 transfer.len = size + 1;
789 retval = spi_sync_transfer(spi, &transfer, 1);
791 #ifdef DEBUG_FIFO_ACCESS
792 for (i = 0; i < size; i++)
793 dev_dbg(&spi->dev, "%d - 0x%x\n", i, local_buffer[i + 1]);
796 memcpy(buffer, &local_buffer[1], size);
801 int rf69_write_fifo(struct spi_device *spi, u8 *buffer, unsigned int size)
803 #ifdef DEBUG_FIFO_ACCESS
806 char spi_address = REG_FIFO | WRITE_BIT;
807 u8 local_buffer[FIFO_SIZE + 1];
809 if (size > FIFO_SIZE) {
810 dev_dbg(&spi->dev, "read fifo: passed in buffer bigger then internal buffer\n");
814 local_buffer[0] = spi_address;
815 memcpy(&local_buffer[1], buffer, size);
817 #ifdef DEBUG_FIFO_ACCESS
818 for (i = 0; i < size; i++)
819 dev_dbg(&spi->dev, "0x%x\n", buffer[i]);
822 return spi_write(spi, local_buffer, size + 1);