drivers/thermal/qoriq_thermal.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Copyright 2016 Freescale Semiconductor, Inc.
   4
   5 #include <linux/clk.h>
   6 #include <linux/module.h>
   7 #include <linux/platform_device.h>
   8 #include <linux/err.h>
   9 #include <linux/io.h>
  10 #include <linux/of.h>
  11 #include <linux/of_address.h>
  12 #include <linux/regmap.h>
  13 #include <linux/sizes.h>
  14 #include <linux/thermal.h>
  15
  16 #include "thermal_core.h"
  17
  18 #define SITES_MAX               16
  19 #define TMR_DISABLE             0x0
  20 #define TMR_ME                  0x80000000
  21 #define TMR_ALPF                0x0c000000
  22 #define TMR_ALPF_V2             0x03000000
  23 #define TMTMIR_DEFAULT  0x0000000f
  24 #define TIER_DISABLE    0x0
  25 #define TEUMR0_V2               0x51009c00
  26 #define TMU_VER1                0x1
  27 #define TMU_VER2                0x2
  28
  29 #define REGS_TMR        0x000   /* Mode Register */
  30 #define TMR_DISABLE     0x0
  31 #define TMR_ME          0x80000000
  32 #define TMR_ALPF        0x0c000000
  33
  34 #define REGS_TMTMIR     0x008   /* Temperature measurement interval Register */
  35 #define TMTMIR_DEFAULT  0x0000000f
  36
  37 #define REGS_V2_TMSR    0x008   /* monitor site register */
  38
  39 #define REGS_V2_TMTMIR  0x00c   /* Temperature measurement interval Register */
  40
  41 #define REGS_TIER       0x020   /* Interrupt Enable Register */
  42 #define TIER_DISABLE    0x0
  43
  44
  45 #define REGS_TTCFGR     0x080   /* Temperature Configuration Register */
  46 #define REGS_TSCFGR     0x084   /* Sensor Configuration Register */
  47
  48 #define REGS_TRITSR(n)  (0x100 + 16 * (n)) /* Immediate Temperature
  49                                             * Site Register
  50                                             */
  51 #define REGS_TTRnCR(n)  (0xf10 + 4 * (n)) /* Temperature Range n
  52                                            * Control Register
  53                                            */
  54 #define REGS_IPBRR(n)           (0xbf8 + 4 * (n)) /* IP Block Revision
  55                                                    * Register n
  56                                                    */
  57 #define REGS_V2_TEUMR(n)        (0xf00 + 4 * (n))
  58
  59 /*
  60  * Thermal zone data
  61  */
  62 struct qoriq_sensor {
  63         int                             id;
  64 };
  65
  66 struct qoriq_tmu_data {
  67         int ver;
  68         struct regmap *regmap;
  69         struct clk *clk;
  70         struct qoriq_sensor     sensor[SITES_MAX];
  71 };
  72
  73 static struct qoriq_tmu_data *qoriq_sensor_to_data(struct qoriq_sensor *s)
  74 {
  75         return container_of(s, struct qoriq_tmu_data, sensor[s->id]);
  76 }
  77
  78 static int tmu_get_temp(void *p, int *temp)
  79 {
  80         struct qoriq_sensor *qsensor = p;
  81         struct qoriq_tmu_data *qdata = qoriq_sensor_to_data(qsensor);
  82         u32 val;
  83
  84         regmap_read(qdata->regmap, REGS_TRITSR(qsensor->id), &val);
  85         *temp = (val & 0xff) * 1000;
  86
  87         return 0;
  88 }
  89
  90 static const struct thermal_zone_of_device_ops tmu_tz_ops = {
  91         .get_temp = tmu_get_temp,
  92 };
  93
  94 static int qoriq_tmu_register_tmu_zone(struct device *dev,
  95                                        struct qoriq_tmu_data *qdata)
  96 {
  97         int id, sites = 0;
  98
  99         for (id = 0; id < SITES_MAX; id++) {
 100                 struct thermal_zone_device *tzd;
 101                 struct qoriq_sensor *sensor = &qdata->sensor[id];
 102                 int ret;
 103
 104                 sensor->id = id;
 105
 106                 tzd = devm_thermal_zone_of_sensor_register(dev, id,
 107                                                            sensor,
 108                                                            &tmu_tz_ops);
 109                 ret = PTR_ERR_OR_ZERO(tzd);
 110                 if (ret) {
 111                         if (ret == -ENODEV)
 112                                 continue;
 113                         else
 114                                 return ret;
 115                 }
 116
 117                 if (qdata->ver == TMU_VER1)
 118                         sites |= 0x1 << (15 - id);
 119                 else
 120                         sites |= 0x1 << id;
 121         }
 122
 123         /* Enable monitoring */
 124         if (sites != 0) {
 125                 if (qdata->ver == TMU_VER1) {
 126                         regmap_write(qdata->regmap, REGS_TMR,
 127                                      sites | TMR_ME | TMR_ALPF);
 128                 } else {
 129                         regmap_write(qdata->regmap, REGS_V2_TMSR, sites);
 130                         regmap_write(qdata->regmap, REGS_TMR,
 131                                      TMR_ME | TMR_ALPF_V2);
 132                 }
 133         }
 134
 135         return 0;
 136 }
 137
 138 static int qoriq_tmu_calibration(struct device *dev,
 139                                  struct qoriq_tmu_data *data)
 140 {
 141         int i, val, len;
 142         u32 range[4];
 143         const u32 *calibration;
 144         struct device_node *np = dev->of_node;
 145
 146         len = of_property_count_u32_elems(np, "fsl,tmu-range");
 147         if (len < 0 || len > 4) {
 148                 dev_err(dev, "invalid range data.\n");
 149                 return len;
 150         }
 151
 152         val = of_property_read_u32_array(np, "fsl,tmu-range", range, len);
 153         if (val != 0) {
 154                 dev_err(dev, "failed to read range data.\n");
 155                 return val;
 156         }
 157
 158         /* Init temperature range registers */
 159         for (i = 0; i < len; i++)
 160                 regmap_write(data->regmap, REGS_TTRnCR(i), range[i]);
 161
 162         calibration = of_get_property(np, "fsl,tmu-calibration", &len);
 163         if (calibration == NULL || len % 8) {
 164                 dev_err(dev, "invalid calibration data.\n");
 165                 return -ENODEV;
 166         }
 167
 168         for (i = 0; i < len; i += 8, calibration += 2) {
 169                 val = of_read_number(calibration, 1);
 170                 regmap_write(data->regmap, REGS_TTCFGR, val);
 171                 val = of_read_number(calibration + 1, 1);
 172                 regmap_write(data->regmap, REGS_TSCFGR, val);
 173         }
 174
 175         return 0;
 176 }
 177
 178 static void qoriq_tmu_init_device(struct qoriq_tmu_data *data)
 179 {
 180         /* Disable interrupt, using polling instead */
 181         regmap_write(data->regmap, REGS_TIER, TIER_DISABLE);
 182
 183         /* Set update_interval */
 184
 185         if (data->ver == TMU_VER1) {
 186                 regmap_write(data->regmap, REGS_TMTMIR, TMTMIR_DEFAULT);
 187         } else {
 188                 regmap_write(data->regmap, REGS_V2_TMTMIR, TMTMIR_DEFAULT);
 189                 regmap_write(data->regmap, REGS_V2_TEUMR(0), TEUMR0_V2);
 190         }
 191
 192         /* Disable monitoring */
 193         regmap_write(data->regmap, REGS_TMR, TMR_DISABLE);
 194 }
 195
 196 static const struct regmap_range qoriq_yes_ranges[] = {
 197         regmap_reg_range(REGS_TMR, REGS_TSCFGR),
 198         regmap_reg_range(REGS_TTRnCR(0), REGS_TTRnCR(3)),
 199         regmap_reg_range(REGS_V2_TEUMR(0), REGS_V2_TEUMR(2)),
 200         regmap_reg_range(REGS_IPBRR(0), REGS_IPBRR(1)),
 201         /* Read only registers below */
 202         regmap_reg_range(REGS_TRITSR(0), REGS_TRITSR(15)),
 203 };
 204
 205 static const struct regmap_access_table qoriq_wr_table = {
 206         .yes_ranges     = qoriq_yes_ranges,
 207         .n_yes_ranges   = ARRAY_SIZE(qoriq_yes_ranges) - 1,
 208 };
 209
 210 static const struct regmap_access_table qoriq_rd_table = {
 211         .yes_ranges     = qoriq_yes_ranges,
 212         .n_yes_ranges   = ARRAY_SIZE(qoriq_yes_ranges),
 213 };
 214
 215 static int qoriq_tmu_probe(struct platform_device *pdev)
 216 {
 217         int ret;
 218         u32 ver;
 219         struct qoriq_tmu_data *data;
 220         struct device_node *np = pdev->dev.of_node;
 221         struct device *dev = &pdev->dev;
 222         const bool little_endian = of_property_read_bool(np, "little-endian");
 223         const enum regmap_endian format_endian =
 224                 little_endian ? REGMAP_ENDIAN_LITTLE : REGMAP_ENDIAN_BIG;
 225         const struct regmap_config regmap_config = {
 226                 .reg_bits               = 32,
 227                 .val_bits               = 32,
 228                 .reg_stride             = 4,
 229                 .rd_table               = &qoriq_rd_table,
 230                 .wr_table               = &qoriq_wr_table,
 231                 .val_format_endian      = format_endian,
 232                 .max_register           = SZ_4K,
 233         };
 234         void __iomem *base;
 235
 236         data = devm_kzalloc(dev, sizeof(struct qoriq_tmu_data),
 237                             GFP_KERNEL);
 238         if (!data)
 239                 return -ENOMEM;
 240
 241         base = devm_platform_ioremap_resource(pdev, 0);
 242         ret = PTR_ERR_OR_ZERO(base);
 243         if (ret) {
 244                 dev_err(dev, "Failed to get memory region\n");
 245                 return ret;
 246         }
 247
 248         data->regmap = devm_regmap_init_mmio(dev, base, &regmap_config);
 249         ret = PTR_ERR_OR_ZERO(data->regmap);
 250         if (ret) {
 251                 dev_err(dev, "Failed to init regmap (%d)\n", ret);
 252                 return ret;
 253         }
 254
 255         data->clk = devm_clk_get_optional(dev, NULL);
 256         if (IS_ERR(data->clk))
 257                 return PTR_ERR(data->clk);
 258
 259         ret = clk_prepare_enable(data->clk);
 260         if (ret) {
 261                 dev_err(dev, "Failed to enable clock\n");
 262                 return ret;
 263         }
 264
 265         /* version register offset at: 0xbf8 on both v1 and v2 */
 266         ret = regmap_read(data->regmap, REGS_IPBRR(0), &ver);
 267         if (ret) {
 268                 dev_err(&pdev->dev, "Failed to read IP block version\n");
 269                 return ret;
 270         }
 271         data->ver = (ver >> 8) & 0xff;
 272
 273         qoriq_tmu_init_device(data);    /* TMU initialization */
 274
 275         ret = qoriq_tmu_calibration(dev, data); /* TMU calibration */
 276         if (ret < 0)
 277                 goto err;
 278
 279         ret = qoriq_tmu_register_tmu_zone(dev, data);
 280         if (ret < 0) {
 281                 dev_err(dev, "Failed to register sensors\n");
 282                 ret = -ENODEV;
 283                 goto err;
 284         }
 285
 286         platform_set_drvdata(pdev, data);
 287
 288         return 0;
 289
 290 err:
 291         clk_disable_unprepare(data->clk);
 292
 293         return ret;
 294 }
 295
 296 static int qoriq_tmu_remove(struct platform_device *pdev)
 297 {
 298         struct qoriq_tmu_data *data = platform_get_drvdata(pdev);
 299
 300         /* Disable monitoring */
 301         regmap_write(data->regmap, REGS_TMR, TMR_DISABLE);
 302
 303         clk_disable_unprepare(data->clk);
 304
 305         return 0;
 306 }
 307
 308 static int __maybe_unused qoriq_tmu_suspend(struct device *dev)
 309 {
 310         struct qoriq_tmu_data *data = dev_get_drvdata(dev);
 311         int ret;
 312
 313         ret = regmap_update_bits(data->regmap, REGS_TMR, TMR_ME, 0);
 314         if (ret)
 315                 return ret;
 316
 317         clk_disable_unprepare(data->clk);
 318
 319         return 0;
 320 }
 321
 322 static int __maybe_unused qoriq_tmu_resume(struct device *dev)
 323 {
 324         int ret;
 325         struct qoriq_tmu_data *data = dev_get_drvdata(dev);
 326
 327         ret = clk_prepare_enable(data->clk);
 328         if (ret)
 329                 return ret;
 330
 331         /* Enable monitoring */
 332         return regmap_update_bits(data->regmap, REGS_TMR, TMR_ME, TMR_ME);
 333 }
 334
 335 static SIMPLE_DEV_PM_OPS(qoriq_tmu_pm_ops,
 336                          qoriq_tmu_suspend, qoriq_tmu_resume);
 337
 338 static const struct of_device_id qoriq_tmu_match[] = {
 339         { .compatible = "fsl,qoriq-tmu", },
 340         { .compatible = "fsl,imx8mq-tmu", },
 341         {},
 342 };
 343 MODULE_DEVICE_TABLE(of, qoriq_tmu_match);
 344
 345 static struct platform_driver qoriq_tmu = {
 346         .driver = {
 347                 .name           = "qoriq_thermal",
 348                 .pm             = &qoriq_tmu_pm_ops,
 349                 .of_match_table = qoriq_tmu_match,
 350         },
 351         .probe  = qoriq_tmu_probe,
 352         .remove = qoriq_tmu_remove,
 353 };
 354 module_platform_driver(qoriq_tmu);
 355
 356 MODULE_AUTHOR("Jia Hongtao <hongtao.jia@nxp.com>");
 357 MODULE_DESCRIPTION("QorIQ Thermal Monitoring Unit driver");
 358 MODULE_LICENSE("GPL v2");