2 * Copyright (c) 2014-2016, Fuzhou Rockchip Electronics Co., Ltd
3 * Caesar Wang <wxt@rock-chips.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/interrupt.h>
19 #include <linux/module.h>
21 #include <linux/of_address.h>
22 #include <linux/of_irq.h>
23 #include <linux/platform_device.h>
24 #include <linux/regmap.h>
25 #include <linux/reset.h>
26 #include <linux/thermal.h>
27 #include <linux/mfd/syscon.h>
28 #include <linux/pinctrl/consumer.h>
31 * If the temperature over a period of time High,
32 * the resulting TSHUT gave CRU module,let it reset the entire chip,
33 * or via GPIO give PMIC.
41 * The system Temperature Sensors tshut(tshut) polarity
42 * the bit 8 is tshut polarity.
43 * 0: low active, 1: high active
51 * The system has two Temperature Sensors.
52 * sensor0 is for CPU, and sensor1 is for GPU.
60 * The conversion table has the adc value and temperature.
61 * ADC_DECREMENT: the adc value is of diminishing.(e.g. rk3288_code_table)
62 * ADC_INCREMENT: the adc value is incremental.(e.g. rk3368_code_table)
70 * The max sensors is two in rockchip SoCs.
71 * Two sensors: CPU and GPU sensor.
73 #define SOC_MAX_SENSORS 2
76 * struct chip_tsadc_table - hold information about chip-specific differences
77 * @id: conversion table
78 * @length: size of conversion table
79 * @data_mask: mask to apply on data inputs
80 * @mode: sort mode of this adc variant (incrementing or decrementing)
82 struct chip_tsadc_table {
83 const struct tsadc_table *id;
86 enum adc_sort_mode mode;
90 * struct rockchip_tsadc_chip - hold the private data of tsadc chip
91 * @chn_id[SOC_MAX_SENSORS]: the sensor id of chip correspond to the channel
92 * @chn_num: the channel number of tsadc chip
93 * @tshut_temp: the hardware-controlled shutdown temperature value
94 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
95 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
96 * @initialize: SoC special initialize tsadc controller method
97 * @irq_ack: clear the interrupt
98 * @get_temp: get the temperature
99 * @set_alarm_temp: set the high temperature interrupt
100 * @set_tshut_temp: set the hardware-controlled shutdown temperature
101 * @set_tshut_mode: set the hardware-controlled shutdown mode
102 * @table: the chip-specific conversion table
104 struct rockchip_tsadc_chip {
105 /* The sensor id of chip correspond to the ADC channel */
106 int chn_id[SOC_MAX_SENSORS];
109 /* The hardware-controlled tshut property */
111 enum tshut_mode tshut_mode;
112 enum tshut_polarity tshut_polarity;
114 /* Chip-wide methods */
115 void (*initialize)(struct regmap *grf,
116 void __iomem *reg, enum tshut_polarity p);
117 void (*irq_ack)(void __iomem *reg);
118 void (*control)(void __iomem *reg, bool on);
120 /* Per-sensor methods */
121 int (*get_temp)(const struct chip_tsadc_table *table,
122 int chn, void __iomem *reg, int *temp);
123 int (*set_alarm_temp)(const struct chip_tsadc_table *table,
124 int chn, void __iomem *reg, int temp);
125 int (*set_tshut_temp)(const struct chip_tsadc_table *table,
126 int chn, void __iomem *reg, int temp);
127 void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
129 /* Per-table methods */
130 struct chip_tsadc_table table;
134 * struct rockchip_thermal_sensor - hold the information of thermal sensor
135 * @thermal: pointer to the platform/configuration data
136 * @tzd: pointer to a thermal zone
137 * @id: identifier of the thermal sensor
139 struct rockchip_thermal_sensor {
140 struct rockchip_thermal_data *thermal;
141 struct thermal_zone_device *tzd;
146 * struct rockchip_thermal_data - hold the private data of thermal driver
147 * @chip: pointer to the platform/configuration data
148 * @pdev: platform device of thermal
149 * @reset: the reset controller of tsadc
150 * @sensors[SOC_MAX_SENSORS]: the thermal sensor
151 * @clk: the controller clock is divided by the exteral 24MHz
152 * @pclk: the advanced peripherals bus clock
153 * @grf: the general register file will be used to do static set by software
154 * @regs: the base address of tsadc controller
155 * @tshut_temp: the hardware-controlled shutdown temperature value
156 * @tshut_mode: the hardware-controlled shutdown mode (0:CRU 1:GPIO)
157 * @tshut_polarity: the hardware-controlled active polarity (0:LOW 1:HIGH)
159 struct rockchip_thermal_data {
160 const struct rockchip_tsadc_chip *chip;
161 struct platform_device *pdev;
162 struct reset_control *reset;
164 struct rockchip_thermal_sensor sensors[SOC_MAX_SENSORS];
173 enum tshut_mode tshut_mode;
174 enum tshut_polarity tshut_polarity;
178 * TSADC Sensor Register description:
180 * TSADCV2_* are used for RK3288 SoCs, the other chips can reuse it.
181 * TSADCV3_* are used for newer SoCs than RK3288. (e.g: RK3228, RK3399)
184 #define TSADCV2_USER_CON 0x00
185 #define TSADCV2_AUTO_CON 0x04
186 #define TSADCV2_INT_EN 0x08
187 #define TSADCV2_INT_PD 0x0c
188 #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
189 #define TSADCV2_COMP_INT(chn) (0x30 + (chn) * 0x04)
190 #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
191 #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
192 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
193 #define TSADCV2_AUTO_PERIOD 0x68
194 #define TSADCV2_AUTO_PERIOD_HT 0x6c
196 #define TSADCV2_AUTO_EN BIT(0)
197 #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
198 #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
200 #define TSADCV3_AUTO_Q_SEL_EN BIT(1)
202 #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
203 #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
204 #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
206 #define TSADCV2_INT_PD_CLEAR_MASK ~BIT(8)
207 #define TSADCV3_INT_PD_CLEAR_MASK ~BIT(16)
209 #define TSADCV2_DATA_MASK 0xfff
210 #define TSADCV3_DATA_MASK 0x3ff
212 #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
213 #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
214 #define TSADCV2_AUTO_PERIOD_TIME 250 /* 250ms */
215 #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* 50ms */
216 #define TSADCV3_AUTO_PERIOD_TIME 1875 /* 2.5ms */
217 #define TSADCV3_AUTO_PERIOD_HT_TIME 1875 /* 2.5ms */
219 #define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
221 #define GRF_SARADC_TESTBIT 0x0e644
222 #define GRF_TSADC_TESTBIT_L 0x0e648
223 #define GRF_TSADC_TESTBIT_H 0x0e64c
225 #define PX30_GRF_SOC_CON2 0x0408
227 #define GRF_SARADC_TESTBIT_ON (0x10001 << 2)
228 #define GRF_TSADC_TESTBIT_H_ON (0x10001 << 2)
229 #define GRF_TSADC_VCM_EN_L (0x10001 << 7)
230 #define GRF_TSADC_VCM_EN_H (0x10001 << 7)
232 #define GRF_CON_TSADC_CH_INV (0x10001 << 1)
235 * struct tsadc_table - code to temperature conversion table
236 * @code: the value of adc channel
237 * @temp: the temperature
239 * code to temperature mapping of the temperature sensor is a piece wise linear
240 * curve.Any temperature, code faling between to 2 give temperatures can be
241 * linearly interpolated.
242 * Code to Temperature mapping should be updated based on manufacturer results.
249 static const struct tsadc_table rv1108_table[] = {
285 {TSADCV2_DATA_MASK, 125000},
288 static const struct tsadc_table rk3228_code_table[] = {
324 {TSADCV2_DATA_MASK, 125000},
327 static const struct tsadc_table rk3288_code_table[] = {
328 {TSADCV2_DATA_MASK, -40000},
366 static const struct tsadc_table rk3328_code_table[] = {
401 {TSADCV2_DATA_MASK, 125000},
404 static const struct tsadc_table rk3368_code_table[] = {
440 {TSADCV3_DATA_MASK, 125000},
443 static const struct tsadc_table rk3399_code_table[] = {
479 {TSADCV3_DATA_MASK, 125000},
482 static u32 rk_tsadcv2_temp_to_code(const struct chip_tsadc_table *table,
488 u32 error = table->data_mask;
491 high = (table->length - 1) - 1; /* ignore the last check for table */
492 mid = (high + low) / 2;
494 /* Return mask code data when the temp is over table range */
495 if (temp < table->id[low].temp || temp > table->id[high].temp)
498 while (low <= high) {
499 if (temp == table->id[mid].temp)
500 return table->id[mid].code;
501 else if (temp < table->id[mid].temp)
505 mid = (low + high) / 2;
509 * The conversion code granularity provided by the table. Let's
510 * assume that the relationship between temperature and
511 * analog value between 2 table entries is linear and interpolate
512 * to produce less granular result.
514 num = abs(table->id[mid + 1].code - table->id[mid].code);
515 num *= temp - table->id[mid].temp;
516 denom = table->id[mid + 1].temp - table->id[mid].temp;
518 switch (table->mode) {
520 return table->id[mid].code - (num / denom);
522 return table->id[mid].code + (num / denom);
524 pr_err("%s: unknown table mode: %d\n", __func__, table->mode);
529 pr_err("%s: invalid temperature, temp=%d error=%d\n",
530 __func__, temp, error);
534 static int rk_tsadcv2_code_to_temp(const struct chip_tsadc_table *table,
537 unsigned int low = 1;
538 unsigned int high = table->length - 1;
539 unsigned int mid = (low + high) / 2;
543 WARN_ON(table->length < 2);
545 switch (table->mode) {
547 code &= table->data_mask;
548 if (code <= table->id[high].code)
549 return -EAGAIN; /* Incorrect reading */
551 while (low <= high) {
552 if (code >= table->id[mid].code &&
553 code < table->id[mid - 1].code)
555 else if (code < table->id[mid].code)
560 mid = (low + high) / 2;
564 code &= table->data_mask;
565 if (code < table->id[low].code)
566 return -EAGAIN; /* Incorrect reading */
568 while (low <= high) {
569 if (code <= table->id[mid].code &&
570 code > table->id[mid - 1].code)
572 else if (code > table->id[mid].code)
577 mid = (low + high) / 2;
581 pr_err("%s: unknown table mode: %d\n", __func__, table->mode);
586 * The 5C granularity provided by the table is too much. Let's
587 * assume that the relationship between sensor readings and
588 * temperature between 2 table entries is linear and interpolate
589 * to produce less granular result.
591 num = table->id[mid].temp - table->id[mid - 1].temp;
592 num *= abs(table->id[mid - 1].code - code);
593 denom = abs(table->id[mid - 1].code - table->id[mid].code);
594 *temp = table->id[mid - 1].temp + (num / denom);
600 * rk_tsadcv2_initialize - initialize TASDC Controller.
602 * (1) Set TSADC_V2_AUTO_PERIOD:
603 * Configure the interleave between every two accessing of
604 * TSADC in normal operation.
606 * (2) Set TSADCV2_AUTO_PERIOD_HT:
607 * Configure the interleave between every two accessing of
608 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
610 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
611 * If the temperature is higher than COMP_INT or COMP_SHUT for
612 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
614 static void rk_tsadcv2_initialize(struct regmap *grf, void __iomem *regs,
615 enum tshut_polarity tshut_polarity)
617 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
618 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
619 regs + TSADCV2_AUTO_CON);
621 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
622 regs + TSADCV2_AUTO_CON);
624 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
625 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
626 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
627 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
628 regs + TSADCV2_AUTO_PERIOD_HT);
629 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
630 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
634 * rk_tsadcv3_initialize - initialize TASDC Controller.
636 * (1) The tsadc control power sequence.
638 * (2) Set TSADC_V2_AUTO_PERIOD:
639 * Configure the interleave between every two accessing of
640 * TSADC in normal operation.
642 * (2) Set TSADCV2_AUTO_PERIOD_HT:
643 * Configure the interleave between every two accessing of
644 * TSADC after the temperature is higher than COM_SHUT or COM_INT.
646 * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE:
647 * If the temperature is higher than COMP_INT or COMP_SHUT for
648 * "debounce" times, TSADC controller will generate interrupt or TSHUT.
650 static void rk_tsadcv3_initialize(struct regmap *grf, void __iomem *regs,
651 enum tshut_polarity tshut_polarity)
653 /* The tsadc control power sequence */
655 /* Set interleave value to workround ic time sync issue */
656 writel_relaxed(TSADCV2_USER_INTER_PD_SOC, regs +
659 writel_relaxed(TSADCV2_AUTO_PERIOD_TIME,
660 regs + TSADCV2_AUTO_PERIOD);
661 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
662 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
663 writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
664 regs + TSADCV2_AUTO_PERIOD_HT);
665 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
666 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
669 /* Enable the voltage common mode feature */
670 regmap_write(grf, GRF_TSADC_TESTBIT_L, GRF_TSADC_VCM_EN_L);
671 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_VCM_EN_H);
673 usleep_range(15, 100); /* The spec note says at least 15 us */
674 regmap_write(grf, GRF_SARADC_TESTBIT, GRF_SARADC_TESTBIT_ON);
675 regmap_write(grf, GRF_TSADC_TESTBIT_H, GRF_TSADC_TESTBIT_H_ON);
676 usleep_range(90, 200); /* The spec note says at least 90 us */
678 writel_relaxed(TSADCV3_AUTO_PERIOD_TIME,
679 regs + TSADCV2_AUTO_PERIOD);
680 writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
681 regs + TSADCV2_HIGHT_INT_DEBOUNCE);
682 writel_relaxed(TSADCV3_AUTO_PERIOD_HT_TIME,
683 regs + TSADCV2_AUTO_PERIOD_HT);
684 writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
685 regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
688 if (tshut_polarity == TSHUT_HIGH_ACTIVE)
689 writel_relaxed(0U | TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
690 regs + TSADCV2_AUTO_CON);
692 writel_relaxed(0U & ~TSADCV2_AUTO_TSHUT_POLARITY_HIGH,
693 regs + TSADCV2_AUTO_CON);
696 static void rk_tsadcv4_initialize(struct regmap *grf, void __iomem *regs,
697 enum tshut_polarity tshut_polarity)
699 rk_tsadcv2_initialize(grf, regs, tshut_polarity);
700 regmap_write(grf, PX30_GRF_SOC_CON2, GRF_CON_TSADC_CH_INV);
703 static void rk_tsadcv2_irq_ack(void __iomem *regs)
707 val = readl_relaxed(regs + TSADCV2_INT_PD);
708 writel_relaxed(val & TSADCV2_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
711 static void rk_tsadcv3_irq_ack(void __iomem *regs)
715 val = readl_relaxed(regs + TSADCV2_INT_PD);
716 writel_relaxed(val & TSADCV3_INT_PD_CLEAR_MASK, regs + TSADCV2_INT_PD);
719 static void rk_tsadcv2_control(void __iomem *regs, bool enable)
723 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
725 val |= TSADCV2_AUTO_EN;
727 val &= ~TSADCV2_AUTO_EN;
729 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
733 * rk_tsadcv3_control - the tsadc controller is enabled or disabled.
735 * NOTE: TSADC controller works at auto mode, and some SoCs need set the
736 * tsadc_q_sel bit on TSADCV2_AUTO_CON[1]. The (1024 - tsadc_q) as output
737 * adc value if setting this bit to enable.
739 static void rk_tsadcv3_control(void __iomem *regs, bool enable)
743 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
745 val |= TSADCV2_AUTO_EN | TSADCV3_AUTO_Q_SEL_EN;
747 val &= ~TSADCV2_AUTO_EN;
749 writel_relaxed(val, regs + TSADCV2_AUTO_CON);
752 static int rk_tsadcv2_get_temp(const struct chip_tsadc_table *table,
753 int chn, void __iomem *regs, int *temp)
757 val = readl_relaxed(regs + TSADCV2_DATA(chn));
759 return rk_tsadcv2_code_to_temp(table, val, temp);
762 static int rk_tsadcv2_alarm_temp(const struct chip_tsadc_table *table,
763 int chn, void __iomem *regs, int temp)
769 * In some cases, some sensors didn't need the trip points, the
770 * set_trips will pass {-INT_MAX, INT_MAX} to trigger tsadc alarm
771 * in the end, ignore this case and disable the high temperature
774 if (temp == INT_MAX) {
775 int_clr = readl_relaxed(regs + TSADCV2_INT_EN);
776 int_clr &= ~TSADCV2_INT_SRC_EN(chn);
777 writel_relaxed(int_clr, regs + TSADCV2_INT_EN);
781 /* Make sure the value is valid */
782 alarm_value = rk_tsadcv2_temp_to_code(table, temp);
783 if (alarm_value == table->data_mask)
786 writel_relaxed(alarm_value & table->data_mask,
787 regs + TSADCV2_COMP_INT(chn));
789 int_en = readl_relaxed(regs + TSADCV2_INT_EN);
790 int_en |= TSADCV2_INT_SRC_EN(chn);
791 writel_relaxed(int_en, regs + TSADCV2_INT_EN);
796 static int rk_tsadcv2_tshut_temp(const struct chip_tsadc_table *table,
797 int chn, void __iomem *regs, int temp)
799 u32 tshut_value, val;
801 /* Make sure the value is valid */
802 tshut_value = rk_tsadcv2_temp_to_code(table, temp);
803 if (tshut_value == table->data_mask)
806 writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
808 /* TSHUT will be valid */
809 val = readl_relaxed(regs + TSADCV2_AUTO_CON);
810 writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
815 static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
816 enum tshut_mode mode)
820 val = readl_relaxed(regs + TSADCV2_INT_EN);
821 if (mode == TSHUT_MODE_GPIO) {
822 val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
823 val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
825 val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
826 val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
829 writel_relaxed(val, regs + TSADCV2_INT_EN);
832 static const struct rockchip_tsadc_chip px30_tsadc_data = {
833 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
834 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
835 .chn_num = 2, /* 2 channels for tsadc */
837 .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
840 .initialize = rk_tsadcv4_initialize,
841 .irq_ack = rk_tsadcv3_irq_ack,
842 .control = rk_tsadcv3_control,
843 .get_temp = rk_tsadcv2_get_temp,
844 .set_alarm_temp = rk_tsadcv2_alarm_temp,
845 .set_tshut_temp = rk_tsadcv2_tshut_temp,
846 .set_tshut_mode = rk_tsadcv2_tshut_mode,
849 .id = rk3328_code_table,
850 .length = ARRAY_SIZE(rk3328_code_table),
851 .data_mask = TSADCV2_DATA_MASK,
852 .mode = ADC_INCREMENT,
856 static const struct rockchip_tsadc_chip rv1108_tsadc_data = {
857 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
858 .chn_num = 1, /* one channel for tsadc */
860 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
861 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
864 .initialize = rk_tsadcv2_initialize,
865 .irq_ack = rk_tsadcv3_irq_ack,
866 .control = rk_tsadcv3_control,
867 .get_temp = rk_tsadcv2_get_temp,
868 .set_alarm_temp = rk_tsadcv2_alarm_temp,
869 .set_tshut_temp = rk_tsadcv2_tshut_temp,
870 .set_tshut_mode = rk_tsadcv2_tshut_mode,
874 .length = ARRAY_SIZE(rv1108_table),
875 .data_mask = TSADCV2_DATA_MASK,
876 .mode = ADC_INCREMENT,
880 static const struct rockchip_tsadc_chip rk3228_tsadc_data = {
881 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
882 .chn_num = 1, /* one channel for tsadc */
884 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
885 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
888 .initialize = rk_tsadcv2_initialize,
889 .irq_ack = rk_tsadcv3_irq_ack,
890 .control = rk_tsadcv3_control,
891 .get_temp = rk_tsadcv2_get_temp,
892 .set_alarm_temp = rk_tsadcv2_alarm_temp,
893 .set_tshut_temp = rk_tsadcv2_tshut_temp,
894 .set_tshut_mode = rk_tsadcv2_tshut_mode,
897 .id = rk3228_code_table,
898 .length = ARRAY_SIZE(rk3228_code_table),
899 .data_mask = TSADCV3_DATA_MASK,
900 .mode = ADC_INCREMENT,
904 static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
905 .chn_id[SENSOR_CPU] = 1, /* cpu sensor is channel 1 */
906 .chn_id[SENSOR_GPU] = 2, /* gpu sensor is channel 2 */
907 .chn_num = 2, /* two channels for tsadc */
909 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
910 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
913 .initialize = rk_tsadcv2_initialize,
914 .irq_ack = rk_tsadcv2_irq_ack,
915 .control = rk_tsadcv2_control,
916 .get_temp = rk_tsadcv2_get_temp,
917 .set_alarm_temp = rk_tsadcv2_alarm_temp,
918 .set_tshut_temp = rk_tsadcv2_tshut_temp,
919 .set_tshut_mode = rk_tsadcv2_tshut_mode,
922 .id = rk3288_code_table,
923 .length = ARRAY_SIZE(rk3288_code_table),
924 .data_mask = TSADCV2_DATA_MASK,
925 .mode = ADC_DECREMENT,
929 static const struct rockchip_tsadc_chip rk3328_tsadc_data = {
930 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
931 .chn_num = 1, /* one channels for tsadc */
933 .tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
936 .initialize = rk_tsadcv2_initialize,
937 .irq_ack = rk_tsadcv3_irq_ack,
938 .control = rk_tsadcv3_control,
939 .get_temp = rk_tsadcv2_get_temp,
940 .set_alarm_temp = rk_tsadcv2_alarm_temp,
941 .set_tshut_temp = rk_tsadcv2_tshut_temp,
942 .set_tshut_mode = rk_tsadcv2_tshut_mode,
945 .id = rk3328_code_table,
946 .length = ARRAY_SIZE(rk3328_code_table),
947 .data_mask = TSADCV2_DATA_MASK,
948 .mode = ADC_INCREMENT,
952 static const struct rockchip_tsadc_chip rk3366_tsadc_data = {
953 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
954 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
955 .chn_num = 2, /* two channels for tsadc */
957 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
958 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
961 .initialize = rk_tsadcv3_initialize,
962 .irq_ack = rk_tsadcv3_irq_ack,
963 .control = rk_tsadcv3_control,
964 .get_temp = rk_tsadcv2_get_temp,
965 .set_alarm_temp = rk_tsadcv2_alarm_temp,
966 .set_tshut_temp = rk_tsadcv2_tshut_temp,
967 .set_tshut_mode = rk_tsadcv2_tshut_mode,
970 .id = rk3228_code_table,
971 .length = ARRAY_SIZE(rk3228_code_table),
972 .data_mask = TSADCV3_DATA_MASK,
973 .mode = ADC_INCREMENT,
977 static const struct rockchip_tsadc_chip rk3368_tsadc_data = {
978 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
979 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
980 .chn_num = 2, /* two channels for tsadc */
982 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
983 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
986 .initialize = rk_tsadcv2_initialize,
987 .irq_ack = rk_tsadcv2_irq_ack,
988 .control = rk_tsadcv2_control,
989 .get_temp = rk_tsadcv2_get_temp,
990 .set_alarm_temp = rk_tsadcv2_alarm_temp,
991 .set_tshut_temp = rk_tsadcv2_tshut_temp,
992 .set_tshut_mode = rk_tsadcv2_tshut_mode,
995 .id = rk3368_code_table,
996 .length = ARRAY_SIZE(rk3368_code_table),
997 .data_mask = TSADCV3_DATA_MASK,
998 .mode = ADC_INCREMENT,
1002 static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
1003 .chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
1004 .chn_id[SENSOR_GPU] = 1, /* gpu sensor is channel 1 */
1005 .chn_num = 2, /* two channels for tsadc */
1007 .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
1008 .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
1009 .tshut_temp = 95000,
1011 .initialize = rk_tsadcv3_initialize,
1012 .irq_ack = rk_tsadcv3_irq_ack,
1013 .control = rk_tsadcv3_control,
1014 .get_temp = rk_tsadcv2_get_temp,
1015 .set_alarm_temp = rk_tsadcv2_alarm_temp,
1016 .set_tshut_temp = rk_tsadcv2_tshut_temp,
1017 .set_tshut_mode = rk_tsadcv2_tshut_mode,
1020 .id = rk3399_code_table,
1021 .length = ARRAY_SIZE(rk3399_code_table),
1022 .data_mask = TSADCV3_DATA_MASK,
1023 .mode = ADC_INCREMENT,
1027 static const struct of_device_id of_rockchip_thermal_match[] = {
1028 { .compatible = "rockchip,px30-tsadc",
1029 .data = (void *)&px30_tsadc_data,
1032 .compatible = "rockchip,rv1108-tsadc",
1033 .data = (void *)&rv1108_tsadc_data,
1036 .compatible = "rockchip,rk3228-tsadc",
1037 .data = (void *)&rk3228_tsadc_data,
1040 .compatible = "rockchip,rk3288-tsadc",
1041 .data = (void *)&rk3288_tsadc_data,
1044 .compatible = "rockchip,rk3328-tsadc",
1045 .data = (void *)&rk3328_tsadc_data,
1048 .compatible = "rockchip,rk3366-tsadc",
1049 .data = (void *)&rk3366_tsadc_data,
1052 .compatible = "rockchip,rk3368-tsadc",
1053 .data = (void *)&rk3368_tsadc_data,
1056 .compatible = "rockchip,rk3399-tsadc",
1057 .data = (void *)&rk3399_tsadc_data,
1061 MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
1064 rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
1066 struct thermal_zone_device *tzd = sensor->tzd;
1068 tzd->ops->set_mode(tzd,
1069 on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
1072 static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
1074 struct rockchip_thermal_data *thermal = dev;
1077 dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
1079 thermal->chip->irq_ack(thermal->regs);
1081 for (i = 0; i < thermal->chip->chn_num; i++)
1082 thermal_zone_device_update(thermal->sensors[i].tzd,
1083 THERMAL_EVENT_UNSPECIFIED);
1088 static int rockchip_thermal_set_trips(void *_sensor, int low, int high)
1090 struct rockchip_thermal_sensor *sensor = _sensor;
1091 struct rockchip_thermal_data *thermal = sensor->thermal;
1092 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
1094 dev_dbg(&thermal->pdev->dev, "%s: sensor %d: low: %d, high %d\n",
1095 __func__, sensor->id, low, high);
1097 return tsadc->set_alarm_temp(&tsadc->table,
1098 sensor->id, thermal->regs, high);
1101 static int rockchip_thermal_get_temp(void *_sensor, int *out_temp)
1103 struct rockchip_thermal_sensor *sensor = _sensor;
1104 struct rockchip_thermal_data *thermal = sensor->thermal;
1105 const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
1108 retval = tsadc->get_temp(&tsadc->table,
1109 sensor->id, thermal->regs, out_temp);
1110 dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %d, retval: %d\n",
1111 sensor->id, *out_temp, retval);
1116 static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
1117 .get_temp = rockchip_thermal_get_temp,
1118 .set_trips = rockchip_thermal_set_trips,
1121 static int rockchip_configure_from_dt(struct device *dev,
1122 struct device_node *np,
1123 struct rockchip_thermal_data *thermal)
1125 u32 shut_temp, tshut_mode, tshut_polarity;
1127 if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
1129 "Missing tshut temp property, using default %d\n",
1130 thermal->chip->tshut_temp);
1131 thermal->tshut_temp = thermal->chip->tshut_temp;
1133 if (shut_temp > INT_MAX) {
1134 dev_err(dev, "Invalid tshut temperature specified: %d\n",
1138 thermal->tshut_temp = shut_temp;
1141 if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
1143 "Missing tshut mode property, using default (%s)\n",
1144 thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
1146 thermal->tshut_mode = thermal->chip->tshut_mode;
1148 thermal->tshut_mode = tshut_mode;
1151 if (thermal->tshut_mode > 1) {
1152 dev_err(dev, "Invalid tshut mode specified: %d\n",
1153 thermal->tshut_mode);
1157 if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
1160 "Missing tshut-polarity property, using default (%s)\n",
1161 thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
1163 thermal->tshut_polarity = thermal->chip->tshut_polarity;
1165 thermal->tshut_polarity = tshut_polarity;
1168 if (thermal->tshut_polarity > 1) {
1169 dev_err(dev, "Invalid tshut-polarity specified: %d\n",
1170 thermal->tshut_polarity);
1174 /* The tsadc wont to handle the error in here since some SoCs didn't
1175 * need this property.
1177 thermal->grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
1178 if (IS_ERR(thermal->grf))
1179 dev_warn(dev, "Missing rockchip,grf property\n");
1185 rockchip_thermal_register_sensor(struct platform_device *pdev,
1186 struct rockchip_thermal_data *thermal,
1187 struct rockchip_thermal_sensor *sensor,
1190 const struct rockchip_tsadc_chip *tsadc = thermal->chip;
1193 tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
1195 error = tsadc->set_tshut_temp(&tsadc->table, id, thermal->regs,
1196 thermal->tshut_temp);
1198 dev_err(&pdev->dev, "%s: invalid tshut=%d, error=%d\n",
1199 __func__, thermal->tshut_temp, error);
1201 sensor->thermal = thermal;
1203 sensor->tzd = devm_thermal_zone_of_sensor_register(&pdev->dev, id,
1204 sensor, &rockchip_of_thermal_ops);
1205 if (IS_ERR(sensor->tzd)) {
1206 error = PTR_ERR(sensor->tzd);
1207 dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
1216 * Reset TSADC Controller, reset all tsadc registers.
1218 static void rockchip_thermal_reset_controller(struct reset_control *reset)
1220 reset_control_assert(reset);
1221 usleep_range(10, 20);
1222 reset_control_deassert(reset);
1225 static int rockchip_thermal_probe(struct platform_device *pdev)
1227 struct device_node *np = pdev->dev.of_node;
1228 struct rockchip_thermal_data *thermal;
1229 const struct of_device_id *match;
1230 struct resource *res;
1235 match = of_match_node(of_rockchip_thermal_match, np);
1239 irq = platform_get_irq(pdev, 0);
1241 dev_err(&pdev->dev, "no irq resource?\n");
1245 thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
1250 thermal->pdev = pdev;
1252 thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
1256 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1257 thermal->regs = devm_ioremap_resource(&pdev->dev, res);
1258 if (IS_ERR(thermal->regs))
1259 return PTR_ERR(thermal->regs);
1261 thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
1262 if (IS_ERR(thermal->reset)) {
1263 error = PTR_ERR(thermal->reset);
1264 dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
1268 thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
1269 if (IS_ERR(thermal->clk)) {
1270 error = PTR_ERR(thermal->clk);
1271 dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
1275 thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
1276 if (IS_ERR(thermal->pclk)) {
1277 error = PTR_ERR(thermal->pclk);
1278 dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
1283 error = clk_prepare_enable(thermal->clk);
1285 dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
1290 error = clk_prepare_enable(thermal->pclk);
1292 dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
1293 goto err_disable_clk;
1296 rockchip_thermal_reset_controller(thermal->reset);
1298 error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
1300 dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
1302 goto err_disable_pclk;
1305 thermal->chip->initialize(thermal->grf, thermal->regs,
1306 thermal->tshut_polarity);
1308 for (i = 0; i < thermal->chip->chn_num; i++) {
1309 error = rockchip_thermal_register_sensor(pdev, thermal,
1310 &thermal->sensors[i],
1311 thermal->chip->chn_id[i]);
1314 "failed to register sensor[%d] : error = %d\n",
1316 goto err_disable_pclk;
1320 error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
1321 &rockchip_thermal_alarm_irq_thread,
1323 "rockchip_thermal", thermal);
1326 "failed to request tsadc irq: %d\n", error);
1327 goto err_disable_pclk;
1330 thermal->chip->control(thermal->regs, true);
1332 for (i = 0; i < thermal->chip->chn_num; i++)
1333 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1335 platform_set_drvdata(pdev, thermal);
1340 clk_disable_unprepare(thermal->pclk);
1342 clk_disable_unprepare(thermal->clk);
1347 static int rockchip_thermal_remove(struct platform_device *pdev)
1349 struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
1352 for (i = 0; i < thermal->chip->chn_num; i++) {
1353 struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
1355 rockchip_thermal_toggle_sensor(sensor, false);
1358 thermal->chip->control(thermal->regs, false);
1360 clk_disable_unprepare(thermal->pclk);
1361 clk_disable_unprepare(thermal->clk);
1366 static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
1368 struct rockchip_thermal_data *thermal = dev_get_drvdata(dev);
1371 for (i = 0; i < thermal->chip->chn_num; i++)
1372 rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
1374 thermal->chip->control(thermal->regs, false);
1376 clk_disable(thermal->pclk);
1377 clk_disable(thermal->clk);
1379 pinctrl_pm_select_sleep_state(dev);
1384 static int __maybe_unused rockchip_thermal_resume(struct device *dev)
1386 struct rockchip_thermal_data *thermal = dev_get_drvdata(dev);
1390 error = clk_enable(thermal->clk);
1394 error = clk_enable(thermal->pclk);
1396 clk_disable(thermal->clk);
1400 rockchip_thermal_reset_controller(thermal->reset);
1402 thermal->chip->initialize(thermal->grf, thermal->regs,
1403 thermal->tshut_polarity);
1405 for (i = 0; i < thermal->chip->chn_num; i++) {
1406 int id = thermal->sensors[i].id;
1408 thermal->chip->set_tshut_mode(id, thermal->regs,
1409 thermal->tshut_mode);
1411 error = thermal->chip->set_tshut_temp(&thermal->chip->table,
1413 thermal->tshut_temp);
1415 dev_err(dev, "%s: invalid tshut=%d, error=%d\n",
1416 __func__, thermal->tshut_temp, error);
1419 thermal->chip->control(thermal->regs, true);
1421 for (i = 0; i < thermal->chip->chn_num; i++)
1422 rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
1424 pinctrl_pm_select_default_state(dev);
1429 static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
1430 rockchip_thermal_suspend, rockchip_thermal_resume);
1432 static struct platform_driver rockchip_thermal_driver = {
1434 .name = "rockchip-thermal",
1435 .pm = &rockchip_thermal_pm_ops,
1436 .of_match_table = of_rockchip_thermal_match,
1438 .probe = rockchip_thermal_probe,
1439 .remove = rockchip_thermal_remove,
1442 module_platform_driver(rockchip_thermal_driver);
1444 MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
1445 MODULE_AUTHOR("Rockchip, Inc.");
1446 MODULE_LICENSE("GPL v2");
1447 MODULE_ALIAS("platform:rockchip-thermal");