2 * Thunderbolt control channel messages
4 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
5 * Copyright (C) 2017, Intel Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
15 #include <linux/types.h>
16 #include <linux/uuid.h>
26 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
27 TB_CFG_ERROR_LINK_ERROR = 1,
28 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
29 TB_CFG_ERROR_NO_SUCH_PORT = 4,
30 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
31 TB_CFG_ERROR_LOOP = 8,
32 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
33 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
37 struct tb_cfg_header {
39 u32 unknown:10; /* highest order bit is set on replies */
43 /* additional header for read/write packets */
44 struct tb_cfg_address {
45 u32 offset:13; /* in dwords */
46 u32 length:6; /* in dwords */
48 enum tb_cfg_space space:2;
49 u32 seq:2; /* sequence number */
53 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
55 struct tb_cfg_header header;
56 struct tb_cfg_address addr;
59 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
60 struct cfg_write_pkg {
61 struct tb_cfg_header header;
62 struct tb_cfg_address addr;
63 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
66 /* TB_CFG_PKG_ERROR */
67 struct cfg_error_pkg {
68 struct tb_cfg_header header;
69 enum tb_cfg_error error:4;
72 u32 zero2:2; /* Both should be zero, still they are different fields. */
76 /* TB_CFG_PKG_EVENT */
77 struct cfg_event_pkg {
78 struct tb_cfg_header header;
84 /* TB_CFG_PKG_RESET */
85 struct cfg_reset_pkg {
86 struct tb_cfg_header header;
89 /* TB_CFG_PKG_PREPARE_TO_SLEEP */
91 struct tb_cfg_header header;
98 ICM_GET_TOPOLOGY = 0x1,
99 ICM_DRIVER_READY = 0x3,
100 ICM_APPROVE_DEVICE = 0x4,
101 ICM_CHALLENGE_DEVICE = 0x5,
102 ICM_ADD_DEVICE_KEY = 0x6,
104 ICM_APPROVE_XDOMAIN = 0x10,
105 ICM_DISCONNECT_XDOMAIN = 0x11,
106 ICM_PREBOOT_ACL = 0x18,
109 enum icm_event_code {
110 ICM_EVENT_DEVICE_CONNECTED = 3,
111 ICM_EVENT_DEVICE_DISCONNECTED = 4,
112 ICM_EVENT_XDOMAIN_CONNECTED = 6,
113 ICM_EVENT_XDOMAIN_DISCONNECTED = 7,
116 struct icm_pkg_header {
123 #define ICM_FLAGS_ERROR BIT(0)
124 #define ICM_FLAGS_NO_KEY BIT(1)
125 #define ICM_FLAGS_SLEVEL_SHIFT 3
126 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
127 #define ICM_FLAGS_WRITE BIT(7)
129 struct icm_pkg_driver_ready {
130 struct icm_pkg_header hdr;
133 /* Falcon Ridge only messages */
135 struct icm_fr_pkg_driver_ready_response {
136 struct icm_pkg_header hdr;
142 #define ICM_FR_SLEVEL_MASK 0xf
144 /* Falcon Ridge & Alpine Ridge common messages */
146 struct icm_fr_pkg_get_topology {
147 struct icm_pkg_header hdr;
150 #define ICM_GET_TOPOLOGY_PACKETS 14
152 struct icm_fr_pkg_get_topology_response {
153 struct icm_pkg_header hdr;
158 u8 drom_i2c_address_index;
162 u32 port_hop_info[16];
165 #define ICM_SWITCH_USED BIT(0)
166 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
167 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
169 #define ICM_PORT_TYPE_MASK GENMASK(23, 0)
170 #define ICM_PORT_INDEX_SHIFT 24
171 #define ICM_PORT_INDEX_MASK GENMASK(31, 24)
173 struct icm_fr_event_device_connected {
174 struct icm_pkg_header hdr;
182 #define ICM_LINK_INFO_LINK_MASK 0x7
183 #define ICM_LINK_INFO_DEPTH_SHIFT 4
184 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
185 #define ICM_LINK_INFO_APPROVED BIT(8)
186 #define ICM_LINK_INFO_REJECTED BIT(9)
187 #define ICM_LINK_INFO_BOOT BIT(10)
189 struct icm_fr_pkg_approve_device {
190 struct icm_pkg_header hdr;
197 struct icm_fr_event_device_disconnected {
198 struct icm_pkg_header hdr;
203 struct icm_fr_event_xdomain_connected {
204 struct icm_pkg_header hdr;
215 struct icm_fr_event_xdomain_disconnected {
216 struct icm_pkg_header hdr;
222 struct icm_fr_pkg_add_device_key {
223 struct icm_pkg_header hdr;
231 struct icm_fr_pkg_add_device_key_response {
232 struct icm_pkg_header hdr;
239 struct icm_fr_pkg_challenge_device {
240 struct icm_pkg_header hdr;
248 struct icm_fr_pkg_challenge_device_response {
249 struct icm_pkg_header hdr;
258 struct icm_fr_pkg_approve_xdomain {
259 struct icm_pkg_header hdr;
269 struct icm_fr_pkg_approve_xdomain_response {
270 struct icm_pkg_header hdr;
280 /* Alpine Ridge only messages */
282 struct icm_ar_pkg_driver_ready_response {
283 struct icm_pkg_header hdr;
289 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
290 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7
291 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
292 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
294 struct icm_ar_pkg_get_route {
295 struct icm_pkg_header hdr;
300 struct icm_ar_pkg_get_route_response {
301 struct icm_pkg_header hdr;
308 struct icm_ar_boot_acl_entry {
313 #define ICM_AR_PREBOOT_ACL_ENTRIES 16
315 struct icm_ar_pkg_preboot_acl {
316 struct icm_pkg_header hdr;
317 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
320 struct icm_ar_pkg_preboot_acl_response {
321 struct icm_pkg_header hdr;
322 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
325 /* Titan Ridge messages */
327 struct icm_tr_pkg_driver_ready_response {
328 struct icm_pkg_header hdr;
336 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
337 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7
338 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
340 struct icm_tr_event_device_connected {
341 struct icm_pkg_header hdr;
351 struct icm_tr_event_device_disconnected {
352 struct icm_pkg_header hdr;
357 struct icm_tr_event_xdomain_connected {
358 struct icm_pkg_header hdr;
369 struct icm_tr_event_xdomain_disconnected {
370 struct icm_pkg_header hdr;
376 struct icm_tr_pkg_approve_device {
377 struct icm_pkg_header hdr;
385 struct icm_tr_pkg_add_device_key {
386 struct icm_pkg_header hdr;
395 struct icm_tr_pkg_challenge_device {
396 struct icm_pkg_header hdr;
405 struct icm_tr_pkg_approve_xdomain {
406 struct icm_pkg_header hdr;
416 struct icm_tr_pkg_disconnect_xdomain {
417 struct icm_pkg_header hdr;
425 struct icm_tr_pkg_challenge_device_response {
426 struct icm_pkg_header hdr;
436 struct icm_tr_pkg_add_device_key_response {
437 struct icm_pkg_header hdr;
445 struct icm_tr_pkg_approve_xdomain_response {
446 struct icm_pkg_header hdr;
456 struct icm_tr_pkg_disconnect_xdomain_response {
457 struct icm_pkg_header hdr;
465 /* XDomain messages */
467 struct tb_xdomain_header {
473 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
474 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
475 #define TB_XDOMAIN_SN_SHIFT 27
478 UUID_REQUEST_OLD = 1,
482 PROPERTIES_CHANGED_REQUEST,
483 PROPERTIES_CHANGED_RESPONSE,
488 struct tb_xdp_header {
489 struct tb_xdomain_header xd_hdr;
494 struct tb_xdp_properties {
495 struct tb_xdp_header hdr;
502 struct tb_xdp_properties_response {
503 struct tb_xdp_header hdr;
513 * Max length of data array single XDomain property response is allowed
516 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
517 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
519 /* Maximum size of the total property block in dwords we allow */
520 #define TB_XDP_PROPERTIES_MAX_LENGTH 500
522 struct tb_xdp_properties_changed {
523 struct tb_xdp_header hdr;
527 struct tb_xdp_properties_changed_response {
528 struct tb_xdp_header hdr;
533 ERROR_UNKNOWN_PACKET,
534 ERROR_UNKNOWN_DOMAIN,
539 struct tb_xdp_error_response {
540 struct tb_xdp_header hdr;