1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Thunderbolt control channel messages
5 * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com>
6 * Copyright (C) 2017, Intel Corporation
12 #include <linux/types.h>
13 #include <linux/uuid.h>
23 TB_CFG_ERROR_PORT_NOT_CONNECTED = 0,
24 TB_CFG_ERROR_LINK_ERROR = 1,
25 TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2,
26 TB_CFG_ERROR_NO_SUCH_PORT = 4,
27 TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */
28 TB_CFG_ERROR_LOOP = 8,
29 TB_CFG_ERROR_HEC_ERROR_DETECTED = 12,
30 TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13,
34 struct tb_cfg_header {
36 u32 unknown:10; /* highest order bit is set on replies */
40 /* additional header for read/write packets */
41 struct tb_cfg_address {
42 u32 offset:13; /* in dwords */
43 u32 length:6; /* in dwords */
45 enum tb_cfg_space space:2;
46 u32 seq:2; /* sequence number */
50 /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */
52 struct tb_cfg_header header;
53 struct tb_cfg_address addr;
56 /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */
57 struct cfg_write_pkg {
58 struct tb_cfg_header header;
59 struct tb_cfg_address addr;
60 u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */
63 /* TB_CFG_PKG_ERROR */
64 struct cfg_error_pkg {
65 struct tb_cfg_header header;
66 enum tb_cfg_error error:4;
69 u32 zero2:2; /* Both should be zero, still they are different fields. */
73 /* TB_CFG_PKG_EVENT */
74 struct cfg_event_pkg {
75 struct tb_cfg_header header;
81 /* TB_CFG_PKG_RESET */
82 struct cfg_reset_pkg {
83 struct tb_cfg_header header;
86 /* TB_CFG_PKG_PREPARE_TO_SLEEP */
88 struct tb_cfg_header header;
95 ICM_GET_TOPOLOGY = 0x1,
96 ICM_DRIVER_READY = 0x3,
97 ICM_APPROVE_DEVICE = 0x4,
98 ICM_CHALLENGE_DEVICE = 0x5,
99 ICM_ADD_DEVICE_KEY = 0x6,
101 ICM_APPROVE_XDOMAIN = 0x10,
102 ICM_DISCONNECT_XDOMAIN = 0x11,
103 ICM_PREBOOT_ACL = 0x18,
106 enum icm_event_code {
107 ICM_EVENT_DEVICE_CONNECTED = 0x3,
108 ICM_EVENT_DEVICE_DISCONNECTED = 0x4,
109 ICM_EVENT_XDOMAIN_CONNECTED = 0x6,
110 ICM_EVENT_XDOMAIN_DISCONNECTED = 0x7,
111 ICM_EVENT_RTD3_VETO = 0xa,
114 struct icm_pkg_header {
121 #define ICM_FLAGS_ERROR BIT(0)
122 #define ICM_FLAGS_NO_KEY BIT(1)
123 #define ICM_FLAGS_SLEVEL_SHIFT 3
124 #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3)
125 #define ICM_FLAGS_DUAL_LANE BIT(5)
126 #define ICM_FLAGS_SPEED_GEN3 BIT(7)
127 #define ICM_FLAGS_WRITE BIT(7)
129 struct icm_pkg_driver_ready {
130 struct icm_pkg_header hdr;
133 /* Falcon Ridge only messages */
135 struct icm_fr_pkg_driver_ready_response {
136 struct icm_pkg_header hdr;
142 #define ICM_FR_SLEVEL_MASK 0xf
144 /* Falcon Ridge & Alpine Ridge common messages */
146 struct icm_fr_pkg_get_topology {
147 struct icm_pkg_header hdr;
150 #define ICM_GET_TOPOLOGY_PACKETS 14
152 struct icm_fr_pkg_get_topology_response {
153 struct icm_pkg_header hdr;
158 u8 drom_i2c_address_index;
162 u32 port_hop_info[16];
165 #define ICM_SWITCH_USED BIT(0)
166 #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1)
167 #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1
169 #define ICM_PORT_TYPE_MASK GENMASK(23, 0)
170 #define ICM_PORT_INDEX_SHIFT 24
171 #define ICM_PORT_INDEX_MASK GENMASK(31, 24)
173 struct icm_fr_event_device_connected {
174 struct icm_pkg_header hdr;
182 #define ICM_LINK_INFO_LINK_MASK 0x7
183 #define ICM_LINK_INFO_DEPTH_SHIFT 4
184 #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4)
185 #define ICM_LINK_INFO_APPROVED BIT(8)
186 #define ICM_LINK_INFO_REJECTED BIT(9)
187 #define ICM_LINK_INFO_BOOT BIT(10)
189 struct icm_fr_pkg_approve_device {
190 struct icm_pkg_header hdr;
197 struct icm_fr_event_device_disconnected {
198 struct icm_pkg_header hdr;
203 struct icm_fr_event_xdomain_connected {
204 struct icm_pkg_header hdr;
215 struct icm_fr_event_xdomain_disconnected {
216 struct icm_pkg_header hdr;
222 struct icm_fr_pkg_add_device_key {
223 struct icm_pkg_header hdr;
231 struct icm_fr_pkg_add_device_key_response {
232 struct icm_pkg_header hdr;
239 struct icm_fr_pkg_challenge_device {
240 struct icm_pkg_header hdr;
248 struct icm_fr_pkg_challenge_device_response {
249 struct icm_pkg_header hdr;
258 struct icm_fr_pkg_approve_xdomain {
259 struct icm_pkg_header hdr;
269 struct icm_fr_pkg_approve_xdomain_response {
270 struct icm_pkg_header hdr;
280 /* Alpine Ridge only messages */
282 struct icm_ar_pkg_driver_ready_response {
283 struct icm_pkg_header hdr;
289 #define ICM_AR_FLAGS_RTD3 BIT(6)
291 #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0)
292 #define ICM_AR_INFO_BOOT_ACL_SHIFT 7
293 #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7)
294 #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13)
296 struct icm_ar_pkg_get_route {
297 struct icm_pkg_header hdr;
302 struct icm_ar_pkg_get_route_response {
303 struct icm_pkg_header hdr;
310 struct icm_ar_boot_acl_entry {
315 #define ICM_AR_PREBOOT_ACL_ENTRIES 16
317 struct icm_ar_pkg_preboot_acl {
318 struct icm_pkg_header hdr;
319 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
322 struct icm_ar_pkg_preboot_acl_response {
323 struct icm_pkg_header hdr;
324 struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES];
327 /* Titan Ridge messages */
329 struct icm_tr_pkg_driver_ready_response {
330 struct icm_pkg_header hdr;
338 #define ICM_TR_FLAGS_RTD3 BIT(6)
340 #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0)
341 #define ICM_TR_INFO_BOOT_ACL_SHIFT 7
342 #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7)
344 struct icm_tr_event_device_connected {
345 struct icm_pkg_header hdr;
355 struct icm_tr_event_device_disconnected {
356 struct icm_pkg_header hdr;
361 struct icm_tr_event_xdomain_connected {
362 struct icm_pkg_header hdr;
373 struct icm_tr_event_xdomain_disconnected {
374 struct icm_pkg_header hdr;
380 struct icm_tr_pkg_approve_device {
381 struct icm_pkg_header hdr;
389 struct icm_tr_pkg_add_device_key {
390 struct icm_pkg_header hdr;
399 struct icm_tr_pkg_challenge_device {
400 struct icm_pkg_header hdr;
409 struct icm_tr_pkg_approve_xdomain {
410 struct icm_pkg_header hdr;
420 struct icm_tr_pkg_disconnect_xdomain {
421 struct icm_pkg_header hdr;
429 struct icm_tr_pkg_challenge_device_response {
430 struct icm_pkg_header hdr;
440 struct icm_tr_pkg_add_device_key_response {
441 struct icm_pkg_header hdr;
449 struct icm_tr_pkg_approve_xdomain_response {
450 struct icm_pkg_header hdr;
460 struct icm_tr_pkg_disconnect_xdomain_response {
461 struct icm_pkg_header hdr;
469 /* Ice Lake messages */
471 struct icm_icl_event_rtd3_veto {
472 struct icm_pkg_header hdr;
476 /* XDomain messages */
478 struct tb_xdomain_header {
484 #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0)
485 #define TB_XDOMAIN_SN_MASK GENMASK(28, 27)
486 #define TB_XDOMAIN_SN_SHIFT 27
489 UUID_REQUEST_OLD = 1,
493 PROPERTIES_CHANGED_REQUEST,
494 PROPERTIES_CHANGED_RESPONSE,
499 struct tb_xdp_header {
500 struct tb_xdomain_header xd_hdr;
506 struct tb_xdp_header hdr;
509 struct tb_xdp_uuid_response {
510 struct tb_xdp_header hdr;
516 struct tb_xdp_properties {
517 struct tb_xdp_header hdr;
524 struct tb_xdp_properties_response {
525 struct tb_xdp_header hdr;
535 * Max length of data array single XDomain property response is allowed
538 #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \
539 (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4)
541 /* Maximum size of the total property block in dwords we allow */
542 #define TB_XDP_PROPERTIES_MAX_LENGTH 500
544 struct tb_xdp_properties_changed {
545 struct tb_xdp_header hdr;
549 struct tb_xdp_properties_changed_response {
550 struct tb_xdp_header hdr;
555 ERROR_UNKNOWN_PACKET,
556 ERROR_UNKNOWN_DOMAIN,
561 struct tb_xdp_error_response {
562 struct tb_xdp_header hdr;