1 // SPDX-License-Identifier: GPL-2.0
3 * Derived from many drivers using generic_serial interface,
4 * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
5 * (was in Linux/VR tree) by Jim Pick.
7 * Copyright (C) 1999 Harald Koerfgen
8 * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
9 * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
10 * Copyright (C) 2000-2002 Toshiba Corporation
12 * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
15 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
19 #include <linux/module.h>
20 #include <linux/ioport.h>
21 #include <linux/init.h>
22 #include <linux/console.h>
23 #include <linux/delay.h>
24 #include <linux/platform_device.h>
25 #include <linux/pci.h>
26 #include <linux/serial_core.h>
27 #include <linux/serial.h>
28 #include <linux/tty.h>
29 #include <linux/tty_flip.h>
33 static char *serial_version = "1.11";
34 static char *serial_name = "TX39/49 Serial driver";
36 #define PASS_LIMIT 256
38 #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
39 /* "ttyS" is used for standard serial driver */
40 #define TXX9_TTY_NAME "ttyTX"
41 #define TXX9_TTY_MINOR_START 196
42 #define TXX9_TTY_MAJOR 204
44 /* acts like standard serial driver */
45 #define TXX9_TTY_NAME "ttyS"
46 #define TXX9_TTY_MINOR_START 64
47 #define TXX9_TTY_MAJOR TTY_MAJOR
51 #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
52 #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
55 /* support for Toshiba TC86C001 SIO */
56 #define ENABLE_SERIAL_TXX9_PCI
60 * Number of serial ports
62 #define UART_NR CONFIG_SERIAL_TXX9_NR_UARTS
64 struct uart_txx9_port {
65 struct uart_port port;
66 /* No additional info for now */
69 #define TXX9_REGION_SIZE 0x24
71 /* TXX9 Serial Registers */
72 #define TXX9_SILCR 0x00
73 #define TXX9_SIDICR 0x04
74 #define TXX9_SIDISR 0x08
75 #define TXX9_SICISR 0x0c
76 #define TXX9_SIFCR 0x10
77 #define TXX9_SIFLCR 0x14
78 #define TXX9_SIBGR 0x18
79 #define TXX9_SITFIFO 0x1c
80 #define TXX9_SIRFIFO 0x20
82 /* SILCR : Line Control */
83 #define TXX9_SILCR_SCS_MASK 0x00000060
84 #define TXX9_SILCR_SCS_IMCLK 0x00000000
85 #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
86 #define TXX9_SILCR_SCS_SCLK 0x00000040
87 #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
88 #define TXX9_SILCR_UEPS 0x00000010
89 #define TXX9_SILCR_UPEN 0x00000008
90 #define TXX9_SILCR_USBL_MASK 0x00000004
91 #define TXX9_SILCR_USBL_1BIT 0x00000000
92 #define TXX9_SILCR_USBL_2BIT 0x00000004
93 #define TXX9_SILCR_UMODE_MASK 0x00000003
94 #define TXX9_SILCR_UMODE_8BIT 0x00000000
95 #define TXX9_SILCR_UMODE_7BIT 0x00000001
97 /* SIDICR : DMA/Int. Control */
98 #define TXX9_SIDICR_TDE 0x00008000
99 #define TXX9_SIDICR_RDE 0x00004000
100 #define TXX9_SIDICR_TIE 0x00002000
101 #define TXX9_SIDICR_RIE 0x00001000
102 #define TXX9_SIDICR_SPIE 0x00000800
103 #define TXX9_SIDICR_CTSAC 0x00000600
104 #define TXX9_SIDICR_STIE_MASK 0x0000003f
105 #define TXX9_SIDICR_STIE_OERS 0x00000020
106 #define TXX9_SIDICR_STIE_CTSS 0x00000010
107 #define TXX9_SIDICR_STIE_RBRKD 0x00000008
108 #define TXX9_SIDICR_STIE_TRDY 0x00000004
109 #define TXX9_SIDICR_STIE_TXALS 0x00000002
110 #define TXX9_SIDICR_STIE_UBRKD 0x00000001
112 /* SIDISR : DMA/Int. Status */
113 #define TXX9_SIDISR_UBRK 0x00008000
114 #define TXX9_SIDISR_UVALID 0x00004000
115 #define TXX9_SIDISR_UFER 0x00002000
116 #define TXX9_SIDISR_UPER 0x00001000
117 #define TXX9_SIDISR_UOER 0x00000800
118 #define TXX9_SIDISR_ERI 0x00000400
119 #define TXX9_SIDISR_TOUT 0x00000200
120 #define TXX9_SIDISR_TDIS 0x00000100
121 #define TXX9_SIDISR_RDIS 0x00000080
122 #define TXX9_SIDISR_STIS 0x00000040
123 #define TXX9_SIDISR_RFDN_MASK 0x0000001f
125 /* SICISR : Change Int. Status */
126 #define TXX9_SICISR_OERS 0x00000020
127 #define TXX9_SICISR_CTSS 0x00000010
128 #define TXX9_SICISR_RBRKD 0x00000008
129 #define TXX9_SICISR_TRDY 0x00000004
130 #define TXX9_SICISR_TXALS 0x00000002
131 #define TXX9_SICISR_UBRKD 0x00000001
133 /* SIFCR : FIFO Control */
134 #define TXX9_SIFCR_SWRST 0x00008000
135 #define TXX9_SIFCR_RDIL_MASK 0x00000180
136 #define TXX9_SIFCR_RDIL_1 0x00000000
137 #define TXX9_SIFCR_RDIL_4 0x00000080
138 #define TXX9_SIFCR_RDIL_8 0x00000100
139 #define TXX9_SIFCR_RDIL_12 0x00000180
140 #define TXX9_SIFCR_RDIL_MAX 0x00000180
141 #define TXX9_SIFCR_TDIL_MASK 0x00000018
142 #define TXX9_SIFCR_TDIL_1 0x00000000
143 #define TXX9_SIFCR_TDIL_4 0x00000001
144 #define TXX9_SIFCR_TDIL_8 0x00000010
145 #define TXX9_SIFCR_TDIL_MAX 0x00000010
146 #define TXX9_SIFCR_TFRST 0x00000004
147 #define TXX9_SIFCR_RFRST 0x00000002
148 #define TXX9_SIFCR_FRSTE 0x00000001
149 #define TXX9_SIO_TX_FIFO 8
150 #define TXX9_SIO_RX_FIFO 16
152 /* SIFLCR : Flow Control */
153 #define TXX9_SIFLCR_RCS 0x00001000
154 #define TXX9_SIFLCR_TES 0x00000800
155 #define TXX9_SIFLCR_RTSSC 0x00000200
156 #define TXX9_SIFLCR_RSDE 0x00000100
157 #define TXX9_SIFLCR_TSDE 0x00000080
158 #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
159 #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
160 #define TXX9_SIFLCR_TBRK 0x00000001
162 /* SIBGR : Baudrate Control */
163 #define TXX9_SIBGR_BCLK_MASK 0x00000300
164 #define TXX9_SIBGR_BCLK_T0 0x00000000
165 #define TXX9_SIBGR_BCLK_T2 0x00000100
166 #define TXX9_SIBGR_BCLK_T4 0x00000200
167 #define TXX9_SIBGR_BCLK_T6 0x00000300
168 #define TXX9_SIBGR_BRD_MASK 0x000000ff
170 static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
172 switch (up->port.iotype) {
174 return __raw_readl(up->port.membase + offset);
176 return inl(up->port.iobase + offset);
181 sio_out(struct uart_txx9_port *up, int offset, int value)
183 switch (up->port.iotype) {
185 __raw_writel(value, up->port.membase + offset);
188 outl(value, up->port.iobase + offset);
194 sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
196 sio_out(up, offset, sio_in(up, offset) & ~value);
199 sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
201 sio_out(up, offset, sio_in(up, offset) | value);
205 sio_quot_set(struct uart_txx9_port *up, int quot)
209 sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
210 else if (quot < (256 << 2))
211 sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
212 else if (quot < (256 << 4))
213 sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
214 else if (quot < (256 << 6))
215 sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
217 sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
220 static struct uart_txx9_port *to_uart_txx9_port(struct uart_port *port)
222 return container_of(port, struct uart_txx9_port, port);
225 static void serial_txx9_stop_tx(struct uart_port *port)
227 struct uart_txx9_port *up = to_uart_txx9_port(port);
228 sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
231 static void serial_txx9_start_tx(struct uart_port *port)
233 struct uart_txx9_port *up = to_uart_txx9_port(port);
234 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
237 static void serial_txx9_stop_rx(struct uart_port *port)
239 struct uart_txx9_port *up = to_uart_txx9_port(port);
240 up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
243 static void serial_txx9_initialize(struct uart_port *port)
245 struct uart_txx9_port *up = to_uart_txx9_port(port);
246 unsigned int tmout = 10000;
248 sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
249 /* TX4925 BUG WORKAROUND. Accessing SIOC register
250 * immediately after soft reset causes bus error. */
252 while ((sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST) && --tmout)
254 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
255 sio_set(up, TXX9_SIFCR,
256 TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
257 /* initial settings */
258 sio_out(up, TXX9_SILCR,
259 TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
260 ((up->port.flags & UPF_TXX9_USE_SCLK) ?
261 TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
262 sio_quot_set(up, uart_get_divisor(port, 9600));
263 sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
264 sio_out(up, TXX9_SIDICR, 0);
268 receive_chars(struct uart_txx9_port *up, unsigned int *status)
271 unsigned int disr = *status;
274 unsigned int next_ignore_status_mask;
277 ch = sio_in(up, TXX9_SIRFIFO);
279 up->port.icount.rx++;
281 /* mask out RFDN_MASK bit added by previous overrun */
282 next_ignore_status_mask =
283 up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
284 if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
285 TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
287 * For statistics only
289 if (disr & TXX9_SIDISR_UBRK) {
290 disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
291 up->port.icount.brk++;
293 * We do the SysRQ and SAK checking
294 * here because otherwise the break
295 * may get masked by ignore_status_mask
296 * or read_status_mask.
298 if (uart_handle_break(&up->port))
300 } else if (disr & TXX9_SIDISR_UPER)
301 up->port.icount.parity++;
302 else if (disr & TXX9_SIDISR_UFER)
303 up->port.icount.frame++;
304 if (disr & TXX9_SIDISR_UOER) {
305 up->port.icount.overrun++;
307 * The receiver read buffer still hold
308 * a char which caused overrun.
309 * Ignore next char by adding RFDN_MASK
310 * to ignore_status_mask temporarily.
312 next_ignore_status_mask |=
313 TXX9_SIDISR_RFDN_MASK;
317 * Mask off conditions which should be ingored.
319 disr &= up->port.read_status_mask;
321 if (disr & TXX9_SIDISR_UBRK) {
323 } else if (disr & TXX9_SIDISR_UPER)
325 else if (disr & TXX9_SIDISR_UFER)
328 if (uart_handle_sysrq_char(&up->port, ch))
331 uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
334 up->port.ignore_status_mask = next_ignore_status_mask;
335 disr = sio_in(up, TXX9_SIDISR);
336 } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
337 spin_unlock(&up->port.lock);
338 tty_flip_buffer_push(&up->port.state->port);
339 spin_lock(&up->port.lock);
343 static inline void transmit_chars(struct uart_txx9_port *up)
345 struct circ_buf *xmit = &up->port.state->xmit;
348 if (up->port.x_char) {
349 sio_out(up, TXX9_SITFIFO, up->port.x_char);
350 up->port.icount.tx++;
354 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
355 serial_txx9_stop_tx(&up->port);
359 count = TXX9_SIO_TX_FIFO;
361 sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
362 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
363 up->port.icount.tx++;
364 if (uart_circ_empty(xmit))
366 } while (--count > 0);
368 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
369 uart_write_wakeup(&up->port);
371 if (uart_circ_empty(xmit))
372 serial_txx9_stop_tx(&up->port);
375 static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
377 int pass_counter = 0;
378 struct uart_txx9_port *up = dev_id;
382 spin_lock(&up->port.lock);
383 status = sio_in(up, TXX9_SIDISR);
384 if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
385 status &= ~TXX9_SIDISR_TDIS;
386 if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
387 TXX9_SIDISR_TOUT))) {
388 spin_unlock(&up->port.lock);
392 if (status & TXX9_SIDISR_RDIS)
393 receive_chars(up, &status);
394 if (status & TXX9_SIDISR_TDIS)
396 /* Clear TX/RX Int. Status */
397 sio_mask(up, TXX9_SIDISR,
398 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
400 spin_unlock(&up->port.lock);
402 if (pass_counter++ > PASS_LIMIT)
406 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
409 static unsigned int serial_txx9_tx_empty(struct uart_port *port)
411 struct uart_txx9_port *up = to_uart_txx9_port(port);
415 spin_lock_irqsave(&up->port.lock, flags);
416 ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
417 spin_unlock_irqrestore(&up->port.lock, flags);
422 static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
424 struct uart_txx9_port *up = to_uart_txx9_port(port);
427 /* no modem control lines */
428 ret = TIOCM_CAR | TIOCM_DSR;
429 ret |= (sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS;
430 ret |= (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS;
435 static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
437 struct uart_txx9_port *up = to_uart_txx9_port(port);
439 if (mctrl & TIOCM_RTS)
440 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
442 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
445 static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
447 struct uart_txx9_port *up = to_uart_txx9_port(port);
450 spin_lock_irqsave(&up->port.lock, flags);
451 if (break_state == -1)
452 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
454 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
455 spin_unlock_irqrestore(&up->port.lock, flags);
458 #if defined(CONFIG_SERIAL_TXX9_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
460 * Wait for transmitter & holding register to empty
462 static void wait_for_xmitr(struct uart_txx9_port *up)
464 unsigned int tmout = 10000;
466 /* Wait up to 10ms for the character(s) to be sent. */
468 !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
471 /* Wait up to 1s for flow control if necessary */
472 if (up->port.flags & UPF_CONS_FLOW) {
475 (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
481 #ifdef CONFIG_CONSOLE_POLL
483 * Console polling routines for writing and reading from the uart while
484 * in an interrupt or debug context.
487 static int serial_txx9_get_poll_char(struct uart_port *port)
491 struct uart_txx9_port *up = to_uart_txx9_port(port);
494 * First save the IER then disable the interrupts
496 ier = sio_in(up, TXX9_SIDICR);
497 sio_out(up, TXX9_SIDICR, 0);
499 while (sio_in(up, TXX9_SIDISR) & TXX9_SIDISR_UVALID)
502 c = sio_in(up, TXX9_SIRFIFO);
505 * Finally, clear RX interrupt status
506 * and restore the IER
508 sio_mask(up, TXX9_SIDISR, TXX9_SIDISR_RDIS);
509 sio_out(up, TXX9_SIDICR, ier);
514 static void serial_txx9_put_poll_char(struct uart_port *port, unsigned char c)
517 struct uart_txx9_port *up = to_uart_txx9_port(port);
520 * First save the IER then disable the interrupts
522 ier = sio_in(up, TXX9_SIDICR);
523 sio_out(up, TXX9_SIDICR, 0);
527 * Send the character out.
529 sio_out(up, TXX9_SITFIFO, c);
532 * Finally, wait for transmitter to become empty
533 * and restore the IER
536 sio_out(up, TXX9_SIDICR, ier);
539 #endif /* CONFIG_CONSOLE_POLL */
541 static int serial_txx9_startup(struct uart_port *port)
543 struct uart_txx9_port *up = to_uart_txx9_port(port);
548 * Clear the FIFO buffers and disable them.
549 * (they will be reenabled in set_termios())
551 sio_set(up, TXX9_SIFCR,
552 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
554 sio_mask(up, TXX9_SIFCR,
555 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
556 sio_out(up, TXX9_SIDICR, 0);
559 * Clear the interrupt registers.
561 sio_out(up, TXX9_SIDISR, 0);
563 retval = request_irq(up->port.irq, serial_txx9_interrupt,
564 IRQF_SHARED, "serial_txx9", up);
569 * Now, initialize the UART
571 spin_lock_irqsave(&up->port.lock, flags);
572 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
573 spin_unlock_irqrestore(&up->port.lock, flags);
576 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
579 * Finally, enable interrupts.
581 sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
586 static void serial_txx9_shutdown(struct uart_port *port)
588 struct uart_txx9_port *up = to_uart_txx9_port(port);
592 * Disable interrupts from this port
594 sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
596 spin_lock_irqsave(&up->port.lock, flags);
597 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
598 spin_unlock_irqrestore(&up->port.lock, flags);
601 * Disable break condition
603 sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
605 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
606 if (up->port.cons && up->port.line == up->port.cons->index) {
607 free_irq(up->port.irq, up);
612 sio_set(up, TXX9_SIFCR,
613 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
615 sio_mask(up, TXX9_SIFCR,
616 TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
619 sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
621 free_irq(up->port.irq, up);
625 serial_txx9_set_termios(struct uart_port *port, struct ktermios *termios,
626 struct ktermios *old)
628 struct uart_txx9_port *up = to_uart_txx9_port(port);
629 unsigned int cval, fcr = 0;
631 unsigned int baud, quot;
634 * We don't support modem control lines.
636 termios->c_cflag &= ~(HUPCL | CMSPAR);
637 termios->c_cflag |= CLOCAL;
639 cval = sio_in(up, TXX9_SILCR);
640 /* byte size and parity */
641 cval &= ~TXX9_SILCR_UMODE_MASK;
642 switch (termios->c_cflag & CSIZE) {
644 cval |= TXX9_SILCR_UMODE_7BIT;
647 case CS5: /* not supported */
648 case CS6: /* not supported */
650 cval |= TXX9_SILCR_UMODE_8BIT;
654 cval &= ~TXX9_SILCR_USBL_MASK;
655 if (termios->c_cflag & CSTOPB)
656 cval |= TXX9_SILCR_USBL_2BIT;
658 cval |= TXX9_SILCR_USBL_1BIT;
659 cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
660 if (termios->c_cflag & PARENB)
661 cval |= TXX9_SILCR_UPEN;
662 if (!(termios->c_cflag & PARODD))
663 cval |= TXX9_SILCR_UEPS;
666 * Ask the core to calculate the divisor for us.
668 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
669 quot = uart_get_divisor(port, baud);
672 /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
673 fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
676 * Ok, we're now changing the port state. Do it with
677 * interrupts disabled.
679 spin_lock_irqsave(&up->port.lock, flags);
682 * Update the per-port timeout.
684 uart_update_timeout(port, termios->c_cflag, baud);
686 up->port.read_status_mask = TXX9_SIDISR_UOER |
687 TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
688 if (termios->c_iflag & INPCK)
689 up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
690 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
691 up->port.read_status_mask |= TXX9_SIDISR_UBRK;
694 * Characteres to ignore
696 up->port.ignore_status_mask = 0;
697 if (termios->c_iflag & IGNPAR)
698 up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
699 if (termios->c_iflag & IGNBRK) {
700 up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
702 * If we're ignoring parity and break indicators,
703 * ignore overruns too (for real raw support).
705 if (termios->c_iflag & IGNPAR)
706 up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
710 * ignore all characters if CREAD is not set
712 if ((termios->c_cflag & CREAD) == 0)
713 up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
715 /* CTS flow control flag */
716 if ((termios->c_cflag & CRTSCTS) &&
717 (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
718 sio_set(up, TXX9_SIFLCR,
719 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
721 sio_mask(up, TXX9_SIFLCR,
722 TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
725 sio_out(up, TXX9_SILCR, cval);
726 sio_quot_set(up, quot);
727 sio_out(up, TXX9_SIFCR, fcr);
729 serial_txx9_set_mctrl(&up->port, up->port.mctrl);
730 spin_unlock_irqrestore(&up->port.lock, flags);
734 serial_txx9_pm(struct uart_port *port, unsigned int state,
735 unsigned int oldstate)
738 * If oldstate was -1 this is called from
739 * uart_configure_port(). In this case do not initialize the
740 * port now, because the port was already initialized (for
741 * non-console port) or should not be initialized here (for
742 * console port). If we initialized the port here we lose
743 * serial console settings.
745 if (state == 0 && oldstate != -1)
746 serial_txx9_initialize(port);
749 static int serial_txx9_request_resource(struct uart_txx9_port *up)
751 unsigned int size = TXX9_REGION_SIZE;
754 switch (up->port.iotype) {
756 if (!up->port.mapbase)
759 if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
764 if (up->port.flags & UPF_IOREMAP) {
765 up->port.membase = ioremap(up->port.mapbase, size);
766 if (!up->port.membase) {
767 release_mem_region(up->port.mapbase, size);
774 if (!request_region(up->port.iobase, size, "serial_txx9"))
781 static void serial_txx9_release_resource(struct uart_txx9_port *up)
783 unsigned int size = TXX9_REGION_SIZE;
785 switch (up->port.iotype) {
787 if (!up->port.mapbase)
790 if (up->port.flags & UPF_IOREMAP) {
791 iounmap(up->port.membase);
792 up->port.membase = NULL;
795 release_mem_region(up->port.mapbase, size);
799 release_region(up->port.iobase, size);
804 static void serial_txx9_release_port(struct uart_port *port)
806 struct uart_txx9_port *up = to_uart_txx9_port(port);
807 serial_txx9_release_resource(up);
810 static int serial_txx9_request_port(struct uart_port *port)
812 struct uart_txx9_port *up = to_uart_txx9_port(port);
813 return serial_txx9_request_resource(up);
816 static void serial_txx9_config_port(struct uart_port *port, int uflags)
818 struct uart_txx9_port *up = to_uart_txx9_port(port);
822 * Find the region that we can probe for. This in turn
823 * tells us whether we can probe for the type of port.
825 ret = serial_txx9_request_resource(up);
828 port->type = PORT_TXX9;
829 up->port.fifosize = TXX9_SIO_TX_FIFO;
831 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
832 if (up->port.line == up->port.cons->index)
835 serial_txx9_initialize(port);
839 serial_txx9_type(struct uart_port *port)
844 static const struct uart_ops serial_txx9_pops = {
845 .tx_empty = serial_txx9_tx_empty,
846 .set_mctrl = serial_txx9_set_mctrl,
847 .get_mctrl = serial_txx9_get_mctrl,
848 .stop_tx = serial_txx9_stop_tx,
849 .start_tx = serial_txx9_start_tx,
850 .stop_rx = serial_txx9_stop_rx,
851 .break_ctl = serial_txx9_break_ctl,
852 .startup = serial_txx9_startup,
853 .shutdown = serial_txx9_shutdown,
854 .set_termios = serial_txx9_set_termios,
855 .pm = serial_txx9_pm,
856 .type = serial_txx9_type,
857 .release_port = serial_txx9_release_port,
858 .request_port = serial_txx9_request_port,
859 .config_port = serial_txx9_config_port,
860 #ifdef CONFIG_CONSOLE_POLL
861 .poll_get_char = serial_txx9_get_poll_char,
862 .poll_put_char = serial_txx9_put_poll_char,
866 static struct uart_txx9_port serial_txx9_ports[UART_NR];
868 static void __init serial_txx9_register_ports(struct uart_driver *drv,
873 for (i = 0; i < UART_NR; i++) {
874 struct uart_txx9_port *up = &serial_txx9_ports[i];
877 up->port.ops = &serial_txx9_pops;
879 if (up->port.iobase || up->port.mapbase)
880 uart_add_one_port(drv, &up->port);
884 #ifdef CONFIG_SERIAL_TXX9_CONSOLE
886 static void serial_txx9_console_putchar(struct uart_port *port, int ch)
888 struct uart_txx9_port *up = to_uart_txx9_port(port);
891 sio_out(up, TXX9_SITFIFO, ch);
895 * Print a string to the serial port trying not to disturb
896 * any possible real use of the port...
898 * The console_lock must be held when we get here.
901 serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
903 struct uart_txx9_port *up = &serial_txx9_ports[co->index];
904 unsigned int ier, flcr;
907 * First save the UER then disable the interrupts
909 ier = sio_in(up, TXX9_SIDICR);
910 sio_out(up, TXX9_SIDICR, 0);
912 * Disable flow-control if enabled (and unnecessary)
914 flcr = sio_in(up, TXX9_SIFLCR);
915 if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
916 sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
918 uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
921 * Finally, wait for transmitter to become empty
922 * and restore the IER
925 sio_out(up, TXX9_SIFLCR, flcr);
926 sio_out(up, TXX9_SIDICR, ier);
929 static int __init serial_txx9_console_setup(struct console *co, char *options)
931 struct uart_port *port;
932 struct uart_txx9_port *up;
939 * Check whether an invalid uart number has been specified, and
940 * if so, search for the first available port that does have
943 if (co->index >= UART_NR)
945 up = &serial_txx9_ports[co->index];
950 serial_txx9_initialize(&up->port);
953 uart_parse_options(options, &baud, &parity, &bits, &flow);
955 return uart_set_options(port, co, baud, parity, bits, flow);
958 static struct uart_driver serial_txx9_reg;
959 static struct console serial_txx9_console = {
960 .name = TXX9_TTY_NAME,
961 .write = serial_txx9_console_write,
962 .device = uart_console_device,
963 .setup = serial_txx9_console_setup,
964 .flags = CON_PRINTBUFFER,
966 .data = &serial_txx9_reg,
969 static int __init serial_txx9_console_init(void)
971 register_console(&serial_txx9_console);
974 console_initcall(serial_txx9_console_init);
976 #define SERIAL_TXX9_CONSOLE &serial_txx9_console
978 #define SERIAL_TXX9_CONSOLE NULL
981 static struct uart_driver serial_txx9_reg = {
982 .owner = THIS_MODULE,
983 .driver_name = "serial_txx9",
984 .dev_name = TXX9_TTY_NAME,
985 .major = TXX9_TTY_MAJOR,
986 .minor = TXX9_TTY_MINOR_START,
988 .cons = SERIAL_TXX9_CONSOLE,
991 int __init early_serial_txx9_setup(struct uart_port *port)
993 if (port->line >= ARRAY_SIZE(serial_txx9_ports))
996 serial_txx9_ports[port->line].port = *port;
997 serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
998 serial_txx9_ports[port->line].port.flags |=
999 UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1003 static DEFINE_MUTEX(serial_txx9_mutex);
1006 * serial_txx9_register_port - register a serial port
1007 * @port: serial port template
1009 * Configure the serial port specified by the request.
1011 * The port is then probed and if necessary the IRQ is autodetected
1012 * If this fails an error is returned.
1014 * On success the port is ready to use and the line number is returned.
1016 static int serial_txx9_register_port(struct uart_port *port)
1019 struct uart_txx9_port *uart;
1022 mutex_lock(&serial_txx9_mutex);
1023 for (i = 0; i < UART_NR; i++) {
1024 uart = &serial_txx9_ports[i];
1025 if (uart_match_port(&uart->port, port)) {
1026 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1031 /* Find unused port */
1032 for (i = 0; i < UART_NR; i++) {
1033 uart = &serial_txx9_ports[i];
1034 if (!(uart->port.iobase || uart->port.mapbase))
1039 uart->port.iobase = port->iobase;
1040 uart->port.membase = port->membase;
1041 uart->port.irq = port->irq;
1042 uart->port.uartclk = port->uartclk;
1043 uart->port.iotype = port->iotype;
1044 uart->port.flags = port->flags
1045 | UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
1046 uart->port.mapbase = port->mapbase;
1048 uart->port.dev = port->dev;
1049 ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
1051 ret = uart->port.line;
1053 mutex_unlock(&serial_txx9_mutex);
1058 * serial_txx9_unregister_port - remove a txx9 serial port at runtime
1059 * @line: serial line number
1061 * Remove one serial port. This may not be called from interrupt
1062 * context. We hand the port back to the our control.
1064 static void serial_txx9_unregister_port(int line)
1066 struct uart_txx9_port *uart = &serial_txx9_ports[line];
1068 mutex_lock(&serial_txx9_mutex);
1069 uart_remove_one_port(&serial_txx9_reg, &uart->port);
1070 uart->port.flags = 0;
1071 uart->port.type = PORT_UNKNOWN;
1072 uart->port.iobase = 0;
1073 uart->port.mapbase = 0;
1074 uart->port.membase = NULL;
1075 uart->port.dev = NULL;
1076 mutex_unlock(&serial_txx9_mutex);
1080 * Register a set of serial devices attached to a platform device.
1082 static int serial_txx9_probe(struct platform_device *dev)
1084 struct uart_port *p = dev_get_platdata(&dev->dev);
1085 struct uart_port port;
1088 memset(&port, 0, sizeof(struct uart_port));
1089 for (i = 0; p && p->uartclk != 0; p++, i++) {
1090 port.iobase = p->iobase;
1091 port.membase = p->membase;
1093 port.uartclk = p->uartclk;
1094 port.iotype = p->iotype;
1095 port.flags = p->flags;
1096 port.mapbase = p->mapbase;
1097 port.dev = &dev->dev;
1098 ret = serial_txx9_register_port(&port);
1100 dev_err(&dev->dev, "unable to register port at index %d "
1101 "(IO%lx MEM%llx IRQ%d): %d\n", i,
1102 p->iobase, (unsigned long long)p->mapbase,
1110 * Remove serial ports registered against a platform device.
1112 static int serial_txx9_remove(struct platform_device *dev)
1116 for (i = 0; i < UART_NR; i++) {
1117 struct uart_txx9_port *up = &serial_txx9_ports[i];
1119 if (up->port.dev == &dev->dev)
1120 serial_txx9_unregister_port(i);
1126 static int serial_txx9_suspend(struct platform_device *dev, pm_message_t state)
1130 for (i = 0; i < UART_NR; i++) {
1131 struct uart_txx9_port *up = &serial_txx9_ports[i];
1133 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1134 uart_suspend_port(&serial_txx9_reg, &up->port);
1140 static int serial_txx9_resume(struct platform_device *dev)
1144 for (i = 0; i < UART_NR; i++) {
1145 struct uart_txx9_port *up = &serial_txx9_ports[i];
1147 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
1148 uart_resume_port(&serial_txx9_reg, &up->port);
1155 static struct platform_driver serial_txx9_plat_driver = {
1156 .probe = serial_txx9_probe,
1157 .remove = serial_txx9_remove,
1159 .suspend = serial_txx9_suspend,
1160 .resume = serial_txx9_resume,
1163 .name = "serial_txx9",
1167 #ifdef ENABLE_SERIAL_TXX9_PCI
1169 * Probe one serial board. Unfortunately, there is no rhyme nor reason
1170 * to the arrangement of serial ports on a PCI card.
1173 pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
1175 struct uart_port port;
1179 rc = pci_enable_device(dev);
1183 memset(&port, 0, sizeof(port));
1184 port.ops = &serial_txx9_pops;
1185 port.flags |= UPF_TXX9_HAVE_CTS_LINE;
1186 port.uartclk = 66670000;
1187 port.irq = dev->irq;
1188 port.iotype = UPIO_PORT;
1189 port.iobase = pci_resource_start(dev, 1);
1190 port.dev = &dev->dev;
1191 line = serial_txx9_register_port(&port);
1193 printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
1194 pci_disable_device(dev);
1197 pci_set_drvdata(dev, &serial_txx9_ports[line]);
1202 static void pciserial_txx9_remove_one(struct pci_dev *dev)
1204 struct uart_txx9_port *up = pci_get_drvdata(dev);
1207 serial_txx9_unregister_port(up->port.line);
1208 pci_disable_device(dev);
1213 static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
1215 struct uart_txx9_port *up = pci_get_drvdata(dev);
1218 uart_suspend_port(&serial_txx9_reg, &up->port);
1219 pci_save_state(dev);
1220 pci_set_power_state(dev, pci_choose_state(dev, state));
1224 static int pciserial_txx9_resume_one(struct pci_dev *dev)
1226 struct uart_txx9_port *up = pci_get_drvdata(dev);
1228 pci_set_power_state(dev, PCI_D0);
1229 pci_restore_state(dev);
1231 uart_resume_port(&serial_txx9_reg, &up->port);
1236 static const struct pci_device_id serial_txx9_pci_tbl[] = {
1237 { PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC) },
1241 static struct pci_driver serial_txx9_pci_driver = {
1242 .name = "serial_txx9",
1243 .probe = pciserial_txx9_init_one,
1244 .remove = pciserial_txx9_remove_one,
1246 .suspend = pciserial_txx9_suspend_one,
1247 .resume = pciserial_txx9_resume_one,
1249 .id_table = serial_txx9_pci_tbl,
1252 MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
1253 #endif /* ENABLE_SERIAL_TXX9_PCI */
1255 static struct platform_device *serial_txx9_plat_devs;
1257 static int __init serial_txx9_init(void)
1261 printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
1263 ret = uart_register_driver(&serial_txx9_reg);
1267 serial_txx9_plat_devs = platform_device_alloc("serial_txx9", -1);
1268 if (!serial_txx9_plat_devs) {
1270 goto unreg_uart_drv;
1273 ret = platform_device_add(serial_txx9_plat_devs);
1277 serial_txx9_register_ports(&serial_txx9_reg,
1278 &serial_txx9_plat_devs->dev);
1280 ret = platform_driver_register(&serial_txx9_plat_driver);
1284 #ifdef ENABLE_SERIAL_TXX9_PCI
1285 ret = pci_register_driver(&serial_txx9_pci_driver);
1291 platform_device_del(serial_txx9_plat_devs);
1293 platform_device_put(serial_txx9_plat_devs);
1295 uart_unregister_driver(&serial_txx9_reg);
1300 static void __exit serial_txx9_exit(void)
1304 #ifdef ENABLE_SERIAL_TXX9_PCI
1305 pci_unregister_driver(&serial_txx9_pci_driver);
1307 platform_driver_unregister(&serial_txx9_plat_driver);
1308 platform_device_unregister(serial_txx9_plat_devs);
1309 for (i = 0; i < UART_NR; i++) {
1310 struct uart_txx9_port *up = &serial_txx9_ports[i];
1311 if (up->port.iobase || up->port.mapbase)
1312 uart_remove_one_port(&serial_txx9_reg, &up->port);
1315 uart_unregister_driver(&serial_txx9_reg);
1318 module_init(serial_txx9_init);
1319 module_exit(serial_txx9_exit);
1321 MODULE_LICENSE("GPL");
1322 MODULE_DESCRIPTION("TX39/49 serial driver");
1324 MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);