2 * xHCI host controller driver for R-Car SoCs
4 * Copyright (C) 2014 Renesas Electronics Corporation
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
11 #include <linux/firmware.h>
12 #include <linux/module.h>
13 #include <linux/platform_device.h>
15 #include <linux/usb/phy.h>
16 #include <linux/sys_soc.h>
19 #include "xhci-plat.h"
20 #include "xhci-rcar.h"
23 * - The V3 firmware is for r8a7796 (with good performance) and r8a7795 es2.0
25 * - The V2 firmware can be used on both r8a7795 (es1.x) and r8a7796.
26 * - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
27 * performance degradation. So, this driver continues to use the V1 if R-Car
29 * - The V1 firmware is impossible to use on R-Car Gen3.
31 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1);
32 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2);
33 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V3);
35 /*** Register Offset ***/
36 #define RCAR_USB3_INT_ENA 0x224 /* Interrupt Enable */
37 #define RCAR_USB3_DL_CTRL 0x250 /* FW Download Control & Status */
38 #define RCAR_USB3_FW_DATA0 0x258 /* FW Data0 */
40 #define RCAR_USB3_LCLK 0xa44 /* LCLK Select */
41 #define RCAR_USB3_CONF1 0xa48 /* USB3.0 Configuration1 */
42 #define RCAR_USB3_CONF2 0xa5c /* USB3.0 Configuration2 */
43 #define RCAR_USB3_CONF3 0xaa8 /* USB3.0 Configuration3 */
44 #define RCAR_USB3_RX_POL 0xab0 /* USB3.0 RX Polarity */
45 #define RCAR_USB3_TX_POL 0xab8 /* USB3.0 TX Polarity */
47 /*** Register Settings ***/
48 /* Interrupt Enable */
49 #define RCAR_USB3_INT_XHC_ENA 0x00000001
50 #define RCAR_USB3_INT_PME_ENA 0x00000002
51 #define RCAR_USB3_INT_HSE_ENA 0x00000004
52 #define RCAR_USB3_INT_ENA_VAL (RCAR_USB3_INT_XHC_ENA | \
53 RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA)
55 /* FW Download Control & Status */
56 #define RCAR_USB3_DL_CTRL_ENABLE 0x00000001
57 #define RCAR_USB3_DL_CTRL_FW_SUCCESS 0x00000010
58 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0 0x00000100
61 #define RCAR_USB3_LCLK_ENA_VAL 0x01030001
63 /* USB3.0 Configuration */
64 #define RCAR_USB3_CONF1_VAL 0x00030204
65 #define RCAR_USB3_CONF2_VAL 0x00030300
66 #define RCAR_USB3_CONF3_VAL 0x13802007
69 #define RCAR_USB3_RX_POL_VAL BIT(21)
70 #define RCAR_USB3_TX_POL_VAL BIT(4)
72 /* For soc_device_attribute */
73 #define RCAR_XHCI_FIRMWARE_V2 BIT(0) /* FIRMWARE V2 */
74 #define RCAR_XHCI_FIRMWARE_V3 BIT(1) /* FIRMWARE V3 */
76 static const struct soc_device_attribute rcar_quirks_match[] = {
78 .soc_id = "r8a7795", .revision = "ES1.*",
79 .data = (void *)RCAR_XHCI_FIRMWARE_V2,
83 .data = (void *)RCAR_XHCI_FIRMWARE_V3,
87 .data = (void *)RCAR_XHCI_FIRMWARE_V3,
92 static void xhci_rcar_start_gen2(struct usb_hcd *hcd)
95 writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
96 /* USB3.0 Configuration */
97 writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
98 writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
99 writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
100 /* USB3.0 Polarity */
101 writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
102 writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
105 static int xhci_rcar_is_gen2(struct device *dev)
107 struct device_node *node = dev->of_node;
109 return of_device_is_compatible(node, "renesas,xhci-r8a7790") ||
110 of_device_is_compatible(node, "renesas,xhci-r8a7791") ||
111 of_device_is_compatible(node, "renesas,xhci-r8a7793") ||
112 of_device_is_compatible(node, "renensas,rcar-gen2-xhci");
115 static int xhci_rcar_is_gen3(struct device *dev)
117 struct device_node *node = dev->of_node;
119 return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
120 of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
121 of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
124 void xhci_rcar_start(struct usb_hcd *hcd)
128 if (hcd->regs != NULL) {
129 /* Interrupt Enable */
130 temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
131 temp |= RCAR_USB3_INT_ENA_VAL;
132 writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
133 if (xhci_rcar_is_gen2(hcd->self.controller))
134 xhci_rcar_start_gen2(hcd);
138 static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
140 struct device *dev = hcd->self.controller;
141 void __iomem *regs = hcd->regs;
142 struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
143 const struct firmware *fw;
144 int retval, index, j, time;
148 const struct soc_device_attribute *attr;
149 const char *firmware_name;
151 attr = soc_device_match(rcar_quirks_match);
153 quirks = (uintptr_t)attr->data;
155 if (quirks & RCAR_XHCI_FIRMWARE_V2)
156 firmware_name = XHCI_RCAR_FIRMWARE_NAME_V2;
157 else if (quirks & RCAR_XHCI_FIRMWARE_V3)
158 firmware_name = XHCI_RCAR_FIRMWARE_NAME_V3;
160 firmware_name = priv->firmware_name;
162 /* request R-Car USB3.0 firmware */
163 retval = request_firmware(&fw, firmware_name, dev);
167 /* download R-Car USB3.0 firmware */
168 temp = readl(regs + RCAR_USB3_DL_CTRL);
169 temp |= RCAR_USB3_DL_CTRL_ENABLE;
170 writel(temp, regs + RCAR_USB3_DL_CTRL);
172 for (index = 0; index < fw->size; index += 4) {
173 /* to avoid reading beyond the end of the buffer */
174 for (data = 0, j = 3; j >= 0; j--) {
175 if ((j + index) < fw->size)
176 data |= fw->data[index + j] << (8 * j);
178 writel(data, regs + RCAR_USB3_FW_DATA0);
179 temp = readl(regs + RCAR_USB3_DL_CTRL);
180 temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
181 writel(temp, regs + RCAR_USB3_DL_CTRL);
183 for (time = 0; time < timeout; time++) {
184 val = readl(regs + RCAR_USB3_DL_CTRL);
185 if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
189 if (time == timeout) {
195 temp = readl(regs + RCAR_USB3_DL_CTRL);
196 temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
197 writel(temp, regs + RCAR_USB3_DL_CTRL);
199 for (time = 0; time < timeout; time++) {
200 val = readl(regs + RCAR_USB3_DL_CTRL);
201 if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
210 release_firmware(fw);
215 /* This function needs to initialize a "phy" of usb before */
216 int xhci_rcar_init_quirk(struct usb_hcd *hcd)
218 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
220 /* If hcd->regs is NULL, we don't just call the following function */
225 * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
226 * to 1. However, these SoCs don't support 64-bit address memory
227 * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
228 * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
231 if (xhci_rcar_is_gen2(hcd->self.controller) ||
232 xhci_rcar_is_gen3(hcd->self.controller))
233 xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
235 return xhci_rcar_download_firmware(hcd);
238 int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
242 ret = xhci_rcar_download_firmware(hcd);
244 xhci_rcar_start(hcd);