2 * Copyright 2010-2011 Picochip Ltd., Jamie Iles
3 * http://www.picochip.com
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
10 * This file implements a driver for the Synopsys DesignWare watchdog device
11 * in the many subsystems. The watchdog has 16 different timeout periods
12 * and these are a function of the input clock frequency.
14 * The DesignWare watchdog cannot be stopped once it has been started so we
15 * do not implement a stop function. The watchdog core will continue to send
16 * heartbeat requests after the watchdog device has been closed.
19 #include <linux/bitops.h>
20 #include <linux/clk.h>
21 #include <linux/delay.h>
22 #include <linux/err.h>
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/moduleparam.h>
29 #include <linux/platform_device.h>
30 #include <linux/reset.h>
31 #include <linux/watchdog.h>
33 #define WDOG_CONTROL_REG_OFFSET 0x00
34 #define WDOG_CONTROL_REG_WDT_EN_MASK 0x01
35 #define WDOG_CONTROL_REG_RESP_MODE_MASK 0x02
36 #define WDOG_TIMEOUT_RANGE_REG_OFFSET 0x04
37 #define WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT 4
38 #define WDOG_CURRENT_COUNT_REG_OFFSET 0x08
39 #define WDOG_COUNTER_RESTART_REG_OFFSET 0x0c
40 #define WDOG_COUNTER_RESTART_KICK_VALUE 0x76
42 /* The maximum TOP (timeout period) value that can be set in the watchdog. */
43 #define DW_WDT_MAX_TOP 15
45 #define DW_WDT_DEFAULT_SECONDS 30
47 static bool nowayout = WATCHDOG_NOWAYOUT;
48 module_param(nowayout, bool, 0);
49 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
50 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
56 struct watchdog_device wdd;
57 struct reset_control *rst;
63 #define to_dw_wdt(wdd) container_of(wdd, struct dw_wdt, wdd)
65 static inline int dw_wdt_is_enabled(struct dw_wdt *dw_wdt)
67 return readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET) &
68 WDOG_CONTROL_REG_WDT_EN_MASK;
71 static inline int dw_wdt_top_in_seconds(struct dw_wdt *dw_wdt, unsigned top)
74 * There are 16 possible timeout values in 0..15 where the number of
75 * cycles is 2 ^ (16 + i) and the watchdog counts down.
77 return (1U << (16 + top)) / dw_wdt->rate;
80 static int dw_wdt_get_top(struct dw_wdt *dw_wdt)
82 int top = readl(dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET) & 0xF;
84 return dw_wdt_top_in_seconds(dw_wdt, top);
87 static int dw_wdt_ping(struct watchdog_device *wdd)
89 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
91 writel(WDOG_COUNTER_RESTART_KICK_VALUE, dw_wdt->regs +
92 WDOG_COUNTER_RESTART_REG_OFFSET);
97 static int dw_wdt_set_timeout(struct watchdog_device *wdd, unsigned int top_s)
99 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
100 int i, top_val = DW_WDT_MAX_TOP;
103 * Iterate over the timeout values until we find the closest match. We
104 * always look for >=.
106 for (i = 0; i <= DW_WDT_MAX_TOP; ++i)
107 if (dw_wdt_top_in_seconds(dw_wdt, i) >= top_s) {
113 * Set the new value in the watchdog. Some versions of dw_wdt
114 * have have TOPINIT in the TIMEOUT_RANGE register (as per
115 * CP_WDT_DUAL_TOP in WDT_COMP_PARAMS_1). On those we
116 * effectively get a pat of the watchdog right here.
118 writel(top_val | top_val << WDOG_TIMEOUT_RANGE_TOPINIT_SHIFT,
119 dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
121 wdd->timeout = dw_wdt_top_in_seconds(dw_wdt, top_val);
126 static void dw_wdt_arm_system_reset(struct dw_wdt *dw_wdt)
128 u32 val = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
130 /* Disable interrupt mode; always perform system reset. */
131 val &= ~WDOG_CONTROL_REG_RESP_MODE_MASK;
132 /* Enable watchdog. */
133 val |= WDOG_CONTROL_REG_WDT_EN_MASK;
134 writel(val, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
137 static int dw_wdt_start(struct watchdog_device *wdd)
139 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
141 dw_wdt_set_timeout(wdd, wdd->timeout);
142 dw_wdt_arm_system_reset(dw_wdt);
147 static int dw_wdt_stop(struct watchdog_device *wdd)
149 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
152 set_bit(WDOG_HW_RUNNING, &wdd->status);
156 reset_control_assert(dw_wdt->rst);
157 reset_control_deassert(dw_wdt->rst);
162 static int dw_wdt_restart(struct watchdog_device *wdd,
163 unsigned long action, void *data)
165 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
167 writel(0, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
168 if (dw_wdt_is_enabled(dw_wdt))
169 writel(WDOG_COUNTER_RESTART_KICK_VALUE,
170 dw_wdt->regs + WDOG_COUNTER_RESTART_REG_OFFSET);
172 dw_wdt_arm_system_reset(dw_wdt);
174 /* wait for reset to assert... */
180 static unsigned int dw_wdt_get_timeleft(struct watchdog_device *wdd)
182 struct dw_wdt *dw_wdt = to_dw_wdt(wdd);
184 return readl(dw_wdt->regs + WDOG_CURRENT_COUNT_REG_OFFSET) /
188 static const struct watchdog_info dw_wdt_ident = {
189 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
191 .identity = "Synopsys DesignWare Watchdog",
194 static const struct watchdog_ops dw_wdt_ops = {
195 .owner = THIS_MODULE,
196 .start = dw_wdt_start,
199 .set_timeout = dw_wdt_set_timeout,
200 .get_timeleft = dw_wdt_get_timeleft,
201 .restart = dw_wdt_restart,
204 #ifdef CONFIG_PM_SLEEP
205 static int dw_wdt_suspend(struct device *dev)
207 struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
209 dw_wdt->control = readl(dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
210 dw_wdt->timeout = readl(dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
212 clk_disable_unprepare(dw_wdt->clk);
217 static int dw_wdt_resume(struct device *dev)
219 struct dw_wdt *dw_wdt = dev_get_drvdata(dev);
220 int err = clk_prepare_enable(dw_wdt->clk);
225 writel(dw_wdt->timeout, dw_wdt->regs + WDOG_TIMEOUT_RANGE_REG_OFFSET);
226 writel(dw_wdt->control, dw_wdt->regs + WDOG_CONTROL_REG_OFFSET);
228 dw_wdt_ping(&dw_wdt->wdd);
232 #endif /* CONFIG_PM_SLEEP */
234 static SIMPLE_DEV_PM_OPS(dw_wdt_pm_ops, dw_wdt_suspend, dw_wdt_resume);
236 static int dw_wdt_drv_probe(struct platform_device *pdev)
238 struct device *dev = &pdev->dev;
239 struct watchdog_device *wdd;
240 struct dw_wdt *dw_wdt;
241 struct resource *mem;
244 dw_wdt = devm_kzalloc(dev, sizeof(*dw_wdt), GFP_KERNEL);
248 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
249 dw_wdt->regs = devm_ioremap_resource(dev, mem);
250 if (IS_ERR(dw_wdt->regs))
251 return PTR_ERR(dw_wdt->regs);
253 dw_wdt->clk = devm_clk_get(dev, NULL);
254 if (IS_ERR(dw_wdt->clk))
255 return PTR_ERR(dw_wdt->clk);
257 ret = clk_prepare_enable(dw_wdt->clk);
261 dw_wdt->rate = clk_get_rate(dw_wdt->clk);
262 if (dw_wdt->rate == 0) {
264 goto out_disable_clk;
267 dw_wdt->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
268 if (IS_ERR(dw_wdt->rst)) {
269 ret = PTR_ERR(dw_wdt->rst);
270 goto out_disable_clk;
273 reset_control_deassert(dw_wdt->rst);
276 wdd->info = &dw_wdt_ident;
277 wdd->ops = &dw_wdt_ops;
278 wdd->min_timeout = 1;
279 wdd->max_hw_heartbeat_ms =
280 dw_wdt_top_in_seconds(dw_wdt, DW_WDT_MAX_TOP) * 1000;
283 watchdog_set_drvdata(wdd, dw_wdt);
284 watchdog_set_nowayout(wdd, nowayout);
285 watchdog_init_timeout(wdd, 0, dev);
288 * If the watchdog is already running, use its already configured
289 * timeout. Otherwise use the default or the value provided through
292 if (dw_wdt_is_enabled(dw_wdt)) {
293 wdd->timeout = dw_wdt_get_top(dw_wdt);
294 set_bit(WDOG_HW_RUNNING, &wdd->status);
296 wdd->timeout = DW_WDT_DEFAULT_SECONDS;
297 watchdog_init_timeout(wdd, 0, dev);
300 platform_set_drvdata(pdev, dw_wdt);
302 watchdog_set_restart_priority(wdd, 128);
304 ret = watchdog_register_device(wdd);
306 goto out_disable_clk;
311 clk_disable_unprepare(dw_wdt->clk);
315 static int dw_wdt_drv_remove(struct platform_device *pdev)
317 struct dw_wdt *dw_wdt = platform_get_drvdata(pdev);
319 watchdog_unregister_device(&dw_wdt->wdd);
320 reset_control_assert(dw_wdt->rst);
321 clk_disable_unprepare(dw_wdt->clk);
327 static const struct of_device_id dw_wdt_of_match[] = {
328 { .compatible = "snps,dw-wdt", },
331 MODULE_DEVICE_TABLE(of, dw_wdt_of_match);
334 static struct platform_driver dw_wdt_driver = {
335 .probe = dw_wdt_drv_probe,
336 .remove = dw_wdt_drv_remove,
339 .of_match_table = of_match_ptr(dw_wdt_of_match),
340 .pm = &dw_wdt_pm_ops,
344 module_platform_driver(dw_wdt_driver);
346 MODULE_AUTHOR("Jamie Iles");
347 MODULE_DESCRIPTION("Synopsys DesignWare Watchdog Driver");
348 MODULE_LICENSE("GPL");