1 // SPDX-License-Identifier: GPL-2.0+
3 * Mellanox watchdog driver
5 * Copyright (C) 2019 Mellanox Technologies
6 * Copyright (C) 2019 Michael Shych <mshych@mellanox.com>
9 #include <linux/bitops.h>
10 #include <linux/device.h>
11 #include <linux/errno.h>
12 #include <linux/log2.h>
13 #include <linux/module.h>
14 #include <linux/platform_data/mlxreg.h>
15 #include <linux/platform_device.h>
16 #include <linux/regmap.h>
17 #include <linux/spinlock.h>
18 #include <linux/types.h>
19 #include <linux/watchdog.h>
21 #define MLXREG_WDT_CLOCK_SCALE 1000
22 #define MLXREG_WDT_MAX_TIMEOUT_TYPE1 32
23 #define MLXREG_WDT_MAX_TIMEOUT_TYPE2 255
24 #define MLXREG_WDT_MIN_TIMEOUT 1
25 #define MLXREG_WDT_OPTIONS_BASE (WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE | \
29 * struct mlxreg_wdt - wd private data:
31 * @wdd: watchdog device;
32 * @device: basic device;
33 * @pdata: data received from platform driver;
34 * @regmap: register map of parent device;
35 * @timeout: defined timeout in sec.;
36 * @action_idx: index for direct access to action register;
37 * @timeout_idx:index for direct access to TO register;
38 * @tleft_idx: index for direct access to time left register;
39 * @ping_idx: index for direct access to ping register;
40 * @reset_idx: index for direct access to reset cause register;
41 * @wd_type: watchdog HW type;
44 struct watchdog_device wdd;
45 struct mlxreg_core_platform_data *pdata;
52 enum mlxreg_wdt_type wdt_type;
55 static void mlxreg_wdt_check_card_reset(struct mlxreg_wdt *wdt)
57 struct mlxreg_core_data *reg_data;
61 if (wdt->reset_idx == -EINVAL)
64 if (!(wdt->wdd.info->options & WDIOF_CARDRESET))
67 reg_data = &wdt->pdata->data[wdt->reset_idx];
68 rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
70 if (regval & ~reg_data->mask) {
71 wdt->wdd.bootstatus = WDIOF_CARDRESET;
72 dev_info(wdt->wdd.parent,
73 "watchdog previously reset the CPU\n");
78 static int mlxreg_wdt_start(struct watchdog_device *wdd)
80 struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
81 struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->action_idx];
83 return regmap_update_bits(wdt->regmap, reg_data->reg, ~reg_data->mask,
87 static int mlxreg_wdt_stop(struct watchdog_device *wdd)
89 struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
90 struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->action_idx];
92 return regmap_update_bits(wdt->regmap, reg_data->reg, ~reg_data->mask,
96 static int mlxreg_wdt_ping(struct watchdog_device *wdd)
98 struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
99 struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->ping_idx];
101 return regmap_update_bits_base(wdt->regmap, reg_data->reg,
102 ~reg_data->mask, BIT(reg_data->bit),
106 static int mlxreg_wdt_set_timeout(struct watchdog_device *wdd,
107 unsigned int timeout)
109 struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
110 struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->timeout_idx];
111 u32 regval, set_time, hw_timeout;
114 if (wdt->wdt_type == MLX_WDT_TYPE1) {
115 rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
119 hw_timeout = order_base_2(timeout * MLXREG_WDT_CLOCK_SCALE);
120 regval = (regval & reg_data->mask) | hw_timeout;
121 /* Rowndown to actual closest number of sec. */
122 set_time = BIT(hw_timeout) / MLXREG_WDT_CLOCK_SCALE;
128 wdd->timeout = set_time;
129 rc = regmap_write(wdt->regmap, reg_data->reg, regval);
133 * Restart watchdog with new timeout period
134 * if watchdog is already started.
136 if (watchdog_active(wdd)) {
137 rc = mlxreg_wdt_stop(wdd);
139 rc = mlxreg_wdt_start(wdd);
146 static unsigned int mlxreg_wdt_get_timeleft(struct watchdog_device *wdd)
148 struct mlxreg_wdt *wdt = watchdog_get_drvdata(wdd);
149 struct mlxreg_core_data *reg_data = &wdt->pdata->data[wdt->tleft_idx];
153 rc = regmap_read(wdt->regmap, reg_data->reg, ®val);
154 /* Return 0 timeleft in case of failure register read. */
155 return rc == 0 ? regval : 0;
158 static const struct watchdog_ops mlxreg_wdt_ops_type1 = {
159 .start = mlxreg_wdt_start,
160 .stop = mlxreg_wdt_stop,
161 .ping = mlxreg_wdt_ping,
162 .set_timeout = mlxreg_wdt_set_timeout,
163 .owner = THIS_MODULE,
166 static const struct watchdog_ops mlxreg_wdt_ops_type2 = {
167 .start = mlxreg_wdt_start,
168 .stop = mlxreg_wdt_stop,
169 .ping = mlxreg_wdt_ping,
170 .set_timeout = mlxreg_wdt_set_timeout,
171 .get_timeleft = mlxreg_wdt_get_timeleft,
172 .owner = THIS_MODULE,
175 static const struct watchdog_info mlxreg_wdt_main_info = {
176 .options = MLXREG_WDT_OPTIONS_BASE
178 .identity = "mlx-wdt-main",
181 static const struct watchdog_info mlxreg_wdt_aux_info = {
182 .options = MLXREG_WDT_OPTIONS_BASE
184 .identity = "mlx-wdt-aux",
187 static void mlxreg_wdt_config(struct mlxreg_wdt *wdt,
188 struct mlxreg_core_platform_data *pdata)
190 struct mlxreg_core_data *data = pdata->data;
193 wdt->reset_idx = -EINVAL;
194 for (i = 0; i < pdata->counter; i++, data++) {
195 if (strnstr(data->label, "action", sizeof(data->label)))
197 else if (strnstr(data->label, "timeout", sizeof(data->label)))
198 wdt->timeout_idx = i;
199 else if (strnstr(data->label, "timeleft", sizeof(data->label)))
201 else if (strnstr(data->label, "ping", sizeof(data->label)))
203 else if (strnstr(data->label, "reset", sizeof(data->label)))
208 if (strnstr(pdata->identity, mlxreg_wdt_main_info.identity,
209 sizeof(mlxreg_wdt_main_info.identity)))
210 wdt->wdd.info = &mlxreg_wdt_main_info;
212 wdt->wdd.info = &mlxreg_wdt_aux_info;
214 wdt->wdt_type = pdata->version;
215 if (wdt->wdt_type == MLX_WDT_TYPE2) {
216 wdt->wdd.ops = &mlxreg_wdt_ops_type2;
217 wdt->wdd.max_timeout = MLXREG_WDT_MAX_TIMEOUT_TYPE2;
219 wdt->wdd.ops = &mlxreg_wdt_ops_type1;
220 wdt->wdd.max_timeout = MLXREG_WDT_MAX_TIMEOUT_TYPE1;
222 wdt->wdd.min_timeout = MLXREG_WDT_MIN_TIMEOUT;
225 static int mlxreg_wdt_init_timeout(struct mlxreg_wdt *wdt,
226 struct mlxreg_core_platform_data *pdata)
230 timeout = pdata->data[wdt->timeout_idx].health_cntr;
231 return mlxreg_wdt_set_timeout(&wdt->wdd, timeout);
234 static int mlxreg_wdt_probe(struct platform_device *pdev)
236 struct device *dev = &pdev->dev;
237 struct mlxreg_core_platform_data *pdata;
238 struct mlxreg_wdt *wdt;
241 pdata = dev_get_platdata(dev);
243 dev_err(dev, "Failed to get platform data.\n");
246 wdt = devm_kzalloc(dev, sizeof(*wdt), GFP_KERNEL);
250 wdt->wdd.parent = dev;
251 wdt->regmap = pdata->regmap;
252 mlxreg_wdt_config(wdt, pdata);
254 if ((pdata->features & MLXREG_CORE_WD_FEATURE_NOWAYOUT))
255 watchdog_set_nowayout(&wdt->wdd, WATCHDOG_NOWAYOUT);
256 watchdog_stop_on_reboot(&wdt->wdd);
257 watchdog_stop_on_unregister(&wdt->wdd);
258 watchdog_set_drvdata(&wdt->wdd, wdt);
259 rc = mlxreg_wdt_init_timeout(wdt, pdata);
263 if ((pdata->features & MLXREG_CORE_WD_FEATURE_START_AT_BOOT)) {
264 rc = mlxreg_wdt_start(&wdt->wdd);
267 set_bit(WDOG_HW_RUNNING, &wdt->wdd.status);
269 mlxreg_wdt_check_card_reset(wdt);
270 rc = devm_watchdog_register_device(dev, &wdt->wdd);
274 dev_err(dev, "Cannot register watchdog device (err=%d)\n", rc);
278 static struct platform_driver mlxreg_wdt_driver = {
279 .probe = mlxreg_wdt_probe,
285 module_platform_driver(mlxreg_wdt_driver);
287 MODULE_AUTHOR("Michael Shych <michaelsh@mellanox.com>");
288 MODULE_DESCRIPTION("Mellanox watchdog driver");
289 MODULE_LICENSE("GPL");
290 MODULE_ALIAS("platform:mlx-wdt");