2 * drivers/watchdog/orion_wdt.c
4 * Watchdog driver for Orion/Kirkwood processors
6 * Author: Sylver Bruneau <sylver.bruneau@googlemail.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/types.h>
18 #include <linux/kernel.h>
19 #include <linux/platform_device.h>
20 #include <linux/watchdog.h>
21 #include <linux/interrupt.h>
23 #include <linux/clk.h>
24 #include <linux/err.h>
26 #include <linux/of_device.h>
28 /* RSTOUT mask register physical address for Orion5x, Kirkwood and Dove */
29 #define ORION_RSTOUT_MASK_OFFSET 0x20108
31 /* Internal registers can be configured at any 1 MiB aligned address */
32 #define INTERNAL_REGS_MASK ~(SZ_1M - 1)
35 * Watchdog timer block registers.
37 #define TIMER_CTRL 0x0000
38 #define TIMER_A370_STATUS 0x04
40 #define WDT_MAX_CYCLE_COUNT 0xffffffff
42 #define WDT_A370_RATIO_MASK(v) ((v) << 16)
43 #define WDT_A370_RATIO_SHIFT 5
44 #define WDT_A370_RATIO (1 << WDT_A370_RATIO_SHIFT)
46 #define WDT_AXP_FIXED_ENABLE_BIT BIT(10)
47 #define WDT_A370_EXPIRED BIT(31)
49 static bool nowayout = WATCHDOG_NOWAYOUT;
50 static int heartbeat = -1; /* module parameter (seconds) */
52 struct orion_watchdog;
54 struct orion_watchdog_data {
55 int wdt_counter_offset;
57 int rstout_enable_bit;
59 int (*clock_init)(struct platform_device *,
60 struct orion_watchdog *);
61 int (*enabled)(struct orion_watchdog *);
62 int (*start)(struct watchdog_device *);
63 int (*stop)(struct watchdog_device *);
66 struct orion_watchdog {
67 struct watchdog_device wdt;
70 void __iomem *rstout_mask;
71 unsigned long clk_rate;
73 const struct orion_watchdog_data *data;
76 static int orion_wdt_clock_init(struct platform_device *pdev,
77 struct orion_watchdog *dev)
81 dev->clk = clk_get(&pdev->dev, NULL);
83 return PTR_ERR(dev->clk);
84 ret = clk_prepare_enable(dev->clk);
90 dev->clk_rate = clk_get_rate(dev->clk);
94 static int armada370_wdt_clock_init(struct platform_device *pdev,
95 struct orion_watchdog *dev)
99 dev->clk = clk_get(&pdev->dev, NULL);
100 if (IS_ERR(dev->clk))
101 return PTR_ERR(dev->clk);
102 ret = clk_prepare_enable(dev->clk);
108 /* Setup watchdog input clock */
109 atomic_io_modify(dev->reg + TIMER_CTRL,
110 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
111 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
113 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
117 static int armada375_wdt_clock_init(struct platform_device *pdev,
118 struct orion_watchdog *dev)
122 dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
123 if (!IS_ERR(dev->clk)) {
124 ret = clk_prepare_enable(dev->clk);
130 atomic_io_modify(dev->reg + TIMER_CTRL,
131 WDT_AXP_FIXED_ENABLE_BIT,
132 WDT_AXP_FIXED_ENABLE_BIT);
133 dev->clk_rate = clk_get_rate(dev->clk);
138 /* Mandatory fallback for proper devicetree backward compatibility */
139 dev->clk = clk_get(&pdev->dev, NULL);
140 if (IS_ERR(dev->clk))
141 return PTR_ERR(dev->clk);
143 ret = clk_prepare_enable(dev->clk);
149 atomic_io_modify(dev->reg + TIMER_CTRL,
150 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT),
151 WDT_A370_RATIO_MASK(WDT_A370_RATIO_SHIFT));
152 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO;
157 static int armadaxp_wdt_clock_init(struct platform_device *pdev,
158 struct orion_watchdog *dev)
162 dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed");
163 if (IS_ERR(dev->clk))
164 return PTR_ERR(dev->clk);
165 ret = clk_prepare_enable(dev->clk);
171 /* Enable the fixed watchdog clock input */
172 atomic_io_modify(dev->reg + TIMER_CTRL,
173 WDT_AXP_FIXED_ENABLE_BIT,
174 WDT_AXP_FIXED_ENABLE_BIT);
176 dev->clk_rate = clk_get_rate(dev->clk);
180 static int orion_wdt_ping(struct watchdog_device *wdt_dev)
182 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
183 /* Reload watchdog duration */
184 writel(dev->clk_rate * wdt_dev->timeout,
185 dev->reg + dev->data->wdt_counter_offset);
189 static int armada375_start(struct watchdog_device *wdt_dev)
191 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
194 /* Set watchdog duration */
195 writel(dev->clk_rate * wdt_dev->timeout,
196 dev->reg + dev->data->wdt_counter_offset);
198 /* Clear the watchdog expiration bit */
199 atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
201 /* Enable watchdog timer */
202 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
203 dev->data->wdt_enable_bit);
205 /* Enable reset on watchdog */
206 reg = readl(dev->rstout);
207 reg |= dev->data->rstout_enable_bit;
208 writel(reg, dev->rstout);
210 atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit, 0);
214 static int armada370_start(struct watchdog_device *wdt_dev)
216 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
219 /* Set watchdog duration */
220 writel(dev->clk_rate * wdt_dev->timeout,
221 dev->reg + dev->data->wdt_counter_offset);
223 /* Clear the watchdog expiration bit */
224 atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0);
226 /* Enable watchdog timer */
227 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
228 dev->data->wdt_enable_bit);
230 /* Enable reset on watchdog */
231 reg = readl(dev->rstout);
232 reg |= dev->data->rstout_enable_bit;
233 writel(reg, dev->rstout);
237 static int orion_start(struct watchdog_device *wdt_dev)
239 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
241 /* Set watchdog duration */
242 writel(dev->clk_rate * wdt_dev->timeout,
243 dev->reg + dev->data->wdt_counter_offset);
245 /* Enable watchdog timer */
246 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit,
247 dev->data->wdt_enable_bit);
249 /* Enable reset on watchdog */
250 atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit,
251 dev->data->rstout_enable_bit);
256 static int orion_wdt_start(struct watchdog_device *wdt_dev)
258 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
260 /* There are some per-SoC quirks to handle */
261 return dev->data->start(wdt_dev);
264 static int orion_stop(struct watchdog_device *wdt_dev)
266 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
268 /* Disable reset on watchdog */
269 atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0);
271 /* Disable watchdog timer */
272 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
277 static int armada375_stop(struct watchdog_device *wdt_dev)
279 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
282 /* Disable reset on watchdog */
283 atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit,
284 dev->data->rstout_mask_bit);
285 reg = readl(dev->rstout);
286 reg &= ~dev->data->rstout_enable_bit;
287 writel(reg, dev->rstout);
289 /* Disable watchdog timer */
290 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
295 static int armada370_stop(struct watchdog_device *wdt_dev)
297 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
300 /* Disable reset on watchdog */
301 reg = readl(dev->rstout);
302 reg &= ~dev->data->rstout_enable_bit;
303 writel(reg, dev->rstout);
305 /* Disable watchdog timer */
306 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0);
311 static int orion_wdt_stop(struct watchdog_device *wdt_dev)
313 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
315 return dev->data->stop(wdt_dev);
318 static int orion_enabled(struct orion_watchdog *dev)
320 bool enabled, running;
322 enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
323 running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
325 return enabled && running;
328 static int armada375_enabled(struct orion_watchdog *dev)
330 bool masked, enabled, running;
332 masked = readl(dev->rstout_mask) & dev->data->rstout_mask_bit;
333 enabled = readl(dev->rstout) & dev->data->rstout_enable_bit;
334 running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit;
336 return !masked && enabled && running;
339 static int orion_wdt_enabled(struct watchdog_device *wdt_dev)
341 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
343 return dev->data->enabled(dev);
346 static unsigned int orion_wdt_get_timeleft(struct watchdog_device *wdt_dev)
348 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
349 return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate;
352 static const struct watchdog_info orion_wdt_info = {
353 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
354 .identity = "Orion Watchdog",
357 static const struct watchdog_ops orion_wdt_ops = {
358 .owner = THIS_MODULE,
359 .start = orion_wdt_start,
360 .stop = orion_wdt_stop,
361 .ping = orion_wdt_ping,
362 .get_timeleft = orion_wdt_get_timeleft,
365 static irqreturn_t orion_wdt_irq(int irq, void *devid)
367 panic("Watchdog Timeout");
372 * The original devicetree binding for this driver specified only
373 * one memory resource, so in order to keep DT backwards compatibility
374 * we try to fallback to a hardcoded register address, if the resource
375 * is missing from the devicetree.
377 static void __iomem *orion_wdt_ioremap_rstout(struct platform_device *pdev,
378 phys_addr_t internal_regs)
380 struct resource *res;
383 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
385 return devm_ioremap(&pdev->dev, res->start,
388 rstout = internal_regs + ORION_RSTOUT_MASK_OFFSET;
390 WARN(1, FW_BUG "falling back to hardcoded RSTOUT reg %pa\n", &rstout);
391 return devm_ioremap(&pdev->dev, rstout, 0x4);
394 static const struct orion_watchdog_data orion_data = {
395 .rstout_enable_bit = BIT(1),
396 .wdt_enable_bit = BIT(4),
397 .wdt_counter_offset = 0x24,
398 .clock_init = orion_wdt_clock_init,
399 .enabled = orion_enabled,
400 .start = orion_start,
404 static const struct orion_watchdog_data armada370_data = {
405 .rstout_enable_bit = BIT(8),
406 .wdt_enable_bit = BIT(8),
407 .wdt_counter_offset = 0x34,
408 .clock_init = armada370_wdt_clock_init,
409 .enabled = orion_enabled,
410 .start = armada370_start,
411 .stop = armada370_stop,
414 static const struct orion_watchdog_data armadaxp_data = {
415 .rstout_enable_bit = BIT(8),
416 .wdt_enable_bit = BIT(8),
417 .wdt_counter_offset = 0x34,
418 .clock_init = armadaxp_wdt_clock_init,
419 .enabled = orion_enabled,
420 .start = armada370_start,
421 .stop = armada370_stop,
424 static const struct orion_watchdog_data armada375_data = {
425 .rstout_enable_bit = BIT(8),
426 .rstout_mask_bit = BIT(10),
427 .wdt_enable_bit = BIT(8),
428 .wdt_counter_offset = 0x34,
429 .clock_init = armada375_wdt_clock_init,
430 .enabled = armada375_enabled,
431 .start = armada375_start,
432 .stop = armada375_stop,
435 static const struct orion_watchdog_data armada380_data = {
436 .rstout_enable_bit = BIT(8),
437 .rstout_mask_bit = BIT(10),
438 .wdt_enable_bit = BIT(8),
439 .wdt_counter_offset = 0x34,
440 .clock_init = armadaxp_wdt_clock_init,
441 .enabled = armada375_enabled,
442 .start = armada375_start,
443 .stop = armada375_stop,
446 static const struct of_device_id orion_wdt_of_match_table[] = {
448 .compatible = "marvell,orion-wdt",
452 .compatible = "marvell,armada-370-wdt",
453 .data = &armada370_data,
456 .compatible = "marvell,armada-xp-wdt",
457 .data = &armadaxp_data,
460 .compatible = "marvell,armada-375-wdt",
461 .data = &armada375_data,
464 .compatible = "marvell,armada-380-wdt",
465 .data = &armada380_data,
469 MODULE_DEVICE_TABLE(of, orion_wdt_of_match_table);
471 static int orion_wdt_get_regs(struct platform_device *pdev,
472 struct orion_watchdog *dev)
474 struct device_node *node = pdev->dev.of_node;
475 struct resource *res;
477 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
480 dev->reg = devm_ioremap(&pdev->dev, res->start,
485 /* Each supported compatible has some RSTOUT register quirk */
486 if (of_device_is_compatible(node, "marvell,orion-wdt")) {
488 dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start &
493 } else if (of_device_is_compatible(node, "marvell,armada-370-wdt") ||
494 of_device_is_compatible(node, "marvell,armada-xp-wdt")) {
496 /* Dedicated RSTOUT register, can be requested. */
497 dev->rstout = devm_platform_ioremap_resource(pdev, 1);
498 if (IS_ERR(dev->rstout))
499 return PTR_ERR(dev->rstout);
501 } else if (of_device_is_compatible(node, "marvell,armada-375-wdt") ||
502 of_device_is_compatible(node, "marvell,armada-380-wdt")) {
504 /* Dedicated RSTOUT register, can be requested. */
505 dev->rstout = devm_platform_ioremap_resource(pdev, 1);
506 if (IS_ERR(dev->rstout))
507 return PTR_ERR(dev->rstout);
509 res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
512 dev->rstout_mask = devm_ioremap(&pdev->dev, res->start,
514 if (!dev->rstout_mask)
524 static int orion_wdt_probe(struct platform_device *pdev)
526 struct orion_watchdog *dev;
527 const struct of_device_id *match;
528 unsigned int wdt_max_duration; /* (seconds) */
531 dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog),
536 match = of_match_device(orion_wdt_of_match_table, &pdev->dev);
538 /* Default legacy match */
539 match = &orion_wdt_of_match_table[0];
541 dev->wdt.info = &orion_wdt_info;
542 dev->wdt.ops = &orion_wdt_ops;
543 dev->wdt.min_timeout = 1;
544 dev->data = match->data;
546 ret = orion_wdt_get_regs(pdev, dev);
550 ret = dev->data->clock_init(pdev, dev);
552 dev_err(&pdev->dev, "cannot initialize clock\n");
556 wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate;
558 dev->wdt.timeout = wdt_max_duration;
559 dev->wdt.max_timeout = wdt_max_duration;
560 dev->wdt.parent = &pdev->dev;
561 watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev);
563 platform_set_drvdata(pdev, &dev->wdt);
564 watchdog_set_drvdata(&dev->wdt, dev);
567 * Let's make sure the watchdog is fully stopped, unless it's
568 * explicitly enabled. This may be the case if the module was
569 * removed and re-inserted, or if the bootloader explicitly
570 * set a running watchdog before booting the kernel.
572 if (!orion_wdt_enabled(&dev->wdt))
573 orion_wdt_stop(&dev->wdt);
575 set_bit(WDOG_HW_RUNNING, &dev->wdt.status);
577 /* Request the IRQ only after the watchdog is disabled */
578 irq = platform_get_irq(pdev, 0);
581 * Not all supported platforms specify an interrupt for the
582 * watchdog, so let's make it optional.
584 ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0,
587 dev_err(&pdev->dev, "failed to request IRQ\n");
592 watchdog_set_nowayout(&dev->wdt, nowayout);
593 ret = watchdog_register_device(&dev->wdt);
597 pr_info("Initial timeout %d sec%s\n",
598 dev->wdt.timeout, nowayout ? ", nowayout" : "");
602 clk_disable_unprepare(dev->clk);
607 static int orion_wdt_remove(struct platform_device *pdev)
609 struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
610 struct orion_watchdog *dev = watchdog_get_drvdata(wdt_dev);
612 watchdog_unregister_device(wdt_dev);
613 clk_disable_unprepare(dev->clk);
618 static void orion_wdt_shutdown(struct platform_device *pdev)
620 struct watchdog_device *wdt_dev = platform_get_drvdata(pdev);
621 orion_wdt_stop(wdt_dev);
624 static struct platform_driver orion_wdt_driver = {
625 .probe = orion_wdt_probe,
626 .remove = orion_wdt_remove,
627 .shutdown = orion_wdt_shutdown,
630 .of_match_table = orion_wdt_of_match_table,
634 module_platform_driver(orion_wdt_driver);
636 MODULE_AUTHOR("Sylver Bruneau <sylver.bruneau@googlemail.com>");
637 MODULE_DESCRIPTION("Orion Processor Watchdog");
639 module_param(heartbeat, int, 0);
640 MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
642 module_param(nowayout, bool, 0);
643 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
644 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
646 MODULE_LICENSE("GPL v2");
647 MODULE_ALIAS("platform:orion_wdt");