drivers/watchdog/renesas_wdt.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Watchdog driver for Renesas WDT watchdog
   4  *
   5  * Copyright (C) 2015-17 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
   6  * Copyright (C) 2015-17 Renesas Electronics Corporation
   7  */
   8 #include <linux/bitops.h>
   9 #include <linux/clk.h>
  10 #include <linux/io.h>
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/of.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/pm_runtime.h>
  16 #include <linux/smp.h>
  17 #include <linux/sys_soc.h>
  18 #include <linux/watchdog.h>
  19
  20 #define RWTCNT          0
  21 #define RWTCSRA         4
  22 #define RWTCSRA_WOVF    BIT(4)
  23 #define RWTCSRA_WRFLG   BIT(5)
  24 #define RWTCSRA_TME     BIT(7)
  25 #define RWTCSRB         8
  26
  27 #define RWDT_DEFAULT_TIMEOUT 60U
  28
  29 /*
  30  * In probe, clk_rate is checked to be not more than 16 bit * biggest clock
  31  * divider (12 bits). d is only a factor to fully utilize the WDT counter and
  32  * will not exceed its 16 bits. Thus, no overflow, we stay below 32 bits.
  33  */
  34 #define MUL_BY_CLKS_PER_SEC(p, d) \
  35         DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
  36
  37 /* d is 16 bit, clk_divs 12 bit -> no 32 bit overflow */
  38 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
  39
  40 static const unsigned int clk_divs[] = { 1, 4, 16, 32, 64, 128, 1024, 4096 };
  41
  42 static bool nowayout = WATCHDOG_NOWAYOUT;
  43 module_param(nowayout, bool, 0);
  44 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  45                                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  46
  47 struct rwdt_priv {
  48         void __iomem *base;
  49         struct watchdog_device wdev;
  50         unsigned long clk_rate;
  51         u16 time_left;
  52         u8 cks;
  53 };
  54
  55 static void rwdt_write(struct rwdt_priv *priv, u32 val, unsigned int reg)
  56 {
  57         if (reg == RWTCNT)
  58                 val |= 0x5a5a0000;
  59         else
  60                 val |= 0xa5a5a500;
  61
  62         writel_relaxed(val, priv->base + reg);
  63 }
  64
  65 static int rwdt_init_timeout(struct watchdog_device *wdev)
  66 {
  67         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
  68
  69         rwdt_write(priv, 65536 - MUL_BY_CLKS_PER_SEC(priv, wdev->timeout), RWTCNT);
  70
  71         return 0;
  72 }
  73
  74 static int rwdt_start(struct watchdog_device *wdev)
  75 {
  76         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
  77
  78         pm_runtime_get_sync(wdev->parent);
  79
  80         rwdt_write(priv, 0, RWTCSRB);
  81         rwdt_write(priv, priv->cks, RWTCSRA);
  82         rwdt_init_timeout(wdev);
  83
  84         while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
  85                 cpu_relax();
  86
  87         rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
  88
  89         return 0;
  90 }
  91
  92 static int rwdt_stop(struct watchdog_device *wdev)
  93 {
  94         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
  95
  96         rwdt_write(priv, priv->cks, RWTCSRA);
  97         pm_runtime_put(wdev->parent);
  98
  99         return 0;
 100 }
 101
 102 static unsigned int rwdt_get_timeleft(struct watchdog_device *wdev)
 103 {
 104         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
 105         u16 val = readw_relaxed(priv->base + RWTCNT);
 106
 107         return DIV_BY_CLKS_PER_SEC(priv, 65536 - val);
 108 }
 109
 110 static int rwdt_restart(struct watchdog_device *wdev, unsigned long action,
 111                         void *data)
 112 {
 113         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
 114
 115         rwdt_start(wdev);
 116         rwdt_write(priv, 0xffff, RWTCNT);
 117         return 0;
 118 }
 119
 120 static const struct watchdog_info rwdt_ident = {
 121         .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
 122                 WDIOF_CARDRESET,
 123         .identity = "Renesas WDT Watchdog",
 124 };
 125
 126 static const struct watchdog_ops rwdt_ops = {
 127         .owner = THIS_MODULE,
 128         .start = rwdt_start,
 129         .stop = rwdt_stop,
 130         .ping = rwdt_init_timeout,
 131         .get_timeleft = rwdt_get_timeleft,
 132         .restart = rwdt_restart,
 133 };
 134
 135 #if defined(CONFIG_ARCH_RCAR_GEN2) && defined(CONFIG_SMP)
 136 /*
 137  * Watchdog-reset integration is broken on early revisions of R-Car Gen2 SoCs
 138  */
 139 static const struct soc_device_attribute rwdt_quirks_match[] = {
 140         {
 141                 .soc_id = "r8a7790",
 142                 .revision = "ES1.*",
 143                 .data = (void *)1,      /* needs single CPU */
 144         }, {
 145                 .soc_id = "r8a7791",
 146                 .revision = "ES1.*",
 147                 .data = (void *)1,      /* needs single CPU */
 148         }, {
 149                 .soc_id = "r8a7792",
 150                 .revision = "*",
 151                 .data = (void *)0,      /* needs SMP disabled */
 152         },
 153         { /* sentinel */ }
 154 };
 155
 156 static bool rwdt_blacklisted(struct device *dev)
 157 {
 158         const struct soc_device_attribute *attr;
 159
 160         attr = soc_device_match(rwdt_quirks_match);
 161         if (attr && setup_max_cpus > (uintptr_t)attr->data) {
 162                 dev_info(dev, "Watchdog blacklisted on %s %s\n", attr->soc_id,
 163                          attr->revision);
 164                 return true;
 165         }
 166
 167         return false;
 168 }
 169 #else /* !CONFIG_ARCH_RCAR_GEN2 || !CONFIG_SMP */
 170 static inline bool rwdt_blacklisted(struct device *dev) { return false; }
 171 #endif /* !CONFIG_ARCH_RCAR_GEN2 || !CONFIG_SMP */
 172
 173 static int rwdt_probe(struct platform_device *pdev)
 174 {
 175         struct rwdt_priv *priv;
 176         struct resource *res;
 177         struct clk *clk;
 178         unsigned long clks_per_sec;
 179         int ret, i;
 180
 181         if (rwdt_blacklisted(&pdev->dev))
 182                 return -ENODEV;
 183
 184         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 185         if (!priv)
 186                 return -ENOMEM;
 187
 188         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 189         priv->base = devm_ioremap_resource(&pdev->dev, res);
 190         if (IS_ERR(priv->base))
 191                 return PTR_ERR(priv->base);
 192
 193         clk = devm_clk_get(&pdev->dev, NULL);
 194         if (IS_ERR(clk))
 195                 return PTR_ERR(clk);
 196
 197         pm_runtime_enable(&pdev->dev);
 198         pm_runtime_get_sync(&pdev->dev);
 199         priv->clk_rate = clk_get_rate(clk);
 200         priv->wdev.bootstatus = (readb_relaxed(priv->base + RWTCSRA) &
 201                                 RWTCSRA_WOVF) ? WDIOF_CARDRESET : 0;
 202         pm_runtime_put(&pdev->dev);
 203
 204         if (!priv->clk_rate) {
 205                 ret = -ENOENT;
 206                 goto out_pm_disable;
 207         }
 208
 209         for (i = ARRAY_SIZE(clk_divs) - 1; i >= 0; i--) {
 210                 clks_per_sec = priv->clk_rate / clk_divs[i];
 211                 if (clks_per_sec && clks_per_sec < 65536) {
 212                         priv->cks = i;
 213                         break;
 214                 }
 215         }
 216
 217         if (i < 0) {
 218                 dev_err(&pdev->dev, "Can't find suitable clock divider\n");
 219                 ret = -ERANGE;
 220                 goto out_pm_disable;
 221         }
 222
 223         priv->wdev.info = &rwdt_ident,
 224         priv->wdev.ops = &rwdt_ops,
 225         priv->wdev.parent = &pdev->dev;
 226         priv->wdev.min_timeout = 1;
 227         priv->wdev.max_timeout = DIV_BY_CLKS_PER_SEC(priv, 65536);
 228         priv->wdev.timeout = min(priv->wdev.max_timeout, RWDT_DEFAULT_TIMEOUT);
 229
 230         platform_set_drvdata(pdev, priv);
 231         watchdog_set_drvdata(&priv->wdev, priv);
 232         watchdog_set_nowayout(&priv->wdev, nowayout);
 233         watchdog_set_restart_priority(&priv->wdev, 0);
 234         watchdog_stop_on_unregister(&priv->wdev);
 235
 236         /* This overrides the default timeout only if DT configuration was found */
 237         ret = watchdog_init_timeout(&priv->wdev, 0, &pdev->dev);
 238         if (ret)
 239                 dev_warn(&pdev->dev, "Specified timeout value invalid, using default\n");
 240
 241         ret = watchdog_register_device(&priv->wdev);
 242         if (ret < 0)
 243                 goto out_pm_disable;
 244
 245         return 0;
 246
 247  out_pm_disable:
 248         pm_runtime_disable(&pdev->dev);
 249         return ret;
 250 }
 251
 252 static int rwdt_remove(struct platform_device *pdev)
 253 {
 254         struct rwdt_priv *priv = platform_get_drvdata(pdev);
 255
 256         watchdog_unregister_device(&priv->wdev);
 257         pm_runtime_disable(&pdev->dev);
 258
 259         return 0;
 260 }
 261
 262 static int __maybe_unused rwdt_suspend(struct device *dev)
 263 {
 264         struct rwdt_priv *priv = dev_get_drvdata(dev);
 265
 266         if (watchdog_active(&priv->wdev)) {
 267                 priv->time_left = readw(priv->base + RWTCNT);
 268                 rwdt_stop(&priv->wdev);
 269         }
 270         return 0;
 271 }
 272
 273 static int __maybe_unused rwdt_resume(struct device *dev)
 274 {
 275         struct rwdt_priv *priv = dev_get_drvdata(dev);
 276
 277         if (watchdog_active(&priv->wdev)) {
 278                 rwdt_start(&priv->wdev);
 279                 rwdt_write(priv, priv->time_left, RWTCNT);
 280         }
 281         return 0;
 282 }
 283
 284 static SIMPLE_DEV_PM_OPS(rwdt_pm_ops, rwdt_suspend, rwdt_resume);
 285
 286 static const struct of_device_id rwdt_ids[] = {
 287         { .compatible = "renesas,rcar-gen2-wdt", },
 288         { .compatible = "renesas,rcar-gen3-wdt", },
 289         { /* sentinel */ }
 290 };
 291 MODULE_DEVICE_TABLE(of, rwdt_ids);
 292
 293 static struct platform_driver rwdt_driver = {
 294         .driver = {
 295                 .name = "renesas_wdt",
 296                 .of_match_table = rwdt_ids,
 297                 .pm = &rwdt_pm_ops,
 298         },
 299         .probe = rwdt_probe,
 300         .remove = rwdt_remove,
 301 };
 302 module_platform_driver(rwdt_driver);
 303
 304 MODULE_DESCRIPTION("Renesas WDT Watchdog Driver");
 305 MODULE_LICENSE("GPL v2");
 306 MODULE_AUTHOR("Wolfram Sang <wsa@sang-engineering.com>");