]> asedeno.scripts.mit.edu Git - linux.git/blob - drivers/watchdog/renesas_wdt.c
Merge tag 'for-linus-4.17-rc2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux.git] / drivers / watchdog / renesas_wdt.c
1 /*
2  * Watchdog driver for Renesas WDT watchdog
3  *
4  * Copyright (C) 2015-17 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
5  * Copyright (C) 2015-17 Renesas Electronics Corporation
6  *
7  * This program is free software; you can redistribute it and/or modify it
8  * under the terms of the GNU General Public License version 2 as published by
9  * the Free Software Foundation.
10  */
11 #include <linux/bitops.h>
12 #include <linux/clk.h>
13 #include <linux/io.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/of.h>
17 #include <linux/platform_device.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/smp.h>
20 #include <linux/sys_soc.h>
21 #include <linux/watchdog.h>
22
23 #define RWTCNT          0
24 #define RWTCSRA         4
25 #define RWTCSRA_WOVF    BIT(4)
26 #define RWTCSRA_WRFLG   BIT(5)
27 #define RWTCSRA_TME     BIT(7)
28 #define RWTCSRB         8
29
30 #define RWDT_DEFAULT_TIMEOUT 60U
31
32 /*
33  * In probe, clk_rate is checked to be not more than 16 bit * biggest clock
34  * divider (12 bits). d is only a factor to fully utilize the WDT counter and
35  * will not exceed its 16 bits. Thus, no overflow, we stay below 32 bits.
36  */
37 #define MUL_BY_CLKS_PER_SEC(p, d) \
38         DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
39
40 /* d is 16 bit, clk_divs 12 bit -> no 32 bit overflow */
41 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
42
43 static const unsigned int clk_divs[] = { 1, 4, 16, 32, 64, 128, 1024, 4096 };
44
45 static bool nowayout = WATCHDOG_NOWAYOUT;
46 module_param(nowayout, bool, 0);
47 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
48                                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
49
50 struct rwdt_priv {
51         void __iomem *base;
52         struct watchdog_device wdev;
53         unsigned long clk_rate;
54         u16 time_left;
55         u8 cks;
56 };
57
58 static void rwdt_write(struct rwdt_priv *priv, u32 val, unsigned int reg)
59 {
60         if (reg == RWTCNT)
61                 val |= 0x5a5a0000;
62         else
63                 val |= 0xa5a5a500;
64
65         writel_relaxed(val, priv->base + reg);
66 }
67
68 static int rwdt_init_timeout(struct watchdog_device *wdev)
69 {
70         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
71
72         rwdt_write(priv, 65536 - MUL_BY_CLKS_PER_SEC(priv, wdev->timeout), RWTCNT);
73
74         return 0;
75 }
76
77 static int rwdt_start(struct watchdog_device *wdev)
78 {
79         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
80
81         pm_runtime_get_sync(wdev->parent);
82
83         rwdt_write(priv, 0, RWTCSRB);
84         rwdt_write(priv, priv->cks, RWTCSRA);
85         rwdt_init_timeout(wdev);
86
87         while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
88                 cpu_relax();
89
90         rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
91
92         return 0;
93 }
94
95 static int rwdt_stop(struct watchdog_device *wdev)
96 {
97         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
98
99         rwdt_write(priv, priv->cks, RWTCSRA);
100         pm_runtime_put(wdev->parent);
101
102         return 0;
103 }
104
105 static unsigned int rwdt_get_timeleft(struct watchdog_device *wdev)
106 {
107         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
108         u16 val = readw_relaxed(priv->base + RWTCNT);
109
110         return DIV_BY_CLKS_PER_SEC(priv, 65536 - val);
111 }
112
113 static int rwdt_restart(struct watchdog_device *wdev, unsigned long action,
114                         void *data)
115 {
116         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
117
118         rwdt_start(wdev);
119         rwdt_write(priv, 0xffff, RWTCNT);
120         return 0;
121 }
122
123 static const struct watchdog_info rwdt_ident = {
124         .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
125         .identity = "Renesas WDT Watchdog",
126 };
127
128 static const struct watchdog_ops rwdt_ops = {
129         .owner = THIS_MODULE,
130         .start = rwdt_start,
131         .stop = rwdt_stop,
132         .ping = rwdt_init_timeout,
133         .get_timeleft = rwdt_get_timeleft,
134         .restart = rwdt_restart,
135 };
136
137 #if defined(CONFIG_ARCH_RCAR_GEN2) && defined(CONFIG_SMP)
138 /*
139  * Watchdog-reset integration is broken on early revisions of R-Car Gen2 SoCs
140  */
141 static const struct soc_device_attribute rwdt_quirks_match[] = {
142         {
143                 .soc_id = "r8a7790",
144                 .revision = "ES1.*",
145                 .data = (void *)1,      /* needs single CPU */
146         }, {
147                 .soc_id = "r8a7791",
148                 .revision = "ES[12].*",
149                 .data = (void *)1,      /* needs single CPU */
150         }, {
151                 .soc_id = "r8a7792",
152                 .revision = "*",
153                 .data = (void *)0,      /* needs SMP disabled */
154         },
155         { /* sentinel */ }
156 };
157
158 static bool rwdt_blacklisted(struct device *dev)
159 {
160         const struct soc_device_attribute *attr;
161
162         attr = soc_device_match(rwdt_quirks_match);
163         if (attr && setup_max_cpus > (uintptr_t)attr->data) {
164                 dev_info(dev, "Watchdog blacklisted on %s %s\n", attr->soc_id,
165                          attr->revision);
166                 return true;
167         }
168
169         return false;
170 }
171 #else /* !CONFIG_ARCH_RCAR_GEN2 || !CONFIG_SMP */
172 static inline bool rwdt_blacklisted(struct device *dev) { return false; }
173 #endif /* !CONFIG_ARCH_RCAR_GEN2 || !CONFIG_SMP */
174
175 static int rwdt_probe(struct platform_device *pdev)
176 {
177         struct rwdt_priv *priv;
178         struct resource *res;
179         struct clk *clk;
180         unsigned long clks_per_sec;
181         int ret, i;
182
183         if (rwdt_blacklisted(&pdev->dev))
184                 return -ENODEV;
185
186         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
187         if (!priv)
188                 return -ENOMEM;
189
190         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
191         priv->base = devm_ioremap_resource(&pdev->dev, res);
192         if (IS_ERR(priv->base))
193                 return PTR_ERR(priv->base);
194
195         clk = devm_clk_get(&pdev->dev, NULL);
196         if (IS_ERR(clk))
197                 return PTR_ERR(clk);
198
199         pm_runtime_enable(&pdev->dev);
200
201         pm_runtime_get_sync(&pdev->dev);
202         priv->clk_rate = clk_get_rate(clk);
203         pm_runtime_put(&pdev->dev);
204
205         if (!priv->clk_rate) {
206                 ret = -ENOENT;
207                 goto out_pm_disable;
208         }
209
210         for (i = ARRAY_SIZE(clk_divs) - 1; i >= 0; i--) {
211                 clks_per_sec = priv->clk_rate / clk_divs[i];
212                 if (clks_per_sec && clks_per_sec < 65536) {
213                         priv->cks = i;
214                         break;
215                 }
216         }
217
218         if (i < 0) {
219                 dev_err(&pdev->dev, "Can't find suitable clock divider\n");
220                 ret = -ERANGE;
221                 goto out_pm_disable;
222         }
223
224         priv->wdev.info = &rwdt_ident,
225         priv->wdev.ops = &rwdt_ops,
226         priv->wdev.parent = &pdev->dev;
227         priv->wdev.min_timeout = 1;
228         priv->wdev.max_timeout = DIV_BY_CLKS_PER_SEC(priv, 65536);
229         priv->wdev.timeout = min(priv->wdev.max_timeout, RWDT_DEFAULT_TIMEOUT);
230
231         platform_set_drvdata(pdev, priv);
232         watchdog_set_drvdata(&priv->wdev, priv);
233         watchdog_set_nowayout(&priv->wdev, nowayout);
234         watchdog_set_restart_priority(&priv->wdev, 0);
235
236         /* This overrides the default timeout only if DT configuration was found */
237         ret = watchdog_init_timeout(&priv->wdev, 0, &pdev->dev);
238         if (ret)
239                 dev_warn(&pdev->dev, "Specified timeout value invalid, using default\n");
240
241         ret = watchdog_register_device(&priv->wdev);
242         if (ret < 0)
243                 goto out_pm_disable;
244
245         return 0;
246
247  out_pm_disable:
248         pm_runtime_disable(&pdev->dev);
249         return ret;
250 }
251
252 static int rwdt_remove(struct platform_device *pdev)
253 {
254         struct rwdt_priv *priv = platform_get_drvdata(pdev);
255
256         watchdog_unregister_device(&priv->wdev);
257         pm_runtime_disable(&pdev->dev);
258
259         return 0;
260 }
261
262 static int __maybe_unused rwdt_suspend(struct device *dev)
263 {
264         struct rwdt_priv *priv = dev_get_drvdata(dev);
265
266         if (watchdog_active(&priv->wdev)) {
267                 priv->time_left = readw(priv->base + RWTCNT);
268                 rwdt_stop(&priv->wdev);
269         }
270         return 0;
271 }
272
273 static int __maybe_unused rwdt_resume(struct device *dev)
274 {
275         struct rwdt_priv *priv = dev_get_drvdata(dev);
276
277         if (watchdog_active(&priv->wdev)) {
278                 rwdt_start(&priv->wdev);
279                 rwdt_write(priv, priv->time_left, RWTCNT);
280         }
281         return 0;
282 }
283
284 static SIMPLE_DEV_PM_OPS(rwdt_pm_ops, rwdt_suspend, rwdt_resume);
285
286 static const struct of_device_id rwdt_ids[] = {
287         { .compatible = "renesas,rcar-gen2-wdt", },
288         { .compatible = "renesas,rcar-gen3-wdt", },
289         { /* sentinel */ }
290 };
291 MODULE_DEVICE_TABLE(of, rwdt_ids);
292
293 static struct platform_driver rwdt_driver = {
294         .driver = {
295                 .name = "renesas_wdt",
296                 .of_match_table = rwdt_ids,
297                 .pm = &rwdt_pm_ops,
298         },
299         .probe = rwdt_probe,
300         .remove = rwdt_remove,
301 };
302 module_platform_driver(rwdt_driver);
303
304 MODULE_DESCRIPTION("Renesas WDT Watchdog Driver");
305 MODULE_LICENSE("GPL v2");
306 MODULE_AUTHOR("Wolfram Sang <wsa@sang-engineering.com>");