drivers/watchdog/renesas_wdt.c

   1 /*
   2  * Watchdog driver for Renesas WDT watchdog
   3  *
   4  * Copyright (C) 2015-17 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
   5  * Copyright (C) 2015-17 Renesas Electronics Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  */
  11 #include <linux/bitops.h>
  12 #include <linux/clk.h>
  13 #include <linux/io.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/pm_runtime.h>
  19 #include <linux/smp.h>
  20 #include <linux/sys_soc.h>
  21 #include <linux/watchdog.h>
  22
  23 #define RWTCNT          0
  24 #define RWTCSRA         4
  25 #define RWTCSRA_WOVF    BIT(4)
  26 #define RWTCSRA_WRFLG   BIT(5)
  27 #define RWTCSRA_TME     BIT(7)
  28 #define RWTCSRB         8
  29
  30 #define RWDT_DEFAULT_TIMEOUT 60U
  31
  32 /*
  33  * In probe, clk_rate is checked to be not more than 16 bit * biggest clock
  34  * divider (12 bits). d is only a factor to fully utilize the WDT counter and
  35  * will not exceed its 16 bits. Thus, no overflow, we stay below 32 bits.
  36  */
  37 #define MUL_BY_CLKS_PER_SEC(p, d) \
  38         DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
  39
  40 /* d is 16 bit, clk_divs 12 bit -> no 32 bit overflow */
  41 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
  42
  43 static const unsigned int clk_divs[] = { 1, 4, 16, 32, 64, 128, 1024, 4096 };
  44
  45 static bool nowayout = WATCHDOG_NOWAYOUT;
  46 module_param(nowayout, bool, 0);
  47 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  48                                 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  49
  50 struct rwdt_priv {
  51         void __iomem *base;
  52         struct watchdog_device wdev;
  53         unsigned long clk_rate;
  54         u16 time_left;
  55         u8 cks;
  56 };
  57
  58 static void rwdt_write(struct rwdt_priv *priv, u32 val, unsigned int reg)
  59 {
  60         if (reg == RWTCNT)
  61                 val |= 0x5a5a0000;
  62         else
  63                 val |= 0xa5a5a500;
  64
  65         writel_relaxed(val, priv->base + reg);
  66 }
  67
  68 static int rwdt_init_timeout(struct watchdog_device *wdev)
  69 {
  70         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
  71
  72         rwdt_write(priv, 65536 - MUL_BY_CLKS_PER_SEC(priv, wdev->timeout), RWTCNT);
  73
  74         return 0;
  75 }
  76
  77 static int rwdt_start(struct watchdog_device *wdev)
  78 {
  79         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
  80
  81         pm_runtime_get_sync(wdev->parent);
  82
  83         rwdt_write(priv, 0, RWTCSRB);
  84         rwdt_write(priv, priv->cks, RWTCSRA);
  85         rwdt_init_timeout(wdev);
  86
  87         while (readb_relaxed(priv->base + RWTCSRA) & RWTCSRA_WRFLG)
  88                 cpu_relax();
  89
  90         rwdt_write(priv, priv->cks | RWTCSRA_TME, RWTCSRA);
  91
  92         return 0;
  93 }
  94
  95 static int rwdt_stop(struct watchdog_device *wdev)
  96 {
  97         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
  98
  99         rwdt_write(priv, priv->cks, RWTCSRA);
 100         pm_runtime_put(wdev->parent);
 101
 102         return 0;
 103 }
 104
 105 static unsigned int rwdt_get_timeleft(struct watchdog_device *wdev)
 106 {
 107         struct rwdt_priv *priv = watchdog_get_drvdata(wdev);
 108         u16 val = readw_relaxed(priv->base + RWTCNT);
 109
 110         return DIV_BY_CLKS_PER_SEC(priv, 65536 - val);
 111 }
 112
 113 static const struct watchdog_info rwdt_ident = {
 114         .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT,
 115         .identity = "Renesas WDT Watchdog",
 116 };
 117
 118 static const struct watchdog_ops rwdt_ops = {
 119         .owner = THIS_MODULE,
 120         .start = rwdt_start,
 121         .stop = rwdt_stop,
 122         .ping = rwdt_init_timeout,
 123         .get_timeleft = rwdt_get_timeleft,
 124 };
 125
 126 #if defined(CONFIG_ARCH_RCAR_GEN2) && defined(CONFIG_SMP)
 127 /*
 128  * Watchdog-reset integration is broken on early revisions of R-Car Gen2 SoCs
 129  */
 130 static const struct soc_device_attribute rwdt_quirks_match[] = {
 131         {
 132                 .soc_id = "r8a7790",
 133                 .revision = "ES1.*",
 134                 .data = (void *)1,      /* needs single CPU */
 135         }, {
 136                 .soc_id = "r8a7791",
 137                 .revision = "ES[12].*",
 138                 .data = (void *)1,      /* needs single CPU */
 139         }, {
 140                 .soc_id = "r8a7792",
 141                 .revision = "*",
 142                 .data = (void *)0,      /* needs SMP disabled */
 143         },
 144         { /* sentinel */ }
 145 };
 146
 147 static bool rwdt_blacklisted(struct device *dev)
 148 {
 149         const struct soc_device_attribute *attr;
 150
 151         attr = soc_device_match(rwdt_quirks_match);
 152         if (attr && setup_max_cpus > (uintptr_t)attr->data) {
 153                 dev_info(dev, "Watchdog blacklisted on %s %s\n", attr->soc_id,
 154                          attr->revision);
 155                 return true;
 156         }
 157
 158         return false;
 159 }
 160 #else /* !CONFIG_ARCH_RCAR_GEN2 || !CONFIG_SMP */
 161 static inline bool rwdt_blacklisted(struct device *dev) { return false; }
 162 #endif /* !CONFIG_ARCH_RCAR_GEN2 || !CONFIG_SMP */
 163
 164 static int rwdt_probe(struct platform_device *pdev)
 165 {
 166         struct rwdt_priv *priv;
 167         struct resource *res;
 168         struct clk *clk;
 169         unsigned long clks_per_sec;
 170         int ret, i;
 171
 172         if (rwdt_blacklisted(&pdev->dev))
 173                 return -ENODEV;
 174
 175         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
 176         if (!priv)
 177                 return -ENOMEM;
 178
 179         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 180         priv->base = devm_ioremap_resource(&pdev->dev, res);
 181         if (IS_ERR(priv->base))
 182                 return PTR_ERR(priv->base);
 183
 184         clk = devm_clk_get(&pdev->dev, NULL);
 185         if (IS_ERR(clk))
 186                 return PTR_ERR(clk);
 187
 188         pm_runtime_enable(&pdev->dev);
 189
 190         pm_runtime_get_sync(&pdev->dev);
 191         priv->clk_rate = clk_get_rate(clk);
 192         pm_runtime_put(&pdev->dev);
 193
 194         if (!priv->clk_rate) {
 195                 ret = -ENOENT;
 196                 goto out_pm_disable;
 197         }
 198
 199         for (i = ARRAY_SIZE(clk_divs) - 1; i >= 0; i--) {
 200                 clks_per_sec = priv->clk_rate / clk_divs[i];
 201                 if (clks_per_sec && clks_per_sec < 65536) {
 202                         priv->cks = i;
 203                         break;
 204                 }
 205         }
 206
 207         if (i < 0) {
 208                 dev_err(&pdev->dev, "Can't find suitable clock divider\n");
 209                 ret = -ERANGE;
 210                 goto out_pm_disable;
 211         }
 212
 213         priv->wdev.info = &rwdt_ident,
 214         priv->wdev.ops = &rwdt_ops,
 215         priv->wdev.parent = &pdev->dev;
 216         priv->wdev.min_timeout = 1;
 217         priv->wdev.max_timeout = DIV_BY_CLKS_PER_SEC(priv, 65536);
 218         priv->wdev.timeout = min(priv->wdev.max_timeout, RWDT_DEFAULT_TIMEOUT);
 219
 220         platform_set_drvdata(pdev, priv);
 221         watchdog_set_drvdata(&priv->wdev, priv);
 222         watchdog_set_nowayout(&priv->wdev, nowayout);
 223
 224         /* This overrides the default timeout only if DT configuration was found */
 225         ret = watchdog_init_timeout(&priv->wdev, 0, &pdev->dev);
 226         if (ret)
 227                 dev_warn(&pdev->dev, "Specified timeout value invalid, using default\n");
 228
 229         ret = watchdog_register_device(&priv->wdev);
 230         if (ret < 0)
 231                 goto out_pm_disable;
 232
 233         return 0;
 234
 235  out_pm_disable:
 236         pm_runtime_disable(&pdev->dev);
 237         return ret;
 238 }
 239
 240 static int rwdt_remove(struct platform_device *pdev)
 241 {
 242         struct rwdt_priv *priv = platform_get_drvdata(pdev);
 243
 244         watchdog_unregister_device(&priv->wdev);
 245         pm_runtime_disable(&pdev->dev);
 246
 247         return 0;
 248 }
 249
 250 static int __maybe_unused rwdt_suspend(struct device *dev)
 251 {
 252         struct rwdt_priv *priv = dev_get_drvdata(dev);
 253
 254         if (watchdog_active(&priv->wdev)) {
 255                 priv->time_left = readw(priv->base + RWTCNT);
 256                 rwdt_stop(&priv->wdev);
 257         }
 258         return 0;
 259 }
 260
 261 static int __maybe_unused rwdt_resume(struct device *dev)
 262 {
 263         struct rwdt_priv *priv = dev_get_drvdata(dev);
 264
 265         if (watchdog_active(&priv->wdev)) {
 266                 rwdt_start(&priv->wdev);
 267                 rwdt_write(priv, priv->time_left, RWTCNT);
 268         }
 269         return 0;
 270 }
 271
 272 static SIMPLE_DEV_PM_OPS(rwdt_pm_ops, rwdt_suspend, rwdt_resume);
 273
 274 static const struct of_device_id rwdt_ids[] = {
 275         { .compatible = "renesas,rcar-gen2-wdt", },
 276         { .compatible = "renesas,rcar-gen3-wdt", },
 277         { /* sentinel */ }
 278 };
 279 MODULE_DEVICE_TABLE(of, rwdt_ids);
 280
 281 static struct platform_driver rwdt_driver = {
 282         .driver = {
 283                 .name = "renesas_wdt",
 284                 .of_match_table = rwdt_ids,
 285                 .pm = &rwdt_pm_ops,
 286         },
 287         .probe = rwdt_probe,
 288         .remove = rwdt_remove,
 289 };
 290 module_platform_driver(rwdt_driver);
 291
 292 MODULE_DESCRIPTION("Renesas WDT Watchdog Driver");
 293 MODULE_LICENSE("GPL v2");
 294 MODULE_AUTHOR("Wolfram Sang <wsa@sang-engineering.com>");