1 /* SPDX-License-Identifier: GPL-2.0 */
4 #include <linux/bitops.h>
7 * Public API for use by IOMMU drivers
20 * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management.
22 * @tlb_flush_all: Synchronously invalidate the entire TLB context.
23 * @tlb_flush_walk: Synchronously invalidate all intermediate TLB state
24 * (sometimes referred to as the "walk cache") for a virtual
26 * @tlb_flush_leaf: Synchronously invalidate all leaf TLB state for a virtual
28 * @tlb_add_flush: Optional callback to queue up leaf TLB invalidation for a
29 * virtual address range. This function exists purely as an
30 * optimisation for IOMMUs that cannot batch TLB invalidation
31 * operations efficiently and are therefore better suited to
32 * issuing them early rather than deferring them until
34 * @tlb_sync: Ensure any queued TLB invalidation has taken effect, and
35 * any corresponding page table updates are visible to the
38 * Note that these can all be called in atomic context and must therefore
41 struct iommu_flush_ops {
42 void (*tlb_flush_all)(void *cookie);
43 void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule,
45 void (*tlb_flush_leaf)(unsigned long iova, size_t size, size_t granule,
47 void (*tlb_add_flush)(unsigned long iova, size_t size, size_t granule,
48 bool leaf, void *cookie);
49 void (*tlb_sync)(void *cookie);
53 * struct io_pgtable_cfg - Configuration data for a set of page tables.
55 * @quirks: A bitmap of hardware quirks that require some special
56 * action by the low-level page table allocator.
57 * @pgsize_bitmap: A bitmap of page sizes supported by this set of page
59 * @ias: Input address (iova) size, in bits.
60 * @oas: Output address (paddr) size, in bits.
61 * @coherent_walk A flag to indicate whether or not page table walks made
62 * by the IOMMU are coherent with the CPU caches.
63 * @tlb: TLB management callbacks for this set of tables.
64 * @iommu_dev: The device representing the DMA configuration for the
67 struct io_pgtable_cfg {
69 * IO_PGTABLE_QUIRK_ARM_NS: (ARM formats) Set NS and NSTABLE bits in
70 * stage 1 PTEs, for hardware which insists on validating them
71 * even in non-secure state where they should normally be ignored.
73 * IO_PGTABLE_QUIRK_NO_PERMS: Ignore the IOMMU_READ, IOMMU_WRITE and
74 * IOMMU_NOEXEC flags and map everything with full access, for
75 * hardware which does not implement the permissions of a given
76 * format, and/or requires some format-specific default value.
78 * IO_PGTABLE_QUIRK_TLBI_ON_MAP: If the format forbids caching invalid
79 * (unmapped) entries but the hardware might do so anyway, perform
80 * TLB maintenance when mapping as well as when unmapping.
82 * IO_PGTABLE_QUIRK_ARM_MTK_4GB: (ARM v7s format) Set bit 9 in all
83 * PTEs, for Mediatek IOMMUs which treat it as a 33rd address bit
84 * when the SoC is in "4GB mode" and they can only access the high
85 * remap of DRAM (0x1_00000000 to 0x1_ffffffff).
87 * IO_PGTABLE_QUIRK_NON_STRICT: Skip issuing synchronous leaf TLBIs
88 * on unmap, for DMA domains using the flush queue mechanism for
89 * delayed invalidation.
91 #define IO_PGTABLE_QUIRK_ARM_NS BIT(0)
92 #define IO_PGTABLE_QUIRK_NO_PERMS BIT(1)
93 #define IO_PGTABLE_QUIRK_TLBI_ON_MAP BIT(2)
94 #define IO_PGTABLE_QUIRK_ARM_MTK_4GB BIT(3)
95 #define IO_PGTABLE_QUIRK_NON_STRICT BIT(4)
97 unsigned long pgsize_bitmap;
101 const struct iommu_flush_ops *tlb;
102 struct device *iommu_dev;
104 /* Low-level data specific to the table format */
132 * struct io_pgtable_ops - Page table manipulation API for IOMMU drivers.
134 * @map: Map a physically contiguous memory region.
135 * @unmap: Unmap a physically contiguous memory region.
136 * @iova_to_phys: Translate iova to physical address.
138 * These functions map directly onto the iommu_ops member functions with
141 struct io_pgtable_ops {
142 int (*map)(struct io_pgtable_ops *ops, unsigned long iova,
143 phys_addr_t paddr, size_t size, int prot);
144 size_t (*unmap)(struct io_pgtable_ops *ops, unsigned long iova,
146 phys_addr_t (*iova_to_phys)(struct io_pgtable_ops *ops,
151 * alloc_io_pgtable_ops() - Allocate a page table allocator for use by an IOMMU.
153 * @fmt: The page table format.
154 * @cfg: The page table configuration. This will be modified to represent
155 * the configuration actually provided by the allocator (e.g. the
156 * pgsize_bitmap may be restricted).
157 * @cookie: An opaque token provided by the IOMMU driver and passed back to
158 * the callback routines in cfg->tlb.
160 struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt,
161 struct io_pgtable_cfg *cfg,
165 * free_io_pgtable_ops() - Free an io_pgtable_ops structure. The caller
166 * *must* ensure that the page table is no longer
167 * live, but the TLB can be dirty.
169 * @ops: The ops returned from alloc_io_pgtable_ops.
171 void free_io_pgtable_ops(struct io_pgtable_ops *ops);
175 * Internal structures for page table allocator implementations.
179 * struct io_pgtable - Internal structure describing a set of page tables.
181 * @fmt: The page table format.
182 * @cookie: An opaque token provided by the IOMMU driver and passed back to
183 * any callback routines.
184 * @cfg: A copy of the page table configuration.
185 * @ops: The page table operations in use for this set of page tables.
188 enum io_pgtable_fmt fmt;
190 struct io_pgtable_cfg cfg;
191 struct io_pgtable_ops ops;
194 #define io_pgtable_ops_to_pgtable(x) container_of((x), struct io_pgtable, ops)
196 static inline void io_pgtable_tlb_flush_all(struct io_pgtable *iop)
198 iop->cfg.tlb->tlb_flush_all(iop->cookie);
202 io_pgtable_tlb_flush_walk(struct io_pgtable *iop, unsigned long iova,
203 size_t size, size_t granule)
205 iop->cfg.tlb->tlb_flush_walk(iova, size, granule, iop->cookie);
209 io_pgtable_tlb_flush_leaf(struct io_pgtable *iop, unsigned long iova,
210 size_t size, size_t granule)
212 iop->cfg.tlb->tlb_flush_leaf(iova, size, granule, iop->cookie);
215 static inline void io_pgtable_tlb_add_flush(struct io_pgtable *iop,
216 unsigned long iova, size_t size, size_t granule, bool leaf)
218 iop->cfg.tlb->tlb_add_flush(iova, size, granule, leaf, iop->cookie);
221 static inline void io_pgtable_tlb_sync(struct io_pgtable *iop)
223 iop->cfg.tlb->tlb_sync(iop->cookie);
227 * struct io_pgtable_init_fns - Alloc/free a set of page tables for a
230 * @alloc: Allocate a set of page tables described by cfg.
231 * @free: Free the page tables associated with iop.
233 struct io_pgtable_init_fns {
234 struct io_pgtable *(*alloc)(struct io_pgtable_cfg *cfg, void *cookie);
235 void (*free)(struct io_pgtable *iop);
238 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns;
239 extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns;
240 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns;
241 extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns;
242 extern struct io_pgtable_init_fns io_pgtable_arm_v7s_init_fns;
243 extern struct io_pgtable_init_fns io_pgtable_arm_mali_lpae_init_fns;
245 #endif /* __IO_PGTABLE_H */