4 * Copyright Red Hat, Inc. 2013-2014
7 * Dave Airlie <airlied@redhat.com>
8 * Gerd Hoffmann <kraxel@redhat.com>
10 * This header is BSD licensed so anyone can use the definitions
11 * to implement compatible drivers/servers:
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
21 * 3. Neither the name of IBM nor the names of its contributors
22 * may be used to endorse or promote products derived from this software
23 * without specific prior written permission.
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
27 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL IBM OR
28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
30 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
31 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
32 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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34 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 #ifndef VIRTIO_GPU_HW_H
39 #define VIRTIO_GPU_HW_H
41 #include <linux/types.h>
43 #define VIRTIO_GPU_F_VIRGL 0
44 #define VIRTIO_GPU_F_EDID 1
46 enum virtio_gpu_ctrl_type {
47 VIRTIO_GPU_UNDEFINED = 0,
50 VIRTIO_GPU_CMD_GET_DISPLAY_INFO = 0x0100,
51 VIRTIO_GPU_CMD_RESOURCE_CREATE_2D,
52 VIRTIO_GPU_CMD_RESOURCE_UNREF,
53 VIRTIO_GPU_CMD_SET_SCANOUT,
54 VIRTIO_GPU_CMD_RESOURCE_FLUSH,
55 VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D,
56 VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING,
57 VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING,
58 VIRTIO_GPU_CMD_GET_CAPSET_INFO,
59 VIRTIO_GPU_CMD_GET_CAPSET,
60 VIRTIO_GPU_CMD_GET_EDID,
63 VIRTIO_GPU_CMD_CTX_CREATE = 0x0200,
64 VIRTIO_GPU_CMD_CTX_DESTROY,
65 VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE,
66 VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE,
67 VIRTIO_GPU_CMD_RESOURCE_CREATE_3D,
68 VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D,
69 VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D,
70 VIRTIO_GPU_CMD_SUBMIT_3D,
73 VIRTIO_GPU_CMD_UPDATE_CURSOR = 0x0300,
74 VIRTIO_GPU_CMD_MOVE_CURSOR,
76 /* success responses */
77 VIRTIO_GPU_RESP_OK_NODATA = 0x1100,
78 VIRTIO_GPU_RESP_OK_DISPLAY_INFO,
79 VIRTIO_GPU_RESP_OK_CAPSET_INFO,
80 VIRTIO_GPU_RESP_OK_CAPSET,
81 VIRTIO_GPU_RESP_OK_EDID,
84 VIRTIO_GPU_RESP_ERR_UNSPEC = 0x1200,
85 VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY,
86 VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID,
87 VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID,
88 VIRTIO_GPU_RESP_ERR_INVALID_CONTEXT_ID,
89 VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER,
92 #define VIRTIO_GPU_FLAG_FENCE (1 << 0)
94 struct virtio_gpu_ctrl_hdr {
102 /* data passed in the cursor vq */
104 struct virtio_gpu_cursor_pos {
111 /* VIRTIO_GPU_CMD_UPDATE_CURSOR, VIRTIO_GPU_CMD_MOVE_CURSOR */
112 struct virtio_gpu_update_cursor {
113 struct virtio_gpu_ctrl_hdr hdr;
114 struct virtio_gpu_cursor_pos pos; /* update & move */
115 __le32 resource_id; /* update only */
116 __le32 hot_x; /* update only */
117 __le32 hot_y; /* update only */
121 /* data passed in the control vq, 2d related */
123 struct virtio_gpu_rect {
130 /* VIRTIO_GPU_CMD_RESOURCE_UNREF */
131 struct virtio_gpu_resource_unref {
132 struct virtio_gpu_ctrl_hdr hdr;
137 /* VIRTIO_GPU_CMD_RESOURCE_CREATE_2D: create a 2d resource with a format */
138 struct virtio_gpu_resource_create_2d {
139 struct virtio_gpu_ctrl_hdr hdr;
146 /* VIRTIO_GPU_CMD_SET_SCANOUT */
147 struct virtio_gpu_set_scanout {
148 struct virtio_gpu_ctrl_hdr hdr;
149 struct virtio_gpu_rect r;
154 /* VIRTIO_GPU_CMD_RESOURCE_FLUSH */
155 struct virtio_gpu_resource_flush {
156 struct virtio_gpu_ctrl_hdr hdr;
157 struct virtio_gpu_rect r;
162 /* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D: simple transfer to_host */
163 struct virtio_gpu_transfer_to_host_2d {
164 struct virtio_gpu_ctrl_hdr hdr;
165 struct virtio_gpu_rect r;
171 struct virtio_gpu_mem_entry {
177 /* VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING */
178 struct virtio_gpu_resource_attach_backing {
179 struct virtio_gpu_ctrl_hdr hdr;
184 /* VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING */
185 struct virtio_gpu_resource_detach_backing {
186 struct virtio_gpu_ctrl_hdr hdr;
191 /* VIRTIO_GPU_RESP_OK_DISPLAY_INFO */
192 #define VIRTIO_GPU_MAX_SCANOUTS 16
193 struct virtio_gpu_resp_display_info {
194 struct virtio_gpu_ctrl_hdr hdr;
195 struct virtio_gpu_display_one {
196 struct virtio_gpu_rect r;
199 } pmodes[VIRTIO_GPU_MAX_SCANOUTS];
202 /* data passed in the control vq, 3d related */
204 struct virtio_gpu_box {
209 /* VIRTIO_GPU_CMD_TRANSFER_TO_HOST_3D, VIRTIO_GPU_CMD_TRANSFER_FROM_HOST_3D */
210 struct virtio_gpu_transfer_host_3d {
211 struct virtio_gpu_ctrl_hdr hdr;
212 struct virtio_gpu_box box;
220 /* VIRTIO_GPU_CMD_RESOURCE_CREATE_3D */
221 #define VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP (1 << 0)
222 struct virtio_gpu_resource_create_3d {
223 struct virtio_gpu_ctrl_hdr hdr;
238 /* VIRTIO_GPU_CMD_CTX_CREATE */
239 struct virtio_gpu_ctx_create {
240 struct virtio_gpu_ctrl_hdr hdr;
246 /* VIRTIO_GPU_CMD_CTX_DESTROY */
247 struct virtio_gpu_ctx_destroy {
248 struct virtio_gpu_ctrl_hdr hdr;
251 /* VIRTIO_GPU_CMD_CTX_ATTACH_RESOURCE, VIRTIO_GPU_CMD_CTX_DETACH_RESOURCE */
252 struct virtio_gpu_ctx_resource {
253 struct virtio_gpu_ctrl_hdr hdr;
258 /* VIRTIO_GPU_CMD_SUBMIT_3D */
259 struct virtio_gpu_cmd_submit {
260 struct virtio_gpu_ctrl_hdr hdr;
265 #define VIRTIO_GPU_CAPSET_VIRGL 1
266 #define VIRTIO_GPU_CAPSET_VIRGL2 2
268 /* VIRTIO_GPU_CMD_GET_CAPSET_INFO */
269 struct virtio_gpu_get_capset_info {
270 struct virtio_gpu_ctrl_hdr hdr;
275 /* VIRTIO_GPU_RESP_OK_CAPSET_INFO */
276 struct virtio_gpu_resp_capset_info {
277 struct virtio_gpu_ctrl_hdr hdr;
279 __le32 capset_max_version;
280 __le32 capset_max_size;
284 /* VIRTIO_GPU_CMD_GET_CAPSET */
285 struct virtio_gpu_get_capset {
286 struct virtio_gpu_ctrl_hdr hdr;
288 __le32 capset_version;
291 /* VIRTIO_GPU_RESP_OK_CAPSET */
292 struct virtio_gpu_resp_capset {
293 struct virtio_gpu_ctrl_hdr hdr;
297 /* VIRTIO_GPU_CMD_GET_EDID */
298 struct virtio_gpu_cmd_get_edid {
299 struct virtio_gpu_ctrl_hdr hdr;
304 /* VIRTIO_GPU_RESP_OK_EDID */
305 struct virtio_gpu_resp_edid {
306 struct virtio_gpu_ctrl_hdr hdr;
312 #define VIRTIO_GPU_EVENT_DISPLAY (1 << 0)
314 struct virtio_gpu_config {
321 /* simple formats for fbcon/X use */
322 enum virtio_gpu_formats {
323 VIRTIO_GPU_FORMAT_B8G8R8A8_UNORM = 1,
324 VIRTIO_GPU_FORMAT_B8G8R8X8_UNORM = 2,
325 VIRTIO_GPU_FORMAT_A8R8G8B8_UNORM = 3,
326 VIRTIO_GPU_FORMAT_X8R8G8B8_UNORM = 4,
328 VIRTIO_GPU_FORMAT_R8G8B8A8_UNORM = 67,
329 VIRTIO_GPU_FORMAT_X8B8G8R8_UNORM = 68,
331 VIRTIO_GPU_FORMAT_A8B8G8R8_UNORM = 121,
332 VIRTIO_GPU_FORMAT_R8G8B8X8_UNORM = 134,