1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) 2016 Texas Instruments, Inc.
9 #include <linux/list.h>
10 #include <linux/kobject.h>
11 #include <linux/device.h>
12 #include <linux/interrupt.h>
13 #include <linux/platform_data/omapdss.h>
15 #include <video/videomode.h>
17 #define DISPC_IRQ_FRAMEDONE (1 << 0)
18 #define DISPC_IRQ_VSYNC (1 << 1)
19 #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
20 #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
21 #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
22 #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
23 #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
24 #define DISPC_IRQ_GFX_END_WIN (1 << 7)
25 #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
26 #define DISPC_IRQ_OCP_ERR (1 << 9)
27 #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
28 #define DISPC_IRQ_VID1_END_WIN (1 << 11)
29 #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
30 #define DISPC_IRQ_VID2_END_WIN (1 << 13)
31 #define DISPC_IRQ_SYNC_LOST (1 << 14)
32 #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
33 #define DISPC_IRQ_WAKEUP (1 << 16)
34 #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
35 #define DISPC_IRQ_VSYNC2 (1 << 18)
36 #define DISPC_IRQ_VID3_END_WIN (1 << 19)
37 #define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
38 #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
39 #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
40 #define DISPC_IRQ_FRAMEDONEWB (1 << 23)
41 #define DISPC_IRQ_FRAMEDONETV (1 << 24)
42 #define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
43 #define DISPC_IRQ_WBUNCOMPLETEERROR (1 << 26)
44 #define DISPC_IRQ_SYNC_LOST3 (1 << 27)
45 #define DISPC_IRQ_VSYNC3 (1 << 28)
46 #define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
47 #define DISPC_IRQ_FRAMEDONE3 (1 << 30)
49 struct omap_dss_device;
50 struct omap_overlay_manager;
51 struct dss_lcd_mgr_config;
52 struct snd_aes_iec958;
53 struct snd_cea_861_aud_if;
54 struct hdmi_avi_infoframe;
56 enum omap_display_type {
57 OMAP_DISPLAY_TYPE_NONE = 0,
58 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
59 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
60 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
61 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
62 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
63 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
64 OMAP_DISPLAY_TYPE_DVI = 1 << 6,
76 OMAP_DSS_CHANNEL_LCD = 0,
77 OMAP_DSS_CHANNEL_DIGIT = 1,
78 OMAP_DSS_CHANNEL_LCD2 = 2,
79 OMAP_DSS_CHANNEL_LCD3 = 3,
80 OMAP_DSS_CHANNEL_WB = 4,
83 enum omap_color_mode {
84 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
85 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
86 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
87 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
88 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
89 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
90 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
91 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
92 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
93 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
94 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
95 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
96 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
97 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
98 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
99 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
100 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
101 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
102 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
105 enum omap_dss_load_mode {
106 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
107 OMAP_DSS_LOAD_CLUT_ONLY = 1,
108 OMAP_DSS_LOAD_FRAME_ONLY = 2,
109 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
112 enum omap_dss_trans_key_type {
113 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
114 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
117 enum omap_rfbi_te_mode {
118 OMAP_DSS_RFBI_TE_MODE_1 = 1,
119 OMAP_DSS_RFBI_TE_MODE_2 = 2,
122 enum omap_dss_signal_level {
123 OMAPDSS_SIG_ACTIVE_LOW,
124 OMAPDSS_SIG_ACTIVE_HIGH,
127 enum omap_dss_signal_edge {
128 OMAPDSS_DRIVE_SIG_FALLING_EDGE,
129 OMAPDSS_DRIVE_SIG_RISING_EDGE,
132 enum omap_dss_venc_type {
133 OMAP_DSS_VENC_TYPE_COMPOSITE,
134 OMAP_DSS_VENC_TYPE_SVIDEO,
137 enum omap_dss_dsi_pixel_format {
138 OMAP_DSS_DSI_FMT_RGB888,
139 OMAP_DSS_DSI_FMT_RGB666,
140 OMAP_DSS_DSI_FMT_RGB666_PACKED,
141 OMAP_DSS_DSI_FMT_RGB565,
144 enum omap_dss_dsi_mode {
145 OMAP_DSS_DSI_CMD_MODE = 0,
146 OMAP_DSS_DSI_VIDEO_MODE,
149 enum omap_display_caps {
150 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
151 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
154 enum omap_dss_display_state {
155 OMAP_DSS_DISPLAY_DISABLED = 0,
156 OMAP_DSS_DISPLAY_ACTIVE,
159 enum omap_dss_rotation_type {
160 OMAP_DSS_ROT_DMA = 1 << 0,
161 OMAP_DSS_ROT_VRFB = 1 << 1,
162 OMAP_DSS_ROT_TILER = 1 << 2,
165 /* clockwise rotation angle */
166 enum omap_dss_rotation_angle {
169 OMAP_DSS_ROT_180 = 2,
170 OMAP_DSS_ROT_270 = 3,
173 enum omap_overlay_caps {
174 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
175 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
176 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
177 OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
178 OMAP_DSS_OVL_CAP_POS = 1 << 4,
179 OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
182 enum omap_dss_output_id {
183 OMAP_DSS_OUTPUT_DPI = 1 << 0,
184 OMAP_DSS_OUTPUT_DBI = 1 << 1,
185 OMAP_DSS_OUTPUT_SDI = 1 << 2,
186 OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
187 OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
188 OMAP_DSS_OUTPUT_VENC = 1 << 5,
189 OMAP_DSS_OUTPUT_HDMI = 1 << 6,
194 struct rfbi_timings {
208 u32 tim[5]; /* set by rfbi_convert_timings() */
215 enum omap_dss_dsi_trans_mode {
216 /* Sync Pulses: both sync start and end packets sent */
217 OMAP_DSS_DSI_PULSE_MODE,
218 /* Sync Events: only sync start packets sent */
219 OMAP_DSS_DSI_EVENT_MODE,
220 /* Burst: only sync start packets sent, pixels are time compressed */
221 OMAP_DSS_DSI_BURST_MODE,
224 struct omap_dss_dsi_videomode_timings {
235 /* DSI video mode blanking data */
236 /* Unit: byte clock cycles */
242 /* Unit: line clocks */
247 /* DSI blanking modes */
249 int hsa_blanking_mode;
250 int hbp_blanking_mode;
251 int hfp_blanking_mode;
253 enum omap_dss_dsi_trans_mode trans_mode;
255 bool ddr_clk_always_on;
259 struct omap_dss_dsi_config {
260 enum omap_dss_dsi_mode mode;
261 enum omap_dss_dsi_pixel_format pixel_format;
262 const struct omap_video_timings *timings;
264 unsigned long hs_clk_min, hs_clk_max;
265 unsigned long lp_clk_min, lp_clk_max;
267 bool ddr_clk_always_on;
268 enum omap_dss_dsi_trans_mode trans_mode;
271 struct omap_video_timings {
278 /* Unit: pixel clocks */
279 u16 hsw; /* Horizontal synchronization pulse width */
280 /* Unit: pixel clocks */
281 u16 hfp; /* Horizontal front porch */
282 /* Unit: pixel clocks */
283 u16 hbp; /* Horizontal back porch */
284 /* Unit: line clocks */
285 u16 vsw; /* Vertical synchronization pulse width */
286 /* Unit: line clocks */
287 u16 vfp; /* Vertical front porch */
288 /* Unit: line clocks */
289 u16 vbp; /* Vertical back porch */
291 /* Vsync logic level */
292 enum omap_dss_signal_level vsync_level;
293 /* Hsync logic level */
294 enum omap_dss_signal_level hsync_level;
295 /* Interlaced or Progressive timings */
297 /* Pixel clock edge to drive LCD data */
298 enum omap_dss_signal_edge data_pclk_edge;
299 /* Data enable logic level */
300 enum omap_dss_signal_level de_level;
301 /* Pixel clock edges to drive HSYNC and VSYNC signals */
302 enum omap_dss_signal_edge sync_pclk_edge;
307 /* Hardcoded timings for tv modes. Venc only uses these to
308 * identify the mode, and does not actually use the configs
309 * itself. However, the configs should be something that
310 * a normal monitor can also show */
311 extern const struct omap_video_timings omap_dss_pal_timings;
312 extern const struct omap_video_timings omap_dss_ntsc_timings;
314 struct omap_dss_cpr_coefs {
320 struct omap_overlay_info {
322 dma_addr_t p_uv_addr; /* for NV12 format */
326 enum omap_color_mode color_mode;
328 enum omap_dss_rotation_type rotation_type;
333 u16 out_width; /* if 0, out_width == width */
334 u16 out_height; /* if 0, out_height == height */
340 struct omap_overlay {
342 struct list_head list;
347 enum omap_color_mode supported_modes;
348 enum omap_overlay_caps caps;
351 struct omap_overlay_manager *manager;
354 * The following functions do not block:
360 * The rest of the functions may block and cannot be called from
364 int (*enable)(struct omap_overlay *ovl);
365 int (*disable)(struct omap_overlay *ovl);
366 bool (*is_enabled)(struct omap_overlay *ovl);
368 int (*set_manager)(struct omap_overlay *ovl,
369 struct omap_overlay_manager *mgr);
370 int (*unset_manager)(struct omap_overlay *ovl);
372 int (*set_overlay_info)(struct omap_overlay *ovl,
373 struct omap_overlay_info *info);
374 void (*get_overlay_info)(struct omap_overlay *ovl,
375 struct omap_overlay_info *info);
377 int (*wait_for_go)(struct omap_overlay *ovl);
379 struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
382 struct omap_overlay_manager_info {
385 enum omap_dss_trans_key_type trans_key_type;
389 bool partial_alpha_enabled;
392 struct omap_dss_cpr_coefs cpr_coefs;
395 struct omap_overlay_manager {
400 enum omap_channel id;
401 struct list_head overlays;
402 enum omap_display_type supported_displays;
403 enum omap_dss_output_id supported_outputs;
406 struct omap_dss_device *output;
409 * The following functions do not block:
415 * The rest of the functions may block and cannot be called from
419 int (*set_output)(struct omap_overlay_manager *mgr,
420 struct omap_dss_device *output);
421 int (*unset_output)(struct omap_overlay_manager *mgr);
423 int (*set_manager_info)(struct omap_overlay_manager *mgr,
424 struct omap_overlay_manager_info *info);
425 void (*get_manager_info)(struct omap_overlay_manager *mgr,
426 struct omap_overlay_manager_info *info);
428 int (*apply)(struct omap_overlay_manager *mgr);
429 int (*wait_for_go)(struct omap_overlay_manager *mgr);
430 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
432 struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
435 /* 22 pins means 1 clk lane and 10 data lanes */
436 #define OMAP_DSS_MAX_DSI_PINS 22
438 struct omap_dsi_pin_config {
441 * pin numbers in the following order:
447 int pins[OMAP_DSS_MAX_DSI_PINS];
450 struct omap_dss_writeback_info {
456 enum omap_color_mode color_mode;
458 enum omap_dss_rotation_type rotation_type;
463 struct omapdss_dpi_ops {
464 int (*connect)(struct omap_dss_device *dssdev,
465 struct omap_dss_device *dst);
466 void (*disconnect)(struct omap_dss_device *dssdev,
467 struct omap_dss_device *dst);
469 int (*enable)(struct omap_dss_device *dssdev);
470 void (*disable)(struct omap_dss_device *dssdev);
472 int (*check_timings)(struct omap_dss_device *dssdev,
473 struct omap_video_timings *timings);
474 void (*set_timings)(struct omap_dss_device *dssdev,
475 struct omap_video_timings *timings);
476 void (*get_timings)(struct omap_dss_device *dssdev,
477 struct omap_video_timings *timings);
479 void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
482 struct omapdss_sdi_ops {
483 int (*connect)(struct omap_dss_device *dssdev,
484 struct omap_dss_device *dst);
485 void (*disconnect)(struct omap_dss_device *dssdev,
486 struct omap_dss_device *dst);
488 int (*enable)(struct omap_dss_device *dssdev);
489 void (*disable)(struct omap_dss_device *dssdev);
491 int (*check_timings)(struct omap_dss_device *dssdev,
492 struct omap_video_timings *timings);
493 void (*set_timings)(struct omap_dss_device *dssdev,
494 struct omap_video_timings *timings);
495 void (*get_timings)(struct omap_dss_device *dssdev,
496 struct omap_video_timings *timings);
498 void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
501 struct omapdss_dvi_ops {
502 int (*connect)(struct omap_dss_device *dssdev,
503 struct omap_dss_device *dst);
504 void (*disconnect)(struct omap_dss_device *dssdev,
505 struct omap_dss_device *dst);
507 int (*enable)(struct omap_dss_device *dssdev);
508 void (*disable)(struct omap_dss_device *dssdev);
510 int (*check_timings)(struct omap_dss_device *dssdev,
511 struct omap_video_timings *timings);
512 void (*set_timings)(struct omap_dss_device *dssdev,
513 struct omap_video_timings *timings);
514 void (*get_timings)(struct omap_dss_device *dssdev,
515 struct omap_video_timings *timings);
518 struct omapdss_atv_ops {
519 int (*connect)(struct omap_dss_device *dssdev,
520 struct omap_dss_device *dst);
521 void (*disconnect)(struct omap_dss_device *dssdev,
522 struct omap_dss_device *dst);
524 int (*enable)(struct omap_dss_device *dssdev);
525 void (*disable)(struct omap_dss_device *dssdev);
527 int (*check_timings)(struct omap_dss_device *dssdev,
528 struct omap_video_timings *timings);
529 void (*set_timings)(struct omap_dss_device *dssdev,
530 struct omap_video_timings *timings);
531 void (*get_timings)(struct omap_dss_device *dssdev,
532 struct omap_video_timings *timings);
534 void (*set_type)(struct omap_dss_device *dssdev,
535 enum omap_dss_venc_type type);
536 void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
537 bool invert_polarity);
539 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
540 u32 (*get_wss)(struct omap_dss_device *dssdev);
543 struct omapdss_hdmi_ops {
544 int (*connect)(struct omap_dss_device *dssdev,
545 struct omap_dss_device *dst);
546 void (*disconnect)(struct omap_dss_device *dssdev,
547 struct omap_dss_device *dst);
549 int (*enable)(struct omap_dss_device *dssdev);
550 void (*disable)(struct omap_dss_device *dssdev);
552 int (*check_timings)(struct omap_dss_device *dssdev,
553 struct omap_video_timings *timings);
554 void (*set_timings)(struct omap_dss_device *dssdev,
555 struct omap_video_timings *timings);
556 void (*get_timings)(struct omap_dss_device *dssdev,
557 struct omap_video_timings *timings);
559 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
560 bool (*detect)(struct omap_dss_device *dssdev);
562 int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
563 int (*set_infoframe)(struct omap_dss_device *dssdev,
564 const struct hdmi_avi_infoframe *avi);
567 struct omapdss_dsi_ops {
568 int (*connect)(struct omap_dss_device *dssdev,
569 struct omap_dss_device *dst);
570 void (*disconnect)(struct omap_dss_device *dssdev,
571 struct omap_dss_device *dst);
573 int (*enable)(struct omap_dss_device *dssdev);
574 void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
577 /* bus configuration */
578 int (*set_config)(struct omap_dss_device *dssdev,
579 const struct omap_dss_dsi_config *cfg);
580 int (*configure_pins)(struct omap_dss_device *dssdev,
581 const struct omap_dsi_pin_config *pin_cfg);
583 void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
585 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
587 int (*update)(struct omap_dss_device *dssdev, int channel,
588 void (*callback)(int, void *), void *data);
590 void (*bus_lock)(struct omap_dss_device *dssdev);
591 void (*bus_unlock)(struct omap_dss_device *dssdev);
593 int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
594 void (*disable_video_output)(struct omap_dss_device *dssdev,
597 int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
598 int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
600 void (*release_vc)(struct omap_dss_device *dssdev, int channel);
603 int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
605 int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
607 int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
610 int (*gen_write)(struct omap_dss_device *dssdev, int channel,
612 int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
614 int (*gen_read)(struct omap_dss_device *dssdev, int channel,
615 u8 *reqdata, int reqlen,
618 int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
620 int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
621 int channel, u16 plen);
624 struct omap_dss_device {
628 struct module *owner;
630 struct list_head panel_list;
632 /* alias in the form of "display%d" */
635 enum omap_display_type type;
636 enum omap_display_type output_type;
657 enum omap_dss_venc_type type;
658 bool invert_polarity;
663 struct omap_video_timings timings;
665 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
666 enum omap_dss_dsi_mode dsi_mode;
671 struct rfbi_timings rfbi_timings;
676 /* used to match device to driver */
677 const char *driver_name;
681 struct omap_dss_driver *driver;
684 const struct omapdss_dpi_ops *dpi;
685 const struct omapdss_sdi_ops *sdi;
686 const struct omapdss_dvi_ops *dvi;
687 const struct omapdss_hdmi_ops *hdmi;
688 const struct omapdss_atv_ops *atv;
689 const struct omapdss_dsi_ops *dsi;
692 /* helper variable for driver suspend/resume */
693 bool activate_after_resume;
695 enum omap_display_caps caps;
697 struct omap_dss_device *src;
699 enum omap_dss_display_state state;
701 /* OMAP DSS output specific fields */
703 struct list_head list;
705 /* DISPC channel for this output */
706 enum omap_channel dispc_channel;
707 bool dispc_channel_connected;
709 /* output instance */
710 enum omap_dss_output_id id;
712 /* the port number in the DT node */
716 struct omap_overlay_manager *manager;
718 struct omap_dss_device *dst;
721 struct omap_dss_driver {
722 int (*probe)(struct omap_dss_device *);
723 void (*remove)(struct omap_dss_device *);
725 int (*connect)(struct omap_dss_device *dssdev);
726 void (*disconnect)(struct omap_dss_device *dssdev);
728 int (*enable)(struct omap_dss_device *display);
729 void (*disable)(struct omap_dss_device *display);
730 int (*run_test)(struct omap_dss_device *display, int test);
732 int (*update)(struct omap_dss_device *dssdev,
733 u16 x, u16 y, u16 w, u16 h);
734 int (*sync)(struct omap_dss_device *dssdev);
736 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
737 int (*get_te)(struct omap_dss_device *dssdev);
739 u8 (*get_rotate)(struct omap_dss_device *dssdev);
740 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
742 bool (*get_mirror)(struct omap_dss_device *dssdev);
743 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
745 int (*memory_read)(struct omap_dss_device *dssdev,
746 void *buf, size_t size,
747 u16 x, u16 y, u16 w, u16 h);
749 void (*get_resolution)(struct omap_dss_device *dssdev,
750 u16 *xres, u16 *yres);
751 void (*get_dimensions)(struct omap_dss_device *dssdev,
752 u32 *width, u32 *height);
753 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
755 int (*check_timings)(struct omap_dss_device *dssdev,
756 struct omap_video_timings *timings);
757 void (*set_timings)(struct omap_dss_device *dssdev,
758 struct omap_video_timings *timings);
759 void (*get_timings)(struct omap_dss_device *dssdev,
760 struct omap_video_timings *timings);
762 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
763 u32 (*get_wss)(struct omap_dss_device *dssdev);
765 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
766 bool (*detect)(struct omap_dss_device *dssdev);
768 int (*set_hdmi_mode)(struct omap_dss_device *dssdev, bool hdmi_mode);
769 int (*set_hdmi_infoframe)(struct omap_dss_device *dssdev,
770 const struct hdmi_avi_infoframe *avi);
773 #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
775 typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
777 #if IS_ENABLED(CONFIG_FB_OMAP2)
779 enum omapdss_version omapdss_get_version(void);
780 bool omapdss_is_initialized(void);
782 int omap_dss_register_driver(struct omap_dss_driver *);
783 void omap_dss_unregister_driver(struct omap_dss_driver *);
785 int omapdss_register_display(struct omap_dss_device *dssdev);
786 void omapdss_unregister_display(struct omap_dss_device *dssdev);
788 struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
789 void omap_dss_put_device(struct omap_dss_device *dssdev);
790 struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
791 struct omap_dss_device *omap_dss_find_device(void *data,
792 int (*match)(struct omap_dss_device *dssdev, void *data));
793 const char *omapdss_get_default_display_name(void);
795 void videomode_to_omap_video_timings(const struct videomode *vm,
796 struct omap_video_timings *ovt);
797 void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
798 struct videomode *vm);
800 int dss_feat_get_num_mgrs(void);
801 int dss_feat_get_num_ovls(void);
802 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
806 int omap_dss_get_num_overlay_managers(void);
807 struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
809 int omap_dss_get_num_overlays(void);
810 struct omap_overlay *omap_dss_get_overlay(int num);
812 int omapdss_register_output(struct omap_dss_device *output);
813 void omapdss_unregister_output(struct omap_dss_device *output);
814 struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
815 struct omap_dss_device *omap_dss_find_output(const char *name);
816 struct omap_dss_device *omap_dss_find_output_by_port_node(struct device_node *port);
817 int omapdss_output_set_device(struct omap_dss_device *out,
818 struct omap_dss_device *dssdev);
819 int omapdss_output_unset_device(struct omap_dss_device *out);
821 struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
822 struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
824 void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
825 u16 *xres, u16 *yres);
826 int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
827 void omapdss_default_get_timings(struct omap_dss_device *dssdev,
828 struct omap_video_timings *timings);
830 int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
831 int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
833 int omapdss_compat_init(void);
834 void omapdss_compat_uninit(void);
836 static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
841 static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
843 return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
847 omapdss_of_get_next_port(const struct device_node *parent,
848 struct device_node *prev);
851 omapdss_of_get_next_endpoint(const struct device_node *parent,
852 struct device_node *prev);
855 omapdss_of_get_first_endpoint(const struct device_node *parent);
857 struct omap_dss_device *
858 omapdss_of_find_source_for_first_ep(struct device_node *node);
861 static inline enum omapdss_version omapdss_get_version(void)
862 { return OMAPDSS_VER_UNKNOWN; };
864 static inline bool omapdss_is_initialized(void)
867 static inline int omap_dispc_register_isr(omap_dispc_isr_t isr,
871 static inline int omap_dispc_unregister_isr(omap_dispc_isr_t isr,
875 static inline struct omap_dss_device
876 *omap_dss_get_device(struct omap_dss_device *dssdev)
879 static inline struct omap_dss_device
880 *omap_dss_get_next_device(struct omap_dss_device *from)
883 static inline void omap_dss_put_device(struct omap_dss_device *dssdev) {};
885 static inline int omapdss_compat_init(void)
888 static inline void omapdss_compat_uninit(void) {};
890 static inline int omap_dss_get_num_overlay_managers(void)
893 static inline struct omap_overlay_manager *omap_dss_get_overlay_manager(int num)
896 static inline int omap_dss_get_num_overlays(void)
899 static inline struct omap_overlay *omap_dss_get_overlay(int num)
903 #endif /* FB_OMAP2 */
906 #endif /* __OMAPFB_DSS_H */