1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Christoph Hellwig.
5 * DMA operations that map physical memory directly without using an IOMMU.
7 #include <linux/memblock.h> /* for max_pfn */
8 #include <linux/export.h>
10 #include <linux/dma-direct.h>
11 #include <linux/scatterlist.h>
12 #include <linux/dma-contiguous.h>
13 #include <linux/dma-noncoherent.h>
14 #include <linux/pfn.h>
15 #include <linux/vmalloc.h>
16 #include <linux/set_memory.h>
17 #include <linux/swiotlb.h>
20 * Most architectures use ZONE_DMA for the first 16 Megabytes, but some use it
21 * it for entirely different regions. In that case the arch code needs to
22 * override the variable below for dma-direct to work properly.
24 unsigned int zone_dma_bits __ro_after_init = 24;
26 static inline dma_addr_t phys_to_dma_direct(struct device *dev,
29 if (force_dma_unencrypted(dev))
30 return __phys_to_dma(dev, phys);
31 return phys_to_dma(dev, phys);
34 static inline struct page *dma_direct_to_page(struct device *dev,
37 return pfn_to_page(PHYS_PFN(dma_to_phys(dev, dma_addr)));
40 u64 dma_direct_get_required_mask(struct device *dev)
42 u64 max_dma = phys_to_dma_direct(dev, (max_pfn - 1) << PAGE_SHIFT);
44 return (1ULL << (fls64(max_dma) - 1)) * 2 - 1;
47 static gfp_t __dma_direct_optimal_gfp_mask(struct device *dev, u64 dma_mask,
50 u64 dma_limit = min_not_zero(dma_mask, dev->bus_dma_limit);
52 if (force_dma_unencrypted(dev))
53 *phys_limit = __dma_to_phys(dev, dma_limit);
55 *phys_limit = dma_to_phys(dev, dma_limit);
58 * Optimistically try the zone that the physical address mask falls
59 * into first. If that returns memory that isn't actually addressable
60 * we will fallback to the next lower zone and try again.
62 * Note that GFP_DMA32 and GFP_DMA are no ops without the corresponding
65 if (*phys_limit <= DMA_BIT_MASK(zone_dma_bits))
67 if (*phys_limit <= DMA_BIT_MASK(32))
72 static bool dma_coherent_ok(struct device *dev, phys_addr_t phys, size_t size)
74 return phys_to_dma_direct(dev, phys) + size - 1 <=
75 min_not_zero(dev->coherent_dma_mask, dev->bus_dma_limit);
78 struct page *__dma_direct_alloc_pages(struct device *dev, size_t size,
79 gfp_t gfp, unsigned long attrs)
81 size_t alloc_size = PAGE_ALIGN(size);
82 int node = dev_to_node(dev);
83 struct page *page = NULL;
86 if (attrs & DMA_ATTR_NO_WARN)
89 /* we always manually zero the memory once we are done: */
91 gfp |= __dma_direct_optimal_gfp_mask(dev, dev->coherent_dma_mask,
93 page = dma_alloc_contiguous(dev, alloc_size, gfp);
94 if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
95 dma_free_contiguous(dev, page, alloc_size);
100 page = alloc_pages_node(node, gfp, get_order(alloc_size));
101 if (page && !dma_coherent_ok(dev, page_to_phys(page), size)) {
102 dma_free_contiguous(dev, page, size);
105 if (IS_ENABLED(CONFIG_ZONE_DMA32) &&
106 phys_limit < DMA_BIT_MASK(64) &&
107 !(gfp & (GFP_DMA32 | GFP_DMA))) {
112 if (IS_ENABLED(CONFIG_ZONE_DMA) && !(gfp & GFP_DMA)) {
113 gfp = (gfp & ~GFP_DMA32) | GFP_DMA;
121 void *dma_direct_alloc_pages(struct device *dev, size_t size,
122 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
127 if (IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
128 dma_alloc_need_uncached(dev, attrs) &&
129 !gfpflags_allow_blocking(gfp)) {
130 ret = dma_alloc_from_pool(PAGE_ALIGN(size), &page, gfp);
136 page = __dma_direct_alloc_pages(dev, size, gfp, attrs);
140 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
141 !force_dma_unencrypted(dev)) {
142 /* remove any dirty cache lines on the kernel alias */
143 if (!PageHighMem(page))
144 arch_dma_prep_coherent(page, size);
145 /* return the page pointer as the opaque cookie */
150 if ((IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
151 dma_alloc_need_uncached(dev, attrs)) ||
152 (IS_ENABLED(CONFIG_DMA_REMAP) && PageHighMem(page))) {
153 /* remove any dirty cache lines on the kernel alias */
154 arch_dma_prep_coherent(page, PAGE_ALIGN(size));
156 /* create a coherent mapping */
157 ret = dma_common_contiguous_remap(page, PAGE_ALIGN(size),
158 dma_pgprot(dev, PAGE_KERNEL, attrs),
159 __builtin_return_address(0));
161 dma_free_contiguous(dev, page, size);
165 memset(ret, 0, size);
169 if (PageHighMem(page)) {
171 * Depending on the cma= arguments and per-arch setup
172 * dma_alloc_contiguous could return highmem pages.
173 * Without remapping there is no way to return them here,
174 * so log an error and fail.
176 dev_info(dev, "Rejecting highmem page from CMA.\n");
177 dma_free_contiguous(dev, page, size);
181 ret = page_address(page);
182 if (force_dma_unencrypted(dev))
183 set_memory_decrypted((unsigned long)ret, 1 << get_order(size));
185 memset(ret, 0, size);
187 if (IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
188 dma_alloc_need_uncached(dev, attrs)) {
189 arch_dma_prep_coherent(page, size);
190 ret = uncached_kernel_address(ret);
193 if (force_dma_unencrypted(dev))
194 *dma_handle = __phys_to_dma(dev, page_to_phys(page));
196 *dma_handle = phys_to_dma(dev, page_to_phys(page));
200 void dma_direct_free_pages(struct device *dev, size_t size, void *cpu_addr,
201 dma_addr_t dma_addr, unsigned long attrs)
203 unsigned int page_order = get_order(size);
205 if ((attrs & DMA_ATTR_NO_KERNEL_MAPPING) &&
206 !force_dma_unencrypted(dev)) {
207 /* cpu_addr is a struct page cookie, not a kernel address */
208 dma_free_contiguous(dev, cpu_addr, size);
212 if (IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
213 dma_free_from_pool(cpu_addr, PAGE_ALIGN(size)))
216 if (force_dma_unencrypted(dev))
217 set_memory_encrypted((unsigned long)cpu_addr, 1 << page_order);
219 if (IS_ENABLED(CONFIG_DMA_REMAP) && is_vmalloc_addr(cpu_addr))
222 dma_free_contiguous(dev, dma_direct_to_page(dev, dma_addr), size);
225 void *dma_direct_alloc(struct device *dev, size_t size,
226 dma_addr_t *dma_handle, gfp_t gfp, unsigned long attrs)
228 if (!IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
229 !IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
230 dma_alloc_need_uncached(dev, attrs))
231 return arch_dma_alloc(dev, size, dma_handle, gfp, attrs);
232 return dma_direct_alloc_pages(dev, size, dma_handle, gfp, attrs);
235 void dma_direct_free(struct device *dev, size_t size,
236 void *cpu_addr, dma_addr_t dma_addr, unsigned long attrs)
238 if (!IS_ENABLED(CONFIG_ARCH_HAS_UNCACHED_SEGMENT) &&
239 !IS_ENABLED(CONFIG_DMA_DIRECT_REMAP) &&
240 dma_alloc_need_uncached(dev, attrs))
241 arch_dma_free(dev, size, cpu_addr, dma_addr, attrs);
243 dma_direct_free_pages(dev, size, cpu_addr, dma_addr, attrs);
246 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE) || \
247 defined(CONFIG_SWIOTLB)
248 void dma_direct_sync_single_for_device(struct device *dev,
249 dma_addr_t addr, size_t size, enum dma_data_direction dir)
251 phys_addr_t paddr = dma_to_phys(dev, addr);
253 if (unlikely(is_swiotlb_buffer(paddr)))
254 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_DEVICE);
256 if (!dev_is_dma_coherent(dev))
257 arch_sync_dma_for_device(paddr, size, dir);
259 EXPORT_SYMBOL(dma_direct_sync_single_for_device);
261 void dma_direct_sync_sg_for_device(struct device *dev,
262 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
264 struct scatterlist *sg;
267 for_each_sg(sgl, sg, nents, i) {
268 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
270 if (unlikely(is_swiotlb_buffer(paddr)))
271 swiotlb_tbl_sync_single(dev, paddr, sg->length,
272 dir, SYNC_FOR_DEVICE);
274 if (!dev_is_dma_coherent(dev))
275 arch_sync_dma_for_device(paddr, sg->length,
279 EXPORT_SYMBOL(dma_direct_sync_sg_for_device);
282 #if defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU) || \
283 defined(CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU_ALL) || \
284 defined(CONFIG_SWIOTLB)
285 void dma_direct_sync_single_for_cpu(struct device *dev,
286 dma_addr_t addr, size_t size, enum dma_data_direction dir)
288 phys_addr_t paddr = dma_to_phys(dev, addr);
290 if (!dev_is_dma_coherent(dev)) {
291 arch_sync_dma_for_cpu(paddr, size, dir);
292 arch_sync_dma_for_cpu_all();
295 if (unlikely(is_swiotlb_buffer(paddr)))
296 swiotlb_tbl_sync_single(dev, paddr, size, dir, SYNC_FOR_CPU);
298 EXPORT_SYMBOL(dma_direct_sync_single_for_cpu);
300 void dma_direct_sync_sg_for_cpu(struct device *dev,
301 struct scatterlist *sgl, int nents, enum dma_data_direction dir)
303 struct scatterlist *sg;
306 for_each_sg(sgl, sg, nents, i) {
307 phys_addr_t paddr = dma_to_phys(dev, sg_dma_address(sg));
309 if (!dev_is_dma_coherent(dev))
310 arch_sync_dma_for_cpu(paddr, sg->length, dir);
312 if (unlikely(is_swiotlb_buffer(paddr)))
313 swiotlb_tbl_sync_single(dev, paddr, sg->length, dir,
317 if (!dev_is_dma_coherent(dev))
318 arch_sync_dma_for_cpu_all();
320 EXPORT_SYMBOL(dma_direct_sync_sg_for_cpu);
322 void dma_direct_unmap_page(struct device *dev, dma_addr_t addr,
323 size_t size, enum dma_data_direction dir, unsigned long attrs)
325 phys_addr_t phys = dma_to_phys(dev, addr);
327 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC))
328 dma_direct_sync_single_for_cpu(dev, addr, size, dir);
330 if (unlikely(is_swiotlb_buffer(phys)))
331 swiotlb_tbl_unmap_single(dev, phys, size, size, dir, attrs);
333 EXPORT_SYMBOL(dma_direct_unmap_page);
335 void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sgl,
336 int nents, enum dma_data_direction dir, unsigned long attrs)
338 struct scatterlist *sg;
341 for_each_sg(sgl, sg, nents, i)
342 dma_direct_unmap_page(dev, sg->dma_address, sg_dma_len(sg), dir,
345 EXPORT_SYMBOL(dma_direct_unmap_sg);
348 dma_addr_t dma_direct_map_page(struct device *dev, struct page *page,
349 unsigned long offset, size_t size, enum dma_data_direction dir,
352 phys_addr_t phys = page_to_phys(page) + offset;
353 dma_addr_t dma_addr = phys_to_dma(dev, phys);
355 if (unlikely(swiotlb_force == SWIOTLB_FORCE))
356 return swiotlb_map(dev, phys, size, dir, attrs);
358 if (unlikely(!dma_capable(dev, dma_addr, size, true))) {
359 if (swiotlb_force != SWIOTLB_NO_FORCE)
360 return swiotlb_map(dev, phys, size, dir, attrs);
362 dev_WARN_ONCE(dev, 1,
363 "DMA addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
364 &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
365 return DMA_MAPPING_ERROR;
368 if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC))
369 arch_sync_dma_for_device(phys, size, dir);
372 EXPORT_SYMBOL(dma_direct_map_page);
374 int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents,
375 enum dma_data_direction dir, unsigned long attrs)
378 struct scatterlist *sg;
380 for_each_sg(sgl, sg, nents, i) {
381 sg->dma_address = dma_direct_map_page(dev, sg_page(sg),
382 sg->offset, sg->length, dir, attrs);
383 if (sg->dma_address == DMA_MAPPING_ERROR)
385 sg_dma_len(sg) = sg->length;
391 dma_direct_unmap_sg(dev, sgl, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
394 EXPORT_SYMBOL(dma_direct_map_sg);
396 dma_addr_t dma_direct_map_resource(struct device *dev, phys_addr_t paddr,
397 size_t size, enum dma_data_direction dir, unsigned long attrs)
399 dma_addr_t dma_addr = paddr;
401 if (unlikely(!dma_capable(dev, dma_addr, size, false))) {
403 "DMA addr %pad+%zu overflow (mask %llx, bus limit %llx).\n",
404 &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit);
406 return DMA_MAPPING_ERROR;
411 EXPORT_SYMBOL(dma_direct_map_resource);
413 int dma_direct_get_sgtable(struct device *dev, struct sg_table *sgt,
414 void *cpu_addr, dma_addr_t dma_addr, size_t size,
417 struct page *page = dma_direct_to_page(dev, dma_addr);
420 ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
422 sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
427 bool dma_direct_can_mmap(struct device *dev)
429 return dev_is_dma_coherent(dev) ||
430 IS_ENABLED(CONFIG_DMA_NONCOHERENT_MMAP);
433 int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
434 void *cpu_addr, dma_addr_t dma_addr, size_t size,
437 unsigned long user_count = vma_pages(vma);
438 unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
439 unsigned long pfn = PHYS_PFN(dma_to_phys(dev, dma_addr));
442 vma->vm_page_prot = dma_pgprot(dev, vma->vm_page_prot, attrs);
444 if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
447 if (vma->vm_pgoff >= count || user_count > count - vma->vm_pgoff)
449 return remap_pfn_range(vma, vma->vm_start, pfn + vma->vm_pgoff,
450 user_count << PAGE_SHIFT, vma->vm_page_prot);
452 #else /* CONFIG_MMU */
453 bool dma_direct_can_mmap(struct device *dev)
458 int dma_direct_mmap(struct device *dev, struct vm_area_struct *vma,
459 void *cpu_addr, dma_addr_t dma_addr, size_t size,
464 #endif /* CONFIG_MMU */
466 int dma_direct_supported(struct device *dev, u64 mask)
468 u64 min_mask = (max_pfn - 1) << PAGE_SHIFT;
471 * Because 32-bit DMA masks are so common we expect every architecture
472 * to be able to satisfy them - either by not supporting more physical
473 * memory, or by providing a ZONE_DMA32. If neither is the case, the
474 * architecture needs to use an IOMMU instead of the direct mapping.
476 if (mask >= DMA_BIT_MASK(32))
480 * This check needs to be against the actual bit mask value, so
481 * use __phys_to_dma() here so that the SME encryption mask isn't
484 if (IS_ENABLED(CONFIG_ZONE_DMA))
485 min_mask = min_t(u64, min_mask, DMA_BIT_MASK(zone_dma_bits));
486 return mask >= __phys_to_dma(dev, min_mask);
489 size_t dma_direct_max_mapping_size(struct device *dev)
491 /* If SWIOTLB is active, use its maximum mapping size */
492 if (is_swiotlb_active() &&
493 (dma_addressing_limited(dev) || swiotlb_force == SWIOTLB_FORCE))
494 return swiotlb_max_mapping_size(dev);