2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #define pr_fmt(fmt) "software IO TLB: " fmt
22 #include <linux/cache.h>
23 #include <linux/dma-direct.h>
25 #include <linux/export.h>
26 #include <linux/spinlock.h>
27 #include <linux/string.h>
28 #include <linux/swiotlb.h>
29 #include <linux/pfn.h>
30 #include <linux/types.h>
31 #include <linux/ctype.h>
32 #include <linux/highmem.h>
33 #include <linux/gfp.h>
34 #include <linux/scatterlist.h>
35 #include <linux/mem_encrypt.h>
36 #include <linux/set_memory.h>
41 #include <linux/init.h>
42 #include <linux/bootmem.h>
43 #include <linux/iommu-helper.h>
45 #define CREATE_TRACE_POINTS
46 #include <trace/events/swiotlb.h>
48 #define OFFSET(val,align) ((unsigned long) \
49 ( (val) & ( (align) - 1)))
51 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
54 * Minimum IO TLB size to bother booting with. Systems with mainly
55 * 64bit capable cards will only lightly use the swiotlb. If we can't
56 * allocate a contiguous 1MB, we're probably in trouble anyway.
58 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
60 enum swiotlb_force swiotlb_force;
63 * Used to do a quick range check in swiotlb_tbl_unmap_single and
64 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
67 static phys_addr_t io_tlb_start, io_tlb_end;
70 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
71 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
73 static unsigned long io_tlb_nslabs;
76 * When the IOMMU overflows we return a fallback buffer. This sets the size.
78 static unsigned long io_tlb_overflow = 32*1024;
80 static phys_addr_t io_tlb_overflow_buffer;
83 * This is a free list describing the number of free entries available from
86 static unsigned int *io_tlb_list;
87 static unsigned int io_tlb_index;
90 * Max segment that we can provide which (if pages are contingous) will
91 * not be bounced (unless SWIOTLB_FORCE is set).
93 unsigned int max_segment;
96 * We need to save away the original address corresponding to a mapped entry
97 * for the sync operations.
99 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
100 static phys_addr_t *io_tlb_orig_addr;
103 * Protect the above data structures in the map and unmap calls
105 static DEFINE_SPINLOCK(io_tlb_lock);
107 static int late_alloc;
110 setup_io_tlb_npages(char *str)
113 io_tlb_nslabs = simple_strtoul(str, &str, 0);
114 /* avoid tail segment of size < IO_TLB_SEGSIZE */
115 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
119 if (!strcmp(str, "force")) {
120 swiotlb_force = SWIOTLB_FORCE;
121 } else if (!strcmp(str, "noforce")) {
122 swiotlb_force = SWIOTLB_NO_FORCE;
128 early_param("swiotlb", setup_io_tlb_npages);
129 /* make io_tlb_overflow tunable too? */
131 unsigned long swiotlb_nr_tbl(void)
133 return io_tlb_nslabs;
135 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
137 unsigned int swiotlb_max_segment(void)
141 EXPORT_SYMBOL_GPL(swiotlb_max_segment);
143 void swiotlb_set_max_segment(unsigned int val)
145 if (swiotlb_force == SWIOTLB_FORCE)
148 max_segment = rounddown(val, PAGE_SIZE);
151 /* default to 64MB */
152 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
153 unsigned long swiotlb_size_or_default(void)
157 size = io_tlb_nslabs << IO_TLB_SHIFT;
159 return size ? size : (IO_TLB_DEFAULT_SIZE);
162 static bool no_iotlb_memory;
164 void swiotlb_print_info(void)
166 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
168 if (no_iotlb_memory) {
169 pr_warn("No low mem\n");
173 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
174 (unsigned long long)io_tlb_start,
175 (unsigned long long)io_tlb_end,
180 * Early SWIOTLB allocation may be too early to allow an architecture to
181 * perform the desired operations. This function allows the architecture to
182 * call SWIOTLB when the operations are possible. It needs to be called
183 * before the SWIOTLB memory is used.
185 void __init swiotlb_update_mem_attributes(void)
190 if (no_iotlb_memory || late_alloc)
193 vaddr = phys_to_virt(io_tlb_start);
194 bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
195 set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
196 memset(vaddr, 0, bytes);
198 vaddr = phys_to_virt(io_tlb_overflow_buffer);
199 bytes = PAGE_ALIGN(io_tlb_overflow);
200 set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
201 memset(vaddr, 0, bytes);
204 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
206 void *v_overflow_buffer;
207 unsigned long i, bytes;
209 bytes = nslabs << IO_TLB_SHIFT;
211 io_tlb_nslabs = nslabs;
212 io_tlb_start = __pa(tlb);
213 io_tlb_end = io_tlb_start + bytes;
216 * Get the overflow emergency buffer
218 v_overflow_buffer = memblock_virt_alloc_low_nopanic(
219 PAGE_ALIGN(io_tlb_overflow),
221 if (!v_overflow_buffer)
224 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
227 * Allocate and initialize the free list array. This array is used
228 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
229 * between io_tlb_start and io_tlb_end.
231 io_tlb_list = memblock_virt_alloc(
232 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
234 io_tlb_orig_addr = memblock_virt_alloc(
235 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
237 for (i = 0; i < io_tlb_nslabs; i++) {
238 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
239 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
244 swiotlb_print_info();
246 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
251 * Statically reserve bounce buffer space and initialize bounce buffer data
252 * structures for the software IO TLB used to implement the DMA API.
255 swiotlb_init(int verbose)
257 size_t default_size = IO_TLB_DEFAULT_SIZE;
258 unsigned char *vstart;
261 if (!io_tlb_nslabs) {
262 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
263 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
266 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
268 /* Get IO TLB memory from the low pages */
269 vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
270 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
274 memblock_free_early(io_tlb_start,
275 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
276 pr_warn("Cannot allocate buffer");
277 no_iotlb_memory = true;
281 * Systems with larger DMA zones (those that don't support ISA) can
282 * initialize the swiotlb later using the slab allocator if needed.
283 * This should be just like above, but with some error catching.
286 swiotlb_late_init_with_default_size(size_t default_size)
288 unsigned long bytes, req_nslabs = io_tlb_nslabs;
289 unsigned char *vstart = NULL;
293 if (!io_tlb_nslabs) {
294 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
295 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
299 * Get IO TLB memory from the low pages
301 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
302 io_tlb_nslabs = SLABS_PER_PAGE << order;
303 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
305 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
306 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
314 io_tlb_nslabs = req_nslabs;
317 if (order != get_order(bytes)) {
318 pr_warn("only able to allocate %ld MB\n",
319 (PAGE_SIZE << order) >> 20);
320 io_tlb_nslabs = SLABS_PER_PAGE << order;
322 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
324 free_pages((unsigned long)vstart, order);
330 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
332 unsigned long i, bytes;
333 unsigned char *v_overflow_buffer;
335 bytes = nslabs << IO_TLB_SHIFT;
337 io_tlb_nslabs = nslabs;
338 io_tlb_start = virt_to_phys(tlb);
339 io_tlb_end = io_tlb_start + bytes;
341 set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
342 memset(tlb, 0, bytes);
345 * Get the overflow emergency buffer
347 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
348 get_order(io_tlb_overflow));
349 if (!v_overflow_buffer)
352 set_memory_decrypted((unsigned long)v_overflow_buffer,
353 io_tlb_overflow >> PAGE_SHIFT);
354 memset(v_overflow_buffer, 0, io_tlb_overflow);
355 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
358 * Allocate and initialize the free list array. This array is used
359 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
360 * between io_tlb_start and io_tlb_end.
362 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
363 get_order(io_tlb_nslabs * sizeof(int)));
367 io_tlb_orig_addr = (phys_addr_t *)
368 __get_free_pages(GFP_KERNEL,
369 get_order(io_tlb_nslabs *
370 sizeof(phys_addr_t)));
371 if (!io_tlb_orig_addr)
374 for (i = 0; i < io_tlb_nslabs; i++) {
375 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
376 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
380 swiotlb_print_info();
384 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
389 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
393 free_pages((unsigned long)v_overflow_buffer,
394 get_order(io_tlb_overflow));
395 io_tlb_overflow_buffer = 0;
404 void __init swiotlb_exit(void)
406 if (!io_tlb_orig_addr)
410 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
411 get_order(io_tlb_overflow));
412 free_pages((unsigned long)io_tlb_orig_addr,
413 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
414 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
416 free_pages((unsigned long)phys_to_virt(io_tlb_start),
417 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
419 memblock_free_late(io_tlb_overflow_buffer,
420 PAGE_ALIGN(io_tlb_overflow));
421 memblock_free_late(__pa(io_tlb_orig_addr),
422 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
423 memblock_free_late(__pa(io_tlb_list),
424 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
425 memblock_free_late(io_tlb_start,
426 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
432 int is_swiotlb_buffer(phys_addr_t paddr)
434 return paddr >= io_tlb_start && paddr < io_tlb_end;
438 * Bounce: copy the swiotlb buffer back to the original dma location
440 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
441 size_t size, enum dma_data_direction dir)
443 unsigned long pfn = PFN_DOWN(orig_addr);
444 unsigned char *vaddr = phys_to_virt(tlb_addr);
446 if (PageHighMem(pfn_to_page(pfn))) {
447 /* The buffer does not have a mapping. Map it in and copy */
448 unsigned int offset = orig_addr & ~PAGE_MASK;
454 sz = min_t(size_t, PAGE_SIZE - offset, size);
456 local_irq_save(flags);
457 buffer = kmap_atomic(pfn_to_page(pfn));
458 if (dir == DMA_TO_DEVICE)
459 memcpy(vaddr, buffer + offset, sz);
461 memcpy(buffer + offset, vaddr, sz);
462 kunmap_atomic(buffer);
463 local_irq_restore(flags);
470 } else if (dir == DMA_TO_DEVICE) {
471 memcpy(vaddr, phys_to_virt(orig_addr), size);
473 memcpy(phys_to_virt(orig_addr), vaddr, size);
477 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
478 dma_addr_t tbl_dma_addr,
479 phys_addr_t orig_addr, size_t size,
480 enum dma_data_direction dir,
484 phys_addr_t tlb_addr;
485 unsigned int nslots, stride, index, wrap;
488 unsigned long offset_slots;
489 unsigned long max_slots;
492 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
494 if (mem_encrypt_active())
495 pr_warn_once("%s is active and system is using DMA bounce buffers\n",
496 sme_active() ? "SME" : "SEV");
498 mask = dma_get_seg_boundary(hwdev);
500 tbl_dma_addr &= mask;
502 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
505 * Carefully handle integer overflow which can occur when mask == ~0UL.
508 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
509 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
512 * For mappings greater than or equal to a page, we limit the stride
513 * (and hence alignment) to a page size.
515 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
516 if (size >= PAGE_SIZE)
517 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
524 * Find suitable number of IO TLB entries size that will fit this
525 * request and allocate a buffer from that IO TLB pool.
527 spin_lock_irqsave(&io_tlb_lock, flags);
528 index = ALIGN(io_tlb_index, stride);
529 if (index >= io_tlb_nslabs)
534 while (iommu_is_span_boundary(index, nslots, offset_slots,
537 if (index >= io_tlb_nslabs)
544 * If we find a slot that indicates we have 'nslots' number of
545 * contiguous buffers, we allocate the buffers from that slot
546 * and mark the entries as '0' indicating unavailable.
548 if (io_tlb_list[index] >= nslots) {
551 for (i = index; i < (int) (index + nslots); i++)
553 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
554 io_tlb_list[i] = ++count;
555 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
558 * Update the indices to avoid searching in the next
561 io_tlb_index = ((index + nslots) < io_tlb_nslabs
562 ? (index + nslots) : 0);
567 if (index >= io_tlb_nslabs)
569 } while (index != wrap);
572 spin_unlock_irqrestore(&io_tlb_lock, flags);
573 if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit())
574 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
575 return SWIOTLB_MAP_ERROR;
577 spin_unlock_irqrestore(&io_tlb_lock, flags);
580 * Save away the mapping from the original address to the DMA address.
581 * This is needed when we sync the memory. Then we sync the buffer if
584 for (i = 0; i < nslots; i++)
585 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
586 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
587 (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
588 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
594 * Allocates bounce buffer and returns its physical address.
597 map_single(struct device *hwdev, phys_addr_t phys, size_t size,
598 enum dma_data_direction dir, unsigned long attrs)
600 dma_addr_t start_dma_addr;
602 if (swiotlb_force == SWIOTLB_NO_FORCE) {
603 dev_warn_ratelimited(hwdev, "Cannot do DMA to address %pa\n",
605 return SWIOTLB_MAP_ERROR;
608 start_dma_addr = __phys_to_dma(hwdev, io_tlb_start);
609 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size,
614 * tlb_addr is the physical address of the bounce buffer to unmap.
616 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
617 size_t size, enum dma_data_direction dir,
621 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
622 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
623 phys_addr_t orig_addr = io_tlb_orig_addr[index];
626 * First, sync the memory before unmapping the entry
628 if (orig_addr != INVALID_PHYS_ADDR &&
629 !(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
630 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
631 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
634 * Return the buffer to the free list by setting the corresponding
635 * entries to indicate the number of contiguous entries available.
636 * While returning the entries to the free list, we merge the entries
637 * with slots below and above the pool being returned.
639 spin_lock_irqsave(&io_tlb_lock, flags);
641 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
642 io_tlb_list[index + nslots] : 0);
644 * Step 1: return the slots to the free list, merging the
645 * slots with superceeding slots
647 for (i = index + nslots - 1; i >= index; i--) {
648 io_tlb_list[i] = ++count;
649 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
652 * Step 2: merge the returned slots with the preceding slots,
653 * if available (non zero)
655 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
656 io_tlb_list[i] = ++count;
658 spin_unlock_irqrestore(&io_tlb_lock, flags);
661 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
662 size_t size, enum dma_data_direction dir,
663 enum dma_sync_target target)
665 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
666 phys_addr_t orig_addr = io_tlb_orig_addr[index];
668 if (orig_addr == INVALID_PHYS_ADDR)
670 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
674 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
675 swiotlb_bounce(orig_addr, tlb_addr,
676 size, DMA_FROM_DEVICE);
678 BUG_ON(dir != DMA_TO_DEVICE);
680 case SYNC_FOR_DEVICE:
681 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
682 swiotlb_bounce(orig_addr, tlb_addr,
683 size, DMA_TO_DEVICE);
685 BUG_ON(dir != DMA_FROM_DEVICE);
692 static inline bool dma_coherent_ok(struct device *dev, dma_addr_t addr,
695 u64 mask = DMA_BIT_MASK(32);
697 if (dev && dev->coherent_dma_mask)
698 mask = dev->coherent_dma_mask;
699 return addr + size - 1 <= mask;
703 swiotlb_alloc_buffer(struct device *dev, size_t size, dma_addr_t *dma_handle,
706 phys_addr_t phys_addr;
708 if (swiotlb_force == SWIOTLB_NO_FORCE)
711 phys_addr = swiotlb_tbl_map_single(dev,
712 __phys_to_dma(dev, io_tlb_start),
713 0, size, DMA_FROM_DEVICE, attrs);
714 if (phys_addr == SWIOTLB_MAP_ERROR)
717 *dma_handle = __phys_to_dma(dev, phys_addr);
718 if (!dma_coherent_ok(dev, *dma_handle, size))
721 memset(phys_to_virt(phys_addr), 0, size);
722 return phys_to_virt(phys_addr);
725 dev_warn(dev, "hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
726 (unsigned long long)dev->coherent_dma_mask,
727 (unsigned long long)*dma_handle);
730 * DMA_TO_DEVICE to avoid memcpy in unmap_single.
731 * DMA_ATTR_SKIP_CPU_SYNC is optional.
733 swiotlb_tbl_unmap_single(dev, phys_addr, size, DMA_TO_DEVICE,
734 DMA_ATTR_SKIP_CPU_SYNC);
736 if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit()) {
738 "swiotlb: coherent allocation failed, size=%zu\n",
745 static bool swiotlb_free_buffer(struct device *dev, size_t size,
748 phys_addr_t phys_addr = dma_to_phys(dev, dma_addr);
750 WARN_ON_ONCE(irqs_disabled());
752 if (!is_swiotlb_buffer(phys_addr))
756 * DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single.
757 * DMA_ATTR_SKIP_CPU_SYNC is optional.
759 swiotlb_tbl_unmap_single(dev, phys_addr, size, DMA_TO_DEVICE,
760 DMA_ATTR_SKIP_CPU_SYNC);
765 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
768 if (swiotlb_force == SWIOTLB_NO_FORCE)
772 * Ran out of IOMMU space for this operation. This is very bad.
773 * Unfortunately the drivers cannot handle this operation properly.
774 * unless they check for dma_mapping_error (most don't)
775 * When the mapping is small enough return a static buffer to limit
776 * the damage, or panic when the transfer is too big.
778 dev_err_ratelimited(dev, "DMA: Out of SW-IOMMU space for %zu bytes\n",
781 if (size <= io_tlb_overflow || !do_panic)
784 if (dir == DMA_BIDIRECTIONAL)
785 panic("DMA: Random memory could be DMA accessed\n");
786 if (dir == DMA_FROM_DEVICE)
787 panic("DMA: Random memory could be DMA written\n");
788 if (dir == DMA_TO_DEVICE)
789 panic("DMA: Random memory could be DMA read\n");
793 * Map a single buffer of the indicated size for DMA in streaming mode. The
794 * physical address to use is returned.
796 * Once the device is given the dma address, the device owns this memory until
797 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
799 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
800 unsigned long offset, size_t size,
801 enum dma_data_direction dir,
804 phys_addr_t map, phys = page_to_phys(page) + offset;
805 dma_addr_t dev_addr = phys_to_dma(dev, phys);
807 BUG_ON(dir == DMA_NONE);
809 * If the address happens to be in the device's DMA window,
810 * we can safely return the device addr and not worry about bounce
813 if (dma_capable(dev, dev_addr, size) && swiotlb_force != SWIOTLB_FORCE)
816 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
818 /* Oh well, have to allocate and map a bounce buffer. */
819 map = map_single(dev, phys, size, dir, attrs);
820 if (map == SWIOTLB_MAP_ERROR) {
821 swiotlb_full(dev, size, dir, 1);
822 return __phys_to_dma(dev, io_tlb_overflow_buffer);
825 dev_addr = __phys_to_dma(dev, map);
827 /* Ensure that the address returned is DMA'ble */
828 if (dma_capable(dev, dev_addr, size))
831 attrs |= DMA_ATTR_SKIP_CPU_SYNC;
832 swiotlb_tbl_unmap_single(dev, map, size, dir, attrs);
834 return __phys_to_dma(dev, io_tlb_overflow_buffer);
838 * Unmap a single streaming mode DMA translation. The dma_addr and size must
839 * match what was provided for in a previous swiotlb_map_page call. All
840 * other usages are undefined.
842 * After this call, reads by the cpu to the buffer are guaranteed to see
843 * whatever the device wrote there.
845 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
846 size_t size, enum dma_data_direction dir,
849 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
851 BUG_ON(dir == DMA_NONE);
853 if (is_swiotlb_buffer(paddr)) {
854 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir, attrs);
858 if (dir != DMA_FROM_DEVICE)
862 * phys_to_virt doesn't work with hihgmem page but we could
863 * call dma_mark_clean() with hihgmem page here. However, we
864 * are fine since dma_mark_clean() is null on POWERPC. We can
865 * make dma_mark_clean() take a physical address if necessary.
867 dma_mark_clean(phys_to_virt(paddr), size);
870 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
871 size_t size, enum dma_data_direction dir,
874 unmap_single(hwdev, dev_addr, size, dir, attrs);
878 * Make physical memory consistent for a single streaming mode DMA translation
881 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
882 * using the cpu, yet do not wish to teardown the dma mapping, you must
883 * call this function before doing so. At the next point you give the dma
884 * address back to the card, you must first perform a
885 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
888 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
889 size_t size, enum dma_data_direction dir,
890 enum dma_sync_target target)
892 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
894 BUG_ON(dir == DMA_NONE);
896 if (is_swiotlb_buffer(paddr)) {
897 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
901 if (dir != DMA_FROM_DEVICE)
904 dma_mark_clean(phys_to_virt(paddr), size);
908 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
909 size_t size, enum dma_data_direction dir)
911 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
915 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
916 size_t size, enum dma_data_direction dir)
918 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
922 * Map a set of buffers described by scatterlist in streaming mode for DMA.
923 * This is the scatter-gather version of the above swiotlb_map_page
924 * interface. Here the scatter gather list elements are each tagged with the
925 * appropriate dma address and length. They are obtained via
926 * sg_dma_{address,length}(SG).
928 * Device ownership issues as mentioned above for swiotlb_map_page are the
932 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
933 enum dma_data_direction dir, unsigned long attrs)
935 struct scatterlist *sg;
938 BUG_ON(dir == DMA_NONE);
940 for_each_sg(sgl, sg, nelems, i) {
941 phys_addr_t paddr = sg_phys(sg);
942 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
944 if (swiotlb_force == SWIOTLB_FORCE ||
945 !dma_capable(hwdev, dev_addr, sg->length)) {
946 phys_addr_t map = map_single(hwdev, sg_phys(sg),
947 sg->length, dir, attrs);
948 if (map == SWIOTLB_MAP_ERROR) {
949 /* Don't panic here, we expect map_sg users
950 to do proper error handling. */
951 swiotlb_full(hwdev, sg->length, dir, 0);
952 attrs |= DMA_ATTR_SKIP_CPU_SYNC;
953 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
958 sg->dma_address = __phys_to_dma(hwdev, map);
960 sg->dma_address = dev_addr;
961 sg_dma_len(sg) = sg->length;
967 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
968 * concerning calls here are the same as for swiotlb_unmap_page() above.
971 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
972 int nelems, enum dma_data_direction dir,
975 struct scatterlist *sg;
978 BUG_ON(dir == DMA_NONE);
980 for_each_sg(sgl, sg, nelems, i)
981 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir,
986 * Make physical memory consistent for a set of streaming mode DMA translations
989 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
993 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
994 int nelems, enum dma_data_direction dir,
995 enum dma_sync_target target)
997 struct scatterlist *sg;
1000 for_each_sg(sgl, sg, nelems, i)
1001 swiotlb_sync_single(hwdev, sg->dma_address,
1002 sg_dma_len(sg), dir, target);
1006 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
1007 int nelems, enum dma_data_direction dir)
1009 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
1013 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
1014 int nelems, enum dma_data_direction dir)
1016 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
1020 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
1022 return (dma_addr == __phys_to_dma(hwdev, io_tlb_overflow_buffer));
1026 * Return whether the given device DMA address mask can be supported
1027 * properly. For example, if your device can only drive the low 24-bits
1028 * during bus mastering, then you would pass 0x00ffffff as the mask to
1032 swiotlb_dma_supported(struct device *hwdev, u64 mask)
1034 return __phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
1037 void *swiotlb_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
1038 gfp_t gfp, unsigned long attrs)
1042 /* temporary workaround: */
1043 if (gfp & __GFP_NOWARN)
1044 attrs |= DMA_ATTR_NO_WARN;
1047 * Don't print a warning when the first allocation attempt fails.
1048 * swiotlb_alloc_coherent() will print a warning when the DMA memory
1049 * allocation ultimately failed.
1051 gfp |= __GFP_NOWARN;
1053 vaddr = dma_direct_alloc(dev, size, dma_handle, gfp, attrs);
1055 vaddr = swiotlb_alloc_buffer(dev, size, dma_handle, attrs);
1059 void swiotlb_free(struct device *dev, size_t size, void *vaddr,
1060 dma_addr_t dma_addr, unsigned long attrs)
1062 if (!swiotlb_free_buffer(dev, size, dma_addr))
1063 dma_direct_free(dev, size, vaddr, dma_addr, attrs);
1066 const struct dma_map_ops swiotlb_dma_ops = {
1067 .mapping_error = swiotlb_dma_mapping_error,
1068 .alloc = swiotlb_alloc,
1069 .free = swiotlb_free,
1070 .sync_single_for_cpu = swiotlb_sync_single_for_cpu,
1071 .sync_single_for_device = swiotlb_sync_single_for_device,
1072 .sync_sg_for_cpu = swiotlb_sync_sg_for_cpu,
1073 .sync_sg_for_device = swiotlb_sync_sg_for_device,
1074 .map_sg = swiotlb_map_sg_attrs,
1075 .unmap_sg = swiotlb_unmap_sg_attrs,
1076 .map_page = swiotlb_map_page,
1077 .unmap_page = swiotlb_unmap_page,
1078 .dma_supported = dma_direct_supported,
1080 EXPORT_SYMBOL(swiotlb_dma_ops);