2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
20 #define pr_fmt(fmt) "software IO TLB: " fmt
22 #include <linux/cache.h>
23 #include <linux/dma-direct.h>
25 #include <linux/export.h>
26 #include <linux/spinlock.h>
27 #include <linux/string.h>
28 #include <linux/swiotlb.h>
29 #include <linux/pfn.h>
30 #include <linux/types.h>
31 #include <linux/ctype.h>
32 #include <linux/highmem.h>
33 #include <linux/gfp.h>
34 #include <linux/scatterlist.h>
35 #include <linux/mem_encrypt.h>
36 #include <linux/set_memory.h>
41 #include <linux/init.h>
42 #include <linux/memblock.h>
43 #include <linux/iommu-helper.h>
45 #define CREATE_TRACE_POINTS
46 #include <trace/events/swiotlb.h>
48 #define OFFSET(val,align) ((unsigned long) \
49 ( (val) & ( (align) - 1)))
51 #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
54 * Minimum IO TLB size to bother booting with. Systems with mainly
55 * 64bit capable cards will only lightly use the swiotlb. If we can't
56 * allocate a contiguous 1MB, we're probably in trouble anyway.
58 #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
60 enum swiotlb_force swiotlb_force;
63 * Used to do a quick range check in swiotlb_tbl_unmap_single and
64 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
67 phys_addr_t io_tlb_start, io_tlb_end;
70 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
71 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
73 static unsigned long io_tlb_nslabs;
76 * This is a free list describing the number of free entries available from
79 static unsigned int *io_tlb_list;
80 static unsigned int io_tlb_index;
83 * Max segment that we can provide which (if pages are contingous) will
84 * not be bounced (unless SWIOTLB_FORCE is set).
86 unsigned int max_segment;
89 * We need to save away the original address corresponding to a mapped entry
90 * for the sync operations.
92 #define INVALID_PHYS_ADDR (~(phys_addr_t)0)
93 static phys_addr_t *io_tlb_orig_addr;
96 * Protect the above data structures in the map and unmap calls
98 static DEFINE_SPINLOCK(io_tlb_lock);
100 static int late_alloc;
103 setup_io_tlb_npages(char *str)
106 io_tlb_nslabs = simple_strtoul(str, &str, 0);
107 /* avoid tail segment of size < IO_TLB_SEGSIZE */
108 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
112 if (!strcmp(str, "force")) {
113 swiotlb_force = SWIOTLB_FORCE;
114 } else if (!strcmp(str, "noforce")) {
115 swiotlb_force = SWIOTLB_NO_FORCE;
121 early_param("swiotlb", setup_io_tlb_npages);
123 unsigned long swiotlb_nr_tbl(void)
125 return io_tlb_nslabs;
127 EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
129 unsigned int swiotlb_max_segment(void)
133 EXPORT_SYMBOL_GPL(swiotlb_max_segment);
135 void swiotlb_set_max_segment(unsigned int val)
137 if (swiotlb_force == SWIOTLB_FORCE)
140 max_segment = rounddown(val, PAGE_SIZE);
143 /* default to 64MB */
144 #define IO_TLB_DEFAULT_SIZE (64UL<<20)
145 unsigned long swiotlb_size_or_default(void)
149 size = io_tlb_nslabs << IO_TLB_SHIFT;
151 return size ? size : (IO_TLB_DEFAULT_SIZE);
154 static bool no_iotlb_memory;
156 void swiotlb_print_info(void)
158 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
160 if (no_iotlb_memory) {
161 pr_warn("No low mem\n");
165 pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n",
166 (unsigned long long)io_tlb_start,
167 (unsigned long long)io_tlb_end,
172 * Early SWIOTLB allocation may be too early to allow an architecture to
173 * perform the desired operations. This function allows the architecture to
174 * call SWIOTLB when the operations are possible. It needs to be called
175 * before the SWIOTLB memory is used.
177 void __init swiotlb_update_mem_attributes(void)
182 if (no_iotlb_memory || late_alloc)
185 vaddr = phys_to_virt(io_tlb_start);
186 bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT);
187 set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT);
188 memset(vaddr, 0, bytes);
191 int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
193 unsigned long i, bytes;
195 bytes = nslabs << IO_TLB_SHIFT;
197 io_tlb_nslabs = nslabs;
198 io_tlb_start = __pa(tlb);
199 io_tlb_end = io_tlb_start + bytes;
202 * Allocate and initialize the free list array. This array is used
203 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
204 * between io_tlb_start and io_tlb_end.
206 io_tlb_list = memblock_alloc(
207 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
209 io_tlb_orig_addr = memblock_alloc(
210 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
212 for (i = 0; i < io_tlb_nslabs; i++) {
213 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
214 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
219 swiotlb_print_info();
221 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
226 * Statically reserve bounce buffer space and initialize bounce buffer data
227 * structures for the software IO TLB used to implement the DMA API.
230 swiotlb_init(int verbose)
232 size_t default_size = IO_TLB_DEFAULT_SIZE;
233 unsigned char *vstart;
236 if (!io_tlb_nslabs) {
237 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
238 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
241 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
243 /* Get IO TLB memory from the low pages */
244 vstart = memblock_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
245 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
249 memblock_free_early(io_tlb_start,
250 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
251 pr_warn("Cannot allocate buffer");
252 no_iotlb_memory = true;
256 * Systems with larger DMA zones (those that don't support ISA) can
257 * initialize the swiotlb later using the slab allocator if needed.
258 * This should be just like above, but with some error catching.
261 swiotlb_late_init_with_default_size(size_t default_size)
263 unsigned long bytes, req_nslabs = io_tlb_nslabs;
264 unsigned char *vstart = NULL;
268 if (!io_tlb_nslabs) {
269 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
270 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
274 * Get IO TLB memory from the low pages
276 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
277 io_tlb_nslabs = SLABS_PER_PAGE << order;
278 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
280 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
281 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
289 io_tlb_nslabs = req_nslabs;
292 if (order != get_order(bytes)) {
293 pr_warn("only able to allocate %ld MB\n",
294 (PAGE_SIZE << order) >> 20);
295 io_tlb_nslabs = SLABS_PER_PAGE << order;
297 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
299 free_pages((unsigned long)vstart, order);
305 swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
307 unsigned long i, bytes;
309 bytes = nslabs << IO_TLB_SHIFT;
311 io_tlb_nslabs = nslabs;
312 io_tlb_start = virt_to_phys(tlb);
313 io_tlb_end = io_tlb_start + bytes;
315 set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT);
316 memset(tlb, 0, bytes);
319 * Allocate and initialize the free list array. This array is used
320 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
321 * between io_tlb_start and io_tlb_end.
323 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
324 get_order(io_tlb_nslabs * sizeof(int)));
328 io_tlb_orig_addr = (phys_addr_t *)
329 __get_free_pages(GFP_KERNEL,
330 get_order(io_tlb_nslabs *
331 sizeof(phys_addr_t)));
332 if (!io_tlb_orig_addr)
335 for (i = 0; i < io_tlb_nslabs; i++) {
336 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
337 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
341 swiotlb_print_info();
345 swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT);
350 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
361 void __init swiotlb_exit(void)
363 if (!io_tlb_orig_addr)
367 free_pages((unsigned long)io_tlb_orig_addr,
368 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
369 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
371 free_pages((unsigned long)phys_to_virt(io_tlb_start),
372 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
374 memblock_free_late(__pa(io_tlb_orig_addr),
375 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
376 memblock_free_late(__pa(io_tlb_list),
377 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
378 memblock_free_late(io_tlb_start,
379 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
388 * Bounce: copy the swiotlb buffer back to the original dma location
390 static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
391 size_t size, enum dma_data_direction dir)
393 unsigned long pfn = PFN_DOWN(orig_addr);
394 unsigned char *vaddr = phys_to_virt(tlb_addr);
396 if (PageHighMem(pfn_to_page(pfn))) {
397 /* The buffer does not have a mapping. Map it in and copy */
398 unsigned int offset = orig_addr & ~PAGE_MASK;
404 sz = min_t(size_t, PAGE_SIZE - offset, size);
406 local_irq_save(flags);
407 buffer = kmap_atomic(pfn_to_page(pfn));
408 if (dir == DMA_TO_DEVICE)
409 memcpy(vaddr, buffer + offset, sz);
411 memcpy(buffer + offset, vaddr, sz);
412 kunmap_atomic(buffer);
413 local_irq_restore(flags);
420 } else if (dir == DMA_TO_DEVICE) {
421 memcpy(vaddr, phys_to_virt(orig_addr), size);
423 memcpy(phys_to_virt(orig_addr), vaddr, size);
427 phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
428 dma_addr_t tbl_dma_addr,
429 phys_addr_t orig_addr, size_t size,
430 enum dma_data_direction dir,
434 phys_addr_t tlb_addr;
435 unsigned int nslots, stride, index, wrap;
438 unsigned long offset_slots;
439 unsigned long max_slots;
442 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
444 if (mem_encrypt_active())
445 pr_warn_once("%s is active and system is using DMA bounce buffers\n",
446 sme_active() ? "SME" : "SEV");
448 mask = dma_get_seg_boundary(hwdev);
450 tbl_dma_addr &= mask;
452 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
455 * Carefully handle integer overflow which can occur when mask == ~0UL.
458 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
459 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
462 * For mappings greater than or equal to a page, we limit the stride
463 * (and hence alignment) to a page size.
465 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
466 if (size >= PAGE_SIZE)
467 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
474 * Find suitable number of IO TLB entries size that will fit this
475 * request and allocate a buffer from that IO TLB pool.
477 spin_lock_irqsave(&io_tlb_lock, flags);
478 index = ALIGN(io_tlb_index, stride);
479 if (index >= io_tlb_nslabs)
484 while (iommu_is_span_boundary(index, nslots, offset_slots,
487 if (index >= io_tlb_nslabs)
494 * If we find a slot that indicates we have 'nslots' number of
495 * contiguous buffers, we allocate the buffers from that slot
496 * and mark the entries as '0' indicating unavailable.
498 if (io_tlb_list[index] >= nslots) {
501 for (i = index; i < (int) (index + nslots); i++)
503 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
504 io_tlb_list[i] = ++count;
505 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
508 * Update the indices to avoid searching in the next
511 io_tlb_index = ((index + nslots) < io_tlb_nslabs
512 ? (index + nslots) : 0);
517 if (index >= io_tlb_nslabs)
519 } while (index != wrap);
522 spin_unlock_irqrestore(&io_tlb_lock, flags);
523 if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit())
524 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
525 return DMA_MAPPING_ERROR;
527 spin_unlock_irqrestore(&io_tlb_lock, flags);
530 * Save away the mapping from the original address to the DMA address.
531 * This is needed when we sync the memory. Then we sync the buffer if
534 for (i = 0; i < nslots; i++)
535 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
536 if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
537 (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
538 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
544 * tlb_addr is the physical address of the bounce buffer to unmap.
546 void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
547 size_t size, enum dma_data_direction dir,
551 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
552 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
553 phys_addr_t orig_addr = io_tlb_orig_addr[index];
556 * First, sync the memory before unmapping the entry
558 if (orig_addr != INVALID_PHYS_ADDR &&
559 !(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
560 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
561 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
564 * Return the buffer to the free list by setting the corresponding
565 * entries to indicate the number of contiguous entries available.
566 * While returning the entries to the free list, we merge the entries
567 * with slots below and above the pool being returned.
569 spin_lock_irqsave(&io_tlb_lock, flags);
571 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
572 io_tlb_list[index + nslots] : 0);
574 * Step 1: return the slots to the free list, merging the
575 * slots with superceeding slots
577 for (i = index + nslots - 1; i >= index; i--) {
578 io_tlb_list[i] = ++count;
579 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
582 * Step 2: merge the returned slots with the preceding slots,
583 * if available (non zero)
585 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
586 io_tlb_list[i] = ++count;
588 spin_unlock_irqrestore(&io_tlb_lock, flags);
591 void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
592 size_t size, enum dma_data_direction dir,
593 enum dma_sync_target target)
595 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
596 phys_addr_t orig_addr = io_tlb_orig_addr[index];
598 if (orig_addr == INVALID_PHYS_ADDR)
600 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
604 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
605 swiotlb_bounce(orig_addr, tlb_addr,
606 size, DMA_FROM_DEVICE);
608 BUG_ON(dir != DMA_TO_DEVICE);
610 case SYNC_FOR_DEVICE:
611 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
612 swiotlb_bounce(orig_addr, tlb_addr,
613 size, DMA_TO_DEVICE);
615 BUG_ON(dir != DMA_FROM_DEVICE);
623 * Create a swiotlb mapping for the buffer at @phys, and in case of DMAing
624 * to the device copy the data into it as well.
626 bool swiotlb_map(struct device *dev, phys_addr_t *phys, dma_addr_t *dma_addr,
627 size_t size, enum dma_data_direction dir, unsigned long attrs)
629 trace_swiotlb_bounced(dev, *dma_addr, size, swiotlb_force);
631 if (unlikely(swiotlb_force == SWIOTLB_NO_FORCE)) {
632 dev_warn_ratelimited(dev,
633 "Cannot do DMA to address %pa\n", phys);
637 /* Oh well, have to allocate and map a bounce buffer. */
638 *phys = swiotlb_tbl_map_single(dev, __phys_to_dma(dev, io_tlb_start),
639 *phys, size, dir, attrs);
640 if (*phys == DMA_MAPPING_ERROR)
643 /* Ensure that the address returned is DMA'ble */
644 *dma_addr = __phys_to_dma(dev, *phys);
645 if (unlikely(!dma_capable(dev, *dma_addr, size))) {
646 swiotlb_tbl_unmap_single(dev, *phys, size, dir,
647 attrs | DMA_ATTR_SKIP_CPU_SYNC);
655 * Return whether the given device DMA address mask can be supported
656 * properly. For example, if your device can only drive the low 24-bits
657 * during bus mastering, then you would pass 0x00ffffff as the mask to
661 swiotlb_dma_supported(struct device *hwdev, u64 mask)
663 return __phys_to_dma(hwdev, io_tlb_end - 1) <= mask;