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[linux.git] / samples / vfio-mdev / mtty.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Mediated virtual PCI serial host device driver
4  *
5  * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
6  *     Author: Neo Jia <cjia@nvidia.com>
7  *             Kirti Wankhede <kwankhede@nvidia.com>
8  *
9  * Sample driver that creates mdev device that simulates serial port over PCI
10  * card.
11  */
12
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/device.h>
16 #include <linux/kernel.h>
17 #include <linux/fs.h>
18 #include <linux/poll.h>
19 #include <linux/slab.h>
20 #include <linux/cdev.h>
21 #include <linux/sched.h>
22 #include <linux/wait.h>
23 #include <linux/uuid.h>
24 #include <linux/vfio.h>
25 #include <linux/iommu.h>
26 #include <linux/sysfs.h>
27 #include <linux/ctype.h>
28 #include <linux/file.h>
29 #include <linux/mdev.h>
30 #include <linux/pci.h>
31 #include <linux/serial.h>
32 #include <uapi/linux/serial_reg.h>
33 #include <linux/eventfd.h>
34 /*
35  * #defines
36  */
37
38 #define VERSION_STRING  "0.1"
39 #define DRIVER_AUTHOR   "NVIDIA Corporation"
40
41 #define MTTY_CLASS_NAME "mtty"
42
43 #define MTTY_NAME       "mtty"
44
45 #define MTTY_STRING_LEN         16
46
47 #define MTTY_CONFIG_SPACE_SIZE  0xff
48 #define MTTY_IO_BAR_SIZE        0x8
49 #define MTTY_MMIO_BAR_SIZE      0x100000
50
51 #define STORE_LE16(addr, val)   (*(u16 *)addr = val)
52 #define STORE_LE32(addr, val)   (*(u32 *)addr = val)
53
54 #define MAX_FIFO_SIZE   16
55
56 #define CIRCULAR_BUF_INC_IDX(idx)    (idx = (idx + 1) & (MAX_FIFO_SIZE - 1))
57
58 #define MTTY_VFIO_PCI_OFFSET_SHIFT   40
59
60 #define MTTY_VFIO_PCI_OFFSET_TO_INDEX(off)   (off >> MTTY_VFIO_PCI_OFFSET_SHIFT)
61 #define MTTY_VFIO_PCI_INDEX_TO_OFFSET(index) \
62                                 ((u64)(index) << MTTY_VFIO_PCI_OFFSET_SHIFT)
63 #define MTTY_VFIO_PCI_OFFSET_MASK    \
64                                 (((u64)(1) << MTTY_VFIO_PCI_OFFSET_SHIFT) - 1)
65 #define MAX_MTTYS       24
66
67 /*
68  * Global Structures
69  */
70
71 static struct mtty_dev {
72         dev_t           vd_devt;
73         struct class    *vd_class;
74         struct cdev     vd_cdev;
75         struct idr      vd_idr;
76         struct device   dev;
77 } mtty_dev;
78
79 struct mdev_region_info {
80         u64 start;
81         u64 phys_start;
82         u32 size;
83         u64 vfio_offset;
84 };
85
86 #if defined(DEBUG_REGS)
87 static const char *wr_reg[] = {
88         "TX",
89         "IER",
90         "FCR",
91         "LCR",
92         "MCR",
93         "LSR",
94         "MSR",
95         "SCR"
96 };
97
98 static const char *rd_reg[] = {
99         "RX",
100         "IER",
101         "IIR",
102         "LCR",
103         "MCR",
104         "LSR",
105         "MSR",
106         "SCR"
107 };
108 #endif
109
110 /* loop back buffer */
111 struct rxtx {
112         u8 fifo[MAX_FIFO_SIZE];
113         u8 head, tail;
114         u8 count;
115 };
116
117 struct serial_port {
118         u8 uart_reg[8];         /* 8 registers */
119         struct rxtx rxtx;       /* loop back buffer */
120         bool dlab;
121         bool overrun;
122         u16 divisor;
123         u8 fcr;                 /* FIFO control register */
124         u8 max_fifo_size;
125         u8 intr_trigger_level;  /* interrupt trigger level */
126 };
127
128 /* State of each mdev device */
129 struct mdev_state {
130         int irq_fd;
131         struct eventfd_ctx *intx_evtfd;
132         struct eventfd_ctx *msi_evtfd;
133         int irq_index;
134         u8 *vconfig;
135         struct mutex ops_lock;
136         struct mdev_device *mdev;
137         struct mdev_region_info region_info[VFIO_PCI_NUM_REGIONS];
138         u32 bar_mask[VFIO_PCI_NUM_REGIONS];
139         struct list_head next;
140         struct serial_port s[2];
141         struct mutex rxtx_lock;
142         struct vfio_device_info dev_info;
143         int nr_ports;
144 };
145
146 static struct mutex mdev_list_lock;
147 static struct list_head mdev_devices_list;
148
149 static const struct file_operations vd_fops = {
150         .owner          = THIS_MODULE,
151 };
152
153 /* function prototypes */
154
155 static int mtty_trigger_interrupt(const guid_t *uuid);
156
157 /* Helper functions */
158 static struct mdev_state *find_mdev_state_by_uuid(const guid_t *uuid)
159 {
160         struct mdev_state *mds;
161
162         list_for_each_entry(mds, &mdev_devices_list, next) {
163                 if (guid_equal(mdev_uuid(mds->mdev), uuid))
164                         return mds;
165         }
166
167         return NULL;
168 }
169
170 static void dump_buffer(u8 *buf, uint32_t count)
171 {
172 #if defined(DEBUG)
173         int i;
174
175         pr_info("Buffer:\n");
176         for (i = 0; i < count; i++) {
177                 pr_info("%2x ", *(buf + i));
178                 if ((i + 1) % 16 == 0)
179                         pr_info("\n");
180         }
181 #endif
182 }
183
184 static void mtty_create_config_space(struct mdev_state *mdev_state)
185 {
186         /* PCI dev ID */
187         STORE_LE32((u32 *) &mdev_state->vconfig[0x0], 0x32534348);
188
189         /* Control: I/O+, Mem-, BusMaster- */
190         STORE_LE16((u16 *) &mdev_state->vconfig[0x4], 0x0001);
191
192         /* Status: capabilities list absent */
193         STORE_LE16((u16 *) &mdev_state->vconfig[0x6], 0x0200);
194
195         /* Rev ID */
196         mdev_state->vconfig[0x8] =  0x10;
197
198         /* programming interface class : 16550-compatible serial controller */
199         mdev_state->vconfig[0x9] =  0x02;
200
201         /* Sub class : 00 */
202         mdev_state->vconfig[0xa] =  0x00;
203
204         /* Base class : Simple Communication controllers */
205         mdev_state->vconfig[0xb] =  0x07;
206
207         /* base address registers */
208         /* BAR0: IO space */
209         STORE_LE32((u32 *) &mdev_state->vconfig[0x10], 0x000001);
210         mdev_state->bar_mask[0] = ~(MTTY_IO_BAR_SIZE) + 1;
211
212         if (mdev_state->nr_ports == 2) {
213                 /* BAR1: IO space */
214                 STORE_LE32((u32 *) &mdev_state->vconfig[0x14], 0x000001);
215                 mdev_state->bar_mask[1] = ~(MTTY_IO_BAR_SIZE) + 1;
216         }
217
218         /* Subsystem ID */
219         STORE_LE32((u32 *) &mdev_state->vconfig[0x2c], 0x32534348);
220
221         mdev_state->vconfig[0x34] =  0x00;   /* Cap Ptr */
222         mdev_state->vconfig[0x3d] =  0x01;   /* interrupt pin (INTA#) */
223
224         /* Vendor specific data */
225         mdev_state->vconfig[0x40] =  0x23;
226         mdev_state->vconfig[0x43] =  0x80;
227         mdev_state->vconfig[0x44] =  0x23;
228         mdev_state->vconfig[0x48] =  0x23;
229         mdev_state->vconfig[0x4c] =  0x23;
230
231         mdev_state->vconfig[0x60] =  0x50;
232         mdev_state->vconfig[0x61] =  0x43;
233         mdev_state->vconfig[0x62] =  0x49;
234         mdev_state->vconfig[0x63] =  0x20;
235         mdev_state->vconfig[0x64] =  0x53;
236         mdev_state->vconfig[0x65] =  0x65;
237         mdev_state->vconfig[0x66] =  0x72;
238         mdev_state->vconfig[0x67] =  0x69;
239         mdev_state->vconfig[0x68] =  0x61;
240         mdev_state->vconfig[0x69] =  0x6c;
241         mdev_state->vconfig[0x6a] =  0x2f;
242         mdev_state->vconfig[0x6b] =  0x55;
243         mdev_state->vconfig[0x6c] =  0x41;
244         mdev_state->vconfig[0x6d] =  0x52;
245         mdev_state->vconfig[0x6e] =  0x54;
246 }
247
248 static void handle_pci_cfg_write(struct mdev_state *mdev_state, u16 offset,
249                                  u8 *buf, u32 count)
250 {
251         u32 cfg_addr, bar_mask, bar_index = 0;
252
253         switch (offset) {
254         case 0x04: /* device control */
255         case 0x06: /* device status */
256                 /* do nothing */
257                 break;
258         case 0x3c:  /* interrupt line */
259                 mdev_state->vconfig[0x3c] = buf[0];
260                 break;
261         case 0x3d:
262                 /*
263                  * Interrupt Pin is hardwired to INTA.
264                  * This field is write protected by hardware
265                  */
266                 break;
267         case 0x10:  /* BAR0 */
268         case 0x14:  /* BAR1 */
269                 if (offset == 0x10)
270                         bar_index = 0;
271                 else if (offset == 0x14)
272                         bar_index = 1;
273
274                 if ((mdev_state->nr_ports == 1) && (bar_index == 1)) {
275                         STORE_LE32(&mdev_state->vconfig[offset], 0);
276                         break;
277                 }
278
279                 cfg_addr = *(u32 *)buf;
280                 pr_info("BAR%d addr 0x%x\n", bar_index, cfg_addr);
281
282                 if (cfg_addr == 0xffffffff) {
283                         bar_mask = mdev_state->bar_mask[bar_index];
284                         cfg_addr = (cfg_addr & bar_mask);
285                 }
286
287                 cfg_addr |= (mdev_state->vconfig[offset] & 0x3ul);
288                 STORE_LE32(&mdev_state->vconfig[offset], cfg_addr);
289                 break;
290         case 0x18:  /* BAR2 */
291         case 0x1c:  /* BAR3 */
292         case 0x20:  /* BAR4 */
293                 STORE_LE32(&mdev_state->vconfig[offset], 0);
294                 break;
295         default:
296                 pr_info("PCI config write @0x%x of %d bytes not handled\n",
297                         offset, count);
298                 break;
299         }
300 }
301
302 static void handle_bar_write(unsigned int index, struct mdev_state *mdev_state,
303                                 u16 offset, u8 *buf, u32 count)
304 {
305         u8 data = *buf;
306
307         /* Handle data written by guest */
308         switch (offset) {
309         case UART_TX:
310                 /* if DLAB set, data is LSB of divisor */
311                 if (mdev_state->s[index].dlab) {
312                         mdev_state->s[index].divisor |= data;
313                         break;
314                 }
315
316                 mutex_lock(&mdev_state->rxtx_lock);
317
318                 /* save in TX buffer */
319                 if (mdev_state->s[index].rxtx.count <
320                                 mdev_state->s[index].max_fifo_size) {
321                         mdev_state->s[index].rxtx.fifo[
322                                         mdev_state->s[index].rxtx.head] = data;
323                         mdev_state->s[index].rxtx.count++;
324                         CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.head);
325                         mdev_state->s[index].overrun = false;
326
327                         /*
328                          * Trigger interrupt if receive data interrupt is
329                          * enabled and fifo reached trigger level
330                          */
331                         if ((mdev_state->s[index].uart_reg[UART_IER] &
332                                                 UART_IER_RDI) &&
333                            (mdev_state->s[index].rxtx.count ==
334                                     mdev_state->s[index].intr_trigger_level)) {
335                                 /* trigger interrupt */
336 #if defined(DEBUG_INTR)
337                                 pr_err("Serial port %d: Fifo level trigger\n",
338                                         index);
339 #endif
340                                 mtty_trigger_interrupt(
341                                                 mdev_uuid(mdev_state->mdev));
342                         }
343                 } else {
344 #if defined(DEBUG_INTR)
345                         pr_err("Serial port %d: Buffer Overflow\n", index);
346 #endif
347                         mdev_state->s[index].overrun = true;
348
349                         /*
350                          * Trigger interrupt if receiver line status interrupt
351                          * is enabled
352                          */
353                         if (mdev_state->s[index].uart_reg[UART_IER] &
354                                                                 UART_IER_RLSI)
355                                 mtty_trigger_interrupt(
356                                                 mdev_uuid(mdev_state->mdev));
357                 }
358                 mutex_unlock(&mdev_state->rxtx_lock);
359                 break;
360
361         case UART_IER:
362                 /* if DLAB set, data is MSB of divisor */
363                 if (mdev_state->s[index].dlab)
364                         mdev_state->s[index].divisor |= (u16)data << 8;
365                 else {
366                         mdev_state->s[index].uart_reg[offset] = data;
367                         mutex_lock(&mdev_state->rxtx_lock);
368                         if ((data & UART_IER_THRI) &&
369                             (mdev_state->s[index].rxtx.head ==
370                                         mdev_state->s[index].rxtx.tail)) {
371 #if defined(DEBUG_INTR)
372                                 pr_err("Serial port %d: IER_THRI write\n",
373                                         index);
374 #endif
375                                 mtty_trigger_interrupt(
376                                                 mdev_uuid(mdev_state->mdev));
377                         }
378
379                         mutex_unlock(&mdev_state->rxtx_lock);
380                 }
381
382                 break;
383
384         case UART_FCR:
385                 mdev_state->s[index].fcr = data;
386
387                 mutex_lock(&mdev_state->rxtx_lock);
388                 if (data & (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT)) {
389                         /* clear loop back FIFO */
390                         mdev_state->s[index].rxtx.count = 0;
391                         mdev_state->s[index].rxtx.head = 0;
392                         mdev_state->s[index].rxtx.tail = 0;
393                 }
394                 mutex_unlock(&mdev_state->rxtx_lock);
395
396                 switch (data & UART_FCR_TRIGGER_MASK) {
397                 case UART_FCR_TRIGGER_1:
398                         mdev_state->s[index].intr_trigger_level = 1;
399                         break;
400
401                 case UART_FCR_TRIGGER_4:
402                         mdev_state->s[index].intr_trigger_level = 4;
403                         break;
404
405                 case UART_FCR_TRIGGER_8:
406                         mdev_state->s[index].intr_trigger_level = 8;
407                         break;
408
409                 case UART_FCR_TRIGGER_14:
410                         mdev_state->s[index].intr_trigger_level = 14;
411                         break;
412                 }
413
414                 /*
415                  * Set trigger level to 1 otherwise or  implement timer with
416                  * timeout of 4 characters and on expiring that timer set
417                  * Recevice data timeout in IIR register
418                  */
419                 mdev_state->s[index].intr_trigger_level = 1;
420                 if (data & UART_FCR_ENABLE_FIFO)
421                         mdev_state->s[index].max_fifo_size = MAX_FIFO_SIZE;
422                 else {
423                         mdev_state->s[index].max_fifo_size = 1;
424                         mdev_state->s[index].intr_trigger_level = 1;
425                 }
426
427                 break;
428
429         case UART_LCR:
430                 if (data & UART_LCR_DLAB) {
431                         mdev_state->s[index].dlab = true;
432                         mdev_state->s[index].divisor = 0;
433                 } else
434                         mdev_state->s[index].dlab = false;
435
436                 mdev_state->s[index].uart_reg[offset] = data;
437                 break;
438
439         case UART_MCR:
440                 mdev_state->s[index].uart_reg[offset] = data;
441
442                 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) &&
443                                 (data & UART_MCR_OUT2)) {
444 #if defined(DEBUG_INTR)
445                         pr_err("Serial port %d: MCR_OUT2 write\n", index);
446 #endif
447                         mtty_trigger_interrupt(mdev_uuid(mdev_state->mdev));
448                 }
449
450                 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) &&
451                                 (data & (UART_MCR_RTS | UART_MCR_DTR))) {
452 #if defined(DEBUG_INTR)
453                         pr_err("Serial port %d: MCR RTS/DTR write\n", index);
454 #endif
455                         mtty_trigger_interrupt(mdev_uuid(mdev_state->mdev));
456                 }
457                 break;
458
459         case UART_LSR:
460         case UART_MSR:
461                 /* do nothing */
462                 break;
463
464         case UART_SCR:
465                 mdev_state->s[index].uart_reg[offset] = data;
466                 break;
467
468         default:
469                 break;
470         }
471 }
472
473 static void handle_bar_read(unsigned int index, struct mdev_state *mdev_state,
474                             u16 offset, u8 *buf, u32 count)
475 {
476         /* Handle read requests by guest */
477         switch (offset) {
478         case UART_RX:
479                 /* if DLAB set, data is LSB of divisor */
480                 if (mdev_state->s[index].dlab) {
481                         *buf  = (u8)mdev_state->s[index].divisor;
482                         break;
483                 }
484
485                 mutex_lock(&mdev_state->rxtx_lock);
486                 /* return data in tx buffer */
487                 if (mdev_state->s[index].rxtx.head !=
488                                  mdev_state->s[index].rxtx.tail) {
489                         *buf = mdev_state->s[index].rxtx.fifo[
490                                                 mdev_state->s[index].rxtx.tail];
491                         mdev_state->s[index].rxtx.count--;
492                         CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.tail);
493                 }
494
495                 if (mdev_state->s[index].rxtx.head ==
496                                 mdev_state->s[index].rxtx.tail) {
497                 /*
498                  *  Trigger interrupt if tx buffer empty interrupt is
499                  *  enabled and fifo is empty
500                  */
501 #if defined(DEBUG_INTR)
502                         pr_err("Serial port %d: Buffer Empty\n", index);
503 #endif
504                         if (mdev_state->s[index].uart_reg[UART_IER] &
505                                                          UART_IER_THRI)
506                                 mtty_trigger_interrupt(
507                                         mdev_uuid(mdev_state->mdev));
508                 }
509                 mutex_unlock(&mdev_state->rxtx_lock);
510
511                 break;
512
513         case UART_IER:
514                 if (mdev_state->s[index].dlab) {
515                         *buf = (u8)(mdev_state->s[index].divisor >> 8);
516                         break;
517                 }
518                 *buf = mdev_state->s[index].uart_reg[offset] & 0x0f;
519                 break;
520
521         case UART_IIR:
522         {
523                 u8 ier = mdev_state->s[index].uart_reg[UART_IER];
524                 *buf = 0;
525
526                 mutex_lock(&mdev_state->rxtx_lock);
527                 /* Interrupt priority 1: Parity, overrun, framing or break */
528                 if ((ier & UART_IER_RLSI) && mdev_state->s[index].overrun)
529                         *buf |= UART_IIR_RLSI;
530
531                 /* Interrupt priority 2: Fifo trigger level reached */
532                 if ((ier & UART_IER_RDI) &&
533                     (mdev_state->s[index].rxtx.count >=
534                       mdev_state->s[index].intr_trigger_level))
535                         *buf |= UART_IIR_RDI;
536
537                 /* Interrupt priotiry 3: transmitter holding register empty */
538                 if ((ier & UART_IER_THRI) &&
539                     (mdev_state->s[index].rxtx.head ==
540                                 mdev_state->s[index].rxtx.tail))
541                         *buf |= UART_IIR_THRI;
542
543                 /* Interrupt priotiry 4: Modem status: CTS, DSR, RI or DCD  */
544                 if ((ier & UART_IER_MSI) &&
545                     (mdev_state->s[index].uart_reg[UART_MCR] &
546                                  (UART_MCR_RTS | UART_MCR_DTR)))
547                         *buf |= UART_IIR_MSI;
548
549                 /* bit0: 0=> interrupt pending, 1=> no interrupt is pending */
550                 if (*buf == 0)
551                         *buf = UART_IIR_NO_INT;
552
553                 /* set bit 6 & 7 to be 16550 compatible */
554                 *buf |= 0xC0;
555                 mutex_unlock(&mdev_state->rxtx_lock);
556         }
557         break;
558
559         case UART_LCR:
560         case UART_MCR:
561                 *buf = mdev_state->s[index].uart_reg[offset];
562                 break;
563
564         case UART_LSR:
565         {
566                 u8 lsr = 0;
567
568                 mutex_lock(&mdev_state->rxtx_lock);
569                 /* atleast one char in FIFO */
570                 if (mdev_state->s[index].rxtx.head !=
571                                  mdev_state->s[index].rxtx.tail)
572                         lsr |= UART_LSR_DR;
573
574                 /* if FIFO overrun */
575                 if (mdev_state->s[index].overrun)
576                         lsr |= UART_LSR_OE;
577
578                 /* transmit FIFO empty and tramsitter empty */
579                 if (mdev_state->s[index].rxtx.head ==
580                                  mdev_state->s[index].rxtx.tail)
581                         lsr |= UART_LSR_TEMT | UART_LSR_THRE;
582
583                 mutex_unlock(&mdev_state->rxtx_lock);
584                 *buf = lsr;
585                 break;
586         }
587         case UART_MSR:
588                 *buf = UART_MSR_DSR | UART_MSR_DDSR | UART_MSR_DCD;
589
590                 mutex_lock(&mdev_state->rxtx_lock);
591                 /* if AFE is 1 and FIFO have space, set CTS bit */
592                 if (mdev_state->s[index].uart_reg[UART_MCR] &
593                                                  UART_MCR_AFE) {
594                         if (mdev_state->s[index].rxtx.count <
595                                         mdev_state->s[index].max_fifo_size)
596                                 *buf |= UART_MSR_CTS | UART_MSR_DCTS;
597                 } else
598                         *buf |= UART_MSR_CTS | UART_MSR_DCTS;
599                 mutex_unlock(&mdev_state->rxtx_lock);
600
601                 break;
602
603         case UART_SCR:
604                 *buf = mdev_state->s[index].uart_reg[offset];
605                 break;
606
607         default:
608                 break;
609         }
610 }
611
612 static void mdev_read_base(struct mdev_state *mdev_state)
613 {
614         int index, pos;
615         u32 start_lo, start_hi;
616         u32 mem_type;
617
618         pos = PCI_BASE_ADDRESS_0;
619
620         for (index = 0; index <= VFIO_PCI_BAR5_REGION_INDEX; index++) {
621
622                 if (!mdev_state->region_info[index].size)
623                         continue;
624
625                 start_lo = (*(u32 *)(mdev_state->vconfig + pos)) &
626                         PCI_BASE_ADDRESS_MEM_MASK;
627                 mem_type = (*(u32 *)(mdev_state->vconfig + pos)) &
628                         PCI_BASE_ADDRESS_MEM_TYPE_MASK;
629
630                 switch (mem_type) {
631                 case PCI_BASE_ADDRESS_MEM_TYPE_64:
632                         start_hi = (*(u32 *)(mdev_state->vconfig + pos + 4));
633                         pos += 4;
634                         break;
635                 case PCI_BASE_ADDRESS_MEM_TYPE_32:
636                 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
637                         /* 1M mem BAR treated as 32-bit BAR */
638                 default:
639                         /* mem unknown type treated as 32-bit BAR */
640                         start_hi = 0;
641                         break;
642                 }
643                 pos += 4;
644                 mdev_state->region_info[index].start = ((u64)start_hi << 32) |
645                                                         start_lo;
646         }
647 }
648
649 static ssize_t mdev_access(struct mdev_device *mdev, u8 *buf, size_t count,
650                            loff_t pos, bool is_write)
651 {
652         struct mdev_state *mdev_state;
653         unsigned int index;
654         loff_t offset;
655         int ret = 0;
656
657         if (!mdev || !buf)
658                 return -EINVAL;
659
660         mdev_state = mdev_get_drvdata(mdev);
661         if (!mdev_state) {
662                 pr_err("%s mdev_state not found\n", __func__);
663                 return -EINVAL;
664         }
665
666         mutex_lock(&mdev_state->ops_lock);
667
668         index = MTTY_VFIO_PCI_OFFSET_TO_INDEX(pos);
669         offset = pos & MTTY_VFIO_PCI_OFFSET_MASK;
670         switch (index) {
671         case VFIO_PCI_CONFIG_REGION_INDEX:
672
673 #if defined(DEBUG)
674                 pr_info("%s: PCI config space %s at offset 0x%llx\n",
675                          __func__, is_write ? "write" : "read", offset);
676 #endif
677                 if (is_write) {
678                         dump_buffer(buf, count);
679                         handle_pci_cfg_write(mdev_state, offset, buf, count);
680                 } else {
681                         memcpy(buf, (mdev_state->vconfig + offset), count);
682                         dump_buffer(buf, count);
683                 }
684
685                 break;
686
687         case VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
688                 if (!mdev_state->region_info[index].start)
689                         mdev_read_base(mdev_state);
690
691                 if (is_write) {
692                         dump_buffer(buf, count);
693
694 #if defined(DEBUG_REGS)
695                         pr_info("%s: BAR%d  WR @0x%llx %s val:0x%02x dlab:%d\n",
696                                 __func__, index, offset, wr_reg[offset],
697                                 *buf, mdev_state->s[index].dlab);
698 #endif
699                         handle_bar_write(index, mdev_state, offset, buf, count);
700                 } else {
701                         handle_bar_read(index, mdev_state, offset, buf, count);
702                         dump_buffer(buf, count);
703
704 #if defined(DEBUG_REGS)
705                         pr_info("%s: BAR%d  RD @0x%llx %s val:0x%02x dlab:%d\n",
706                                 __func__, index, offset, rd_reg[offset],
707                                 *buf, mdev_state->s[index].dlab);
708 #endif
709                 }
710                 break;
711
712         default:
713                 ret = -1;
714                 goto accessfailed;
715         }
716
717         ret = count;
718
719
720 accessfailed:
721         mutex_unlock(&mdev_state->ops_lock);
722
723         return ret;
724 }
725
726 static int mtty_create(struct kobject *kobj, struct mdev_device *mdev)
727 {
728         struct mdev_state *mdev_state;
729         char name[MTTY_STRING_LEN];
730         int nr_ports = 0, i;
731
732         if (!mdev)
733                 return -EINVAL;
734
735         for (i = 0; i < 2; i++) {
736                 snprintf(name, MTTY_STRING_LEN, "%s-%d",
737                         dev_driver_string(mdev_parent_dev(mdev)), i + 1);
738                 if (!strcmp(kobj->name, name)) {
739                         nr_ports = i + 1;
740                         break;
741                 }
742         }
743
744         if (!nr_ports)
745                 return -EINVAL;
746
747         mdev_state = kzalloc(sizeof(struct mdev_state), GFP_KERNEL);
748         if (mdev_state == NULL)
749                 return -ENOMEM;
750
751         mdev_state->nr_ports = nr_ports;
752         mdev_state->irq_index = -1;
753         mdev_state->s[0].max_fifo_size = MAX_FIFO_SIZE;
754         mdev_state->s[1].max_fifo_size = MAX_FIFO_SIZE;
755         mutex_init(&mdev_state->rxtx_lock);
756         mdev_state->vconfig = kzalloc(MTTY_CONFIG_SPACE_SIZE, GFP_KERNEL);
757
758         if (mdev_state->vconfig == NULL) {
759                 kfree(mdev_state);
760                 return -ENOMEM;
761         }
762
763         mutex_init(&mdev_state->ops_lock);
764         mdev_state->mdev = mdev;
765         mdev_set_drvdata(mdev, mdev_state);
766
767         mtty_create_config_space(mdev_state);
768
769         mutex_lock(&mdev_list_lock);
770         list_add(&mdev_state->next, &mdev_devices_list);
771         mutex_unlock(&mdev_list_lock);
772
773         return 0;
774 }
775
776 static int mtty_remove(struct mdev_device *mdev)
777 {
778         struct mdev_state *mds, *tmp_mds;
779         struct mdev_state *mdev_state = mdev_get_drvdata(mdev);
780         int ret = -EINVAL;
781
782         mutex_lock(&mdev_list_lock);
783         list_for_each_entry_safe(mds, tmp_mds, &mdev_devices_list, next) {
784                 if (mdev_state == mds) {
785                         list_del(&mdev_state->next);
786                         mdev_set_drvdata(mdev, NULL);
787                         kfree(mdev_state->vconfig);
788                         kfree(mdev_state);
789                         ret = 0;
790                         break;
791                 }
792         }
793         mutex_unlock(&mdev_list_lock);
794
795         return ret;
796 }
797
798 static int mtty_reset(struct mdev_device *mdev)
799 {
800         struct mdev_state *mdev_state;
801
802         if (!mdev)
803                 return -EINVAL;
804
805         mdev_state = mdev_get_drvdata(mdev);
806         if (!mdev_state)
807                 return -EINVAL;
808
809         pr_info("%s: called\n", __func__);
810
811         return 0;
812 }
813
814 static ssize_t mtty_read(struct mdev_device *mdev, char __user *buf,
815                          size_t count, loff_t *ppos)
816 {
817         unsigned int done = 0;
818         int ret;
819
820         while (count) {
821                 size_t filled;
822
823                 if (count >= 4 && !(*ppos % 4)) {
824                         u32 val;
825
826                         ret =  mdev_access(mdev, (u8 *)&val, sizeof(val),
827                                            *ppos, false);
828                         if (ret <= 0)
829                                 goto read_err;
830
831                         if (copy_to_user(buf, &val, sizeof(val)))
832                                 goto read_err;
833
834                         filled = 4;
835                 } else if (count >= 2 && !(*ppos % 2)) {
836                         u16 val;
837
838                         ret = mdev_access(mdev, (u8 *)&val, sizeof(val),
839                                           *ppos, false);
840                         if (ret <= 0)
841                                 goto read_err;
842
843                         if (copy_to_user(buf, &val, sizeof(val)))
844                                 goto read_err;
845
846                         filled = 2;
847                 } else {
848                         u8 val;
849
850                         ret = mdev_access(mdev, (u8 *)&val, sizeof(val),
851                                           *ppos, false);
852                         if (ret <= 0)
853                                 goto read_err;
854
855                         if (copy_to_user(buf, &val, sizeof(val)))
856                                 goto read_err;
857
858                         filled = 1;
859                 }
860
861                 count -= filled;
862                 done += filled;
863                 *ppos += filled;
864                 buf += filled;
865         }
866
867         return done;
868
869 read_err:
870         return -EFAULT;
871 }
872
873 static ssize_t mtty_write(struct mdev_device *mdev, const char __user *buf,
874                    size_t count, loff_t *ppos)
875 {
876         unsigned int done = 0;
877         int ret;
878
879         while (count) {
880                 size_t filled;
881
882                 if (count >= 4 && !(*ppos % 4)) {
883                         u32 val;
884
885                         if (copy_from_user(&val, buf, sizeof(val)))
886                                 goto write_err;
887
888                         ret = mdev_access(mdev, (u8 *)&val, sizeof(val),
889                                           *ppos, true);
890                         if (ret <= 0)
891                                 goto write_err;
892
893                         filled = 4;
894                 } else if (count >= 2 && !(*ppos % 2)) {
895                         u16 val;
896
897                         if (copy_from_user(&val, buf, sizeof(val)))
898                                 goto write_err;
899
900                         ret = mdev_access(mdev, (u8 *)&val, sizeof(val),
901                                           *ppos, true);
902                         if (ret <= 0)
903                                 goto write_err;
904
905                         filled = 2;
906                 } else {
907                         u8 val;
908
909                         if (copy_from_user(&val, buf, sizeof(val)))
910                                 goto write_err;
911
912                         ret = mdev_access(mdev, (u8 *)&val, sizeof(val),
913                                           *ppos, true);
914                         if (ret <= 0)
915                                 goto write_err;
916
917                         filled = 1;
918                 }
919                 count -= filled;
920                 done += filled;
921                 *ppos += filled;
922                 buf += filled;
923         }
924
925         return done;
926 write_err:
927         return -EFAULT;
928 }
929
930 static int mtty_set_irqs(struct mdev_device *mdev, uint32_t flags,
931                          unsigned int index, unsigned int start,
932                          unsigned int count, void *data)
933 {
934         int ret = 0;
935         struct mdev_state *mdev_state;
936
937         if (!mdev)
938                 return -EINVAL;
939
940         mdev_state = mdev_get_drvdata(mdev);
941         if (!mdev_state)
942                 return -EINVAL;
943
944         mutex_lock(&mdev_state->ops_lock);
945         switch (index) {
946         case VFIO_PCI_INTX_IRQ_INDEX:
947                 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
948                 case VFIO_IRQ_SET_ACTION_MASK:
949                 case VFIO_IRQ_SET_ACTION_UNMASK:
950                         break;
951                 case VFIO_IRQ_SET_ACTION_TRIGGER:
952                 {
953                         if (flags & VFIO_IRQ_SET_DATA_NONE) {
954                                 pr_info("%s: disable INTx\n", __func__);
955                                 if (mdev_state->intx_evtfd)
956                                         eventfd_ctx_put(mdev_state->intx_evtfd);
957                                 break;
958                         }
959
960                         if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
961                                 int fd = *(int *)data;
962
963                                 if (fd > 0) {
964                                         struct eventfd_ctx *evt;
965
966                                         evt = eventfd_ctx_fdget(fd);
967                                         if (IS_ERR(evt)) {
968                                                 ret = PTR_ERR(evt);
969                                                 break;
970                                         }
971                                         mdev_state->intx_evtfd = evt;
972                                         mdev_state->irq_fd = fd;
973                                         mdev_state->irq_index = index;
974                                         break;
975                                 }
976                         }
977                         break;
978                 }
979                 }
980                 break;
981         case VFIO_PCI_MSI_IRQ_INDEX:
982                 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
983                 case VFIO_IRQ_SET_ACTION_MASK:
984                 case VFIO_IRQ_SET_ACTION_UNMASK:
985                         break;
986                 case VFIO_IRQ_SET_ACTION_TRIGGER:
987                         if (flags & VFIO_IRQ_SET_DATA_NONE) {
988                                 if (mdev_state->msi_evtfd)
989                                         eventfd_ctx_put(mdev_state->msi_evtfd);
990                                 pr_info("%s: disable MSI\n", __func__);
991                                 mdev_state->irq_index = VFIO_PCI_INTX_IRQ_INDEX;
992                                 break;
993                         }
994                         if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
995                                 int fd = *(int *)data;
996                                 struct eventfd_ctx *evt;
997
998                                 if (fd <= 0)
999                                         break;
1000
1001                                 if (mdev_state->msi_evtfd)
1002                                         break;
1003
1004                                 evt = eventfd_ctx_fdget(fd);
1005                                 if (IS_ERR(evt)) {
1006                                         ret = PTR_ERR(evt);
1007                                         break;
1008                                 }
1009                                 mdev_state->msi_evtfd = evt;
1010                                 mdev_state->irq_fd = fd;
1011                                 mdev_state->irq_index = index;
1012                         }
1013                         break;
1014         }
1015         break;
1016         case VFIO_PCI_MSIX_IRQ_INDEX:
1017                 pr_info("%s: MSIX_IRQ\n", __func__);
1018                 break;
1019         case VFIO_PCI_ERR_IRQ_INDEX:
1020                 pr_info("%s: ERR_IRQ\n", __func__);
1021                 break;
1022         case VFIO_PCI_REQ_IRQ_INDEX:
1023                 pr_info("%s: REQ_IRQ\n", __func__);
1024                 break;
1025         }
1026
1027         mutex_unlock(&mdev_state->ops_lock);
1028         return ret;
1029 }
1030
1031 static int mtty_trigger_interrupt(const guid_t *uuid)
1032 {
1033         int ret = -1;
1034         struct mdev_state *mdev_state;
1035
1036         mdev_state = find_mdev_state_by_uuid(uuid);
1037
1038         if (!mdev_state) {
1039                 pr_info("%s: mdev not found\n", __func__);
1040                 return -EINVAL;
1041         }
1042
1043         if ((mdev_state->irq_index == VFIO_PCI_MSI_IRQ_INDEX) &&
1044             (!mdev_state->msi_evtfd))
1045                 return -EINVAL;
1046         else if ((mdev_state->irq_index == VFIO_PCI_INTX_IRQ_INDEX) &&
1047                  (!mdev_state->intx_evtfd)) {
1048                 pr_info("%s: Intr eventfd not found\n", __func__);
1049                 return -EINVAL;
1050         }
1051
1052         if (mdev_state->irq_index == VFIO_PCI_MSI_IRQ_INDEX)
1053                 ret = eventfd_signal(mdev_state->msi_evtfd, 1);
1054         else
1055                 ret = eventfd_signal(mdev_state->intx_evtfd, 1);
1056
1057 #if defined(DEBUG_INTR)
1058         pr_info("Intx triggered\n");
1059 #endif
1060         if (ret != 1)
1061                 pr_err("%s: eventfd signal failed (%d)\n", __func__, ret);
1062
1063         return ret;
1064 }
1065
1066 static int mtty_get_region_info(struct mdev_device *mdev,
1067                          struct vfio_region_info *region_info,
1068                          u16 *cap_type_id, void **cap_type)
1069 {
1070         unsigned int size = 0;
1071         struct mdev_state *mdev_state;
1072         u32 bar_index;
1073
1074         if (!mdev)
1075                 return -EINVAL;
1076
1077         mdev_state = mdev_get_drvdata(mdev);
1078         if (!mdev_state)
1079                 return -EINVAL;
1080
1081         bar_index = region_info->index;
1082         if (bar_index >= VFIO_PCI_NUM_REGIONS)
1083                 return -EINVAL;
1084
1085         mutex_lock(&mdev_state->ops_lock);
1086
1087         switch (bar_index) {
1088         case VFIO_PCI_CONFIG_REGION_INDEX:
1089                 size = MTTY_CONFIG_SPACE_SIZE;
1090                 break;
1091         case VFIO_PCI_BAR0_REGION_INDEX:
1092                 size = MTTY_IO_BAR_SIZE;
1093                 break;
1094         case VFIO_PCI_BAR1_REGION_INDEX:
1095                 if (mdev_state->nr_ports == 2)
1096                         size = MTTY_IO_BAR_SIZE;
1097                 break;
1098         default:
1099                 size = 0;
1100                 break;
1101         }
1102
1103         mdev_state->region_info[bar_index].size = size;
1104         mdev_state->region_info[bar_index].vfio_offset =
1105                 MTTY_VFIO_PCI_INDEX_TO_OFFSET(bar_index);
1106
1107         region_info->size = size;
1108         region_info->offset = MTTY_VFIO_PCI_INDEX_TO_OFFSET(bar_index);
1109         region_info->flags = VFIO_REGION_INFO_FLAG_READ |
1110                 VFIO_REGION_INFO_FLAG_WRITE;
1111         mutex_unlock(&mdev_state->ops_lock);
1112         return 0;
1113 }
1114
1115 static int mtty_get_irq_info(struct mdev_device *mdev,
1116                              struct vfio_irq_info *irq_info)
1117 {
1118         switch (irq_info->index) {
1119         case VFIO_PCI_INTX_IRQ_INDEX:
1120         case VFIO_PCI_MSI_IRQ_INDEX:
1121         case VFIO_PCI_REQ_IRQ_INDEX:
1122                 break;
1123
1124         default:
1125                 return -EINVAL;
1126         }
1127
1128         irq_info->flags = VFIO_IRQ_INFO_EVENTFD;
1129         irq_info->count = 1;
1130
1131         if (irq_info->index == VFIO_PCI_INTX_IRQ_INDEX)
1132                 irq_info->flags |= (VFIO_IRQ_INFO_MASKABLE |
1133                                 VFIO_IRQ_INFO_AUTOMASKED);
1134         else
1135                 irq_info->flags |= VFIO_IRQ_INFO_NORESIZE;
1136
1137         return 0;
1138 }
1139
1140 static int mtty_get_device_info(struct mdev_device *mdev,
1141                          struct vfio_device_info *dev_info)
1142 {
1143         dev_info->flags = VFIO_DEVICE_FLAGS_PCI;
1144         dev_info->num_regions = VFIO_PCI_NUM_REGIONS;
1145         dev_info->num_irqs = VFIO_PCI_NUM_IRQS;
1146
1147         return 0;
1148 }
1149
1150 static long mtty_ioctl(struct mdev_device *mdev, unsigned int cmd,
1151                         unsigned long arg)
1152 {
1153         int ret = 0;
1154         unsigned long minsz;
1155         struct mdev_state *mdev_state;
1156
1157         if (!mdev)
1158                 return -EINVAL;
1159
1160         mdev_state = mdev_get_drvdata(mdev);
1161         if (!mdev_state)
1162                 return -ENODEV;
1163
1164         switch (cmd) {
1165         case VFIO_DEVICE_GET_INFO:
1166         {
1167                 struct vfio_device_info info;
1168
1169                 minsz = offsetofend(struct vfio_device_info, num_irqs);
1170
1171                 if (copy_from_user(&info, (void __user *)arg, minsz))
1172                         return -EFAULT;
1173
1174                 if (info.argsz < minsz)
1175                         return -EINVAL;
1176
1177                 ret = mtty_get_device_info(mdev, &info);
1178                 if (ret)
1179                         return ret;
1180
1181                 memcpy(&mdev_state->dev_info, &info, sizeof(info));
1182
1183                 if (copy_to_user((void __user *)arg, &info, minsz))
1184                         return -EFAULT;
1185
1186                 return 0;
1187         }
1188         case VFIO_DEVICE_GET_REGION_INFO:
1189         {
1190                 struct vfio_region_info info;
1191                 u16 cap_type_id = 0;
1192                 void *cap_type = NULL;
1193
1194                 minsz = offsetofend(struct vfio_region_info, offset);
1195
1196                 if (copy_from_user(&info, (void __user *)arg, minsz))
1197                         return -EFAULT;
1198
1199                 if (info.argsz < minsz)
1200                         return -EINVAL;
1201
1202                 ret = mtty_get_region_info(mdev, &info, &cap_type_id,
1203                                            &cap_type);
1204                 if (ret)
1205                         return ret;
1206
1207                 if (copy_to_user((void __user *)arg, &info, minsz))
1208                         return -EFAULT;
1209
1210                 return 0;
1211         }
1212
1213         case VFIO_DEVICE_GET_IRQ_INFO:
1214         {
1215                 struct vfio_irq_info info;
1216
1217                 minsz = offsetofend(struct vfio_irq_info, count);
1218
1219                 if (copy_from_user(&info, (void __user *)arg, minsz))
1220                         return -EFAULT;
1221
1222                 if ((info.argsz < minsz) ||
1223                     (info.index >= mdev_state->dev_info.num_irqs))
1224                         return -EINVAL;
1225
1226                 ret = mtty_get_irq_info(mdev, &info);
1227                 if (ret)
1228                         return ret;
1229
1230                 if (copy_to_user((void __user *)arg, &info, minsz))
1231                         return -EFAULT;
1232
1233                 return 0;
1234         }
1235         case VFIO_DEVICE_SET_IRQS:
1236         {
1237                 struct vfio_irq_set hdr;
1238                 u8 *data = NULL, *ptr = NULL;
1239                 size_t data_size = 0;
1240
1241                 minsz = offsetofend(struct vfio_irq_set, count);
1242
1243                 if (copy_from_user(&hdr, (void __user *)arg, minsz))
1244                         return -EFAULT;
1245
1246                 ret = vfio_set_irqs_validate_and_prepare(&hdr,
1247                                                 mdev_state->dev_info.num_irqs,
1248                                                 VFIO_PCI_NUM_IRQS,
1249                                                 &data_size);
1250                 if (ret)
1251                         return ret;
1252
1253                 if (data_size) {
1254                         ptr = data = memdup_user((void __user *)(arg + minsz),
1255                                                  data_size);
1256                         if (IS_ERR(data))
1257                                 return PTR_ERR(data);
1258                 }
1259
1260                 ret = mtty_set_irqs(mdev, hdr.flags, hdr.index, hdr.start,
1261                                     hdr.count, data);
1262
1263                 kfree(ptr);
1264                 return ret;
1265         }
1266         case VFIO_DEVICE_RESET:
1267                 return mtty_reset(mdev);
1268         }
1269         return -ENOTTY;
1270 }
1271
1272 static int mtty_open(struct mdev_device *mdev)
1273 {
1274         pr_info("%s\n", __func__);
1275         return 0;
1276 }
1277
1278 static void mtty_close(struct mdev_device *mdev)
1279 {
1280         pr_info("%s\n", __func__);
1281 }
1282
1283 static ssize_t
1284 sample_mtty_dev_show(struct device *dev, struct device_attribute *attr,
1285                      char *buf)
1286 {
1287         return sprintf(buf, "This is phy device\n");
1288 }
1289
1290 static DEVICE_ATTR_RO(sample_mtty_dev);
1291
1292 static struct attribute *mtty_dev_attrs[] = {
1293         &dev_attr_sample_mtty_dev.attr,
1294         NULL,
1295 };
1296
1297 static const struct attribute_group mtty_dev_group = {
1298         .name  = "mtty_dev",
1299         .attrs = mtty_dev_attrs,
1300 };
1301
1302 static const struct attribute_group *mtty_dev_groups[] = {
1303         &mtty_dev_group,
1304         NULL,
1305 };
1306
1307 static ssize_t
1308 sample_mdev_dev_show(struct device *dev, struct device_attribute *attr,
1309                      char *buf)
1310 {
1311         if (mdev_from_dev(dev))
1312                 return sprintf(buf, "This is MDEV %s\n", dev_name(dev));
1313
1314         return sprintf(buf, "\n");
1315 }
1316
1317 static DEVICE_ATTR_RO(sample_mdev_dev);
1318
1319 static struct attribute *mdev_dev_attrs[] = {
1320         &dev_attr_sample_mdev_dev.attr,
1321         NULL,
1322 };
1323
1324 static const struct attribute_group mdev_dev_group = {
1325         .name  = "vendor",
1326         .attrs = mdev_dev_attrs,
1327 };
1328
1329 static const struct attribute_group *mdev_dev_groups[] = {
1330         &mdev_dev_group,
1331         NULL,
1332 };
1333
1334 static ssize_t
1335 name_show(struct kobject *kobj, struct device *dev, char *buf)
1336 {
1337         char name[MTTY_STRING_LEN];
1338         int i;
1339         const char *name_str[2] = {"Single port serial", "Dual port serial"};
1340
1341         for (i = 0; i < 2; i++) {
1342                 snprintf(name, MTTY_STRING_LEN, "%s-%d",
1343                          dev_driver_string(dev), i + 1);
1344                 if (!strcmp(kobj->name, name))
1345                         return sprintf(buf, "%s\n", name_str[i]);
1346         }
1347
1348         return -EINVAL;
1349 }
1350
1351 static MDEV_TYPE_ATTR_RO(name);
1352
1353 static ssize_t
1354 available_instances_show(struct kobject *kobj, struct device *dev, char *buf)
1355 {
1356         char name[MTTY_STRING_LEN];
1357         int i;
1358         struct mdev_state *mds;
1359         int ports = 0, used = 0;
1360
1361         for (i = 0; i < 2; i++) {
1362                 snprintf(name, MTTY_STRING_LEN, "%s-%d",
1363                          dev_driver_string(dev), i + 1);
1364                 if (!strcmp(kobj->name, name)) {
1365                         ports = i + 1;
1366                         break;
1367                 }
1368         }
1369
1370         if (!ports)
1371                 return -EINVAL;
1372
1373         list_for_each_entry(mds, &mdev_devices_list, next)
1374                 used += mds->nr_ports;
1375
1376         return sprintf(buf, "%d\n", (MAX_MTTYS - used)/ports);
1377 }
1378
1379 static MDEV_TYPE_ATTR_RO(available_instances);
1380
1381
1382 static ssize_t device_api_show(struct kobject *kobj, struct device *dev,
1383                                char *buf)
1384 {
1385         return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);
1386 }
1387
1388 static MDEV_TYPE_ATTR_RO(device_api);
1389
1390 static struct attribute *mdev_types_attrs[] = {
1391         &mdev_type_attr_name.attr,
1392         &mdev_type_attr_device_api.attr,
1393         &mdev_type_attr_available_instances.attr,
1394         NULL,
1395 };
1396
1397 static struct attribute_group mdev_type_group1 = {
1398         .name  = "1",
1399         .attrs = mdev_types_attrs,
1400 };
1401
1402 static struct attribute_group mdev_type_group2 = {
1403         .name  = "2",
1404         .attrs = mdev_types_attrs,
1405 };
1406
1407 static struct attribute_group *mdev_type_groups[] = {
1408         &mdev_type_group1,
1409         &mdev_type_group2,
1410         NULL,
1411 };
1412
1413 static const struct mdev_parent_ops mdev_fops = {
1414         .owner                  = THIS_MODULE,
1415         .dev_attr_groups        = mtty_dev_groups,
1416         .mdev_attr_groups       = mdev_dev_groups,
1417         .supported_type_groups  = mdev_type_groups,
1418         .create                 = mtty_create,
1419         .remove                 = mtty_remove,
1420         .open                   = mtty_open,
1421         .release                = mtty_close,
1422         .read                   = mtty_read,
1423         .write                  = mtty_write,
1424         .ioctl                  = mtty_ioctl,
1425 };
1426
1427 static void mtty_device_release(struct device *dev)
1428 {
1429         dev_dbg(dev, "mtty: released\n");
1430 }
1431
1432 static int __init mtty_dev_init(void)
1433 {
1434         int ret = 0;
1435
1436         pr_info("mtty_dev: %s\n", __func__);
1437
1438         memset(&mtty_dev, 0, sizeof(mtty_dev));
1439
1440         idr_init(&mtty_dev.vd_idr);
1441
1442         ret = alloc_chrdev_region(&mtty_dev.vd_devt, 0, MINORMASK + 1,
1443                                   MTTY_NAME);
1444
1445         if (ret < 0) {
1446                 pr_err("Error: failed to register mtty_dev, err:%d\n", ret);
1447                 return ret;
1448         }
1449
1450         cdev_init(&mtty_dev.vd_cdev, &vd_fops);
1451         cdev_add(&mtty_dev.vd_cdev, mtty_dev.vd_devt, MINORMASK + 1);
1452
1453         pr_info("major_number:%d\n", MAJOR(mtty_dev.vd_devt));
1454
1455         mtty_dev.vd_class = class_create(THIS_MODULE, MTTY_CLASS_NAME);
1456
1457         if (IS_ERR(mtty_dev.vd_class)) {
1458                 pr_err("Error: failed to register mtty_dev class\n");
1459                 ret = PTR_ERR(mtty_dev.vd_class);
1460                 goto failed1;
1461         }
1462
1463         mtty_dev.dev.class = mtty_dev.vd_class;
1464         mtty_dev.dev.release = mtty_device_release;
1465         dev_set_name(&mtty_dev.dev, "%s", MTTY_NAME);
1466
1467         ret = device_register(&mtty_dev.dev);
1468         if (ret)
1469                 goto failed2;
1470
1471         ret = mdev_register_device(&mtty_dev.dev, &mdev_fops);
1472         if (ret)
1473                 goto failed3;
1474
1475         mutex_init(&mdev_list_lock);
1476         INIT_LIST_HEAD(&mdev_devices_list);
1477
1478         goto all_done;
1479
1480 failed3:
1481
1482         device_unregister(&mtty_dev.dev);
1483 failed2:
1484         class_destroy(mtty_dev.vd_class);
1485
1486 failed1:
1487         cdev_del(&mtty_dev.vd_cdev);
1488         unregister_chrdev_region(mtty_dev.vd_devt, MINORMASK + 1);
1489
1490 all_done:
1491         return ret;
1492 }
1493
1494 static void __exit mtty_dev_exit(void)
1495 {
1496         mtty_dev.dev.bus = NULL;
1497         mdev_unregister_device(&mtty_dev.dev);
1498
1499         device_unregister(&mtty_dev.dev);
1500         idr_destroy(&mtty_dev.vd_idr);
1501         cdev_del(&mtty_dev.vd_cdev);
1502         unregister_chrdev_region(mtty_dev.vd_devt, MINORMASK + 1);
1503         class_destroy(mtty_dev.vd_class);
1504         mtty_dev.vd_class = NULL;
1505         pr_info("mtty_dev: Unloaded!\n");
1506 }
1507
1508 module_init(mtty_dev_init)
1509 module_exit(mtty_dev_exit)
1510
1511 MODULE_LICENSE("GPL v2");
1512 MODULE_INFO(supported, "Test driver that simulate serial port over PCI");
1513 MODULE_VERSION(VERSION_STRING);
1514 MODULE_AUTHOR(DRIVER_AUTHOR);