sound/pci/hda/patch_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *
   4  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   5  *
   6  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   7  *  Copyright (c) 2006 ATI Technologies Inc.
   8  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   9  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  10  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  11  *
  12  *  Authors:
  13  *                      Wu Fengguang <wfg@linux.intel.com>
  14  *
  15  *  Maintained by:
  16  *                      Wu Fengguang <wfg@linux.intel.com>
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/delay.h>
  21 #include <linux/pci.h>
  22 #include <linux/slab.h>
  23 #include <linux/module.h>
  24 #include <linux/pm_runtime.h>
  25 #include <sound/core.h>
  26 #include <sound/jack.h>
  27 #include <sound/asoundef.h>
  28 #include <sound/tlv.h>
  29 #include <sound/hdaudio.h>
  30 #include <sound/hda_i915.h>
  31 #include <sound/hda_chmap.h>
  32 #include <sound/hda_codec.h>
  33 #include "hda_local.h"
  34 #include "hda_jack.h"
  35 #include "hda_controller.h"
  36
  37 static bool static_hdmi_pcm;
  38 module_param(static_hdmi_pcm, bool, 0644);
  39 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  40
  41 struct hdmi_spec_per_cvt {
  42         hda_nid_t cvt_nid;
  43         int assigned;
  44         unsigned int channels_min;
  45         unsigned int channels_max;
  46         u32 rates;
  47         u64 formats;
  48         unsigned int maxbps;
  49 };
  50
  51 /* max. connections to a widget */
  52 #define HDA_MAX_CONNECTIONS     32
  53
  54 struct hdmi_spec_per_pin {
  55         hda_nid_t pin_nid;
  56         int dev_id;
  57         /* pin idx, different device entries on the same pin use the same idx */
  58         int pin_nid_idx;
  59         int num_mux_nids;
  60         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  61         int mux_idx;
  62         hda_nid_t cvt_nid;
  63
  64         struct hda_codec *codec;
  65         struct hdmi_eld sink_eld;
  66         struct mutex lock;
  67         struct delayed_work work;
  68         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  69         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  70         int repoll_count;
  71         bool setup; /* the stream has been set up by prepare callback */
  72         int channels; /* current number of channels */
  73         bool non_pcm;
  74         bool chmap_set;         /* channel-map override by ALSA API? */
  75         unsigned char chmap[8]; /* ALSA API channel-map */
  76 #ifdef CONFIG_SND_PROC_FS
  77         struct snd_info_entry *proc_entry;
  78 #endif
  79 };
  80
  81 /* operations used by generic code that can be overridden by patches */
  82 struct hdmi_ops {
  83         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
  84                            int dev_id, unsigned char *buf, int *eld_size);
  85
  86         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
  87                                     int dev_id,
  88                                     int ca, int active_channels, int conn_type);
  89
  90         /* enable/disable HBR (HD passthrough) */
  91         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid,
  92                              int dev_id, bool hbr);
  93
  94         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
  95                             hda_nid_t pin_nid, int dev_id, u32 stream_tag,
  96                             int format);
  97
  98         void (*pin_cvt_fixup)(struct hda_codec *codec,
  99                               struct hdmi_spec_per_pin *per_pin,
 100                               hda_nid_t cvt_nid);
 101 };
 102
 103 struct hdmi_pcm {
 104         struct hda_pcm *pcm;
 105         struct snd_jack *jack;
 106         struct snd_kcontrol *eld_ctl;
 107 };
 108
 109 struct hdmi_spec {
 110         struct hda_codec *codec;
 111         int num_cvts;
 112         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 113         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 114
 115         /*
 116          * num_pins is the number of virtual pins
 117          * for example, there are 3 pins, and each pin
 118          * has 4 device entries, then the num_pins is 12
 119          */
 120         int num_pins;
 121         /*
 122          * num_nids is the number of real pins
 123          * In the above example, num_nids is 3
 124          */
 125         int num_nids;
 126         /*
 127          * dev_num is the number of device entries
 128          * on each pin.
 129          * In the above example, dev_num is 4
 130          */
 131         int dev_num;
 132         struct snd_array pins; /* struct hdmi_spec_per_pin */
 133         struct hdmi_pcm pcm_rec[16];
 134         struct mutex pcm_lock;
 135         struct mutex bind_lock; /* for audio component binding */
 136         /* pcm_bitmap means which pcms have been assigned to pins*/
 137         unsigned long pcm_bitmap;
 138         int pcm_used;   /* counter of pcm_rec[] */
 139         /* bitmap shows whether the pcm is opened in user space
 140          * bit 0 means the first playback PCM (PCM3);
 141          * bit 1 means the second playback PCM, and so on.
 142          */
 143         unsigned long pcm_in_use;
 144
 145         struct hdmi_eld temp_eld;
 146         struct hdmi_ops ops;
 147
 148         bool dyn_pin_out;
 149         bool dyn_pcm_assign;
 150         bool intel_hsw_fixup;   /* apply Intel platform-specific fixups */
 151         /*
 152          * Non-generic VIA/NVIDIA specific
 153          */
 154         struct hda_multi_out multiout;
 155         struct hda_pcm_stream pcm_playback;
 156
 157         bool use_jack_detect; /* jack detection enabled */
 158         bool use_acomp_notifier; /* use eld_notify callback for hotplug */
 159         bool acomp_registered; /* audio component registered in this driver */
 160         struct drm_audio_component_audio_ops drm_audio_ops;
 161         int (*port2pin)(struct hda_codec *, int); /* reverse port/pin mapping */
 162
 163         struct hdac_chmap chmap;
 164         hda_nid_t vendor_nid;
 165         const int *port_map;
 166         int port_num;
 167 };
 168
 169 #ifdef CONFIG_SND_HDA_COMPONENT
 170 static inline bool codec_has_acomp(struct hda_codec *codec)
 171 {
 172         struct hdmi_spec *spec = codec->spec;
 173         return spec->use_acomp_notifier;
 174 }
 175 #else
 176 #define codec_has_acomp(codec)  false
 177 #endif
 178
 179 struct hdmi_audio_infoframe {
 180         u8 type; /* 0x84 */
 181         u8 ver;  /* 0x01 */
 182         u8 len;  /* 0x0a */
 183
 184         u8 checksum;
 185
 186         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 187         u8 SS01_SF24;
 188         u8 CXT04;
 189         u8 CA;
 190         u8 LFEPBL01_LSV36_DM_INH7;
 191 };
 192
 193 struct dp_audio_infoframe {
 194         u8 type; /* 0x84 */
 195         u8 len;  /* 0x1b */
 196         u8 ver;  /* 0x11 << 2 */
 197
 198         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 199         u8 SS01_SF24;
 200         u8 CXT04;
 201         u8 CA;
 202         u8 LFEPBL01_LSV36_DM_INH7;
 203 };
 204
 205 union audio_infoframe {
 206         struct hdmi_audio_infoframe hdmi;
 207         struct dp_audio_infoframe dp;
 208         u8 bytes[0];
 209 };
 210
 211 /*
 212  * HDMI routines
 213  */
 214
 215 #define get_pin(spec, idx) \
 216         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 217 #define get_cvt(spec, idx) \
 218         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 219 /* obtain hdmi_pcm object assigned to idx */
 220 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 221 /* obtain hda_pcm object assigned to idx */
 222 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 223
 224 static int pin_id_to_pin_index(struct hda_codec *codec,
 225                                hda_nid_t pin_nid, int dev_id)
 226 {
 227         struct hdmi_spec *spec = codec->spec;
 228         int pin_idx;
 229         struct hdmi_spec_per_pin *per_pin;
 230
 231         /*
 232          * (dev_id == -1) means it is NON-MST pin
 233          * return the first virtual pin on this port
 234          */
 235         if (dev_id == -1)
 236                 dev_id = 0;
 237
 238         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 239                 per_pin = get_pin(spec, pin_idx);
 240                 if ((per_pin->pin_nid == pin_nid) &&
 241                         (per_pin->dev_id == dev_id))
 242                         return pin_idx;
 243         }
 244
 245         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 246         return -EINVAL;
 247 }
 248
 249 static int hinfo_to_pcm_index(struct hda_codec *codec,
 250                         struct hda_pcm_stream *hinfo)
 251 {
 252         struct hdmi_spec *spec = codec->spec;
 253         int pcm_idx;
 254
 255         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 256                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 257                         return pcm_idx;
 258
 259         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 260         return -EINVAL;
 261 }
 262
 263 static int hinfo_to_pin_index(struct hda_codec *codec,
 264                               struct hda_pcm_stream *hinfo)
 265 {
 266         struct hdmi_spec *spec = codec->spec;
 267         struct hdmi_spec_per_pin *per_pin;
 268         int pin_idx;
 269
 270         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 271                 per_pin = get_pin(spec, pin_idx);
 272                 if (per_pin->pcm &&
 273                         per_pin->pcm->pcm->stream == hinfo)
 274                         return pin_idx;
 275         }
 276
 277         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 278         return -EINVAL;
 279 }
 280
 281 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 282                                                 int pcm_idx)
 283 {
 284         int i;
 285         struct hdmi_spec_per_pin *per_pin;
 286
 287         for (i = 0; i < spec->num_pins; i++) {
 288                 per_pin = get_pin(spec, i);
 289                 if (per_pin->pcm_idx == pcm_idx)
 290                         return per_pin;
 291         }
 292         return NULL;
 293 }
 294
 295 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 296 {
 297         struct hdmi_spec *spec = codec->spec;
 298         int cvt_idx;
 299
 300         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 301                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 302                         return cvt_idx;
 303
 304         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 305         return -EINVAL;
 306 }
 307
 308 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 309                         struct snd_ctl_elem_info *uinfo)
 310 {
 311         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 312         struct hdmi_spec *spec = codec->spec;
 313         struct hdmi_spec_per_pin *per_pin;
 314         struct hdmi_eld *eld;
 315         int pcm_idx;
 316
 317         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 318
 319         pcm_idx = kcontrol->private_value;
 320         mutex_lock(&spec->pcm_lock);
 321         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 322         if (!per_pin) {
 323                 /* no pin is bound to the pcm */
 324                 uinfo->count = 0;
 325                 goto unlock;
 326         }
 327         eld = &per_pin->sink_eld;
 328         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 329
 330  unlock:
 331         mutex_unlock(&spec->pcm_lock);
 332         return 0;
 333 }
 334
 335 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 336                         struct snd_ctl_elem_value *ucontrol)
 337 {
 338         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 339         struct hdmi_spec *spec = codec->spec;
 340         struct hdmi_spec_per_pin *per_pin;
 341         struct hdmi_eld *eld;
 342         int pcm_idx;
 343         int err = 0;
 344
 345         pcm_idx = kcontrol->private_value;
 346         mutex_lock(&spec->pcm_lock);
 347         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 348         if (!per_pin) {
 349                 /* no pin is bound to the pcm */
 350                 memset(ucontrol->value.bytes.data, 0,
 351                        ARRAY_SIZE(ucontrol->value.bytes.data));
 352                 goto unlock;
 353         }
 354
 355         eld = &per_pin->sink_eld;
 356         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 357             eld->eld_size > ELD_MAX_SIZE) {
 358                 snd_BUG();
 359                 err = -EINVAL;
 360                 goto unlock;
 361         }
 362
 363         memset(ucontrol->value.bytes.data, 0,
 364                ARRAY_SIZE(ucontrol->value.bytes.data));
 365         if (eld->eld_valid)
 366                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 367                        eld->eld_size);
 368
 369  unlock:
 370         mutex_unlock(&spec->pcm_lock);
 371         return err;
 372 }
 373
 374 static const struct snd_kcontrol_new eld_bytes_ctl = {
 375         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE |
 376                 SNDRV_CTL_ELEM_ACCESS_SKIP_CHECK,
 377         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 378         .name = "ELD",
 379         .info = hdmi_eld_ctl_info,
 380         .get = hdmi_eld_ctl_get,
 381 };
 382
 383 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 384                         int device)
 385 {
 386         struct snd_kcontrol *kctl;
 387         struct hdmi_spec *spec = codec->spec;
 388         int err;
 389
 390         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 391         if (!kctl)
 392                 return -ENOMEM;
 393         kctl->private_value = pcm_idx;
 394         kctl->id.device = device;
 395
 396         /* no pin nid is associated with the kctl now
 397          * tbd: associate pin nid to eld ctl later
 398          */
 399         err = snd_hda_ctl_add(codec, 0, kctl);
 400         if (err < 0)
 401                 return err;
 402
 403         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 404         return 0;
 405 }
 406
 407 #ifdef BE_PARANOID
 408 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 409                                 int *packet_index, int *byte_index)
 410 {
 411         int val;
 412
 413         val = snd_hda_codec_read(codec, pin_nid, 0,
 414                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 415
 416         *packet_index = val >> 5;
 417         *byte_index = val & 0x1f;
 418 }
 419 #endif
 420
 421 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 422                                 int packet_index, int byte_index)
 423 {
 424         int val;
 425
 426         val = (packet_index << 5) | (byte_index & 0x1f);
 427
 428         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 429 }
 430
 431 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 432                                 unsigned char val)
 433 {
 434         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 435 }
 436
 437 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 438 {
 439         struct hdmi_spec *spec = codec->spec;
 440         int pin_out;
 441
 442         /* Unmute */
 443         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 444                 snd_hda_codec_write(codec, pin_nid, 0,
 445                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 446
 447         if (spec->dyn_pin_out)
 448                 /* Disable pin out until stream is active */
 449                 pin_out = 0;
 450         else
 451                 /* Enable pin out: some machines with GM965 gets broken output
 452                  * when the pin is disabled or changed while using with HDMI
 453                  */
 454                 pin_out = PIN_OUT;
 455
 456         snd_hda_codec_write(codec, pin_nid, 0,
 457                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 458 }
 459
 460 /*
 461  * ELD proc files
 462  */
 463
 464 #ifdef CONFIG_SND_PROC_FS
 465 static void print_eld_info(struct snd_info_entry *entry,
 466                            struct snd_info_buffer *buffer)
 467 {
 468         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 469
 470         mutex_lock(&per_pin->lock);
 471         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 472         mutex_unlock(&per_pin->lock);
 473 }
 474
 475 static void write_eld_info(struct snd_info_entry *entry,
 476                            struct snd_info_buffer *buffer)
 477 {
 478         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 479
 480         mutex_lock(&per_pin->lock);
 481         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 482         mutex_unlock(&per_pin->lock);
 483 }
 484
 485 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 486 {
 487         char name[32];
 488         struct hda_codec *codec = per_pin->codec;
 489         struct snd_info_entry *entry;
 490         int err;
 491
 492         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 493         err = snd_card_proc_new(codec->card, name, &entry);
 494         if (err < 0)
 495                 return err;
 496
 497         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 498         entry->c.text.write = write_eld_info;
 499         entry->mode |= 0200;
 500         per_pin->proc_entry = entry;
 501
 502         return 0;
 503 }
 504
 505 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 506 {
 507         if (!per_pin->codec->bus->shutdown) {
 508                 snd_info_free_entry(per_pin->proc_entry);
 509                 per_pin->proc_entry = NULL;
 510         }
 511 }
 512 #else
 513 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 514                                int index)
 515 {
 516         return 0;
 517 }
 518 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 519 {
 520 }
 521 #endif
 522
 523 /*
 524  * Audio InfoFrame routines
 525  */
 526
 527 /*
 528  * Enable Audio InfoFrame Transmission
 529  */
 530 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 531                                        hda_nid_t pin_nid)
 532 {
 533         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 534         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 535                                                 AC_DIPXMIT_BEST);
 536 }
 537
 538 /*
 539  * Disable Audio InfoFrame Transmission
 540  */
 541 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 542                                       hda_nid_t pin_nid)
 543 {
 544         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 545         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 546                                                 AC_DIPXMIT_DISABLE);
 547 }
 548
 549 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 550 {
 551 #ifdef CONFIG_SND_DEBUG_VERBOSE
 552         int i;
 553         int size;
 554
 555         size = snd_hdmi_get_eld_size(codec, pin_nid);
 556         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 557
 558         for (i = 0; i < 8; i++) {
 559                 size = snd_hda_codec_read(codec, pin_nid, 0,
 560                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 561                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 562         }
 563 #endif
 564 }
 565
 566 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 567 {
 568 #ifdef BE_PARANOID
 569         int i, j;
 570         int size;
 571         int pi, bi;
 572         for (i = 0; i < 8; i++) {
 573                 size = snd_hda_codec_read(codec, pin_nid, 0,
 574                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 575                 if (size == 0)
 576                         continue;
 577
 578                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 579                 for (j = 1; j < 1000; j++) {
 580                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 581                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 582                         if (pi != i)
 583                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 584                                                 bi, pi, i);
 585                         if (bi == 0) /* byte index wrapped around */
 586                                 break;
 587                 }
 588                 codec_dbg(codec,
 589                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 590                         i, size, j);
 591         }
 592 #endif
 593 }
 594
 595 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 596 {
 597         u8 *bytes = (u8 *)hdmi_ai;
 598         u8 sum = 0;
 599         int i;
 600
 601         hdmi_ai->checksum = 0;
 602
 603         for (i = 0; i < sizeof(*hdmi_ai); i++)
 604                 sum += bytes[i];
 605
 606         hdmi_ai->checksum = -sum;
 607 }
 608
 609 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 610                                       hda_nid_t pin_nid,
 611                                       u8 *dip, int size)
 612 {
 613         int i;
 614
 615         hdmi_debug_dip_size(codec, pin_nid);
 616         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 617
 618         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 619         for (i = 0; i < size; i++)
 620                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 621 }
 622
 623 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 624                                     u8 *dip, int size)
 625 {
 626         u8 val;
 627         int i;
 628
 629         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 630                                                             != AC_DIPXMIT_BEST)
 631                 return false;
 632
 633         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 634         for (i = 0; i < size; i++) {
 635                 val = snd_hda_codec_read(codec, pin_nid, 0,
 636                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 637                 if (val != dip[i])
 638                         return false;
 639         }
 640
 641         return true;
 642 }
 643
 644 static int hdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
 645                             int dev_id, unsigned char *buf, int *eld_size)
 646 {
 647         snd_hda_set_dev_select(codec, nid, dev_id);
 648
 649         return snd_hdmi_get_eld(codec, nid, buf, eld_size);
 650 }
 651
 652 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 653                                      hda_nid_t pin_nid, int dev_id,
 654                                      int ca, int active_channels,
 655                                      int conn_type)
 656 {
 657         union audio_infoframe ai;
 658
 659         memset(&ai, 0, sizeof(ai));
 660         if (conn_type == 0) { /* HDMI */
 661                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 662
 663                 hdmi_ai->type           = 0x84;
 664                 hdmi_ai->ver            = 0x01;
 665                 hdmi_ai->len            = 0x0a;
 666                 hdmi_ai->CC02_CT47      = active_channels - 1;
 667                 hdmi_ai->CA             = ca;
 668                 hdmi_checksum_audio_infoframe(hdmi_ai);
 669         } else if (conn_type == 1) { /* DisplayPort */
 670                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 671
 672                 dp_ai->type             = 0x84;
 673                 dp_ai->len              = 0x1b;
 674                 dp_ai->ver              = 0x11 << 2;
 675                 dp_ai->CC02_CT47        = active_channels - 1;
 676                 dp_ai->CA               = ca;
 677         } else {
 678                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 679                             pin_nid);
 680                 return;
 681         }
 682
 683         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 684
 685         /*
 686          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 687          * sizeof(*dp_ai) to avoid partial match/update problems when
 688          * the user switches between HDMI/DP monitors.
 689          */
 690         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 691                                         sizeof(ai))) {
 692                 codec_dbg(codec,
 693                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 694                             pin_nid,
 695                             active_channels, ca);
 696                 hdmi_stop_infoframe_trans(codec, pin_nid);
 697                 hdmi_fill_audio_infoframe(codec, pin_nid,
 698                                             ai.bytes, sizeof(ai));
 699                 hdmi_start_infoframe_trans(codec, pin_nid);
 700         }
 701 }
 702
 703 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 704                                        struct hdmi_spec_per_pin *per_pin,
 705                                        bool non_pcm)
 706 {
 707         struct hdmi_spec *spec = codec->spec;
 708         struct hdac_chmap *chmap = &spec->chmap;
 709         hda_nid_t pin_nid = per_pin->pin_nid;
 710         int dev_id = per_pin->dev_id;
 711         int channels = per_pin->channels;
 712         int active_channels;
 713         struct hdmi_eld *eld;
 714         int ca;
 715
 716         if (!channels)
 717                 return;
 718
 719         snd_hda_set_dev_select(codec, pin_nid, dev_id);
 720
 721         /* some HW (e.g. HSW+) needs reprogramming the amp at each time */
 722         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 723                 snd_hda_codec_write(codec, pin_nid, 0,
 724                                             AC_VERB_SET_AMP_GAIN_MUTE,
 725                                             AMP_OUT_UNMUTE);
 726
 727         eld = &per_pin->sink_eld;
 728
 729         ca = snd_hdac_channel_allocation(&codec->core,
 730                         eld->info.spk_alloc, channels,
 731                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 732
 733         active_channels = snd_hdac_get_active_channels(ca);
 734
 735         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 736                                                 active_channels);
 737
 738         /*
 739          * always configure channel mapping, it may have been changed by the
 740          * user in the meantime
 741          */
 742         snd_hdac_setup_channel_mapping(&spec->chmap,
 743                                 pin_nid, non_pcm, ca, channels,
 744                                 per_pin->chmap, per_pin->chmap_set);
 745
 746         spec->ops.pin_setup_infoframe(codec, pin_nid, dev_id,
 747                                       ca, active_channels, eld->info.conn_type);
 748
 749         per_pin->non_pcm = non_pcm;
 750 }
 751
 752 /*
 753  * Unsolicited events
 754  */
 755
 756 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 757
 758 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid,
 759                                       int dev_id)
 760 {
 761         struct hdmi_spec *spec = codec->spec;
 762         int pin_idx = pin_id_to_pin_index(codec, nid, dev_id);
 763
 764         if (pin_idx < 0)
 765                 return;
 766         mutex_lock(&spec->pcm_lock);
 767         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 768                 snd_hda_jack_report_sync(codec);
 769         mutex_unlock(&spec->pcm_lock);
 770 }
 771
 772 static void jack_callback(struct hda_codec *codec,
 773                           struct hda_jack_callback *jack)
 774 {
 775         /* stop polling when notification is enabled */
 776         if (codec_has_acomp(codec))
 777                 return;
 778
 779         check_presence_and_report(codec, jack->nid, jack->dev_id);
 780 }
 781
 782 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 783 {
 784         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 785         struct hda_jack_tbl *jack;
 786
 787         if (codec->dp_mst) {
 788                 int dev_entry =
 789                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 790
 791                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 792         } else {
 793                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 794         }
 795         if (!jack)
 796                 return;
 797         jack->jack_dirty = 1;
 798
 799         codec_dbg(codec,
 800                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 801                 codec->addr, jack->nid, jack->dev_id, !!(res & AC_UNSOL_RES_IA),
 802                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 803
 804         check_presence_and_report(codec, jack->nid, jack->dev_id);
 805 }
 806
 807 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 808 {
 809         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 810         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 811         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 812         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 813
 814         codec_info(codec,
 815                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 816                 codec->addr,
 817                 tag,
 818                 subtag,
 819                 cp_state,
 820                 cp_ready);
 821
 822         /* TODO */
 823         if (cp_state) {
 824                 ;
 825         }
 826         if (cp_ready) {
 827                 ;
 828         }
 829 }
 830
 831
 832 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 833 {
 834         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 835         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 836         struct hda_jack_tbl *jack;
 837
 838         if (codec_has_acomp(codec))
 839                 return;
 840
 841         if (codec->dp_mst) {
 842                 int dev_entry =
 843                         (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 844
 845                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, dev_entry);
 846         } else {
 847                 jack = snd_hda_jack_tbl_get_from_tag(codec, tag, 0);
 848         }
 849
 850         if (!jack) {
 851                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 852                 return;
 853         }
 854
 855         if (subtag == 0)
 856                 hdmi_intrinsic_event(codec, res);
 857         else
 858                 hdmi_non_intrinsic_event(codec, res);
 859 }
 860
 861 static void haswell_verify_D0(struct hda_codec *codec,
 862                 hda_nid_t cvt_nid, hda_nid_t nid)
 863 {
 864         int pwr;
 865
 866         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 867          * thus pins could only choose converter 0 for use. Make sure the
 868          * converters are in correct power state */
 869         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 870                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 871
 872         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 873                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 874                                     AC_PWRST_D0);
 875                 msleep(40);
 876                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 877                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 878                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 879         }
 880 }
 881
 882 /*
 883  * Callbacks
 884  */
 885
 886 /* HBR should be Non-PCM, 8 channels */
 887 #define is_hbr_format(format) \
 888         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 889
 890 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 891                               int dev_id, bool hbr)
 892 {
 893         int pinctl, new_pinctl;
 894
 895         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 896                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
 897                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 898                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 899
 900                 if (pinctl < 0)
 901                         return hbr ? -EINVAL : 0;
 902
 903                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 904                 if (hbr)
 905                         new_pinctl |= AC_PINCTL_EPT_HBR;
 906                 else
 907                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 908
 909                 codec_dbg(codec,
 910                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 911                             pin_nid,
 912                             pinctl == new_pinctl ? "" : "new-",
 913                             new_pinctl);
 914
 915                 if (pinctl != new_pinctl)
 916                         snd_hda_codec_write(codec, pin_nid, 0,
 917                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 918                                             new_pinctl);
 919         } else if (hbr)
 920                 return -EINVAL;
 921
 922         return 0;
 923 }
 924
 925 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 926                               hda_nid_t pin_nid, int dev_id,
 927                               u32 stream_tag, int format)
 928 {
 929         struct hdmi_spec *spec = codec->spec;
 930         unsigned int param;
 931         int err;
 932
 933         err = spec->ops.pin_hbr_setup(codec, pin_nid, dev_id,
 934                                       is_hbr_format(format));
 935
 936         if (err) {
 937                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 938                 return err;
 939         }
 940
 941         if (spec->intel_hsw_fixup) {
 942
 943                 /*
 944                  * on recent platforms IEC Coding Type is required for HBR
 945                  * support, read current Digital Converter settings and set
 946                  * ICT bitfield if needed.
 947                  */
 948                 param = snd_hda_codec_read(codec, cvt_nid, 0,
 949                                            AC_VERB_GET_DIGI_CONVERT_1, 0);
 950
 951                 param = (param >> 16) & ~(AC_DIG3_ICT);
 952
 953                 /* on recent platforms ICT mode is required for HBR support */
 954                 if (is_hbr_format(format))
 955                         param |= 0x1;
 956
 957                 snd_hda_codec_write(codec, cvt_nid, 0,
 958                                     AC_VERB_SET_DIGI_CONVERT_3, param);
 959         }
 960
 961         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 962         return 0;
 963 }
 964
 965 /* Try to find an available converter
 966  * If pin_idx is less then zero, just try to find an available converter.
 967  * Otherwise, try to find an available converter and get the cvt mux index
 968  * of the pin.
 969  */
 970 static int hdmi_choose_cvt(struct hda_codec *codec,
 971                            int pin_idx, int *cvt_id)
 972 {
 973         struct hdmi_spec *spec = codec->spec;
 974         struct hdmi_spec_per_pin *per_pin;
 975         struct hdmi_spec_per_cvt *per_cvt = NULL;
 976         int cvt_idx, mux_idx = 0;
 977
 978         /* pin_idx < 0 means no pin will be bound to the converter */
 979         if (pin_idx < 0)
 980                 per_pin = NULL;
 981         else
 982                 per_pin = get_pin(spec, pin_idx);
 983
 984         /* Dynamically assign converter to stream */
 985         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 986                 per_cvt = get_cvt(spec, cvt_idx);
 987
 988                 /* Must not already be assigned */
 989                 if (per_cvt->assigned)
 990                         continue;
 991                 if (per_pin == NULL)
 992                         break;
 993                 /* Must be in pin's mux's list of converters */
 994                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 995                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 996                                 break;
 997                 /* Not in mux list */
 998                 if (mux_idx == per_pin->num_mux_nids)
 999                         continue;
1000                 break;
1001         }
1002
1003         /* No free converters */
1004         if (cvt_idx == spec->num_cvts)
1005                 return -EBUSY;
1006
1007         if (per_pin != NULL)
1008                 per_pin->mux_idx = mux_idx;
1009
1010         if (cvt_id)
1011                 *cvt_id = cvt_idx;
1012
1013         return 0;
1014 }
1015
1016 /* Assure the pin select the right convetor */
1017 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
1018                         struct hdmi_spec_per_pin *per_pin)
1019 {
1020         hda_nid_t pin_nid = per_pin->pin_nid;
1021         int mux_idx, curr;
1022
1023         mux_idx = per_pin->mux_idx;
1024         curr = snd_hda_codec_read(codec, pin_nid, 0,
1025                                           AC_VERB_GET_CONNECT_SEL, 0);
1026         if (curr != mux_idx)
1027                 snd_hda_codec_write_cache(codec, pin_nid, 0,
1028                                             AC_VERB_SET_CONNECT_SEL,
1029                                             mux_idx);
1030 }
1031
1032 /* get the mux index for the converter of the pins
1033  * converter's mux index is the same for all pins on Intel platform
1034  */
1035 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
1036                         hda_nid_t cvt_nid)
1037 {
1038         int i;
1039
1040         for (i = 0; i < spec->num_cvts; i++)
1041                 if (spec->cvt_nids[i] == cvt_nid)
1042                         return i;
1043         return -EINVAL;
1044 }
1045
1046 /* Intel HDMI workaround to fix audio routing issue:
1047  * For some Intel display codecs, pins share the same connection list.
1048  * So a conveter can be selected by multiple pins and playback on any of these
1049  * pins will generate sound on the external display, because audio flows from
1050  * the same converter to the display pipeline. Also muting one pin may make
1051  * other pins have no sound output.
1052  * So this function assures that an assigned converter for a pin is not selected
1053  * by any other pins.
1054  */
1055 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1056                                          hda_nid_t pin_nid,
1057                                          int dev_id, int mux_idx)
1058 {
1059         struct hdmi_spec *spec = codec->spec;
1060         hda_nid_t nid;
1061         int cvt_idx, curr;
1062         struct hdmi_spec_per_cvt *per_cvt;
1063         struct hdmi_spec_per_pin *per_pin;
1064         int pin_idx;
1065
1066         /* configure the pins connections */
1067         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1068                 int dev_id_saved;
1069                 int dev_num;
1070
1071                 per_pin = get_pin(spec, pin_idx);
1072                 /*
1073                  * pin not connected to monitor
1074                  * no need to operate on it
1075                  */
1076                 if (!per_pin->pcm)
1077                         continue;
1078
1079                 if ((per_pin->pin_nid == pin_nid) &&
1080                         (per_pin->dev_id == dev_id))
1081                         continue;
1082
1083                 /*
1084                  * if per_pin->dev_id >= dev_num,
1085                  * snd_hda_get_dev_select() will fail,
1086                  * and the following operation is unpredictable.
1087                  * So skip this situation.
1088                  */
1089                 dev_num = snd_hda_get_num_devices(codec, per_pin->pin_nid) + 1;
1090                 if (per_pin->dev_id >= dev_num)
1091                         continue;
1092
1093                 nid = per_pin->pin_nid;
1094
1095                 /*
1096                  * Calling this function should not impact
1097                  * on the device entry selection
1098                  * So let's save the dev id for each pin,
1099                  * and restore it when return
1100                  */
1101                 dev_id_saved = snd_hda_get_dev_select(codec, nid);
1102                 snd_hda_set_dev_select(codec, nid, per_pin->dev_id);
1103                 curr = snd_hda_codec_read(codec, nid, 0,
1104                                           AC_VERB_GET_CONNECT_SEL, 0);
1105                 if (curr != mux_idx) {
1106                         snd_hda_set_dev_select(codec, nid, dev_id_saved);
1107                         continue;
1108                 }
1109
1110
1111                 /* choose an unassigned converter. The conveters in the
1112                  * connection list are in the same order as in the codec.
1113                  */
1114                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1115                         per_cvt = get_cvt(spec, cvt_idx);
1116                         if (!per_cvt->assigned) {
1117                                 codec_dbg(codec,
1118                                           "choose cvt %d for pin nid %d\n",
1119                                         cvt_idx, nid);
1120                                 snd_hda_codec_write_cache(codec, nid, 0,
1121                                             AC_VERB_SET_CONNECT_SEL,
1122                                             cvt_idx);
1123                                 break;
1124                         }
1125                 }
1126                 snd_hda_set_dev_select(codec, nid, dev_id_saved);
1127         }
1128 }
1129
1130 /* A wrapper of intel_not_share_asigned_cvt() */
1131 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1132                         hda_nid_t pin_nid, int dev_id, hda_nid_t cvt_nid)
1133 {
1134         int mux_idx;
1135         struct hdmi_spec *spec = codec->spec;
1136
1137         /* On Intel platform, the mapping of converter nid to
1138          * mux index of the pins are always the same.
1139          * The pin nid may be 0, this means all pins will not
1140          * share the converter.
1141          */
1142         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1143         if (mux_idx >= 0)
1144                 intel_not_share_assigned_cvt(codec, pin_nid, dev_id, mux_idx);
1145 }
1146
1147 /* skeleton caller of pin_cvt_fixup ops */
1148 static void pin_cvt_fixup(struct hda_codec *codec,
1149                           struct hdmi_spec_per_pin *per_pin,
1150                           hda_nid_t cvt_nid)
1151 {
1152         struct hdmi_spec *spec = codec->spec;
1153
1154         if (spec->ops.pin_cvt_fixup)
1155                 spec->ops.pin_cvt_fixup(codec, per_pin, cvt_nid);
1156 }
1157
1158 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1159  * in dyn_pcm_assign mode.
1160  */
1161 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1162                          struct hda_codec *codec,
1163                          struct snd_pcm_substream *substream)
1164 {
1165         struct hdmi_spec *spec = codec->spec;
1166         struct snd_pcm_runtime *runtime = substream->runtime;
1167         int cvt_idx, pcm_idx;
1168         struct hdmi_spec_per_cvt *per_cvt = NULL;
1169         int err;
1170
1171         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1172         if (pcm_idx < 0)
1173                 return -EINVAL;
1174
1175         err = hdmi_choose_cvt(codec, -1, &cvt_idx);
1176         if (err)
1177                 return err;
1178
1179         per_cvt = get_cvt(spec, cvt_idx);
1180         per_cvt->assigned = 1;
1181         hinfo->nid = per_cvt->cvt_nid;
1182
1183         pin_cvt_fixup(codec, NULL, per_cvt->cvt_nid);
1184
1185         set_bit(pcm_idx, &spec->pcm_in_use);
1186         /* todo: setup spdif ctls assign */
1187
1188         /* Initially set the converter's capabilities */
1189         hinfo->channels_min = per_cvt->channels_min;
1190         hinfo->channels_max = per_cvt->channels_max;
1191         hinfo->rates = per_cvt->rates;
1192         hinfo->formats = per_cvt->formats;
1193         hinfo->maxbps = per_cvt->maxbps;
1194
1195         /* Store the updated parameters */
1196         runtime->hw.channels_min = hinfo->channels_min;
1197         runtime->hw.channels_max = hinfo->channels_max;
1198         runtime->hw.formats = hinfo->formats;
1199         runtime->hw.rates = hinfo->rates;
1200
1201         snd_pcm_hw_constraint_step(substream->runtime, 0,
1202                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1203         return 0;
1204 }
1205
1206 /*
1207  * HDA PCM callbacks
1208  */
1209 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1210                          struct hda_codec *codec,
1211                          struct snd_pcm_substream *substream)
1212 {
1213         struct hdmi_spec *spec = codec->spec;
1214         struct snd_pcm_runtime *runtime = substream->runtime;
1215         int pin_idx, cvt_idx, pcm_idx;
1216         struct hdmi_spec_per_pin *per_pin;
1217         struct hdmi_eld *eld;
1218         struct hdmi_spec_per_cvt *per_cvt = NULL;
1219         int err;
1220
1221         /* Validate hinfo */
1222         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1223         if (pcm_idx < 0)
1224                 return -EINVAL;
1225
1226         mutex_lock(&spec->pcm_lock);
1227         pin_idx = hinfo_to_pin_index(codec, hinfo);
1228         if (!spec->dyn_pcm_assign) {
1229                 if (snd_BUG_ON(pin_idx < 0)) {
1230                         err = -EINVAL;
1231                         goto unlock;
1232                 }
1233         } else {
1234                 /* no pin is assigned to the PCM
1235                  * PA need pcm open successfully when probe
1236                  */
1237                 if (pin_idx < 0) {
1238                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1239                         goto unlock;
1240                 }
1241         }
1242
1243         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx);
1244         if (err < 0)
1245                 goto unlock;
1246
1247         per_cvt = get_cvt(spec, cvt_idx);
1248         /* Claim converter */
1249         per_cvt->assigned = 1;
1250
1251         set_bit(pcm_idx, &spec->pcm_in_use);
1252         per_pin = get_pin(spec, pin_idx);
1253         per_pin->cvt_nid = per_cvt->cvt_nid;
1254         hinfo->nid = per_cvt->cvt_nid;
1255
1256         /* flip stripe flag for the assigned stream if supported */
1257         if (get_wcaps(codec, per_cvt->cvt_nid) & AC_WCAP_STRIPE)
1258                 azx_stream(get_azx_dev(substream))->stripe = 1;
1259
1260         snd_hda_set_dev_select(codec, per_pin->pin_nid, per_pin->dev_id);
1261         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1262                             AC_VERB_SET_CONNECT_SEL,
1263                             per_pin->mux_idx);
1264
1265         /* configure unused pins to choose other converters */
1266         pin_cvt_fixup(codec, per_pin, 0);
1267
1268         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1269
1270         /* Initially set the converter's capabilities */
1271         hinfo->channels_min = per_cvt->channels_min;
1272         hinfo->channels_max = per_cvt->channels_max;
1273         hinfo->rates = per_cvt->rates;
1274         hinfo->formats = per_cvt->formats;
1275         hinfo->maxbps = per_cvt->maxbps;
1276
1277         eld = &per_pin->sink_eld;
1278         /* Restrict capabilities by ELD if this isn't disabled */
1279         if (!static_hdmi_pcm && eld->eld_valid) {
1280                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1281                 if (hinfo->channels_min > hinfo->channels_max ||
1282                     !hinfo->rates || !hinfo->formats) {
1283                         per_cvt->assigned = 0;
1284                         hinfo->nid = 0;
1285                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1286                         err = -ENODEV;
1287                         goto unlock;
1288                 }
1289         }
1290
1291         /* Store the updated parameters */
1292         runtime->hw.channels_min = hinfo->channels_min;
1293         runtime->hw.channels_max = hinfo->channels_max;
1294         runtime->hw.formats = hinfo->formats;
1295         runtime->hw.rates = hinfo->rates;
1296
1297         snd_pcm_hw_constraint_step(substream->runtime, 0,
1298                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1299  unlock:
1300         mutex_unlock(&spec->pcm_lock);
1301         return err;
1302 }
1303
1304 /*
1305  * HDA/HDMI auto parsing
1306  */
1307 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1308 {
1309         struct hdmi_spec *spec = codec->spec;
1310         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1311         hda_nid_t pin_nid = per_pin->pin_nid;
1312         int dev_id = per_pin->dev_id;
1313         int conns;
1314
1315         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1316                 codec_warn(codec,
1317                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1318                            pin_nid, get_wcaps(codec, pin_nid));
1319                 return -EINVAL;
1320         }
1321
1322         snd_hda_set_dev_select(codec, pin_nid, dev_id);
1323
1324         if (spec->intel_hsw_fixup) {
1325                 conns = spec->num_cvts;
1326                 memcpy(per_pin->mux_nids, spec->cvt_nids,
1327                        sizeof(hda_nid_t) * conns);
1328         } else {
1329                 conns = snd_hda_get_raw_connections(codec, pin_nid,
1330                                                     per_pin->mux_nids,
1331                                                     HDA_MAX_CONNECTIONS);
1332         }
1333
1334         /* all the device entries on the same pin have the same conn list */
1335         per_pin->num_mux_nids = conns;
1336
1337         return 0;
1338 }
1339
1340 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1341                               struct hdmi_spec_per_pin *per_pin)
1342 {
1343         int i;
1344
1345         /*
1346          * generic_hdmi_build_pcms() may allocate extra PCMs on some
1347          * platforms (with maximum of 'num_nids + dev_num - 1')
1348          *
1349          * The per_pin of pin_nid_idx=n and dev_id=m prefers to get pcm-n
1350          * if m==0. This guarantees that dynamic pcm assignments are compatible
1351          * with the legacy static per_pin-pcm assignment that existed in the
1352          * days before DP-MST.
1353          *
1354          * Intel DP-MST prefers this legacy behavior for compatibility, too.
1355          *
1356          * per_pin of m!=0 prefers to get pcm=(num_nids + (m - 1)).
1357          */
1358
1359         if (per_pin->dev_id == 0 || spec->intel_hsw_fixup) {
1360                 if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1361                         return per_pin->pin_nid_idx;
1362         } else {
1363                 i = spec->num_nids + (per_pin->dev_id - 1);
1364                 if (i < spec->pcm_used && !(test_bit(i, &spec->pcm_bitmap)))
1365                         return i;
1366         }
1367
1368         /* have a second try; check the area over num_nids */
1369         for (i = spec->num_nids; i < spec->pcm_used; i++) {
1370                 if (!test_bit(i, &spec->pcm_bitmap))
1371                         return i;
1372         }
1373
1374         /* the last try; check the empty slots in pins */
1375         for (i = 0; i < spec->num_nids; i++) {
1376                 if (!test_bit(i, &spec->pcm_bitmap))
1377                         return i;
1378         }
1379         return -EBUSY;
1380 }
1381
1382 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1383                                 struct hdmi_spec_per_pin *per_pin)
1384 {
1385         int idx;
1386
1387         /* pcm already be attached to the pin */
1388         if (per_pin->pcm)
1389                 return;
1390         idx = hdmi_find_pcm_slot(spec, per_pin);
1391         if (idx == -EBUSY)
1392                 return;
1393         per_pin->pcm_idx = idx;
1394         per_pin->pcm = get_hdmi_pcm(spec, idx);
1395         set_bit(idx, &spec->pcm_bitmap);
1396 }
1397
1398 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1399                                 struct hdmi_spec_per_pin *per_pin)
1400 {
1401         int idx;
1402
1403         /* pcm already be detached from the pin */
1404         if (!per_pin->pcm)
1405                 return;
1406         idx = per_pin->pcm_idx;
1407         per_pin->pcm_idx = -1;
1408         per_pin->pcm = NULL;
1409         if (idx >= 0 && idx < spec->pcm_used)
1410                 clear_bit(idx, &spec->pcm_bitmap);
1411 }
1412
1413 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1414                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1415 {
1416         int mux_idx;
1417
1418         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1419                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1420                         break;
1421         return mux_idx;
1422 }
1423
1424 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1425
1426 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1427                            struct hdmi_spec_per_pin *per_pin)
1428 {
1429         struct hda_codec *codec = per_pin->codec;
1430         struct hda_pcm *pcm;
1431         struct hda_pcm_stream *hinfo;
1432         struct snd_pcm_substream *substream;
1433         int mux_idx;
1434         bool non_pcm;
1435
1436         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1437                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1438         else
1439                 return;
1440         if (!pcm->pcm)
1441                 return;
1442         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1443                 return;
1444
1445         /* hdmi audio only uses playback and one substream */
1446         hinfo = pcm->stream;
1447         substream = pcm->pcm->streams[0].substream;
1448
1449         per_pin->cvt_nid = hinfo->nid;
1450
1451         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1452         if (mux_idx < per_pin->num_mux_nids) {
1453                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1454                                    per_pin->dev_id);
1455                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1456                                 AC_VERB_SET_CONNECT_SEL,
1457                                 mux_idx);
1458         }
1459         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1460
1461         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1462         if (substream->runtime)
1463                 per_pin->channels = substream->runtime->channels;
1464         per_pin->setup = true;
1465         per_pin->mux_idx = mux_idx;
1466
1467         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1468 }
1469
1470 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1471                            struct hdmi_spec_per_pin *per_pin)
1472 {
1473         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1474                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1475
1476         per_pin->chmap_set = false;
1477         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1478
1479         per_pin->setup = false;
1480         per_pin->channels = 0;
1481 }
1482
1483 /* update per_pin ELD from the given new ELD;
1484  * setup info frame and notification accordingly
1485  */
1486 static bool update_eld(struct hda_codec *codec,
1487                        struct hdmi_spec_per_pin *per_pin,
1488                        struct hdmi_eld *eld)
1489 {
1490         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1491         struct hdmi_spec *spec = codec->spec;
1492         bool old_eld_valid = pin_eld->eld_valid;
1493         bool eld_changed;
1494         int pcm_idx;
1495
1496         /* for monitor disconnection, save pcm_idx firstly */
1497         pcm_idx = per_pin->pcm_idx;
1498         if (spec->dyn_pcm_assign) {
1499                 if (eld->eld_valid) {
1500                         hdmi_attach_hda_pcm(spec, per_pin);
1501                         hdmi_pcm_setup_pin(spec, per_pin);
1502                 } else {
1503                         hdmi_pcm_reset_pin(spec, per_pin);
1504                         hdmi_detach_hda_pcm(spec, per_pin);
1505                 }
1506         }
1507         /* if pcm_idx == -1, it means this is in monitor connection event
1508          * we can get the correct pcm_idx now.
1509          */
1510         if (pcm_idx == -1)
1511                 pcm_idx = per_pin->pcm_idx;
1512
1513         if (eld->eld_valid)
1514                 snd_hdmi_show_eld(codec, &eld->info);
1515
1516         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1517         eld_changed |= (pin_eld->monitor_present != eld->monitor_present);
1518         if (!eld_changed && eld->eld_valid && pin_eld->eld_valid)
1519                 if (pin_eld->eld_size != eld->eld_size ||
1520                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1521                            eld->eld_size) != 0)
1522                         eld_changed = true;
1523
1524         if (eld_changed) {
1525                 pin_eld->monitor_present = eld->monitor_present;
1526                 pin_eld->eld_valid = eld->eld_valid;
1527                 pin_eld->eld_size = eld->eld_size;
1528                 if (eld->eld_valid)
1529                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1530                                eld->eld_size);
1531                 pin_eld->info = eld->info;
1532         }
1533
1534         /*
1535          * Re-setup pin and infoframe. This is needed e.g. when
1536          * - sink is first plugged-in
1537          * - transcoder can change during stream playback on Haswell
1538          *   and this can make HW reset converter selection on a pin.
1539          */
1540         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1541                 pin_cvt_fixup(codec, per_pin, 0);
1542                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1543         }
1544
1545         if (eld_changed && pcm_idx >= 0)
1546                 snd_ctl_notify(codec->card,
1547                                SNDRV_CTL_EVENT_MASK_VALUE |
1548                                SNDRV_CTL_EVENT_MASK_INFO,
1549                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1550         return eld_changed;
1551 }
1552
1553 /* update ELD and jack state via HD-audio verbs */
1554 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1555                                          int repoll)
1556 {
1557         struct hda_jack_tbl *jack;
1558         struct hda_codec *codec = per_pin->codec;
1559         struct hdmi_spec *spec = codec->spec;
1560         struct hdmi_eld *eld = &spec->temp_eld;
1561         hda_nid_t pin_nid = per_pin->pin_nid;
1562         int dev_id = per_pin->dev_id;
1563         /*
1564          * Always execute a GetPinSense verb here, even when called from
1565          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1566          * response's PD bit is not the real PD value, but indicates that
1567          * the real PD value changed. An older version of the HD-audio
1568          * specification worked this way. Hence, we just ignore the data in
1569          * the unsolicited response to avoid custom WARs.
1570          */
1571         int present;
1572         bool ret;
1573         bool do_repoll = false;
1574
1575         present = snd_hda_jack_pin_sense(codec, pin_nid, dev_id);
1576
1577         mutex_lock(&per_pin->lock);
1578         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1579         if (eld->monitor_present)
1580                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1581         else
1582                 eld->eld_valid = false;
1583
1584         codec_dbg(codec,
1585                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1586                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1587
1588         if (eld->eld_valid) {
1589                 if (spec->ops.pin_get_eld(codec, pin_nid, dev_id,
1590                                           eld->eld_buffer, &eld->eld_size) < 0)
1591                         eld->eld_valid = false;
1592                 else {
1593                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1594                                                     eld->eld_size) < 0)
1595                                 eld->eld_valid = false;
1596                 }
1597                 if (!eld->eld_valid && repoll)
1598                         do_repoll = true;
1599         }
1600
1601         if (do_repoll)
1602                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1603         else
1604                 update_eld(codec, per_pin, eld);
1605
1606         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1607
1608         jack = snd_hda_jack_tbl_get_mst(codec, pin_nid, per_pin->dev_id);
1609         if (jack) {
1610                 jack->block_report = !ret;
1611                 jack->pin_sense = (eld->monitor_present && eld->eld_valid) ?
1612                         AC_PINSENSE_PRESENCE : 0;
1613         }
1614         mutex_unlock(&per_pin->lock);
1615         return ret;
1616 }
1617
1618 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1619                                  struct hdmi_spec_per_pin *per_pin)
1620 {
1621         struct hdmi_spec *spec = codec->spec;
1622         struct snd_jack *jack = NULL;
1623         struct hda_jack_tbl *jack_tbl;
1624
1625         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1626          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1627          * NULL even after snd_hda_jack_tbl_clear() is called to
1628          * free snd_jack. This may cause access invalid memory
1629          * when calling snd_jack_report
1630          */
1631         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1632                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1633         else if (!spec->dyn_pcm_assign) {
1634                 /*
1635                  * jack tbl doesn't support DP MST
1636                  * DP MST will use dyn_pcm_assign,
1637                  * so DP MST will never come here
1638                  */
1639                 jack_tbl = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1640                                                     per_pin->dev_id);
1641                 if (jack_tbl)
1642                         jack = jack_tbl->jack;
1643         }
1644         return jack;
1645 }
1646
1647 /* update ELD and jack state via audio component */
1648 static void sync_eld_via_acomp(struct hda_codec *codec,
1649                                struct hdmi_spec_per_pin *per_pin)
1650 {
1651         struct hdmi_spec *spec = codec->spec;
1652         struct hdmi_eld *eld = &spec->temp_eld;
1653         struct snd_jack *jack = NULL;
1654         bool changed;
1655         int size;
1656
1657         mutex_lock(&per_pin->lock);
1658         eld->monitor_present = false;
1659         size = snd_hdac_acomp_get_eld(&codec->core, per_pin->pin_nid,
1660                                       per_pin->dev_id, &eld->monitor_present,
1661                                       eld->eld_buffer, ELD_MAX_SIZE);
1662         if (size > 0) {
1663                 size = min(size, ELD_MAX_SIZE);
1664                 if (snd_hdmi_parse_eld(codec, &eld->info,
1665                                        eld->eld_buffer, size) < 0)
1666                         size = -EINVAL;
1667         }
1668
1669         if (size > 0) {
1670                 eld->eld_valid = true;
1671                 eld->eld_size = size;
1672         } else {
1673                 eld->eld_valid = false;
1674                 eld->eld_size = 0;
1675         }
1676
1677         /* pcm_idx >=0 before update_eld() means it is in monitor
1678          * disconnected event. Jack must be fetched before update_eld()
1679          */
1680         jack = pin_idx_to_jack(codec, per_pin);
1681         changed = update_eld(codec, per_pin, eld);
1682         if (jack == NULL)
1683                 jack = pin_idx_to_jack(codec, per_pin);
1684         if (changed && jack)
1685                 snd_jack_report(jack,
1686                                 (eld->monitor_present && eld->eld_valid) ?
1687                                 SND_JACK_AVOUT : 0);
1688         mutex_unlock(&per_pin->lock);
1689 }
1690
1691 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1692 {
1693         struct hda_codec *codec = per_pin->codec;
1694         int ret;
1695
1696         /* no temporary power up/down needed for component notifier */
1697         if (!codec_has_acomp(codec)) {
1698                 ret = snd_hda_power_up_pm(codec);
1699                 if (ret < 0 && pm_runtime_suspended(hda_codec_dev(codec))) {
1700                         snd_hda_power_down_pm(codec);
1701                         return false;
1702                 }
1703                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1704                 snd_hda_power_down_pm(codec);
1705         } else {
1706                 sync_eld_via_acomp(codec, per_pin);
1707                 ret = false; /* don't call snd_hda_jack_report_sync() */
1708         }
1709
1710         return ret;
1711 }
1712
1713 static void hdmi_repoll_eld(struct work_struct *work)
1714 {
1715         struct hdmi_spec_per_pin *per_pin =
1716         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1717         struct hda_codec *codec = per_pin->codec;
1718         struct hdmi_spec *spec = codec->spec;
1719         struct hda_jack_tbl *jack;
1720
1721         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
1722                                         per_pin->dev_id);
1723         if (jack)
1724                 jack->jack_dirty = 1;
1725
1726         if (per_pin->repoll_count++ > 6)
1727                 per_pin->repoll_count = 0;
1728
1729         mutex_lock(&spec->pcm_lock);
1730         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1731                 snd_hda_jack_report_sync(per_pin->codec);
1732         mutex_unlock(&spec->pcm_lock);
1733 }
1734
1735 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1736 {
1737         struct hdmi_spec *spec = codec->spec;
1738         unsigned int caps, config;
1739         int pin_idx;
1740         struct hdmi_spec_per_pin *per_pin;
1741         int err;
1742         int dev_num, i;
1743
1744         caps = snd_hda_query_pin_caps(codec, pin_nid);
1745         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1746                 return 0;
1747
1748         /*
1749          * For DP MST audio, Configuration Default is the same for
1750          * all device entries on the same pin
1751          */
1752         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1753         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1754                 return 0;
1755
1756         /*
1757          * To simplify the implementation, malloc all
1758          * the virtual pins in the initialization statically
1759          */
1760         if (spec->intel_hsw_fixup) {
1761                 /*
1762                  * On Intel platforms, device entries number is
1763                  * changed dynamically. If there is a DP MST
1764                  * hub connected, the device entries number is 3.
1765                  * Otherwise, it is 1.
1766                  * Here we manually set dev_num to 3, so that
1767                  * we can initialize all the device entries when
1768                  * bootup statically.
1769                  */
1770                 dev_num = 3;
1771                 spec->dev_num = 3;
1772         } else if (spec->dyn_pcm_assign && codec->dp_mst) {
1773                 dev_num = snd_hda_get_num_devices(codec, pin_nid) + 1;
1774                 /*
1775                  * spec->dev_num is the maxinum number of device entries
1776                  * among all the pins
1777                  */
1778                 spec->dev_num = (spec->dev_num > dev_num) ?
1779                         spec->dev_num : dev_num;
1780         } else {
1781                 /*
1782                  * If the platform doesn't support DP MST,
1783                  * manually set dev_num to 1. This means
1784                  * the pin has only one device entry.
1785                  */
1786                 dev_num = 1;
1787                 spec->dev_num = 1;
1788         }
1789
1790         for (i = 0; i < dev_num; i++) {
1791                 pin_idx = spec->num_pins;
1792                 per_pin = snd_array_new(&spec->pins);
1793
1794                 if (!per_pin)
1795                         return -ENOMEM;
1796
1797                 if (spec->dyn_pcm_assign) {
1798                         per_pin->pcm = NULL;
1799                         per_pin->pcm_idx = -1;
1800                 } else {
1801                         per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1802                         per_pin->pcm_idx = pin_idx;
1803                 }
1804                 per_pin->pin_nid = pin_nid;
1805                 per_pin->pin_nid_idx = spec->num_nids;
1806                 per_pin->dev_id = i;
1807                 per_pin->non_pcm = false;
1808                 snd_hda_set_dev_select(codec, pin_nid, i);
1809                 err = hdmi_read_pin_conn(codec, pin_idx);
1810                 if (err < 0)
1811                         return err;
1812                 spec->num_pins++;
1813         }
1814         spec->num_nids++;
1815
1816         return 0;
1817 }
1818
1819 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1820 {
1821         struct hdmi_spec *spec = codec->spec;
1822         struct hdmi_spec_per_cvt *per_cvt;
1823         unsigned int chans;
1824         int err;
1825
1826         chans = get_wcaps(codec, cvt_nid);
1827         chans = get_wcaps_channels(chans);
1828
1829         per_cvt = snd_array_new(&spec->cvts);
1830         if (!per_cvt)
1831                 return -ENOMEM;
1832
1833         per_cvt->cvt_nid = cvt_nid;
1834         per_cvt->channels_min = 2;
1835         if (chans <= 16) {
1836                 per_cvt->channels_max = chans;
1837                 if (chans > spec->chmap.channels_max)
1838                         spec->chmap.channels_max = chans;
1839         }
1840
1841         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1842                                           &per_cvt->rates,
1843                                           &per_cvt->formats,
1844                                           &per_cvt->maxbps);
1845         if (err < 0)
1846                 return err;
1847
1848         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1849                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1850         spec->num_cvts++;
1851
1852         return 0;
1853 }
1854
1855 static int hdmi_parse_codec(struct hda_codec *codec)
1856 {
1857         hda_nid_t nid;
1858         int i, nodes;
1859
1860         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1861         if (!nid || nodes < 0) {
1862                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1863                 return -EINVAL;
1864         }
1865
1866         for (i = 0; i < nodes; i++, nid++) {
1867                 unsigned int caps;
1868                 unsigned int type;
1869
1870                 caps = get_wcaps(codec, nid);
1871                 type = get_wcaps_type(caps);
1872
1873                 if (!(caps & AC_WCAP_DIGITAL))
1874                         continue;
1875
1876                 switch (type) {
1877                 case AC_WID_AUD_OUT:
1878                         hdmi_add_cvt(codec, nid);
1879                         break;
1880                 case AC_WID_PIN:
1881                         hdmi_add_pin(codec, nid);
1882                         break;
1883                 }
1884         }
1885
1886         return 0;
1887 }
1888
1889 /*
1890  */
1891 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1892 {
1893         struct hda_spdif_out *spdif;
1894         bool non_pcm;
1895
1896         mutex_lock(&codec->spdif_mutex);
1897         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1898         /* Add sanity check to pass klockwork check.
1899          * This should never happen.
1900          */
1901         if (WARN_ON(spdif == NULL))
1902                 return true;
1903         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1904         mutex_unlock(&codec->spdif_mutex);
1905         return non_pcm;
1906 }
1907
1908 /*
1909  * HDMI callbacks
1910  */
1911
1912 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1913                                            struct hda_codec *codec,
1914                                            unsigned int stream_tag,
1915                                            unsigned int format,
1916                                            struct snd_pcm_substream *substream)
1917 {
1918         hda_nid_t cvt_nid = hinfo->nid;
1919         struct hdmi_spec *spec = codec->spec;
1920         int pin_idx;
1921         struct hdmi_spec_per_pin *per_pin;
1922         struct snd_pcm_runtime *runtime = substream->runtime;
1923         bool non_pcm;
1924         int pinctl, stripe;
1925         int err = 0;
1926
1927         mutex_lock(&spec->pcm_lock);
1928         pin_idx = hinfo_to_pin_index(codec, hinfo);
1929         if (spec->dyn_pcm_assign && pin_idx < 0) {
1930                 /* when dyn_pcm_assign and pcm is not bound to a pin
1931                  * skip pin setup and return 0 to make audio playback
1932                  * be ongoing
1933                  */
1934                 pin_cvt_fixup(codec, NULL, cvt_nid);
1935                 snd_hda_codec_setup_stream(codec, cvt_nid,
1936                                         stream_tag, 0, format);
1937                 goto unlock;
1938         }
1939
1940         if (snd_BUG_ON(pin_idx < 0)) {
1941                 err = -EINVAL;
1942                 goto unlock;
1943         }
1944         per_pin = get_pin(spec, pin_idx);
1945
1946         /* Verify pin:cvt selections to avoid silent audio after S3.
1947          * After S3, the audio driver restores pin:cvt selections
1948          * but this can happen before gfx is ready and such selection
1949          * is overlooked by HW. Thus multiple pins can share a same
1950          * default convertor and mute control will affect each other,
1951          * which can cause a resumed audio playback become silent
1952          * after S3.
1953          */
1954         pin_cvt_fixup(codec, per_pin, 0);
1955
1956         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1957         /* Todo: add DP1.2 MST audio support later */
1958         if (codec_has_acomp(codec))
1959                 snd_hdac_sync_audio_rate(&codec->core, per_pin->pin_nid,
1960                                          per_pin->dev_id, runtime->rate);
1961
1962         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1963         mutex_lock(&per_pin->lock);
1964         per_pin->channels = substream->runtime->channels;
1965         per_pin->setup = true;
1966
1967         if (get_wcaps(codec, cvt_nid) & AC_WCAP_STRIPE) {
1968                 stripe = snd_hdac_get_stream_stripe_ctl(&codec->bus->core,
1969                                                         substream);
1970                 snd_hda_codec_write(codec, cvt_nid, 0,
1971                                     AC_VERB_SET_STRIPE_CONTROL,
1972                                     stripe);
1973         }
1974
1975         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1976         mutex_unlock(&per_pin->lock);
1977         if (spec->dyn_pin_out) {
1978                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
1979                                        per_pin->dev_id);
1980                 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1981                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1982                 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1983                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1984                                     pinctl | PIN_OUT);
1985         }
1986
1987         /* snd_hda_set_dev_select() has been called before */
1988         err = spec->ops.setup_stream(codec, cvt_nid, per_pin->pin_nid,
1989                                      per_pin->dev_id, stream_tag, format);
1990  unlock:
1991         mutex_unlock(&spec->pcm_lock);
1992         return err;
1993 }
1994
1995 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1996                                              struct hda_codec *codec,
1997                                              struct snd_pcm_substream *substream)
1998 {
1999         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
2000         return 0;
2001 }
2002
2003 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
2004                           struct hda_codec *codec,
2005                           struct snd_pcm_substream *substream)
2006 {
2007         struct hdmi_spec *spec = codec->spec;
2008         int cvt_idx, pin_idx, pcm_idx;
2009         struct hdmi_spec_per_cvt *per_cvt;
2010         struct hdmi_spec_per_pin *per_pin;
2011         int pinctl;
2012         int err = 0;
2013
2014         if (hinfo->nid) {
2015                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
2016                 if (snd_BUG_ON(pcm_idx < 0))
2017                         return -EINVAL;
2018                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
2019                 if (snd_BUG_ON(cvt_idx < 0))
2020                         return -EINVAL;
2021                 per_cvt = get_cvt(spec, cvt_idx);
2022
2023                 snd_BUG_ON(!per_cvt->assigned);
2024                 per_cvt->assigned = 0;
2025                 hinfo->nid = 0;
2026
2027                 azx_stream(get_azx_dev(substream))->stripe = 0;
2028
2029                 mutex_lock(&spec->pcm_lock);
2030                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2031                 clear_bit(pcm_idx, &spec->pcm_in_use);
2032                 pin_idx = hinfo_to_pin_index(codec, hinfo);
2033                 if (spec->dyn_pcm_assign && pin_idx < 0)
2034                         goto unlock;
2035
2036                 if (snd_BUG_ON(pin_idx < 0)) {
2037                         err = -EINVAL;
2038                         goto unlock;
2039                 }
2040                 per_pin = get_pin(spec, pin_idx);
2041
2042                 if (spec->dyn_pin_out) {
2043                         snd_hda_set_dev_select(codec, per_pin->pin_nid,
2044                                                per_pin->dev_id);
2045                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
2046                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
2047                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
2048                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
2049                                             pinctl & ~PIN_OUT);
2050                 }
2051
2052                 mutex_lock(&per_pin->lock);
2053                 per_pin->chmap_set = false;
2054                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
2055
2056                 per_pin->setup = false;
2057                 per_pin->channels = 0;
2058                 mutex_unlock(&per_pin->lock);
2059         unlock:
2060                 mutex_unlock(&spec->pcm_lock);
2061         }
2062
2063         return err;
2064 }
2065
2066 static const struct hda_pcm_ops generic_ops = {
2067         .open = hdmi_pcm_open,
2068         .close = hdmi_pcm_close,
2069         .prepare = generic_hdmi_playback_pcm_prepare,
2070         .cleanup = generic_hdmi_playback_pcm_cleanup,
2071 };
2072
2073 static int hdmi_get_spk_alloc(struct hdac_device *hdac, int pcm_idx)
2074 {
2075         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2076         struct hdmi_spec *spec = codec->spec;
2077         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2078
2079         if (!per_pin)
2080                 return 0;
2081
2082         return per_pin->sink_eld.info.spk_alloc;
2083 }
2084
2085 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
2086                                         unsigned char *chmap)
2087 {
2088         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2089         struct hdmi_spec *spec = codec->spec;
2090         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2091
2092         /* chmap is already set to 0 in caller */
2093         if (!per_pin)
2094                 return;
2095
2096         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
2097 }
2098
2099 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
2100                                 unsigned char *chmap, int prepared)
2101 {
2102         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2103         struct hdmi_spec *spec = codec->spec;
2104         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2105
2106         if (!per_pin)
2107                 return;
2108         mutex_lock(&per_pin->lock);
2109         per_pin->chmap_set = true;
2110         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
2111         if (prepared)
2112                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
2113         mutex_unlock(&per_pin->lock);
2114 }
2115
2116 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
2117 {
2118         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
2119         struct hdmi_spec *spec = codec->spec;
2120         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
2121
2122         return per_pin ? true:false;
2123 }
2124
2125 static int generic_hdmi_build_pcms(struct hda_codec *codec)
2126 {
2127         struct hdmi_spec *spec = codec->spec;
2128         int idx, pcm_num;
2129
2130         /*
2131          * for non-mst mode, pcm number is the same as before
2132          * for DP MST mode without extra PCM, pcm number is same
2133          * for DP MST mode with extra PCMs, pcm number is
2134          *  (nid number + dev_num - 1)
2135          * dev_num is the device entry number in a pin
2136          */
2137
2138         if (codec->mst_no_extra_pcms)
2139                 pcm_num = spec->num_nids;
2140         else
2141                 pcm_num = spec->num_nids + spec->dev_num - 1;
2142
2143         codec_dbg(codec, "hdmi: pcm_num set to %d\n", pcm_num);
2144
2145         for (idx = 0; idx < pcm_num; idx++) {
2146                 struct hda_pcm *info;
2147                 struct hda_pcm_stream *pstr;
2148
2149                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", idx);
2150                 if (!info)
2151                         return -ENOMEM;
2152
2153                 spec->pcm_rec[idx].pcm = info;
2154                 spec->pcm_used++;
2155                 info->pcm_type = HDA_PCM_TYPE_HDMI;
2156                 info->own_chmap = true;
2157
2158                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2159                 pstr->substreams = 1;
2160                 pstr->ops = generic_ops;
2161                 /* pcm number is less than 16 */
2162                 if (spec->pcm_used >= 16)
2163                         break;
2164                 /* other pstr fields are set in open */
2165         }
2166
2167         return 0;
2168 }
2169
2170 static void free_hdmi_jack_priv(struct snd_jack *jack)
2171 {
2172         struct hdmi_pcm *pcm = jack->private_data;
2173
2174         pcm->jack = NULL;
2175 }
2176
2177 static int add_hdmi_jack_kctl(struct hda_codec *codec,
2178                                struct hdmi_spec *spec,
2179                                int pcm_idx,
2180                                const char *name)
2181 {
2182         struct snd_jack *jack;
2183         int err;
2184
2185         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
2186                            true, false);
2187         if (err < 0)
2188                 return err;
2189
2190         spec->pcm_rec[pcm_idx].jack = jack;
2191         jack->private_data = &spec->pcm_rec[pcm_idx];
2192         jack->private_free = free_hdmi_jack_priv;
2193         return 0;
2194 }
2195
2196 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
2197 {
2198         char hdmi_str[32] = "HDMI/DP";
2199         struct hdmi_spec *spec = codec->spec;
2200         struct hdmi_spec_per_pin *per_pin;
2201         struct hda_jack_tbl *jack;
2202         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
2203         bool phantom_jack;
2204         int ret;
2205
2206         if (pcmdev > 0)
2207                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2208
2209         if (spec->dyn_pcm_assign)
2210                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
2211
2212         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
2213         /* if !dyn_pcm_assign, it must be non-MST mode.
2214          * This means pcms and pins are statically mapped.
2215          * And pcm_idx is pin_idx.
2216          */
2217         per_pin = get_pin(spec, pcm_idx);
2218         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
2219         if (phantom_jack)
2220                 strncat(hdmi_str, " Phantom",
2221                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2222         ret = snd_hda_jack_add_kctl_mst(codec, per_pin->pin_nid,
2223                                         per_pin->dev_id, hdmi_str, phantom_jack,
2224                                         0, NULL);
2225         if (ret < 0)
2226                 return ret;
2227         jack = snd_hda_jack_tbl_get_mst(codec, per_pin->pin_nid,
2228                                         per_pin->dev_id);
2229         if (jack == NULL)
2230                 return 0;
2231         /* assign jack->jack to pcm_rec[].jack to
2232          * align with dyn_pcm_assign mode
2233          */
2234         spec->pcm_rec[pcm_idx].jack = jack->jack;
2235         return 0;
2236 }
2237
2238 static int generic_hdmi_build_controls(struct hda_codec *codec)
2239 {
2240         struct hdmi_spec *spec = codec->spec;
2241         int dev, err;
2242         int pin_idx, pcm_idx;
2243
2244         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2245                 if (!get_pcm_rec(spec, pcm_idx)->pcm) {
2246                         /* no PCM: mark this for skipping permanently */
2247                         set_bit(pcm_idx, &spec->pcm_bitmap);
2248                         continue;
2249                 }
2250
2251                 err = generic_hdmi_build_jack(codec, pcm_idx);
2252                 if (err < 0)
2253                         return err;
2254
2255                 /* create the spdif for each pcm
2256                  * pin will be bound when monitor is connected
2257                  */
2258                 if (spec->dyn_pcm_assign)
2259                         err = snd_hda_create_dig_out_ctls(codec,
2260                                           0, spec->cvt_nids[0],
2261                                           HDA_PCM_TYPE_HDMI);
2262                 else {
2263                         struct hdmi_spec_per_pin *per_pin =
2264                                 get_pin(spec, pcm_idx);
2265                         err = snd_hda_create_dig_out_ctls(codec,
2266                                                   per_pin->pin_nid,
2267                                                   per_pin->mux_nids[0],
2268                                                   HDA_PCM_TYPE_HDMI);
2269                 }
2270                 if (err < 0)
2271                         return err;
2272                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2273
2274                 dev = get_pcm_rec(spec, pcm_idx)->device;
2275                 if (dev != SNDRV_PCM_INVALID_DEVICE) {
2276                         /* add control for ELD Bytes */
2277                         err = hdmi_create_eld_ctl(codec, pcm_idx, dev);
2278                         if (err < 0)
2279                                 return err;
2280                 }
2281         }
2282
2283         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2284                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2285
2286                 hdmi_present_sense(per_pin, 0);
2287         }
2288
2289         /* add channel maps */
2290         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2291                 struct hda_pcm *pcm;
2292
2293                 pcm = get_pcm_rec(spec, pcm_idx);
2294                 if (!pcm || !pcm->pcm)
2295                         break;
2296                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2297                 if (err < 0)
2298                         return err;
2299         }
2300
2301         return 0;
2302 }
2303
2304 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2305 {
2306         struct hdmi_spec *spec = codec->spec;
2307         int pin_idx;
2308
2309         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2310                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2311
2312                 per_pin->codec = codec;
2313                 mutex_init(&per_pin->lock);
2314                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2315                 eld_proc_new(per_pin, pin_idx);
2316         }
2317         return 0;
2318 }
2319
2320 static int generic_hdmi_init(struct hda_codec *codec)
2321 {
2322         struct hdmi_spec *spec = codec->spec;
2323         int pin_idx;
2324
2325         mutex_lock(&spec->bind_lock);
2326         spec->use_jack_detect = !codec->jackpoll_interval;
2327         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2328                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2329                 hda_nid_t pin_nid = per_pin->pin_nid;
2330                 int dev_id = per_pin->dev_id;
2331
2332                 snd_hda_set_dev_select(codec, pin_nid, dev_id);
2333                 hdmi_init_pin(codec, pin_nid);
2334                 if (codec_has_acomp(codec))
2335                         continue;
2336                 if (spec->use_jack_detect)
2337                         snd_hda_jack_detect_enable(codec, pin_nid, dev_id);
2338                 else
2339                         snd_hda_jack_detect_enable_callback_mst(codec, pin_nid,
2340                                                                 dev_id,
2341                                                                 jack_callback);
2342         }
2343         mutex_unlock(&spec->bind_lock);
2344         return 0;
2345 }
2346
2347 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2348 {
2349         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2350         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2351 }
2352
2353 static void hdmi_array_free(struct hdmi_spec *spec)
2354 {
2355         snd_array_free(&spec->pins);
2356         snd_array_free(&spec->cvts);
2357 }
2358
2359 static void generic_spec_free(struct hda_codec *codec)
2360 {
2361         struct hdmi_spec *spec = codec->spec;
2362
2363         if (spec) {
2364                 hdmi_array_free(spec);
2365                 kfree(spec);
2366                 codec->spec = NULL;
2367         }
2368         codec->dp_mst = false;
2369 }
2370
2371 static void generic_hdmi_free(struct hda_codec *codec)
2372 {
2373         struct hdmi_spec *spec = codec->spec;
2374         int pin_idx, pcm_idx;
2375
2376         if (spec->acomp_registered) {
2377                 snd_hdac_acomp_exit(&codec->bus->core);
2378         } else if (codec_has_acomp(codec)) {
2379                 snd_hdac_acomp_register_notifier(&codec->bus->core, NULL);
2380         }
2381         codec->relaxed_resume = 0;
2382
2383         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2384                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2385                 cancel_delayed_work_sync(&per_pin->work);
2386                 eld_proc_free(per_pin);
2387         }
2388
2389         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2390                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2391                         continue;
2392                 if (spec->dyn_pcm_assign)
2393                         snd_device_free(codec->card,
2394                                         spec->pcm_rec[pcm_idx].jack);
2395                 else
2396                         spec->pcm_rec[pcm_idx].jack = NULL;
2397         }
2398
2399         generic_spec_free(codec);
2400 }
2401
2402 #ifdef CONFIG_PM
2403 static int generic_hdmi_resume(struct hda_codec *codec)
2404 {
2405         struct hdmi_spec *spec = codec->spec;
2406         int pin_idx;
2407
2408         codec->patch_ops.init(codec);
2409         snd_hda_regmap_sync(codec);
2410
2411         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2412                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2413                 hdmi_present_sense(per_pin, 1);
2414         }
2415         return 0;
2416 }
2417 #endif
2418
2419 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2420         .init                   = generic_hdmi_init,
2421         .free                   = generic_hdmi_free,
2422         .build_pcms             = generic_hdmi_build_pcms,
2423         .build_controls         = generic_hdmi_build_controls,
2424         .unsol_event            = hdmi_unsol_event,
2425 #ifdef CONFIG_PM
2426         .resume                 = generic_hdmi_resume,
2427 #endif
2428 };
2429
2430 static const struct hdmi_ops generic_standard_hdmi_ops = {
2431         .pin_get_eld                            = hdmi_pin_get_eld,
2432         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2433         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2434         .setup_stream                           = hdmi_setup_stream,
2435 };
2436
2437 /* allocate codec->spec and assign/initialize generic parser ops */
2438 static int alloc_generic_hdmi(struct hda_codec *codec)
2439 {
2440         struct hdmi_spec *spec;
2441
2442         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2443         if (!spec)
2444                 return -ENOMEM;
2445
2446         spec->codec = codec;
2447         spec->ops = generic_standard_hdmi_ops;
2448         spec->dev_num = 1;      /* initialize to 1 */
2449         mutex_init(&spec->pcm_lock);
2450         mutex_init(&spec->bind_lock);
2451         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2452
2453         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2454         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2455         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2456         spec->chmap.ops.get_spk_alloc = hdmi_get_spk_alloc,
2457
2458         codec->spec = spec;
2459         hdmi_array_init(spec, 4);
2460
2461         codec->patch_ops = generic_hdmi_patch_ops;
2462
2463         return 0;
2464 }
2465
2466 /* generic HDMI parser */
2467 static int patch_generic_hdmi(struct hda_codec *codec)
2468 {
2469         int err;
2470
2471         err = alloc_generic_hdmi(codec);
2472         if (err < 0)
2473                 return err;
2474
2475         err = hdmi_parse_codec(codec);
2476         if (err < 0) {
2477                 generic_spec_free(codec);
2478                 return err;
2479         }
2480
2481         generic_hdmi_init_per_pins(codec);
2482         return 0;
2483 }
2484
2485 /*
2486  * generic audio component binding
2487  */
2488
2489 /* turn on / off the unsol event jack detection dynamically */
2490 static void reprogram_jack_detect(struct hda_codec *codec, hda_nid_t nid,
2491                                   int dev_id, bool use_acomp)
2492 {
2493         struct hda_jack_tbl *tbl;
2494
2495         tbl = snd_hda_jack_tbl_get_mst(codec, nid, dev_id);
2496         if (tbl) {
2497                 /* clear unsol even if component notifier is used, or re-enable
2498                  * if notifier is cleared
2499                  */
2500                 unsigned int val = use_acomp ? 0 : (AC_USRSP_EN | tbl->tag);
2501                 snd_hda_codec_write_cache(codec, nid, 0,
2502                                           AC_VERB_SET_UNSOLICITED_ENABLE, val);
2503         } else {
2504                 /* if no jack entry was defined beforehand, create a new one
2505                  * at need (i.e. only when notifier is cleared)
2506                  */
2507                 if (!use_acomp)
2508                         snd_hda_jack_detect_enable(codec, nid, dev_id);
2509         }
2510 }
2511
2512 /* set up / clear component notifier dynamically */
2513 static void generic_acomp_notifier_set(struct drm_audio_component *acomp,
2514                                        bool use_acomp)
2515 {
2516         struct hdmi_spec *spec;
2517         int i;
2518
2519         spec = container_of(acomp->audio_ops, struct hdmi_spec, drm_audio_ops);
2520         mutex_lock(&spec->bind_lock);
2521         spec->use_acomp_notifier = use_acomp;
2522         spec->codec->relaxed_resume = use_acomp;
2523         /* reprogram each jack detection logic depending on the notifier */
2524         if (spec->use_jack_detect) {
2525                 for (i = 0; i < spec->num_pins; i++)
2526                         reprogram_jack_detect(spec->codec,
2527                                               get_pin(spec, i)->pin_nid,
2528                                               get_pin(spec, i)->dev_id,
2529                                               use_acomp);
2530         }
2531         mutex_unlock(&spec->bind_lock);
2532 }
2533
2534 /* enable / disable the notifier via master bind / unbind */
2535 static int generic_acomp_master_bind(struct device *dev,
2536                                      struct drm_audio_component *acomp)
2537 {
2538         generic_acomp_notifier_set(acomp, true);
2539         return 0;
2540 }
2541
2542 static void generic_acomp_master_unbind(struct device *dev,
2543                                         struct drm_audio_component *acomp)
2544 {
2545         generic_acomp_notifier_set(acomp, false);
2546 }
2547
2548 /* check whether both HD-audio and DRM PCI devices belong to the same bus */
2549 static int match_bound_vga(struct device *dev, int subtype, void *data)
2550 {
2551         struct hdac_bus *bus = data;
2552         struct pci_dev *pci, *master;
2553
2554         if (!dev_is_pci(dev) || !dev_is_pci(bus->dev))
2555                 return 0;
2556         master = to_pci_dev(bus->dev);
2557         pci = to_pci_dev(dev);
2558         return master->bus == pci->bus;
2559 }
2560
2561 /* audio component notifier for AMD/Nvidia HDMI codecs */
2562 static void generic_acomp_pin_eld_notify(void *audio_ptr, int port, int dev_id)
2563 {
2564         struct hda_codec *codec = audio_ptr;
2565         struct hdmi_spec *spec = codec->spec;
2566         hda_nid_t pin_nid = spec->port2pin(codec, port);
2567
2568         if (!pin_nid)
2569                 return;
2570         if (get_wcaps_type(get_wcaps(codec, pin_nid)) != AC_WID_PIN)
2571                 return;
2572         /* skip notification during system suspend (but not in runtime PM);
2573          * the state will be updated at resume
2574          */
2575         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2576                 return;
2577         /* ditto during suspend/resume process itself */
2578         if (snd_hdac_is_in_pm(&codec->core))
2579                 return;
2580
2581         check_presence_and_report(codec, pin_nid, dev_id);
2582 }
2583
2584 /* set up the private drm_audio_ops from the template */
2585 static void setup_drm_audio_ops(struct hda_codec *codec,
2586                                 const struct drm_audio_component_audio_ops *ops)
2587 {
2588         struct hdmi_spec *spec = codec->spec;
2589
2590         spec->drm_audio_ops.audio_ptr = codec;
2591         /* intel_audio_codec_enable() or intel_audio_codec_disable()
2592          * will call pin_eld_notify with using audio_ptr pointer
2593          * We need make sure audio_ptr is really setup
2594          */
2595         wmb();
2596         spec->drm_audio_ops.pin2port = ops->pin2port;
2597         spec->drm_audio_ops.pin_eld_notify = ops->pin_eld_notify;
2598         spec->drm_audio_ops.master_bind = ops->master_bind;
2599         spec->drm_audio_ops.master_unbind = ops->master_unbind;
2600 }
2601
2602 /* initialize the generic HDMI audio component */
2603 static void generic_acomp_init(struct hda_codec *codec,
2604                                const struct drm_audio_component_audio_ops *ops,
2605                                int (*port2pin)(struct hda_codec *, int))
2606 {
2607         struct hdmi_spec *spec = codec->spec;
2608
2609         spec->port2pin = port2pin;
2610         setup_drm_audio_ops(codec, ops);
2611         if (!snd_hdac_acomp_init(&codec->bus->core, &spec->drm_audio_ops,
2612                                  match_bound_vga, 0)) {
2613                 spec->acomp_registered = true;
2614                 codec->bus->keep_power = 0;
2615         }
2616 }
2617
2618 /*
2619  * Intel codec parsers and helpers
2620  */
2621
2622 #define INTEL_GET_VENDOR_VERB   0xf81
2623 #define INTEL_SET_VENDOR_VERB   0x781
2624 #define INTEL_EN_DP12           0x02    /* enable DP 1.2 features */
2625 #define INTEL_EN_ALL_PIN_CVTS   0x01    /* enable 2nd & 3rd pins and convertors */
2626
2627 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2628                                           bool update_tree)
2629 {
2630         unsigned int vendor_param;
2631         struct hdmi_spec *spec = codec->spec;
2632
2633         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2634                                 INTEL_GET_VENDOR_VERB, 0);
2635         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2636                 return;
2637
2638         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2639         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2640                                 INTEL_SET_VENDOR_VERB, vendor_param);
2641         if (vendor_param == -1)
2642                 return;
2643
2644         if (update_tree)
2645                 snd_hda_codec_update_widgets(codec);
2646 }
2647
2648 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2649 {
2650         unsigned int vendor_param;
2651         struct hdmi_spec *spec = codec->spec;
2652
2653         vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0,
2654                                 INTEL_GET_VENDOR_VERB, 0);
2655         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2656                 return;
2657
2658         /* enable DP1.2 mode */
2659         vendor_param |= INTEL_EN_DP12;
2660         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2661         snd_hda_codec_write_cache(codec, spec->vendor_nid, 0,
2662                                 INTEL_SET_VENDOR_VERB, vendor_param);
2663 }
2664
2665 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2666  * Otherwise you may get severe h/w communication errors.
2667  */
2668 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2669                                 unsigned int power_state)
2670 {
2671         if (power_state == AC_PWRST_D0) {
2672                 intel_haswell_enable_all_pins(codec, false);
2673                 intel_haswell_fixup_enable_dp12(codec);
2674         }
2675
2676         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2677         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2678 }
2679
2680 /* There is a fixed mapping between audio pin node and display port.
2681  * on SNB, IVY, HSW, BSW, SKL, BXT, KBL:
2682  * Pin Widget 5 - PORT B (port = 1 in i915 driver)
2683  * Pin Widget 6 - PORT C (port = 2 in i915 driver)
2684  * Pin Widget 7 - PORT D (port = 3 in i915 driver)
2685  *
2686  * on VLV, ILK:
2687  * Pin Widget 4 - PORT B (port = 1 in i915 driver)
2688  * Pin Widget 5 - PORT C (port = 2 in i915 driver)
2689  * Pin Widget 6 - PORT D (port = 3 in i915 driver)
2690  */
2691 static int intel_base_nid(struct hda_codec *codec)
2692 {
2693         switch (codec->core.vendor_id) {
2694         case 0x80860054: /* ILK */
2695         case 0x80862804: /* ILK */
2696         case 0x80862882: /* VLV */
2697                 return 4;
2698         default:
2699                 return 5;
2700         }
2701 }
2702
2703 static int intel_pin2port(void *audio_ptr, int pin_nid)
2704 {
2705         struct hda_codec *codec = audio_ptr;
2706         struct hdmi_spec *spec = codec->spec;
2707         int base_nid, i;
2708
2709         if (!spec->port_num) {
2710                 base_nid = intel_base_nid(codec);
2711                 if (WARN_ON(pin_nid < base_nid || pin_nid >= base_nid + 3))
2712                         return -1;
2713                 return pin_nid - base_nid + 1;
2714         }
2715
2716         /*
2717          * looking for the pin number in the mapping table and return
2718          * the index which indicate the port number
2719          */
2720         for (i = 0; i < spec->port_num; i++) {
2721                 if (pin_nid == spec->port_map[i])
2722                         return i;
2723         }
2724
2725         codec_info(codec, "Can't find the HDMI/DP port for pin %d\n", pin_nid);
2726         return -1;
2727 }
2728
2729 static int intel_port2pin(struct hda_codec *codec, int port)
2730 {
2731         struct hdmi_spec *spec = codec->spec;
2732
2733         if (!spec->port_num) {
2734                 /* we assume only from port-B to port-D */
2735                 if (port < 1 || port > 3)
2736                         return 0;
2737                 return port + intel_base_nid(codec) - 1;
2738         }
2739
2740         if (port < 0 || port >= spec->port_num)
2741                 return 0;
2742         return spec->port_map[port];
2743 }
2744
2745 static void intel_pin_eld_notify(void *audio_ptr, int port, int pipe)
2746 {
2747         struct hda_codec *codec = audio_ptr;
2748         int pin_nid;
2749         int dev_id = pipe;
2750
2751         pin_nid = intel_port2pin(codec, port);
2752         if (!pin_nid)
2753                 return;
2754         /* skip notification during system suspend (but not in runtime PM);
2755          * the state will be updated at resume
2756          */
2757         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2758                 return;
2759         /* ditto during suspend/resume process itself */
2760         if (snd_hdac_is_in_pm(&codec->core))
2761                 return;
2762
2763         snd_hdac_i915_set_bclk(&codec->bus->core);
2764         check_presence_and_report(codec, pin_nid, dev_id);
2765 }
2766
2767 static const struct drm_audio_component_audio_ops intel_audio_ops = {
2768         .pin2port = intel_pin2port,
2769         .pin_eld_notify = intel_pin_eld_notify,
2770 };
2771
2772 /* register i915 component pin_eld_notify callback */
2773 static void register_i915_notifier(struct hda_codec *codec)
2774 {
2775         struct hdmi_spec *spec = codec->spec;
2776
2777         spec->use_acomp_notifier = true;
2778         spec->port2pin = intel_port2pin;
2779         setup_drm_audio_ops(codec, &intel_audio_ops);
2780         snd_hdac_acomp_register_notifier(&codec->bus->core,
2781                                         &spec->drm_audio_ops);
2782         /* no need for forcible resume for jack check thanks to notifier */
2783         codec->relaxed_resume = 1;
2784 }
2785
2786 /* setup_stream ops override for HSW+ */
2787 static int i915_hsw_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
2788                                  hda_nid_t pin_nid, int dev_id, u32 stream_tag,
2789                                  int format)
2790 {
2791         haswell_verify_D0(codec, cvt_nid, pin_nid);
2792         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
2793                                  stream_tag, format);
2794 }
2795
2796 /* pin_cvt_fixup ops override for HSW+ and VLV+ */
2797 static void i915_pin_cvt_fixup(struct hda_codec *codec,
2798                                struct hdmi_spec_per_pin *per_pin,
2799                                hda_nid_t cvt_nid)
2800 {
2801         if (per_pin) {
2802                 snd_hda_set_dev_select(codec, per_pin->pin_nid,
2803                                per_pin->dev_id);
2804                 intel_verify_pin_cvt_connect(codec, per_pin);
2805                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
2806                                      per_pin->dev_id, per_pin->mux_idx);
2807         } else {
2808                 intel_not_share_assigned_cvt_nid(codec, 0, 0, cvt_nid);
2809         }
2810 }
2811
2812 /* precondition and allocation for Intel codecs */
2813 static int alloc_intel_hdmi(struct hda_codec *codec)
2814 {
2815         int err;
2816
2817         /* requires i915 binding */
2818         if (!codec->bus->core.audio_component) {
2819                 codec_info(codec, "No i915 binding for Intel HDMI/DP codec\n");
2820                 /* set probe_id here to prevent generic fallback binding */
2821                 codec->probe_id = HDA_CODEC_ID_SKIP_PROBE;
2822                 return -ENODEV;
2823         }
2824
2825         err = alloc_generic_hdmi(codec);
2826         if (err < 0)
2827                 return err;
2828         /* no need to handle unsol events */
2829         codec->patch_ops.unsol_event = NULL;
2830         return 0;
2831 }
2832
2833 /* parse and post-process for Intel codecs */
2834 static int parse_intel_hdmi(struct hda_codec *codec)
2835 {
2836         int err, retries = 3;
2837
2838         do {
2839                 err = hdmi_parse_codec(codec);
2840         } while (err < 0 && retries--);
2841
2842         if (err < 0) {
2843                 generic_spec_free(codec);
2844                 return err;
2845         }
2846
2847         generic_hdmi_init_per_pins(codec);
2848         register_i915_notifier(codec);
2849         return 0;
2850 }
2851
2852 /* Intel Haswell and onwards; audio component with eld notifier */
2853 static int intel_hsw_common_init(struct hda_codec *codec, hda_nid_t vendor_nid,
2854                                  const int *port_map, int port_num)
2855 {
2856         struct hdmi_spec *spec;
2857         int err;
2858
2859         err = alloc_intel_hdmi(codec);
2860         if (err < 0)
2861                 return err;
2862         spec = codec->spec;
2863         codec->dp_mst = true;
2864         spec->dyn_pcm_assign = true;
2865         spec->vendor_nid = vendor_nid;
2866         spec->port_map = port_map;
2867         spec->port_num = port_num;
2868         spec->intel_hsw_fixup = true;
2869
2870         intel_haswell_enable_all_pins(codec, true);
2871         intel_haswell_fixup_enable_dp12(codec);
2872
2873         codec->display_power_control = 1;
2874
2875         codec->patch_ops.set_power_state = haswell_set_power_state;
2876         codec->depop_delay = 0;
2877         codec->auto_runtime_pm = 1;
2878
2879         spec->ops.setup_stream = i915_hsw_setup_stream;
2880         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2881
2882         return parse_intel_hdmi(codec);
2883 }
2884
2885 static int patch_i915_hsw_hdmi(struct hda_codec *codec)
2886 {
2887         return intel_hsw_common_init(codec, 0x08, NULL, 0);
2888 }
2889
2890 static int patch_i915_glk_hdmi(struct hda_codec *codec)
2891 {
2892         return intel_hsw_common_init(codec, 0x0b, NULL, 0);
2893 }
2894
2895 static int patch_i915_icl_hdmi(struct hda_codec *codec)
2896 {
2897         /*
2898          * pin to port mapping table where the value indicate the pin number and
2899          * the index indicate the port number.
2900          */
2901         static const int map[] = {0x0, 0x4, 0x6, 0x8, 0xa, 0xb};
2902
2903         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2904 }
2905
2906 static int patch_i915_tgl_hdmi(struct hda_codec *codec)
2907 {
2908         /*
2909          * pin to port mapping table where the value indicate the pin number and
2910          * the index indicate the port number.
2911          */
2912         static const int map[] = {0x4, 0x6, 0x8, 0xa, 0xb, 0xc, 0xd, 0xe, 0xf};
2913
2914         return intel_hsw_common_init(codec, 0x02, map, ARRAY_SIZE(map));
2915 }
2916
2917 /* Intel Baytrail and Braswell; with eld notifier */
2918 static int patch_i915_byt_hdmi(struct hda_codec *codec)
2919 {
2920         struct hdmi_spec *spec;
2921         int err;
2922
2923         err = alloc_intel_hdmi(codec);
2924         if (err < 0)
2925                 return err;
2926         spec = codec->spec;
2927
2928         /* For Valleyview/Cherryview, only the display codec is in the display
2929          * power well and can use link_power ops to request/release the power.
2930          */
2931         codec->display_power_control = 1;
2932
2933         codec->depop_delay = 0;
2934         codec->auto_runtime_pm = 1;
2935
2936         spec->ops.pin_cvt_fixup = i915_pin_cvt_fixup;
2937
2938         return parse_intel_hdmi(codec);
2939 }
2940
2941 /* Intel IronLake, SandyBridge and IvyBridge; with eld notifier */
2942 static int patch_i915_cpt_hdmi(struct hda_codec *codec)
2943 {
2944         int err;
2945
2946         err = alloc_intel_hdmi(codec);
2947         if (err < 0)
2948                 return err;
2949         return parse_intel_hdmi(codec);
2950 }
2951
2952 /*
2953  * Shared non-generic implementations
2954  */
2955
2956 static int simple_playback_build_pcms(struct hda_codec *codec)
2957 {
2958         struct hdmi_spec *spec = codec->spec;
2959         struct hda_pcm *info;
2960         unsigned int chans;
2961         struct hda_pcm_stream *pstr;
2962         struct hdmi_spec_per_cvt *per_cvt;
2963
2964         per_cvt = get_cvt(spec, 0);
2965         chans = get_wcaps(codec, per_cvt->cvt_nid);
2966         chans = get_wcaps_channels(chans);
2967
2968         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2969         if (!info)
2970                 return -ENOMEM;
2971         spec->pcm_rec[0].pcm = info;
2972         info->pcm_type = HDA_PCM_TYPE_HDMI;
2973         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2974         *pstr = spec->pcm_playback;
2975         pstr->nid = per_cvt->cvt_nid;
2976         if (pstr->channels_max <= 2 && chans && chans <= 16)
2977                 pstr->channels_max = chans;
2978
2979         return 0;
2980 }
2981
2982 /* unsolicited event for jack sensing */
2983 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2984                                     unsigned int res)
2985 {
2986         snd_hda_jack_set_dirty_all(codec);
2987         snd_hda_jack_report_sync(codec);
2988 }
2989
2990 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2991  * as long as spec->pins[] is set correctly
2992  */
2993 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2994
2995 static int simple_playback_build_controls(struct hda_codec *codec)
2996 {
2997         struct hdmi_spec *spec = codec->spec;
2998         struct hdmi_spec_per_cvt *per_cvt;
2999         int err;
3000
3001         per_cvt = get_cvt(spec, 0);
3002         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
3003                                           per_cvt->cvt_nid,
3004                                           HDA_PCM_TYPE_HDMI);
3005         if (err < 0)
3006                 return err;
3007         return simple_hdmi_build_jack(codec, 0);
3008 }
3009
3010 static int simple_playback_init(struct hda_codec *codec)
3011 {
3012         struct hdmi_spec *spec = codec->spec;
3013         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
3014         hda_nid_t pin = per_pin->pin_nid;
3015
3016         snd_hda_codec_write(codec, pin, 0,
3017                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
3018         /* some codecs require to unmute the pin */
3019         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
3020                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
3021                                     AMP_OUT_UNMUTE);
3022         snd_hda_jack_detect_enable(codec, pin, per_pin->dev_id);
3023         return 0;
3024 }
3025
3026 static void simple_playback_free(struct hda_codec *codec)
3027 {
3028         struct hdmi_spec *spec = codec->spec;
3029
3030         hdmi_array_free(spec);
3031         kfree(spec);
3032 }
3033
3034 /*
3035  * Nvidia specific implementations
3036  */
3037
3038 #define Nv_VERB_SET_Channel_Allocation          0xF79
3039 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
3040 #define Nv_VERB_SET_Audio_Protection_On         0xF98
3041 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
3042
3043 #define nvhdmi_master_con_nid_7x        0x04
3044 #define nvhdmi_master_pin_nid_7x        0x05
3045
3046 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
3047         /*front, rear, clfe, rear_surr */
3048         0x6, 0x8, 0xa, 0xc,
3049 };
3050
3051 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
3052         /* set audio protect on */
3053         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3054         /* enable digital output on pin widget */
3055         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3056         {} /* terminator */
3057 };
3058
3059 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
3060         /* set audio protect on */
3061         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
3062         /* enable digital output on pin widget */
3063         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3064         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3065         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3066         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3067         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
3068         {} /* terminator */
3069 };
3070
3071 #ifdef LIMITED_RATE_FMT_SUPPORT
3072 /* support only the safe format and rate */
3073 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
3074 #define SUPPORTED_MAXBPS        16
3075 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
3076 #else
3077 /* support all rates and formats */
3078 #define SUPPORTED_RATES \
3079         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
3080         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
3081          SNDRV_PCM_RATE_192000)
3082 #define SUPPORTED_MAXBPS        24
3083 #define SUPPORTED_FORMATS \
3084         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
3085 #endif
3086
3087 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
3088 {
3089         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
3090         return 0;
3091 }
3092
3093 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
3094 {
3095         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
3096         return 0;
3097 }
3098
3099 static const unsigned int channels_2_6_8[] = {
3100         2, 6, 8
3101 };
3102
3103 static const unsigned int channels_2_8[] = {
3104         2, 8
3105 };
3106
3107 static const struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
3108         .count = ARRAY_SIZE(channels_2_6_8),
3109         .list = channels_2_6_8,
3110         .mask = 0,
3111 };
3112
3113 static const struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
3114         .count = ARRAY_SIZE(channels_2_8),
3115         .list = channels_2_8,
3116         .mask = 0,
3117 };
3118
3119 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
3120                                     struct hda_codec *codec,
3121                                     struct snd_pcm_substream *substream)
3122 {
3123         struct hdmi_spec *spec = codec->spec;
3124         const struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
3125
3126         switch (codec->preset->vendor_id) {
3127         case 0x10de0002:
3128         case 0x10de0003:
3129         case 0x10de0005:
3130         case 0x10de0006:
3131                 hw_constraints_channels = &hw_constraints_2_8_channels;
3132                 break;
3133         case 0x10de0007:
3134                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
3135                 break;
3136         default:
3137                 break;
3138         }
3139
3140         if (hw_constraints_channels != NULL) {
3141                 snd_pcm_hw_constraint_list(substream->runtime, 0,
3142                                 SNDRV_PCM_HW_PARAM_CHANNELS,
3143                                 hw_constraints_channels);
3144         } else {
3145                 snd_pcm_hw_constraint_step(substream->runtime, 0,
3146                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
3147         }
3148
3149         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
3150 }
3151
3152 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
3153                                      struct hda_codec *codec,
3154                                      struct snd_pcm_substream *substream)
3155 {
3156         struct hdmi_spec *spec = codec->spec;
3157         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3158 }
3159
3160 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
3161                                        struct hda_codec *codec,
3162                                        unsigned int stream_tag,
3163                                        unsigned int format,
3164                                        struct snd_pcm_substream *substream)
3165 {
3166         struct hdmi_spec *spec = codec->spec;
3167         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
3168                                              stream_tag, format, substream);
3169 }
3170
3171 static const struct hda_pcm_stream simple_pcm_playback = {
3172         .substreams = 1,
3173         .channels_min = 2,
3174         .channels_max = 2,
3175         .ops = {
3176                 .open = simple_playback_pcm_open,
3177                 .close = simple_playback_pcm_close,
3178                 .prepare = simple_playback_pcm_prepare
3179         },
3180 };
3181
3182 static const struct hda_codec_ops simple_hdmi_patch_ops = {
3183         .build_controls = simple_playback_build_controls,
3184         .build_pcms = simple_playback_build_pcms,
3185         .init = simple_playback_init,
3186         .free = simple_playback_free,
3187         .unsol_event = simple_hdmi_unsol_event,
3188 };
3189
3190 static int patch_simple_hdmi(struct hda_codec *codec,
3191                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
3192 {
3193         struct hdmi_spec *spec;
3194         struct hdmi_spec_per_cvt *per_cvt;
3195         struct hdmi_spec_per_pin *per_pin;
3196
3197         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3198         if (!spec)
3199                 return -ENOMEM;
3200
3201         spec->codec = codec;
3202         codec->spec = spec;
3203         hdmi_array_init(spec, 1);
3204
3205         spec->multiout.num_dacs = 0;  /* no analog */
3206         spec->multiout.max_channels = 2;
3207         spec->multiout.dig_out_nid = cvt_nid;
3208         spec->num_cvts = 1;
3209         spec->num_pins = 1;
3210         per_pin = snd_array_new(&spec->pins);
3211         per_cvt = snd_array_new(&spec->cvts);
3212         if (!per_pin || !per_cvt) {
3213                 simple_playback_free(codec);
3214                 return -ENOMEM;
3215         }
3216         per_cvt->cvt_nid = cvt_nid;
3217         per_pin->pin_nid = pin_nid;
3218         spec->pcm_playback = simple_pcm_playback;
3219
3220         codec->patch_ops = simple_hdmi_patch_ops;
3221
3222         return 0;
3223 }
3224
3225 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
3226                                                     int channels)
3227 {
3228         unsigned int chanmask;
3229         int chan = channels ? (channels - 1) : 1;
3230
3231         switch (channels) {
3232         default:
3233         case 0:
3234         case 2:
3235                 chanmask = 0x00;
3236                 break;
3237         case 4:
3238                 chanmask = 0x08;
3239                 break;
3240         case 6:
3241                 chanmask = 0x0b;
3242                 break;
3243         case 8:
3244                 chanmask = 0x13;
3245                 break;
3246         }
3247
3248         /* Set the audio infoframe channel allocation and checksum fields.  The
3249          * channel count is computed implicitly by the hardware. */
3250         snd_hda_codec_write(codec, 0x1, 0,
3251                         Nv_VERB_SET_Channel_Allocation, chanmask);
3252
3253         snd_hda_codec_write(codec, 0x1, 0,
3254                         Nv_VERB_SET_Info_Frame_Checksum,
3255                         (0x71 - chan - chanmask));
3256 }
3257
3258 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
3259                                    struct hda_codec *codec,
3260                                    struct snd_pcm_substream *substream)
3261 {
3262         struct hdmi_spec *spec = codec->spec;
3263         int i;
3264
3265         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
3266                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
3267         for (i = 0; i < 4; i++) {
3268                 /* set the stream id */
3269                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3270                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
3271                 /* set the stream format */
3272                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
3273                                 AC_VERB_SET_STREAM_FORMAT, 0);
3274         }
3275
3276         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
3277          * streams are disabled. */
3278         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3279
3280         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
3281 }
3282
3283 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
3284                                      struct hda_codec *codec,
3285                                      unsigned int stream_tag,
3286                                      unsigned int format,
3287                                      struct snd_pcm_substream *substream)
3288 {
3289         int chs;
3290         unsigned int dataDCC2, channel_id;
3291         int i;
3292         struct hdmi_spec *spec = codec->spec;
3293         struct hda_spdif_out *spdif;
3294         struct hdmi_spec_per_cvt *per_cvt;
3295
3296         mutex_lock(&codec->spdif_mutex);
3297         per_cvt = get_cvt(spec, 0);
3298         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
3299
3300         chs = substream->runtime->channels;
3301
3302         dataDCC2 = 0x2;
3303
3304         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
3305         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
3306                 snd_hda_codec_write(codec,
3307                                 nvhdmi_master_con_nid_7x,
3308                                 0,
3309                                 AC_VERB_SET_DIGI_CONVERT_1,
3310                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3311
3312         /* set the stream id */
3313         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3314                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
3315
3316         /* set the stream format */
3317         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
3318                         AC_VERB_SET_STREAM_FORMAT, format);
3319
3320         /* turn on again (if needed) */
3321         /* enable and set the channel status audio/data flag */
3322         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
3323                 snd_hda_codec_write(codec,
3324                                 nvhdmi_master_con_nid_7x,
3325                                 0,
3326                                 AC_VERB_SET_DIGI_CONVERT_1,
3327                                 spdif->ctls & 0xff);
3328                 snd_hda_codec_write(codec,
3329                                 nvhdmi_master_con_nid_7x,
3330                                 0,
3331                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3332         }
3333
3334         for (i = 0; i < 4; i++) {
3335                 if (chs == 2)
3336                         channel_id = 0;
3337                 else
3338                         channel_id = i * 2;
3339
3340                 /* turn off SPDIF once;
3341                  *otherwise the IEC958 bits won't be updated
3342                  */
3343                 if (codec->spdif_status_reset &&
3344                 (spdif->ctls & AC_DIG1_ENABLE))
3345                         snd_hda_codec_write(codec,
3346                                 nvhdmi_con_nids_7x[i],
3347                                 0,
3348                                 AC_VERB_SET_DIGI_CONVERT_1,
3349                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
3350                 /* set the stream id */
3351                 snd_hda_codec_write(codec,
3352                                 nvhdmi_con_nids_7x[i],
3353                                 0,
3354                                 AC_VERB_SET_CHANNEL_STREAMID,
3355                                 (stream_tag << 4) | channel_id);
3356                 /* set the stream format */
3357                 snd_hda_codec_write(codec,
3358                                 nvhdmi_con_nids_7x[i],
3359                                 0,
3360                                 AC_VERB_SET_STREAM_FORMAT,
3361                                 format);
3362                 /* turn on again (if needed) */
3363                 /* enable and set the channel status audio/data flag */
3364                 if (codec->spdif_status_reset &&
3365                 (spdif->ctls & AC_DIG1_ENABLE)) {
3366                         snd_hda_codec_write(codec,
3367                                         nvhdmi_con_nids_7x[i],
3368                                         0,
3369                                         AC_VERB_SET_DIGI_CONVERT_1,
3370                                         spdif->ctls & 0xff);
3371                         snd_hda_codec_write(codec,
3372                                         nvhdmi_con_nids_7x[i],
3373                                         0,
3374                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
3375                 }
3376         }
3377
3378         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
3379
3380         mutex_unlock(&codec->spdif_mutex);
3381         return 0;
3382 }
3383
3384 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
3385         .substreams = 1,
3386         .channels_min = 2,
3387         .channels_max = 8,
3388         .nid = nvhdmi_master_con_nid_7x,
3389         .rates = SUPPORTED_RATES,
3390         .maxbps = SUPPORTED_MAXBPS,
3391         .formats = SUPPORTED_FORMATS,
3392         .ops = {
3393                 .open = simple_playback_pcm_open,
3394                 .close = nvhdmi_8ch_7x_pcm_close,
3395                 .prepare = nvhdmi_8ch_7x_pcm_prepare
3396         },
3397 };
3398
3399 static int patch_nvhdmi_2ch(struct hda_codec *codec)
3400 {
3401         struct hdmi_spec *spec;
3402         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
3403                                     nvhdmi_master_pin_nid_7x);
3404         if (err < 0)
3405                 return err;
3406
3407         codec->patch_ops.init = nvhdmi_7x_init_2ch;
3408         /* override the PCM rates, etc, as the codec doesn't give full list */
3409         spec = codec->spec;
3410         spec->pcm_playback.rates = SUPPORTED_RATES;
3411         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
3412         spec->pcm_playback.formats = SUPPORTED_FORMATS;
3413         return 0;
3414 }
3415
3416 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
3417 {
3418         struct hdmi_spec *spec = codec->spec;
3419         int err = simple_playback_build_pcms(codec);
3420         if (!err) {
3421                 struct hda_pcm *info = get_pcm_rec(spec, 0);
3422                 info->own_chmap = true;
3423         }
3424         return err;
3425 }
3426
3427 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
3428 {
3429         struct hdmi_spec *spec = codec->spec;
3430         struct hda_pcm *info;
3431         struct snd_pcm_chmap *chmap;
3432         int err;
3433
3434         err = simple_playback_build_controls(codec);
3435         if (err < 0)
3436                 return err;
3437
3438         /* add channel maps */
3439         info = get_pcm_rec(spec, 0);
3440         err = snd_pcm_add_chmap_ctls(info->pcm,
3441                                      SNDRV_PCM_STREAM_PLAYBACK,
3442                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
3443         if (err < 0)
3444                 return err;
3445         switch (codec->preset->vendor_id) {
3446         case 0x10de0002:
3447         case 0x10de0003:
3448         case 0x10de0005:
3449         case 0x10de0006:
3450                 chmap->channel_mask = (1U << 2) | (1U << 8);
3451                 break;
3452         case 0x10de0007:
3453                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
3454         }
3455         return 0;
3456 }
3457
3458 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
3459 {
3460         struct hdmi_spec *spec;
3461         int err = patch_nvhdmi_2ch(codec);
3462         if (err < 0)
3463                 return err;
3464         spec = codec->spec;
3465         spec->multiout.max_channels = 8;
3466         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
3467         codec->patch_ops.init = nvhdmi_7x_init_8ch;
3468         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
3469         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
3470
3471         /* Initialize the audio infoframe channel mask and checksum to something
3472          * valid */
3473         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
3474
3475         return 0;
3476 }
3477
3478 /*
3479  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
3480  * - 0x10de0015
3481  * - 0x10de0040
3482  */
3483 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
3484                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
3485 {
3486         if (cap->ca_index == 0x00 && channels == 2)
3487                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
3488
3489         /* If the speaker allocation matches the channel count, it is OK. */
3490         if (cap->channels != channels)
3491                 return -1;
3492
3493         /* all channels are remappable freely */
3494         return SNDRV_CTL_TLVT_CHMAP_VAR;
3495 }
3496
3497 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
3498                 int ca, int chs, unsigned char *map)
3499 {
3500         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
3501                 return -EINVAL;
3502
3503         return 0;
3504 }
3505
3506 /* map from pin NID to port; port is 0-based */
3507 /* for Nvidia: assume widget NID starting from 4, with step 1 (4, 5, 6, ...) */
3508 static int nvhdmi_pin2port(void *audio_ptr, int pin_nid)
3509 {
3510         return pin_nid - 4;
3511 }
3512
3513 /* reverse-map from port to pin NID: see above */
3514 static int nvhdmi_port2pin(struct hda_codec *codec, int port)
3515 {
3516         return port + 4;
3517 }
3518
3519 static const struct drm_audio_component_audio_ops nvhdmi_audio_ops = {
3520         .pin2port = nvhdmi_pin2port,
3521         .pin_eld_notify = generic_acomp_pin_eld_notify,
3522         .master_bind = generic_acomp_master_bind,
3523         .master_unbind = generic_acomp_master_unbind,
3524 };
3525
3526 static int patch_nvhdmi(struct hda_codec *codec)
3527 {
3528         struct hdmi_spec *spec;
3529         int err;
3530
3531         err = alloc_generic_hdmi(codec);
3532         if (err < 0)
3533                 return err;
3534         codec->dp_mst = true;
3535
3536         spec = codec->spec;
3537         spec->dyn_pcm_assign = true;
3538
3539         err = hdmi_parse_codec(codec);
3540         if (err < 0) {
3541                 generic_spec_free(codec);
3542                 return err;
3543         }
3544
3545         generic_hdmi_init_per_pins(codec);
3546
3547         spec->dyn_pin_out = true;
3548
3549         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3550                 nvhdmi_chmap_cea_alloc_validate_get_type;
3551         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3552
3553         codec->link_down_at_suspend = 1;
3554
3555         generic_acomp_init(codec, &nvhdmi_audio_ops, nvhdmi_port2pin);
3556
3557         return 0;
3558 }
3559
3560 static int patch_nvhdmi_legacy(struct hda_codec *codec)
3561 {
3562         struct hdmi_spec *spec;
3563         int err;
3564
3565         err = patch_generic_hdmi(codec);
3566         if (err)
3567                 return err;
3568
3569         spec = codec->spec;
3570         spec->dyn_pin_out = true;
3571
3572         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3573                 nvhdmi_chmap_cea_alloc_validate_get_type;
3574         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
3575
3576         codec->link_down_at_suspend = 1;
3577
3578         return 0;
3579 }
3580
3581 /*
3582  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
3583  * accessed using vendor-defined verbs. These registers can be used for
3584  * interoperability between the HDA and HDMI drivers.
3585  */
3586
3587 /* Audio Function Group node */
3588 #define NVIDIA_AFG_NID 0x01
3589
3590 /*
3591  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
3592  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
3593  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
3594  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
3595  * additional bit (at position 30) to signal the validity of the format.
3596  *
3597  * | 31      | 30    | 29  16 | 15   0 |
3598  * +---------+-------+--------+--------+
3599  * | TRIGGER | VALID | UNUSED | FORMAT |
3600  * +-----------------------------------|
3601  *
3602  * Note that for the trigger bit to take effect it needs to change value
3603  * (i.e. it needs to be toggled).
3604  */
3605 #define NVIDIA_GET_SCRATCH0             0xfa6
3606 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
3607 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
3608 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
3609 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
3610 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
3611 #define NVIDIA_SCRATCH_VALID   (1 << 6)
3612
3613 #define NVIDIA_GET_SCRATCH1             0xfab
3614 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
3615 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
3616 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
3617 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
3618
3619 /*
3620  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
3621  * the format is invalidated so that the HDMI codec can be disabled.
3622  */
3623 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
3624 {
3625         unsigned int value;
3626
3627         /* bits [31:30] contain the trigger and valid bits */
3628         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
3629                                    NVIDIA_GET_SCRATCH0, 0);
3630         value = (value >> 24) & 0xff;
3631
3632         /* bits [15:0] are used to store the HDA format */
3633         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3634                             NVIDIA_SET_SCRATCH0_BYTE0,
3635                             (format >> 0) & 0xff);
3636         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3637                             NVIDIA_SET_SCRATCH0_BYTE1,
3638                             (format >> 8) & 0xff);
3639
3640         /* bits [16:24] are unused */
3641         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3642                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
3643
3644         /*
3645          * Bit 30 signals that the data is valid and hence that HDMI audio can
3646          * be enabled.
3647          */
3648         if (format == 0)
3649                 value &= ~NVIDIA_SCRATCH_VALID;
3650         else
3651                 value |= NVIDIA_SCRATCH_VALID;
3652
3653         /*
3654          * Whenever the trigger bit is toggled, an interrupt is raised in the
3655          * HDMI codec. The HDMI driver will use that as trigger to update its
3656          * configuration.
3657          */
3658         value ^= NVIDIA_SCRATCH_TRIGGER;
3659
3660         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
3661                             NVIDIA_SET_SCRATCH0_BYTE3, value);
3662 }
3663
3664 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
3665                                   struct hda_codec *codec,
3666                                   unsigned int stream_tag,
3667                                   unsigned int format,
3668                                   struct snd_pcm_substream *substream)
3669 {
3670         int err;
3671
3672         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
3673                                                 format, substream);
3674         if (err < 0)
3675                 return err;
3676
3677         /* notify the HDMI codec of the format change */
3678         tegra_hdmi_set_format(codec, format);
3679
3680         return 0;
3681 }
3682
3683 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3684                                   struct hda_codec *codec,
3685                                   struct snd_pcm_substream *substream)
3686 {
3687         /* invalidate the format in the HDMI codec */
3688         tegra_hdmi_set_format(codec, 0);
3689
3690         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3691 }
3692
3693 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3694 {
3695         struct hdmi_spec *spec = codec->spec;
3696         unsigned int i;
3697
3698         for (i = 0; i < spec->num_pins; i++) {
3699                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3700
3701                 if (pcm->pcm_type == type)
3702                         return pcm;
3703         }
3704
3705         return NULL;
3706 }
3707
3708 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3709 {
3710         struct hda_pcm_stream *stream;
3711         struct hda_pcm *pcm;
3712         int err;
3713
3714         err = generic_hdmi_build_pcms(codec);
3715         if (err < 0)
3716                 return err;
3717
3718         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3719         if (!pcm)
3720                 return -ENODEV;
3721
3722         /*
3723          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3724          * codec about format changes.
3725          */
3726         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3727         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3728         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3729
3730         return 0;
3731 }
3732
3733 static int patch_tegra_hdmi(struct hda_codec *codec)
3734 {
3735         int err;
3736
3737         err = patch_generic_hdmi(codec);
3738         if (err)
3739                 return err;
3740
3741         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3742
3743         return 0;
3744 }
3745
3746 /*
3747  * ATI/AMD-specific implementations
3748  */
3749
3750 #define is_amdhdmi_rev3_or_later(codec) \
3751         ((codec)->core.vendor_id == 0x1002aa01 && \
3752          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3753 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3754
3755 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3756 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3757 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3758 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3759 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3760 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3761 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3762 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3763 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3764 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3765 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3766 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3767 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3768 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3769 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3770 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3771 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3772 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3773 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3774 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3775 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3776 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3777 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3778 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3779 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3780
3781 /* AMD specific HDA cvt verbs */
3782 #define ATI_VERB_SET_RAMP_RATE          0x770
3783 #define ATI_VERB_GET_RAMP_RATE          0xf70
3784
3785 #define ATI_OUT_ENABLE 0x1
3786
3787 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3788 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3789
3790 #define ATI_HBR_CAPABLE 0x01
3791 #define ATI_HBR_ENABLE 0x10
3792
3793 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3794                                int dev_id, unsigned char *buf, int *eld_size)
3795 {
3796         WARN_ON(dev_id != 0);
3797         /* call hda_eld.c ATI/AMD-specific function */
3798         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3799                                     is_amdhdmi_rev3_or_later(codec));
3800 }
3801
3802 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec,
3803                                         hda_nid_t pin_nid, int dev_id, int ca,
3804                                         int active_channels, int conn_type)
3805 {
3806         WARN_ON(dev_id != 0);
3807         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3808 }
3809
3810 static int atihdmi_paired_swap_fc_lfe(int pos)
3811 {
3812         /*
3813          * ATI/AMD have automatic FC/LFE swap built-in
3814          * when in pairwise mapping mode.
3815          */
3816
3817         switch (pos) {
3818                 /* see channel_allocations[].speakers[] */
3819                 case 2: return 3;
3820                 case 3: return 2;
3821                 default: break;
3822         }
3823
3824         return pos;
3825 }
3826
3827 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3828                         int ca, int chs, unsigned char *map)
3829 {
3830         struct hdac_cea_channel_speaker_allocation *cap;
3831         int i, j;
3832
3833         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3834
3835         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3836         for (i = 0; i < chs; ++i) {
3837                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3838                 bool ok = false;
3839                 bool companion_ok = false;
3840
3841                 if (!mask)
3842                         continue;
3843
3844                 for (j = 0 + i % 2; j < 8; j += 2) {
3845                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3846                         if (cap->speakers[chan_idx] == mask) {
3847                                 /* channel is in a supported position */
3848                                 ok = true;
3849
3850                                 if (i % 2 == 0 && i + 1 < chs) {
3851                                         /* even channel, check the odd companion */
3852                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3853                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3854                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3855
3856                                         if (comp_mask_req == comp_mask_act)
3857                                                 companion_ok = true;
3858                                         else
3859                                                 return -EINVAL;
3860                                 }
3861                                 break;
3862                         }
3863                 }
3864
3865                 if (!ok)
3866                         return -EINVAL;
3867
3868                 if (companion_ok)
3869                         i++; /* companion channel already checked */
3870         }
3871
3872         return 0;
3873 }
3874
3875 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3876                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3877 {
3878         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3879         int verb;
3880         int ati_channel_setup = 0;
3881
3882         if (hdmi_slot > 7)
3883                 return -EINVAL;
3884
3885         if (!has_amd_full_remap_support(codec)) {
3886                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3887
3888                 /* In case this is an odd slot but without stream channel, do not
3889                  * disable the slot since the corresponding even slot could have a
3890                  * channel. In case neither have a channel, the slot pair will be
3891                  * disabled when this function is called for the even slot. */
3892                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3893                         return 0;
3894
3895                 hdmi_slot -= hdmi_slot % 2;
3896
3897                 if (stream_channel != 0xf)
3898                         stream_channel -= stream_channel % 2;
3899         }
3900
3901         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3902
3903         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3904
3905         if (stream_channel != 0xf)
3906                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3907
3908         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3909 }
3910
3911 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3912                                 hda_nid_t pin_nid, int asp_slot)
3913 {
3914         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3915         bool was_odd = false;
3916         int ati_asp_slot = asp_slot;
3917         int verb;
3918         int ati_channel_setup;
3919
3920         if (asp_slot > 7)
3921                 return -EINVAL;
3922
3923         if (!has_amd_full_remap_support(codec)) {
3924                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3925                 if (ati_asp_slot % 2 != 0) {
3926                         ati_asp_slot -= 1;
3927                         was_odd = true;
3928                 }
3929         }
3930
3931         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3932
3933         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3934
3935         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3936                 return 0xf;
3937
3938         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3939 }
3940
3941 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3942                 struct hdac_chmap *chmap,
3943                 struct hdac_cea_channel_speaker_allocation *cap,
3944                 int channels)
3945 {
3946         int c;
3947
3948         /*
3949          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3950          * we need to take that into account (a single channel may take 2
3951          * channel slots if we need to carry a silent channel next to it).
3952          * On Rev3+ AMD codecs this function is not used.
3953          */
3954         int chanpairs = 0;
3955
3956         /* We only produce even-numbered channel count TLVs */
3957         if ((channels % 2) != 0)
3958                 return -1;
3959
3960         for (c = 0; c < 7; c += 2) {
3961                 if (cap->speakers[c] || cap->speakers[c+1])
3962                         chanpairs++;
3963         }
3964
3965         if (chanpairs * 2 != channels)
3966                 return -1;
3967
3968         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3969 }
3970
3971 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3972                 struct hdac_cea_channel_speaker_allocation *cap,
3973                 unsigned int *chmap, int channels)
3974 {
3975         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3976         int count = 0;
3977         int c;
3978
3979         for (c = 7; c >= 0; c--) {
3980                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3981                 int spk = cap->speakers[chan];
3982                 if (!spk) {
3983                         /* add N/A channel if the companion channel is occupied */
3984                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3985                                 chmap[count++] = SNDRV_CHMAP_NA;
3986
3987                         continue;
3988                 }
3989
3990                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3991         }
3992
3993         WARN_ON(count != channels);
3994 }
3995
3996 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3997                                  int dev_id, bool hbr)
3998 {
3999         int hbr_ctl, hbr_ctl_new;
4000
4001         WARN_ON(dev_id != 0);
4002
4003         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
4004         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
4005                 if (hbr)
4006                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
4007                 else
4008                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
4009
4010                 codec_dbg(codec,
4011                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
4012                                 pin_nid,
4013                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
4014                                 hbr_ctl_new);
4015
4016                 if (hbr_ctl != hbr_ctl_new)
4017                         snd_hda_codec_write(codec, pin_nid, 0,
4018                                                 ATI_VERB_SET_HBR_CONTROL,
4019                                                 hbr_ctl_new);
4020
4021         } else if (hbr)
4022                 return -EINVAL;
4023
4024         return 0;
4025 }
4026
4027 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
4028                                 hda_nid_t pin_nid, int dev_id,
4029                                 u32 stream_tag, int format)
4030 {
4031         if (is_amdhdmi_rev3_or_later(codec)) {
4032                 int ramp_rate = 180; /* default as per AMD spec */
4033                 /* disable ramp-up/down for non-pcm as per AMD spec */
4034                 if (format & AC_FMT_TYPE_NON_PCM)
4035                         ramp_rate = 0;
4036
4037                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
4038         }
4039
4040         return hdmi_setup_stream(codec, cvt_nid, pin_nid, dev_id,
4041                                  stream_tag, format);
4042 }
4043
4044
4045 static int atihdmi_init(struct hda_codec *codec)
4046 {
4047         struct hdmi_spec *spec = codec->spec;
4048         int pin_idx, err;
4049
4050         err = generic_hdmi_init(codec);
4051
4052         if (err)
4053                 return err;
4054
4055         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
4056                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
4057
4058                 /* make sure downmix information in infoframe is zero */
4059                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
4060
4061                 /* enable channel-wise remap mode if supported */
4062                 if (has_amd_full_remap_support(codec))
4063                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
4064                                             ATI_VERB_SET_MULTICHANNEL_MODE,
4065                                             ATI_MULTICHANNEL_MODE_SINGLE);
4066         }
4067         codec->auto_runtime_pm = 1;
4068
4069         return 0;
4070 }
4071
4072 /* map from pin NID to port; port is 0-based */
4073 /* for AMD: assume widget NID starting from 3, with step 2 (3, 5, 7, ...) */
4074 static int atihdmi_pin2port(void *audio_ptr, int pin_nid)
4075 {
4076         return pin_nid / 2 - 1;
4077 }
4078
4079 /* reverse-map from port to pin NID: see above */
4080 static int atihdmi_port2pin(struct hda_codec *codec, int port)
4081 {
4082         return port * 2 + 3;
4083 }
4084
4085 static const struct drm_audio_component_audio_ops atihdmi_audio_ops = {
4086         .pin2port = atihdmi_pin2port,
4087         .pin_eld_notify = generic_acomp_pin_eld_notify,
4088         .master_bind = generic_acomp_master_bind,
4089         .master_unbind = generic_acomp_master_unbind,
4090 };
4091
4092 static int patch_atihdmi(struct hda_codec *codec)
4093 {
4094         struct hdmi_spec *spec;
4095         struct hdmi_spec_per_cvt *per_cvt;
4096         int err, cvt_idx;
4097
4098         err = patch_generic_hdmi(codec);
4099
4100         if (err)
4101                 return err;
4102
4103         codec->patch_ops.init = atihdmi_init;
4104
4105         spec = codec->spec;
4106
4107         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
4108         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
4109         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
4110         spec->ops.setup_stream = atihdmi_setup_stream;
4111
4112         spec->chmap.ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
4113         spec->chmap.ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
4114
4115         if (!has_amd_full_remap_support(codec)) {
4116                 /* override to ATI/AMD-specific versions with pairwise mapping */
4117                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
4118                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
4119                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
4120                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
4121                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
4122         }
4123
4124         /* ATI/AMD converters do not advertise all of their capabilities */
4125         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
4126                 per_cvt = get_cvt(spec, cvt_idx);
4127                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
4128                 per_cvt->rates |= SUPPORTED_RATES;
4129                 per_cvt->formats |= SUPPORTED_FORMATS;
4130                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
4131         }
4132
4133         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
4134
4135         /* AMD GPUs have neither EPSS nor CLKSTOP bits, hence preventing
4136          * the link-down as is.  Tell the core to allow it.
4137          */
4138         codec->link_down_at_suspend = 1;
4139
4140         generic_acomp_init(codec, &atihdmi_audio_ops, atihdmi_port2pin);
4141
4142         return 0;
4143 }
4144
4145 /* VIA HDMI Implementation */
4146 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
4147 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
4148
4149 static int patch_via_hdmi(struct hda_codec *codec)
4150 {
4151         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
4152 }
4153
4154 /*
4155  * patch entries
4156  */
4157 static const struct hda_device_id snd_hda_id_hdmi[] = {
4158 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
4159 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
4160 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
4161 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
4162 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
4163 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
4164 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
4165 HDA_CODEC_ENTRY(0x10de0001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4166 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4167 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4168 HDA_CODEC_ENTRY(0x10de0004, "GPU 04 HDMI",      patch_nvhdmi_8ch_7x),
4169 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4170 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
4171 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
4172 HDA_CODEC_ENTRY(0x10de0008, "GPU 08 HDMI/DP",   patch_nvhdmi_legacy),
4173 HDA_CODEC_ENTRY(0x10de0009, "GPU 09 HDMI/DP",   patch_nvhdmi_legacy),
4174 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi_legacy),
4175 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi_legacy),
4176 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi_legacy),
4177 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi_legacy),
4178 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi_legacy),
4179 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi_legacy),
4180 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi_legacy),
4181 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi_legacy),
4182 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi_legacy),
4183 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi_legacy),
4184 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi_legacy),
4185 /* 17 is known to be absent */
4186 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi_legacy),
4187 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi_legacy),
4188 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi_legacy),
4189 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi_legacy),
4190 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi_legacy),
4191 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
4192 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
4193 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
4194 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
4195 HDA_CODEC_ENTRY(0x10de002d, "Tegra186 HDMI/DP0", patch_tegra_hdmi),
4196 HDA_CODEC_ENTRY(0x10de002e, "Tegra186 HDMI/DP1", patch_tegra_hdmi),
4197 HDA_CODEC_ENTRY(0x10de002f, "Tegra194 HDMI/DP2", patch_tegra_hdmi),
4198 HDA_CODEC_ENTRY(0x10de0030, "Tegra194 HDMI/DP3", patch_tegra_hdmi),
4199 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
4200 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
4201 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
4202 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
4203 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
4204 HDA_CODEC_ENTRY(0x10de0045, "GPU 45 HDMI/DP",   patch_nvhdmi),
4205 HDA_CODEC_ENTRY(0x10de0050, "GPU 50 HDMI/DP",   patch_nvhdmi),
4206 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
4207 HDA_CODEC_ENTRY(0x10de0052, "GPU 52 HDMI/DP",   patch_nvhdmi),
4208 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
4209 HDA_CODEC_ENTRY(0x10de0061, "GPU 61 HDMI/DP",   patch_nvhdmi),
4210 HDA_CODEC_ENTRY(0x10de0062, "GPU 62 HDMI/DP",   patch_nvhdmi),
4211 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
4212 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
4213 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
4214 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
4215 HDA_CODEC_ENTRY(0x10de0073, "GPU 73 HDMI/DP",   patch_nvhdmi),
4216 HDA_CODEC_ENTRY(0x10de0074, "GPU 74 HDMI/DP",   patch_nvhdmi),
4217 HDA_CODEC_ENTRY(0x10de0076, "GPU 76 HDMI/DP",   patch_nvhdmi),
4218 HDA_CODEC_ENTRY(0x10de007b, "GPU 7b HDMI/DP",   patch_nvhdmi),
4219 HDA_CODEC_ENTRY(0x10de007c, "GPU 7c HDMI/DP",   patch_nvhdmi),
4220 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
4221 HDA_CODEC_ENTRY(0x10de007e, "GPU 7e HDMI/DP",   patch_nvhdmi),
4222 HDA_CODEC_ENTRY(0x10de0080, "GPU 80 HDMI/DP",   patch_nvhdmi),
4223 HDA_CODEC_ENTRY(0x10de0081, "GPU 81 HDMI/DP",   patch_nvhdmi),
4224 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
4225 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
4226 HDA_CODEC_ENTRY(0x10de0084, "GPU 84 HDMI/DP",   patch_nvhdmi),
4227 HDA_CODEC_ENTRY(0x10de0090, "GPU 90 HDMI/DP",   patch_nvhdmi),
4228 HDA_CODEC_ENTRY(0x10de0091, "GPU 91 HDMI/DP",   patch_nvhdmi),
4229 HDA_CODEC_ENTRY(0x10de0092, "GPU 92 HDMI/DP",   patch_nvhdmi),
4230 HDA_CODEC_ENTRY(0x10de0093, "GPU 93 HDMI/DP",   patch_nvhdmi),
4231 HDA_CODEC_ENTRY(0x10de0094, "GPU 94 HDMI/DP",   patch_nvhdmi),
4232 HDA_CODEC_ENTRY(0x10de0095, "GPU 95 HDMI/DP",   patch_nvhdmi),
4233 HDA_CODEC_ENTRY(0x10de0097, "GPU 97 HDMI/DP",   patch_nvhdmi),
4234 HDA_CODEC_ENTRY(0x10de0098, "GPU 98 HDMI/DP",   patch_nvhdmi),
4235 HDA_CODEC_ENTRY(0x10de0099, "GPU 99 HDMI/DP",   patch_nvhdmi),
4236 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
4237 HDA_CODEC_ENTRY(0x10de8067, "MCP67/68 HDMI",    patch_nvhdmi_2ch),
4238 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
4239 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
4240 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
4241 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
4242 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4243 HDA_CODEC_ENTRY(0x80862800, "Geminilake HDMI",  patch_i915_glk_hdmi),
4244 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
4245 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
4246 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
4247 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_i915_cpt_hdmi),
4248 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_i915_cpt_hdmi),
4249 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_i915_cpt_hdmi),
4250 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_i915_hsw_hdmi),
4251 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_i915_hsw_hdmi),
4252 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_i915_hsw_hdmi),
4253 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_i915_hsw_hdmi),
4254 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_i915_hsw_hdmi),
4255 HDA_CODEC_ENTRY(0x8086280c, "Cannonlake HDMI",  patch_i915_glk_hdmi),
4256 HDA_CODEC_ENTRY(0x8086280d, "Geminilake HDMI",  patch_i915_glk_hdmi),
4257 HDA_CODEC_ENTRY(0x8086280f, "Icelake HDMI",     patch_i915_icl_hdmi),
4258 HDA_CODEC_ENTRY(0x80862812, "Tigerlake HDMI",   patch_i915_tgl_hdmi),
4259 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
4260 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_i915_byt_hdmi),
4261 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_i915_byt_hdmi),
4262 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
4263 /* special ID for generic HDMI */
4264 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
4265 {} /* terminator */
4266 };
4267 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
4268
4269 MODULE_LICENSE("GPL");
4270 MODULE_DESCRIPTION("HDMI HD-audio codec");
4271 MODULE_ALIAS("snd-hda-codec-intelhdmi");
4272 MODULE_ALIAS("snd-hda-codec-nvhdmi");
4273 MODULE_ALIAS("snd-hda-codec-atihdmi");
4274
4275 static struct hda_codec_driver hdmi_driver = {
4276         .id = snd_hda_id_hdmi,
4277 };
4278
4279 module_hda_codec_driver(hdmi_driver);