]> asedeno.scripts.mit.edu Git - linux.git/blob - sound/pci/hda/patch_hdmi.c
Merge branches 'acpi-processor', 'acpi-hotplug', 'acpi-init', 'acpi-pm' and 'acpica'
[linux.git] / sound / pci / hda / patch_hdmi.c
1 /*
2  *
3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
4  *
5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6  *  Copyright (c) 2006 ATI Technologies Inc.
7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
10  *
11  *  Authors:
12  *                      Wu Fengguang <wfg@linux.intel.com>
13  *
14  *  Maintained by:
15  *                      Wu Fengguang <wfg@linux.intel.com>
16  *
17  *  This program is free software; you can redistribute it and/or modify it
18  *  under the terms of the GNU General Public License as published by the Free
19  *  Software Foundation; either version 2 of the License, or (at your option)
20  *  any later version.
21  *
22  *  This program is distributed in the hope that it will be useful, but
23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
25  *  for more details.
26  *
27  *  You should have received a copy of the GNU General Public License
28  *  along with this program; if not, write to the Free Software Foundation,
29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
30  */
31
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/slab.h>
35 #include <linux/module.h>
36 #include <sound/core.h>
37 #include <sound/jack.h>
38 #include <sound/asoundef.h>
39 #include <sound/tlv.h>
40 #include "hda_codec.h"
41 #include "hda_local.h"
42 #include "hda_jack.h"
43
44 static bool static_hdmi_pcm;
45 module_param(static_hdmi_pcm, bool, 0644);
46 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
47
48 #define is_haswell(codec)  ((codec)->vendor_id == 0x80862807)
49 #define is_broadwell(codec)    ((codec)->vendor_id == 0x80862808)
50 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec))
51
52 #define is_valleyview(codec) ((codec)->vendor_id == 0x80862882)
53
54 struct hdmi_spec_per_cvt {
55         hda_nid_t cvt_nid;
56         int assigned;
57         unsigned int channels_min;
58         unsigned int channels_max;
59         u32 rates;
60         u64 formats;
61         unsigned int maxbps;
62 };
63
64 /* max. connections to a widget */
65 #define HDA_MAX_CONNECTIONS     32
66
67 struct hdmi_spec_per_pin {
68         hda_nid_t pin_nid;
69         int num_mux_nids;
70         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
71         hda_nid_t cvt_nid;
72
73         struct hda_codec *codec;
74         struct hdmi_eld sink_eld;
75         struct mutex lock;
76         struct delayed_work work;
77         struct snd_kcontrol *eld_ctl;
78         int repoll_count;
79         bool setup; /* the stream has been set up by prepare callback */
80         int channels; /* current number of channels */
81         bool non_pcm;
82         bool chmap_set;         /* channel-map override by ALSA API? */
83         unsigned char chmap[8]; /* ALSA API channel-map */
84         char pcm_name[8];       /* filled in build_pcm callbacks */
85 #ifdef CONFIG_PROC_FS
86         struct snd_info_entry *proc_entry;
87 #endif
88 };
89
90 struct cea_channel_speaker_allocation;
91
92 /* operations used by generic code that can be overridden by patches */
93 struct hdmi_ops {
94         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
95                            unsigned char *buf, int *eld_size);
96
97         /* get and set channel assigned to each HDMI ASP (audio sample packet) slot */
98         int (*pin_get_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
99                                     int asp_slot);
100         int (*pin_set_slot_channel)(struct hda_codec *codec, hda_nid_t pin_nid,
101                                     int asp_slot, int channel);
102
103         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
104                                     int ca, int active_channels, int conn_type);
105
106         /* enable/disable HBR (HD passthrough) */
107         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
108
109         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
110                             hda_nid_t pin_nid, u32 stream_tag, int format);
111
112         /* Helpers for producing the channel map TLVs. These can be overridden
113          * for devices that have non-standard mapping requirements. */
114         int (*chmap_cea_alloc_validate_get_type)(struct cea_channel_speaker_allocation *cap,
115                                                  int channels);
116         void (*cea_alloc_to_tlv_chmap)(struct cea_channel_speaker_allocation *cap,
117                                        unsigned int *chmap, int channels);
118
119         /* check that the user-given chmap is supported */
120         int (*chmap_validate)(int ca, int channels, unsigned char *chmap);
121 };
122
123 struct hdmi_spec {
124         int num_cvts;
125         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
126         hda_nid_t cvt_nids[4]; /* only for haswell fix */
127
128         int num_pins;
129         struct snd_array pins; /* struct hdmi_spec_per_pin */
130         struct snd_array pcm_rec; /* struct hda_pcm */
131         unsigned int channels_max; /* max over all cvts */
132
133         struct hdmi_eld temp_eld;
134         struct hdmi_ops ops;
135         /*
136          * Non-generic VIA/NVIDIA specific
137          */
138         struct hda_multi_out multiout;
139         struct hda_pcm_stream pcm_playback;
140 };
141
142
143 struct hdmi_audio_infoframe {
144         u8 type; /* 0x84 */
145         u8 ver;  /* 0x01 */
146         u8 len;  /* 0x0a */
147
148         u8 checksum;
149
150         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
151         u8 SS01_SF24;
152         u8 CXT04;
153         u8 CA;
154         u8 LFEPBL01_LSV36_DM_INH7;
155 };
156
157 struct dp_audio_infoframe {
158         u8 type; /* 0x84 */
159         u8 len;  /* 0x1b */
160         u8 ver;  /* 0x11 << 2 */
161
162         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
163         u8 SS01_SF24;
164         u8 CXT04;
165         u8 CA;
166         u8 LFEPBL01_LSV36_DM_INH7;
167 };
168
169 union audio_infoframe {
170         struct hdmi_audio_infoframe hdmi;
171         struct dp_audio_infoframe dp;
172         u8 bytes[0];
173 };
174
175 /*
176  * CEA speaker placement:
177  *
178  *        FLH       FCH        FRH
179  *  FLW    FL  FLC   FC   FRC   FR   FRW
180  *
181  *                                  LFE
182  *                     TC
183  *
184  *          RL  RLC   RC   RRC   RR
185  *
186  * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
187  * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
188  */
189 enum cea_speaker_placement {
190         FL  = (1 <<  0),        /* Front Left           */
191         FC  = (1 <<  1),        /* Front Center         */
192         FR  = (1 <<  2),        /* Front Right          */
193         FLC = (1 <<  3),        /* Front Left Center    */
194         FRC = (1 <<  4),        /* Front Right Center   */
195         RL  = (1 <<  5),        /* Rear Left            */
196         RC  = (1 <<  6),        /* Rear Center          */
197         RR  = (1 <<  7),        /* Rear Right           */
198         RLC = (1 <<  8),        /* Rear Left Center     */
199         RRC = (1 <<  9),        /* Rear Right Center    */
200         LFE = (1 << 10),        /* Low Frequency Effect */
201         FLW = (1 << 11),        /* Front Left Wide      */
202         FRW = (1 << 12),        /* Front Right Wide     */
203         FLH = (1 << 13),        /* Front Left High      */
204         FCH = (1 << 14),        /* Front Center High    */
205         FRH = (1 << 15),        /* Front Right High     */
206         TC  = (1 << 16),        /* Top Center           */
207 };
208
209 /*
210  * ELD SA bits in the CEA Speaker Allocation data block
211  */
212 static int eld_speaker_allocation_bits[] = {
213         [0] = FL | FR,
214         [1] = LFE,
215         [2] = FC,
216         [3] = RL | RR,
217         [4] = RC,
218         [5] = FLC | FRC,
219         [6] = RLC | RRC,
220         /* the following are not defined in ELD yet */
221         [7] = FLW | FRW,
222         [8] = FLH | FRH,
223         [9] = TC,
224         [10] = FCH,
225 };
226
227 struct cea_channel_speaker_allocation {
228         int ca_index;
229         int speakers[8];
230
231         /* derived values, just for convenience */
232         int channels;
233         int spk_mask;
234 };
235
236 /*
237  * ALSA sequence is:
238  *
239  *       surround40   surround41   surround50   surround51   surround71
240  * ch0   front left   =            =            =            =
241  * ch1   front right  =            =            =            =
242  * ch2   rear left    =            =            =            =
243  * ch3   rear right   =            =            =            =
244  * ch4                LFE          center       center       center
245  * ch5                                          LFE          LFE
246  * ch6                                                       side left
247  * ch7                                                       side right
248  *
249  * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
250  */
251 static int hdmi_channel_mapping[0x32][8] = {
252         /* stereo */
253         [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
254         /* 2.1 */
255         [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
256         /* Dolby Surround */
257         [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
258         /* surround40 */
259         [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
260         /* 4ch */
261         [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
262         /* surround41 */
263         [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
264         /* surround50 */
265         [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
266         /* surround51 */
267         [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
268         /* 7.1 */
269         [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
270 };
271
272 /*
273  * This is an ordered list!
274  *
275  * The preceding ones have better chances to be selected by
276  * hdmi_channel_allocation().
277  */
278 static struct cea_channel_speaker_allocation channel_allocations[] = {
279 /*                        channel:   7     6    5    4    3     2    1    0  */
280 { .ca_index = 0x00,  .speakers = {   0,    0,   0,   0,   0,    0,  FR,  FL } },
281                                  /* 2.1 */
282 { .ca_index = 0x01,  .speakers = {   0,    0,   0,   0,   0,  LFE,  FR,  FL } },
283                                  /* Dolby Surround */
284 { .ca_index = 0x02,  .speakers = {   0,    0,   0,   0,  FC,    0,  FR,  FL } },
285                                  /* surround40 */
286 { .ca_index = 0x08,  .speakers = {   0,    0,  RR,  RL,   0,    0,  FR,  FL } },
287                                  /* surround41 */
288 { .ca_index = 0x09,  .speakers = {   0,    0,  RR,  RL,   0,  LFE,  FR,  FL } },
289                                  /* surround50 */
290 { .ca_index = 0x0a,  .speakers = {   0,    0,  RR,  RL,  FC,    0,  FR,  FL } },
291                                  /* surround51 */
292 { .ca_index = 0x0b,  .speakers = {   0,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
293                                  /* 6.1 */
294 { .ca_index = 0x0f,  .speakers = {   0,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
295                                  /* surround71 */
296 { .ca_index = 0x13,  .speakers = { RRC,  RLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
297
298 { .ca_index = 0x03,  .speakers = {   0,    0,   0,   0,  FC,  LFE,  FR,  FL } },
299 { .ca_index = 0x04,  .speakers = {   0,    0,   0,  RC,   0,    0,  FR,  FL } },
300 { .ca_index = 0x05,  .speakers = {   0,    0,   0,  RC,   0,  LFE,  FR,  FL } },
301 { .ca_index = 0x06,  .speakers = {   0,    0,   0,  RC,  FC,    0,  FR,  FL } },
302 { .ca_index = 0x07,  .speakers = {   0,    0,   0,  RC,  FC,  LFE,  FR,  FL } },
303 { .ca_index = 0x0c,  .speakers = {   0,   RC,  RR,  RL,   0,    0,  FR,  FL } },
304 { .ca_index = 0x0d,  .speakers = {   0,   RC,  RR,  RL,   0,  LFE,  FR,  FL } },
305 { .ca_index = 0x0e,  .speakers = {   0,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
306 { .ca_index = 0x10,  .speakers = { RRC,  RLC,  RR,  RL,   0,    0,  FR,  FL } },
307 { .ca_index = 0x11,  .speakers = { RRC,  RLC,  RR,  RL,   0,  LFE,  FR,  FL } },
308 { .ca_index = 0x12,  .speakers = { RRC,  RLC,  RR,  RL,  FC,    0,  FR,  FL } },
309 { .ca_index = 0x14,  .speakers = { FRC,  FLC,   0,   0,   0,    0,  FR,  FL } },
310 { .ca_index = 0x15,  .speakers = { FRC,  FLC,   0,   0,   0,  LFE,  FR,  FL } },
311 { .ca_index = 0x16,  .speakers = { FRC,  FLC,   0,   0,  FC,    0,  FR,  FL } },
312 { .ca_index = 0x17,  .speakers = { FRC,  FLC,   0,   0,  FC,  LFE,  FR,  FL } },
313 { .ca_index = 0x18,  .speakers = { FRC,  FLC,   0,  RC,   0,    0,  FR,  FL } },
314 { .ca_index = 0x19,  .speakers = { FRC,  FLC,   0,  RC,   0,  LFE,  FR,  FL } },
315 { .ca_index = 0x1a,  .speakers = { FRC,  FLC,   0,  RC,  FC,    0,  FR,  FL } },
316 { .ca_index = 0x1b,  .speakers = { FRC,  FLC,   0,  RC,  FC,  LFE,  FR,  FL } },
317 { .ca_index = 0x1c,  .speakers = { FRC,  FLC,  RR,  RL,   0,    0,  FR,  FL } },
318 { .ca_index = 0x1d,  .speakers = { FRC,  FLC,  RR,  RL,   0,  LFE,  FR,  FL } },
319 { .ca_index = 0x1e,  .speakers = { FRC,  FLC,  RR,  RL,  FC,    0,  FR,  FL } },
320 { .ca_index = 0x1f,  .speakers = { FRC,  FLC,  RR,  RL,  FC,  LFE,  FR,  FL } },
321 { .ca_index = 0x20,  .speakers = {   0,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
322 { .ca_index = 0x21,  .speakers = {   0,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
323 { .ca_index = 0x22,  .speakers = {  TC,    0,  RR,  RL,  FC,    0,  FR,  FL } },
324 { .ca_index = 0x23,  .speakers = {  TC,    0,  RR,  RL,  FC,  LFE,  FR,  FL } },
325 { .ca_index = 0x24,  .speakers = { FRH,  FLH,  RR,  RL,   0,    0,  FR,  FL } },
326 { .ca_index = 0x25,  .speakers = { FRH,  FLH,  RR,  RL,   0,  LFE,  FR,  FL } },
327 { .ca_index = 0x26,  .speakers = { FRW,  FLW,  RR,  RL,   0,    0,  FR,  FL } },
328 { .ca_index = 0x27,  .speakers = { FRW,  FLW,  RR,  RL,   0,  LFE,  FR,  FL } },
329 { .ca_index = 0x28,  .speakers = {  TC,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
330 { .ca_index = 0x29,  .speakers = {  TC,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
331 { .ca_index = 0x2a,  .speakers = { FCH,   RC,  RR,  RL,  FC,    0,  FR,  FL } },
332 { .ca_index = 0x2b,  .speakers = { FCH,   RC,  RR,  RL,  FC,  LFE,  FR,  FL } },
333 { .ca_index = 0x2c,  .speakers = {  TC,  FCH,  RR,  RL,  FC,    0,  FR,  FL } },
334 { .ca_index = 0x2d,  .speakers = {  TC,  FCH,  RR,  RL,  FC,  LFE,  FR,  FL } },
335 { .ca_index = 0x2e,  .speakers = { FRH,  FLH,  RR,  RL,  FC,    0,  FR,  FL } },
336 { .ca_index = 0x2f,  .speakers = { FRH,  FLH,  RR,  RL,  FC,  LFE,  FR,  FL } },
337 { .ca_index = 0x30,  .speakers = { FRW,  FLW,  RR,  RL,  FC,    0,  FR,  FL } },
338 { .ca_index = 0x31,  .speakers = { FRW,  FLW,  RR,  RL,  FC,  LFE,  FR,  FL } },
339 };
340
341
342 /*
343  * HDMI routines
344  */
345
346 #define get_pin(spec, idx) \
347         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
348 #define get_cvt(spec, idx) \
349         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
350 #define get_pcm_rec(spec, idx) \
351         ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
352
353 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
354 {
355         int pin_idx;
356
357         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
358                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
359                         return pin_idx;
360
361         snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
362         return -EINVAL;
363 }
364
365 static int hinfo_to_pin_index(struct hdmi_spec *spec,
366                               struct hda_pcm_stream *hinfo)
367 {
368         int pin_idx;
369
370         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
371                 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
372                         return pin_idx;
373
374         snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
375         return -EINVAL;
376 }
377
378 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
379 {
380         int cvt_idx;
381
382         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
383                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
384                         return cvt_idx;
385
386         snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
387         return -EINVAL;
388 }
389
390 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
391                         struct snd_ctl_elem_info *uinfo)
392 {
393         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
394         struct hdmi_spec *spec = codec->spec;
395         struct hdmi_spec_per_pin *per_pin;
396         struct hdmi_eld *eld;
397         int pin_idx;
398
399         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
400
401         pin_idx = kcontrol->private_value;
402         per_pin = get_pin(spec, pin_idx);
403         eld = &per_pin->sink_eld;
404
405         mutex_lock(&per_pin->lock);
406         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
407         mutex_unlock(&per_pin->lock);
408
409         return 0;
410 }
411
412 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
413                         struct snd_ctl_elem_value *ucontrol)
414 {
415         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
416         struct hdmi_spec *spec = codec->spec;
417         struct hdmi_spec_per_pin *per_pin;
418         struct hdmi_eld *eld;
419         int pin_idx;
420
421         pin_idx = kcontrol->private_value;
422         per_pin = get_pin(spec, pin_idx);
423         eld = &per_pin->sink_eld;
424
425         mutex_lock(&per_pin->lock);
426         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
427                 mutex_unlock(&per_pin->lock);
428                 snd_BUG();
429                 return -EINVAL;
430         }
431
432         memset(ucontrol->value.bytes.data, 0,
433                ARRAY_SIZE(ucontrol->value.bytes.data));
434         if (eld->eld_valid)
435                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
436                        eld->eld_size);
437         mutex_unlock(&per_pin->lock);
438
439         return 0;
440 }
441
442 static struct snd_kcontrol_new eld_bytes_ctl = {
443         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
444         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
445         .name = "ELD",
446         .info = hdmi_eld_ctl_info,
447         .get = hdmi_eld_ctl_get,
448 };
449
450 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
451                         int device)
452 {
453         struct snd_kcontrol *kctl;
454         struct hdmi_spec *spec = codec->spec;
455         int err;
456
457         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
458         if (!kctl)
459                 return -ENOMEM;
460         kctl->private_value = pin_idx;
461         kctl->id.device = device;
462
463         err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
464         if (err < 0)
465                 return err;
466
467         get_pin(spec, pin_idx)->eld_ctl = kctl;
468         return 0;
469 }
470
471 #ifdef BE_PARANOID
472 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
473                                 int *packet_index, int *byte_index)
474 {
475         int val;
476
477         val = snd_hda_codec_read(codec, pin_nid, 0,
478                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
479
480         *packet_index = val >> 5;
481         *byte_index = val & 0x1f;
482 }
483 #endif
484
485 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
486                                 int packet_index, int byte_index)
487 {
488         int val;
489
490         val = (packet_index << 5) | (byte_index & 0x1f);
491
492         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
493 }
494
495 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
496                                 unsigned char val)
497 {
498         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
499 }
500
501 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
502 {
503         /* Unmute */
504         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
505                 snd_hda_codec_write(codec, pin_nid, 0,
506                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
507         /* Enable pin out: some machines with GM965 gets broken output when
508          * the pin is disabled or changed while using with HDMI
509          */
510         snd_hda_codec_write(codec, pin_nid, 0,
511                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
512 }
513
514 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
515 {
516         return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
517                                         AC_VERB_GET_CVT_CHAN_COUNT, 0);
518 }
519
520 static void hdmi_set_channel_count(struct hda_codec *codec,
521                                    hda_nid_t cvt_nid, int chs)
522 {
523         if (chs != hdmi_get_channel_count(codec, cvt_nid))
524                 snd_hda_codec_write(codec, cvt_nid, 0,
525                                     AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
526 }
527
528 /*
529  * ELD proc files
530  */
531
532 #ifdef CONFIG_PROC_FS
533 static void print_eld_info(struct snd_info_entry *entry,
534                            struct snd_info_buffer *buffer)
535 {
536         struct hdmi_spec_per_pin *per_pin = entry->private_data;
537
538         mutex_lock(&per_pin->lock);
539         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
540         mutex_unlock(&per_pin->lock);
541 }
542
543 static void write_eld_info(struct snd_info_entry *entry,
544                            struct snd_info_buffer *buffer)
545 {
546         struct hdmi_spec_per_pin *per_pin = entry->private_data;
547
548         mutex_lock(&per_pin->lock);
549         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
550         mutex_unlock(&per_pin->lock);
551 }
552
553 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
554 {
555         char name[32];
556         struct hda_codec *codec = per_pin->codec;
557         struct snd_info_entry *entry;
558         int err;
559
560         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
561         err = snd_card_proc_new(codec->bus->card, name, &entry);
562         if (err < 0)
563                 return err;
564
565         snd_info_set_text_ops(entry, per_pin, print_eld_info);
566         entry->c.text.write = write_eld_info;
567         entry->mode |= S_IWUSR;
568         per_pin->proc_entry = entry;
569
570         return 0;
571 }
572
573 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
574 {
575         if (!per_pin->codec->bus->shutdown && per_pin->proc_entry) {
576                 snd_device_free(per_pin->codec->bus->card, per_pin->proc_entry);
577                 per_pin->proc_entry = NULL;
578         }
579 }
580 #else
581 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
582                                int index)
583 {
584         return 0;
585 }
586 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
587 {
588 }
589 #endif
590
591 /*
592  * Channel mapping routines
593  */
594
595 /*
596  * Compute derived values in channel_allocations[].
597  */
598 static void init_channel_allocations(void)
599 {
600         int i, j;
601         struct cea_channel_speaker_allocation *p;
602
603         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
604                 p = channel_allocations + i;
605                 p->channels = 0;
606                 p->spk_mask = 0;
607                 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
608                         if (p->speakers[j]) {
609                                 p->channels++;
610                                 p->spk_mask |= p->speakers[j];
611                         }
612         }
613 }
614
615 static int get_channel_allocation_order(int ca)
616 {
617         int i;
618
619         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
620                 if (channel_allocations[i].ca_index == ca)
621                         break;
622         }
623         return i;
624 }
625
626 /*
627  * The transformation takes two steps:
628  *
629  *      eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
630  *            spk_mask => (channel_allocations[])         => ai->CA
631  *
632  * TODO: it could select the wrong CA from multiple candidates.
633 */
634 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
635 {
636         int i;
637         int ca = 0;
638         int spk_mask = 0;
639         char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
640
641         /*
642          * CA defaults to 0 for basic stereo audio
643          */
644         if (channels <= 2)
645                 return 0;
646
647         /*
648          * expand ELD's speaker allocation mask
649          *
650          * ELD tells the speaker mask in a compact(paired) form,
651          * expand ELD's notions to match the ones used by Audio InfoFrame.
652          */
653         for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
654                 if (eld->info.spk_alloc & (1 << i))
655                         spk_mask |= eld_speaker_allocation_bits[i];
656         }
657
658         /* search for the first working match in the CA table */
659         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
660                 if (channels == channel_allocations[i].channels &&
661                     (spk_mask & channel_allocations[i].spk_mask) ==
662                                 channel_allocations[i].spk_mask) {
663                         ca = channel_allocations[i].ca_index;
664                         break;
665                 }
666         }
667
668         if (!ca) {
669                 /* if there was no match, select the regular ALSA channel
670                  * allocation with the matching number of channels */
671                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
672                         if (channels == channel_allocations[i].channels) {
673                                 ca = channel_allocations[i].ca_index;
674                                 break;
675                         }
676                 }
677         }
678
679         snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
680         snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
681                     ca, channels, buf);
682
683         return ca;
684 }
685
686 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
687                                        hda_nid_t pin_nid)
688 {
689 #ifdef CONFIG_SND_DEBUG_VERBOSE
690         struct hdmi_spec *spec = codec->spec;
691         int i;
692         int channel;
693
694         for (i = 0; i < 8; i++) {
695                 channel = spec->ops.pin_get_slot_channel(codec, pin_nid, i);
696                 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
697                                                 channel, i);
698         }
699 #endif
700 }
701
702 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
703                                        hda_nid_t pin_nid,
704                                        bool non_pcm,
705                                        int ca)
706 {
707         struct hdmi_spec *spec = codec->spec;
708         struct cea_channel_speaker_allocation *ch_alloc;
709         int i;
710         int err;
711         int order;
712         int non_pcm_mapping[8];
713
714         order = get_channel_allocation_order(ca);
715         ch_alloc = &channel_allocations[order];
716
717         if (hdmi_channel_mapping[ca][1] == 0) {
718                 int hdmi_slot = 0;
719                 /* fill actual channel mappings in ALSA channel (i) order */
720                 for (i = 0; i < ch_alloc->channels; i++) {
721                         while (!ch_alloc->speakers[7 - hdmi_slot] && !WARN_ON(hdmi_slot >= 8))
722                                 hdmi_slot++; /* skip zero slots */
723
724                         hdmi_channel_mapping[ca][i] = (i << 4) | hdmi_slot++;
725                 }
726                 /* fill the rest of the slots with ALSA channel 0xf */
727                 for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++)
728                         if (!ch_alloc->speakers[7 - hdmi_slot])
729                                 hdmi_channel_mapping[ca][i++] = (0xf << 4) | hdmi_slot;
730         }
731
732         if (non_pcm) {
733                 for (i = 0; i < ch_alloc->channels; i++)
734                         non_pcm_mapping[i] = (i << 4) | i;
735                 for (; i < 8; i++)
736                         non_pcm_mapping[i] = (0xf << 4) | i;
737         }
738
739         for (i = 0; i < 8; i++) {
740                 int slotsetup = non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i];
741                 int hdmi_slot = slotsetup & 0x0f;
742                 int channel = (slotsetup & 0xf0) >> 4;
743                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot, channel);
744                 if (err) {
745                         snd_printdd(KERN_NOTICE
746                                     "HDMI: channel mapping failed\n");
747                         break;
748                 }
749         }
750 }
751
752 struct channel_map_table {
753         unsigned char map;              /* ALSA API channel map position */
754         int spk_mask;                   /* speaker position bit mask */
755 };
756
757 static struct channel_map_table map_tables[] = {
758         { SNDRV_CHMAP_FL,       FL },
759         { SNDRV_CHMAP_FR,       FR },
760         { SNDRV_CHMAP_RL,       RL },
761         { SNDRV_CHMAP_RR,       RR },
762         { SNDRV_CHMAP_LFE,      LFE },
763         { SNDRV_CHMAP_FC,       FC },
764         { SNDRV_CHMAP_RLC,      RLC },
765         { SNDRV_CHMAP_RRC,      RRC },
766         { SNDRV_CHMAP_RC,       RC },
767         { SNDRV_CHMAP_FLC,      FLC },
768         { SNDRV_CHMAP_FRC,      FRC },
769         { SNDRV_CHMAP_TFL,      FLH },
770         { SNDRV_CHMAP_TFR,      FRH },
771         { SNDRV_CHMAP_FLW,      FLW },
772         { SNDRV_CHMAP_FRW,      FRW },
773         { SNDRV_CHMAP_TC,       TC },
774         { SNDRV_CHMAP_TFC,      FCH },
775         {} /* terminator */
776 };
777
778 /* from ALSA API channel position to speaker bit mask */
779 static int to_spk_mask(unsigned char c)
780 {
781         struct channel_map_table *t = map_tables;
782         for (; t->map; t++) {
783                 if (t->map == c)
784                         return t->spk_mask;
785         }
786         return 0;
787 }
788
789 /* from ALSA API channel position to CEA slot */
790 static int to_cea_slot(int ordered_ca, unsigned char pos)
791 {
792         int mask = to_spk_mask(pos);
793         int i;
794
795         if (mask) {
796                 for (i = 0; i < 8; i++) {
797                         if (channel_allocations[ordered_ca].speakers[7 - i] == mask)
798                                 return i;
799                 }
800         }
801
802         return -1;
803 }
804
805 /* from speaker bit mask to ALSA API channel position */
806 static int spk_to_chmap(int spk)
807 {
808         struct channel_map_table *t = map_tables;
809         for (; t->map; t++) {
810                 if (t->spk_mask == spk)
811                         return t->map;
812         }
813         return 0;
814 }
815
816 /* from CEA slot to ALSA API channel position */
817 static int from_cea_slot(int ordered_ca, unsigned char slot)
818 {
819         int mask = channel_allocations[ordered_ca].speakers[7 - slot];
820
821         return spk_to_chmap(mask);
822 }
823
824 /* get the CA index corresponding to the given ALSA API channel map */
825 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
826 {
827         int i, spks = 0, spk_mask = 0;
828
829         for (i = 0; i < chs; i++) {
830                 int mask = to_spk_mask(map[i]);
831                 if (mask) {
832                         spk_mask |= mask;
833                         spks++;
834                 }
835         }
836
837         for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
838                 if ((chs == channel_allocations[i].channels ||
839                      spks == channel_allocations[i].channels) &&
840                     (spk_mask & channel_allocations[i].spk_mask) ==
841                                 channel_allocations[i].spk_mask)
842                         return channel_allocations[i].ca_index;
843         }
844         return -1;
845 }
846
847 /* set up the channel slots for the given ALSA API channel map */
848 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
849                                              hda_nid_t pin_nid,
850                                              int chs, unsigned char *map,
851                                              int ca)
852 {
853         struct hdmi_spec *spec = codec->spec;
854         int ordered_ca = get_channel_allocation_order(ca);
855         int alsa_pos, hdmi_slot;
856         int assignments[8] = {[0 ... 7] = 0xf};
857
858         for (alsa_pos = 0; alsa_pos < chs; alsa_pos++) {
859
860                 hdmi_slot = to_cea_slot(ordered_ca, map[alsa_pos]);
861
862                 if (hdmi_slot < 0)
863                         continue; /* unassigned channel */
864
865                 assignments[hdmi_slot] = alsa_pos;
866         }
867
868         for (hdmi_slot = 0; hdmi_slot < 8; hdmi_slot++) {
869                 int err;
870
871                 err = spec->ops.pin_set_slot_channel(codec, pin_nid, hdmi_slot,
872                                                      assignments[hdmi_slot]);
873                 if (err)
874                         return -EINVAL;
875         }
876         return 0;
877 }
878
879 /* store ALSA API channel map from the current default map */
880 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
881 {
882         int i;
883         int ordered_ca = get_channel_allocation_order(ca);
884         for (i = 0; i < 8; i++) {
885                 if (i < channel_allocations[ordered_ca].channels)
886                         map[i] = from_cea_slot(ordered_ca, hdmi_channel_mapping[ca][i] & 0x0f);
887                 else
888                         map[i] = 0;
889         }
890 }
891
892 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
893                                        hda_nid_t pin_nid, bool non_pcm, int ca,
894                                        int channels, unsigned char *map,
895                                        bool chmap_set)
896 {
897         if (!non_pcm && chmap_set) {
898                 hdmi_manual_setup_channel_mapping(codec, pin_nid,
899                                                   channels, map, ca);
900         } else {
901                 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
902                 hdmi_setup_fake_chmap(map, ca);
903         }
904
905         hdmi_debug_channel_mapping(codec, pin_nid);
906 }
907
908 static int hdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
909                                      int asp_slot, int channel)
910 {
911         return snd_hda_codec_write(codec, pin_nid, 0,
912                                    AC_VERB_SET_HDMI_CHAN_SLOT,
913                                    (channel << 4) | asp_slot);
914 }
915
916 static int hdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
917                                      int asp_slot)
918 {
919         return (snd_hda_codec_read(codec, pin_nid, 0,
920                                    AC_VERB_GET_HDMI_CHAN_SLOT,
921                                    asp_slot) & 0xf0) >> 4;
922 }
923
924 /*
925  * Audio InfoFrame routines
926  */
927
928 /*
929  * Enable Audio InfoFrame Transmission
930  */
931 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
932                                        hda_nid_t pin_nid)
933 {
934         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
935         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
936                                                 AC_DIPXMIT_BEST);
937 }
938
939 /*
940  * Disable Audio InfoFrame Transmission
941  */
942 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
943                                       hda_nid_t pin_nid)
944 {
945         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
946         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
947                                                 AC_DIPXMIT_DISABLE);
948 }
949
950 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
951 {
952 #ifdef CONFIG_SND_DEBUG_VERBOSE
953         int i;
954         int size;
955
956         size = snd_hdmi_get_eld_size(codec, pin_nid);
957         printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
958
959         for (i = 0; i < 8; i++) {
960                 size = snd_hda_codec_read(codec, pin_nid, 0,
961                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
962                 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
963         }
964 #endif
965 }
966
967 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
968 {
969 #ifdef BE_PARANOID
970         int i, j;
971         int size;
972         int pi, bi;
973         for (i = 0; i < 8; i++) {
974                 size = snd_hda_codec_read(codec, pin_nid, 0,
975                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
976                 if (size == 0)
977                         continue;
978
979                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
980                 for (j = 1; j < 1000; j++) {
981                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
982                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
983                         if (pi != i)
984                                 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
985                                                 bi, pi, i);
986                         if (bi == 0) /* byte index wrapped around */
987                                 break;
988                 }
989                 snd_printd(KERN_INFO
990                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
991                         i, size, j);
992         }
993 #endif
994 }
995
996 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
997 {
998         u8 *bytes = (u8 *)hdmi_ai;
999         u8 sum = 0;
1000         int i;
1001
1002         hdmi_ai->checksum = 0;
1003
1004         for (i = 0; i < sizeof(*hdmi_ai); i++)
1005                 sum += bytes[i];
1006
1007         hdmi_ai->checksum = -sum;
1008 }
1009
1010 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
1011                                       hda_nid_t pin_nid,
1012                                       u8 *dip, int size)
1013 {
1014         int i;
1015
1016         hdmi_debug_dip_size(codec, pin_nid);
1017         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
1018
1019         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1020         for (i = 0; i < size; i++)
1021                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
1022 }
1023
1024 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
1025                                     u8 *dip, int size)
1026 {
1027         u8 val;
1028         int i;
1029
1030         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
1031                                                             != AC_DIPXMIT_BEST)
1032                 return false;
1033
1034         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
1035         for (i = 0; i < size; i++) {
1036                 val = snd_hda_codec_read(codec, pin_nid, 0,
1037                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
1038                 if (val != dip[i])
1039                         return false;
1040         }
1041
1042         return true;
1043 }
1044
1045 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
1046                                      hda_nid_t pin_nid,
1047                                      int ca, int active_channels,
1048                                      int conn_type)
1049 {
1050         union audio_infoframe ai;
1051
1052         if (conn_type == 0) { /* HDMI */
1053                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
1054
1055                 hdmi_ai->type           = 0x84;
1056                 hdmi_ai->ver            = 0x01;
1057                 hdmi_ai->len            = 0x0a;
1058                 hdmi_ai->CC02_CT47      = active_channels - 1;
1059                 hdmi_ai->CA             = ca;
1060                 hdmi_checksum_audio_infoframe(hdmi_ai);
1061         } else if (conn_type == 1) { /* DisplayPort */
1062                 struct dp_audio_infoframe *dp_ai = &ai.dp;
1063
1064                 dp_ai->type             = 0x84;
1065                 dp_ai->len              = 0x1b;
1066                 dp_ai->ver              = 0x11 << 2;
1067                 dp_ai->CC02_CT47        = active_channels - 1;
1068                 dp_ai->CA               = ca;
1069         } else {
1070                 snd_printd("HDMI: unknown connection type at pin %d\n",
1071                             pin_nid);
1072                 return;
1073         }
1074
1075         /*
1076          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
1077          * sizeof(*dp_ai) to avoid partial match/update problems when
1078          * the user switches between HDMI/DP monitors.
1079          */
1080         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
1081                                         sizeof(ai))) {
1082                 snd_printdd("hdmi_pin_setup_infoframe: "
1083                             "pin=%d channels=%d ca=0x%02x\n",
1084                             pin_nid,
1085                             active_channels, ca);
1086                 hdmi_stop_infoframe_trans(codec, pin_nid);
1087                 hdmi_fill_audio_infoframe(codec, pin_nid,
1088                                             ai.bytes, sizeof(ai));
1089                 hdmi_start_infoframe_trans(codec, pin_nid);
1090         }
1091 }
1092
1093 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
1094                                        struct hdmi_spec_per_pin *per_pin,
1095                                        bool non_pcm)
1096 {
1097         struct hdmi_spec *spec = codec->spec;
1098         hda_nid_t pin_nid = per_pin->pin_nid;
1099         int channels = per_pin->channels;
1100         int active_channels;
1101         struct hdmi_eld *eld;
1102         int ca, ordered_ca;
1103
1104         if (!channels)
1105                 return;
1106
1107         if (is_haswell_plus(codec))
1108                 snd_hda_codec_write(codec, pin_nid, 0,
1109                                             AC_VERB_SET_AMP_GAIN_MUTE,
1110                                             AMP_OUT_UNMUTE);
1111
1112         eld = &per_pin->sink_eld;
1113         if (!eld->monitor_present)
1114                 return;
1115
1116         if (!non_pcm && per_pin->chmap_set)
1117                 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
1118         else
1119                 ca = hdmi_channel_allocation(eld, channels);
1120         if (ca < 0)
1121                 ca = 0;
1122
1123         ordered_ca = get_channel_allocation_order(ca);
1124         active_channels = channel_allocations[ordered_ca].channels;
1125
1126         hdmi_set_channel_count(codec, per_pin->cvt_nid, active_channels);
1127
1128         /*
1129          * always configure channel mapping, it may have been changed by the
1130          * user in the meantime
1131          */
1132         hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
1133                                    channels, per_pin->chmap,
1134                                    per_pin->chmap_set);
1135
1136         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
1137                                       eld->info.conn_type);
1138
1139         per_pin->non_pcm = non_pcm;
1140 }
1141
1142 /*
1143  * Unsolicited events
1144  */
1145
1146 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
1147
1148 static void jack_callback(struct hda_codec *codec, struct hda_jack_tbl *jack)
1149 {
1150         struct hdmi_spec *spec = codec->spec;
1151         int pin_idx = pin_nid_to_pin_index(spec, jack->nid);
1152         if (pin_idx < 0)
1153                 return;
1154
1155         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
1156                 snd_hda_jack_report_sync(codec);
1157 }
1158
1159 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
1160 {
1161         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1162         struct hda_jack_tbl *jack;
1163         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
1164
1165         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
1166         if (!jack)
1167                 return;
1168         jack->jack_dirty = 1;
1169
1170         _snd_printd(SND_PR_VERBOSE,
1171                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
1172                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
1173                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
1174
1175         jack_callback(codec, jack);
1176 }
1177
1178 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1179 {
1180         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1181         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1182         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1183         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1184
1185         printk(KERN_INFO
1186                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1187                 codec->addr,
1188                 tag,
1189                 subtag,
1190                 cp_state,
1191                 cp_ready);
1192
1193         /* TODO */
1194         if (cp_state)
1195                 ;
1196         if (cp_ready)
1197                 ;
1198 }
1199
1200
1201 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1202 {
1203         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1204         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1205
1206         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1207                 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1208                 return;
1209         }
1210
1211         if (subtag == 0)
1212                 hdmi_intrinsic_event(codec, res);
1213         else
1214                 hdmi_non_intrinsic_event(codec, res);
1215 }
1216
1217 static void haswell_verify_D0(struct hda_codec *codec,
1218                 hda_nid_t cvt_nid, hda_nid_t nid)
1219 {
1220         int pwr;
1221
1222         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1223          * thus pins could only choose converter 0 for use. Make sure the
1224          * converters are in correct power state */
1225         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1226                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1227
1228         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1229                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1230                                     AC_PWRST_D0);
1231                 msleep(40);
1232                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1233                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1234                 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1235         }
1236 }
1237
1238 /*
1239  * Callbacks
1240  */
1241
1242 /* HBR should be Non-PCM, 8 channels */
1243 #define is_hbr_format(format) \
1244         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1245
1246 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
1247                               bool hbr)
1248 {
1249         int pinctl, new_pinctl;
1250
1251         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1252                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1253                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1254
1255                 if (pinctl < 0)
1256                         return hbr ? -EINVAL : 0;
1257
1258                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1259                 if (hbr)
1260                         new_pinctl |= AC_PINCTL_EPT_HBR;
1261                 else
1262                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
1263
1264                 snd_printdd("hdmi_pin_hbr_setup: "
1265                             "NID=0x%x, %spinctl=0x%x\n",
1266                             pin_nid,
1267                             pinctl == new_pinctl ? "" : "new-",
1268                             new_pinctl);
1269
1270                 if (pinctl != new_pinctl)
1271                         snd_hda_codec_write(codec, pin_nid, 0,
1272                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1273                                             new_pinctl);
1274         } else if (hbr)
1275                 return -EINVAL;
1276
1277         return 0;
1278 }
1279
1280 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1281                               hda_nid_t pin_nid, u32 stream_tag, int format)
1282 {
1283         struct hdmi_spec *spec = codec->spec;
1284         int err;
1285
1286         if (is_haswell_plus(codec))
1287                 haswell_verify_D0(codec, cvt_nid, pin_nid);
1288
1289         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
1290
1291         if (err) {
1292                 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1293                 return err;
1294         }
1295
1296         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1297         return 0;
1298 }
1299
1300 static int hdmi_choose_cvt(struct hda_codec *codec,
1301                         int pin_idx, int *cvt_id, int *mux_id)
1302 {
1303         struct hdmi_spec *spec = codec->spec;
1304         struct hdmi_spec_per_pin *per_pin;
1305         struct hdmi_spec_per_cvt *per_cvt = NULL;
1306         int cvt_idx, mux_idx = 0;
1307
1308         per_pin = get_pin(spec, pin_idx);
1309
1310         /* Dynamically assign converter to stream */
1311         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1312                 per_cvt = get_cvt(spec, cvt_idx);
1313
1314                 /* Must not already be assigned */
1315                 if (per_cvt->assigned)
1316                         continue;
1317                 /* Must be in pin's mux's list of converters */
1318                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1319                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1320                                 break;
1321                 /* Not in mux list */
1322                 if (mux_idx == per_pin->num_mux_nids)
1323                         continue;
1324                 break;
1325         }
1326
1327         /* No free converters */
1328         if (cvt_idx == spec->num_cvts)
1329                 return -ENODEV;
1330
1331         if (cvt_id)
1332                 *cvt_id = cvt_idx;
1333         if (mux_id)
1334                 *mux_id = mux_idx;
1335
1336         return 0;
1337 }
1338
1339 /* Intel HDMI workaround to fix audio routing issue:
1340  * For some Intel display codecs, pins share the same connection list.
1341  * So a conveter can be selected by multiple pins and playback on any of these
1342  * pins will generate sound on the external display, because audio flows from
1343  * the same converter to the display pipeline. Also muting one pin may make
1344  * other pins have no sound output.
1345  * So this function assures that an assigned converter for a pin is not selected
1346  * by any other pins.
1347  */
1348 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
1349                         hda_nid_t pin_nid, int mux_idx)
1350 {
1351         struct hdmi_spec *spec = codec->spec;
1352         hda_nid_t nid, end_nid;
1353         int cvt_idx, curr;
1354         struct hdmi_spec_per_cvt *per_cvt;
1355
1356         /* configure all pins, including "no physical connection" ones */
1357         end_nid = codec->start_nid + codec->num_nodes;
1358         for (nid = codec->start_nid; nid < end_nid; nid++) {
1359                 unsigned int wid_caps = get_wcaps(codec, nid);
1360                 unsigned int wid_type = get_wcaps_type(wid_caps);
1361
1362                 if (wid_type != AC_WID_PIN)
1363                         continue;
1364
1365                 if (nid == pin_nid)
1366                         continue;
1367
1368                 curr = snd_hda_codec_read(codec, nid, 0,
1369                                           AC_VERB_GET_CONNECT_SEL, 0);
1370                 if (curr != mux_idx)
1371                         continue;
1372
1373                 /* choose an unassigned converter. The conveters in the
1374                  * connection list are in the same order as in the codec.
1375                  */
1376                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1377                         per_cvt = get_cvt(spec, cvt_idx);
1378                         if (!per_cvt->assigned) {
1379                                 snd_printdd("choose cvt %d for pin nid %d\n",
1380                                         cvt_idx, nid);
1381                                 snd_hda_codec_write_cache(codec, nid, 0,
1382                                             AC_VERB_SET_CONNECT_SEL,
1383                                             cvt_idx);
1384                                 break;
1385                         }
1386                 }
1387         }
1388 }
1389
1390 /*
1391  * HDA PCM callbacks
1392  */
1393 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1394                          struct hda_codec *codec,
1395                          struct snd_pcm_substream *substream)
1396 {
1397         struct hdmi_spec *spec = codec->spec;
1398         struct snd_pcm_runtime *runtime = substream->runtime;
1399         int pin_idx, cvt_idx, mux_idx = 0;
1400         struct hdmi_spec_per_pin *per_pin;
1401         struct hdmi_eld *eld;
1402         struct hdmi_spec_per_cvt *per_cvt = NULL;
1403         int err;
1404
1405         /* Validate hinfo */
1406         pin_idx = hinfo_to_pin_index(spec, hinfo);
1407         if (snd_BUG_ON(pin_idx < 0))
1408                 return -EINVAL;
1409         per_pin = get_pin(spec, pin_idx);
1410         eld = &per_pin->sink_eld;
1411
1412         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1413         if (err < 0)
1414                 return err;
1415
1416         per_cvt = get_cvt(spec, cvt_idx);
1417         /* Claim converter */
1418         per_cvt->assigned = 1;
1419         per_pin->cvt_nid = per_cvt->cvt_nid;
1420         hinfo->nid = per_cvt->cvt_nid;
1421
1422         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1423                             AC_VERB_SET_CONNECT_SEL,
1424                             mux_idx);
1425
1426         /* configure unused pins to choose other converters */
1427         if (is_haswell_plus(codec) || is_valleyview(codec))
1428                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1429
1430         snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1431
1432         /* Initially set the converter's capabilities */
1433         hinfo->channels_min = per_cvt->channels_min;
1434         hinfo->channels_max = per_cvt->channels_max;
1435         hinfo->rates = per_cvt->rates;
1436         hinfo->formats = per_cvt->formats;
1437         hinfo->maxbps = per_cvt->maxbps;
1438
1439         /* Restrict capabilities by ELD if this isn't disabled */
1440         if (!static_hdmi_pcm && eld->eld_valid) {
1441                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1442                 if (hinfo->channels_min > hinfo->channels_max ||
1443                     !hinfo->rates || !hinfo->formats) {
1444                         per_cvt->assigned = 0;
1445                         hinfo->nid = 0;
1446                         snd_hda_spdif_ctls_unassign(codec, pin_idx);
1447                         return -ENODEV;
1448                 }
1449         }
1450
1451         /* Store the updated parameters */
1452         runtime->hw.channels_min = hinfo->channels_min;
1453         runtime->hw.channels_max = hinfo->channels_max;
1454         runtime->hw.formats = hinfo->formats;
1455         runtime->hw.rates = hinfo->rates;
1456
1457         snd_pcm_hw_constraint_step(substream->runtime, 0,
1458                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1459         return 0;
1460 }
1461
1462 /*
1463  * HDA/HDMI auto parsing
1464  */
1465 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1466 {
1467         struct hdmi_spec *spec = codec->spec;
1468         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1469         hda_nid_t pin_nid = per_pin->pin_nid;
1470
1471         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1472                 snd_printk(KERN_WARNING
1473                            "HDMI: pin %d wcaps %#x "
1474                            "does not support connection list\n",
1475                            pin_nid, get_wcaps(codec, pin_nid));
1476                 return -EINVAL;
1477         }
1478
1479         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1480                                                         per_pin->mux_nids,
1481                                                         HDA_MAX_CONNECTIONS);
1482
1483         return 0;
1484 }
1485
1486 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1487 {
1488         struct hda_jack_tbl *jack;
1489         struct hda_codec *codec = per_pin->codec;
1490         struct hdmi_spec *spec = codec->spec;
1491         struct hdmi_eld *eld = &spec->temp_eld;
1492         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1493         hda_nid_t pin_nid = per_pin->pin_nid;
1494         /*
1495          * Always execute a GetPinSense verb here, even when called from
1496          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1497          * response's PD bit is not the real PD value, but indicates that
1498          * the real PD value changed. An older version of the HD-audio
1499          * specification worked this way. Hence, we just ignore the data in
1500          * the unsolicited response to avoid custom WARs.
1501          */
1502         int present;
1503         bool update_eld = false;
1504         bool eld_changed = false;
1505         bool ret;
1506
1507         snd_hda_power_up(codec);
1508         present = snd_hda_pin_sense(codec, pin_nid);
1509
1510         mutex_lock(&per_pin->lock);
1511         pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1512         if (pin_eld->monitor_present)
1513                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1514         else
1515                 eld->eld_valid = false;
1516
1517         _snd_printd(SND_PR_VERBOSE,
1518                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1519                 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1520
1521         if (eld->eld_valid) {
1522                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1523                                                      &eld->eld_size) < 0)
1524                         eld->eld_valid = false;
1525                 else {
1526                         memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1527                         if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1528                                                     eld->eld_size) < 0)
1529                                 eld->eld_valid = false;
1530                 }
1531
1532                 if (eld->eld_valid) {
1533                         snd_hdmi_show_eld(&eld->info);
1534                         update_eld = true;
1535                 }
1536                 else if (repoll) {
1537                         queue_delayed_work(codec->bus->workq,
1538                                            &per_pin->work,
1539                                            msecs_to_jiffies(300));
1540                         goto unlock;
1541                 }
1542         }
1543
1544         if (pin_eld->eld_valid && !eld->eld_valid) {
1545                 update_eld = true;
1546                 eld_changed = true;
1547         }
1548         if (update_eld) {
1549                 bool old_eld_valid = pin_eld->eld_valid;
1550                 pin_eld->eld_valid = eld->eld_valid;
1551                 eld_changed = pin_eld->eld_size != eld->eld_size ||
1552                               memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1553                                      eld->eld_size) != 0;
1554                 if (eld_changed)
1555                         memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1556                                eld->eld_size);
1557                 pin_eld->eld_size = eld->eld_size;
1558                 pin_eld->info = eld->info;
1559
1560                 /*
1561                  * Re-setup pin and infoframe. This is needed e.g. when
1562                  * - sink is first plugged-in (infoframe is not set up if !monitor_present)
1563                  * - transcoder can change during stream playback on Haswell
1564                  */
1565                 if (eld->eld_valid && !old_eld_valid && per_pin->setup)
1566                         hdmi_setup_audio_infoframe(codec, per_pin,
1567                                                    per_pin->non_pcm);
1568         }
1569
1570         if (eld_changed)
1571                 snd_ctl_notify(codec->bus->card,
1572                                SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1573                                &per_pin->eld_ctl->id);
1574  unlock:
1575         ret = !repoll || !pin_eld->monitor_present || pin_eld->eld_valid;
1576
1577         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1578         if (jack)
1579                 jack->block_report = !ret;
1580
1581         mutex_unlock(&per_pin->lock);
1582         snd_hda_power_down(codec);
1583         return ret;
1584 }
1585
1586 static void hdmi_repoll_eld(struct work_struct *work)
1587 {
1588         struct hdmi_spec_per_pin *per_pin =
1589         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1590
1591         if (per_pin->repoll_count++ > 6)
1592                 per_pin->repoll_count = 0;
1593
1594         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1595                 snd_hda_jack_report_sync(per_pin->codec);
1596 }
1597
1598 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1599                                              hda_nid_t nid);
1600
1601 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1602 {
1603         struct hdmi_spec *spec = codec->spec;
1604         unsigned int caps, config;
1605         int pin_idx;
1606         struct hdmi_spec_per_pin *per_pin;
1607         int err;
1608
1609         caps = snd_hda_query_pin_caps(codec, pin_nid);
1610         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1611                 return 0;
1612
1613         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1614         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1615                 return 0;
1616
1617         if (is_haswell_plus(codec))
1618                 intel_haswell_fixup_connect_list(codec, pin_nid);
1619
1620         pin_idx = spec->num_pins;
1621         per_pin = snd_array_new(&spec->pins);
1622         if (!per_pin)
1623                 return -ENOMEM;
1624
1625         per_pin->pin_nid = pin_nid;
1626         per_pin->non_pcm = false;
1627
1628         err = hdmi_read_pin_conn(codec, pin_idx);
1629         if (err < 0)
1630                 return err;
1631
1632         spec->num_pins++;
1633
1634         return 0;
1635 }
1636
1637 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1638 {
1639         struct hdmi_spec *spec = codec->spec;
1640         struct hdmi_spec_per_cvt *per_cvt;
1641         unsigned int chans;
1642         int err;
1643
1644         chans = get_wcaps(codec, cvt_nid);
1645         chans = get_wcaps_channels(chans);
1646
1647         per_cvt = snd_array_new(&spec->cvts);
1648         if (!per_cvt)
1649                 return -ENOMEM;
1650
1651         per_cvt->cvt_nid = cvt_nid;
1652         per_cvt->channels_min = 2;
1653         if (chans <= 16) {
1654                 per_cvt->channels_max = chans;
1655                 if (chans > spec->channels_max)
1656                         spec->channels_max = chans;
1657         }
1658
1659         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1660                                           &per_cvt->rates,
1661                                           &per_cvt->formats,
1662                                           &per_cvt->maxbps);
1663         if (err < 0)
1664                 return err;
1665
1666         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1667                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1668         spec->num_cvts++;
1669
1670         return 0;
1671 }
1672
1673 static int hdmi_parse_codec(struct hda_codec *codec)
1674 {
1675         hda_nid_t nid;
1676         int i, nodes;
1677
1678         nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1679         if (!nid || nodes < 0) {
1680                 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1681                 return -EINVAL;
1682         }
1683
1684         for (i = 0; i < nodes; i++, nid++) {
1685                 unsigned int caps;
1686                 unsigned int type;
1687
1688                 caps = get_wcaps(codec, nid);
1689                 type = get_wcaps_type(caps);
1690
1691                 if (!(caps & AC_WCAP_DIGITAL))
1692                         continue;
1693
1694                 switch (type) {
1695                 case AC_WID_AUD_OUT:
1696                         hdmi_add_cvt(codec, nid);
1697                         break;
1698                 case AC_WID_PIN:
1699                         hdmi_add_pin(codec, nid);
1700                         break;
1701                 }
1702         }
1703
1704         return 0;
1705 }
1706
1707 /*
1708  */
1709 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1710 {
1711         struct hda_spdif_out *spdif;
1712         bool non_pcm;
1713
1714         mutex_lock(&codec->spdif_mutex);
1715         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1716         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1717         mutex_unlock(&codec->spdif_mutex);
1718         return non_pcm;
1719 }
1720
1721
1722 /*
1723  * HDMI callbacks
1724  */
1725
1726 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1727                                            struct hda_codec *codec,
1728                                            unsigned int stream_tag,
1729                                            unsigned int format,
1730                                            struct snd_pcm_substream *substream)
1731 {
1732         hda_nid_t cvt_nid = hinfo->nid;
1733         struct hdmi_spec *spec = codec->spec;
1734         int pin_idx = hinfo_to_pin_index(spec, hinfo);
1735         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1736         hda_nid_t pin_nid = per_pin->pin_nid;
1737         bool non_pcm;
1738
1739         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1740         mutex_lock(&per_pin->lock);
1741         per_pin->channels = substream->runtime->channels;
1742         per_pin->setup = true;
1743
1744         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1745         mutex_unlock(&per_pin->lock);
1746
1747         return spec->ops.setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1748 }
1749
1750 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1751                                              struct hda_codec *codec,
1752                                              struct snd_pcm_substream *substream)
1753 {
1754         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1755         return 0;
1756 }
1757
1758 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1759                           struct hda_codec *codec,
1760                           struct snd_pcm_substream *substream)
1761 {
1762         struct hdmi_spec *spec = codec->spec;
1763         int cvt_idx, pin_idx;
1764         struct hdmi_spec_per_cvt *per_cvt;
1765         struct hdmi_spec_per_pin *per_pin;
1766
1767         if (hinfo->nid) {
1768                 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1769                 if (snd_BUG_ON(cvt_idx < 0))
1770                         return -EINVAL;
1771                 per_cvt = get_cvt(spec, cvt_idx);
1772
1773                 snd_BUG_ON(!per_cvt->assigned);
1774                 per_cvt->assigned = 0;
1775                 hinfo->nid = 0;
1776
1777                 pin_idx = hinfo_to_pin_index(spec, hinfo);
1778                 if (snd_BUG_ON(pin_idx < 0))
1779                         return -EINVAL;
1780                 per_pin = get_pin(spec, pin_idx);
1781
1782                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1783
1784                 mutex_lock(&per_pin->lock);
1785                 per_pin->chmap_set = false;
1786                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1787
1788                 per_pin->setup = false;
1789                 per_pin->channels = 0;
1790                 mutex_unlock(&per_pin->lock);
1791         }
1792
1793         return 0;
1794 }
1795
1796 static const struct hda_pcm_ops generic_ops = {
1797         .open = hdmi_pcm_open,
1798         .close = hdmi_pcm_close,
1799         .prepare = generic_hdmi_playback_pcm_prepare,
1800         .cleanup = generic_hdmi_playback_pcm_cleanup,
1801 };
1802
1803 /*
1804  * ALSA API channel-map control callbacks
1805  */
1806 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1807                                struct snd_ctl_elem_info *uinfo)
1808 {
1809         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1810         struct hda_codec *codec = info->private_data;
1811         struct hdmi_spec *spec = codec->spec;
1812         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1813         uinfo->count = spec->channels_max;
1814         uinfo->value.integer.min = 0;
1815         uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1816         return 0;
1817 }
1818
1819 static int hdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
1820                                                   int channels)
1821 {
1822         /* If the speaker allocation matches the channel count, it is OK.*/
1823         if (cap->channels != channels)
1824                 return -1;
1825
1826         /* all channels are remappable freely */
1827         return SNDRV_CTL_TLVT_CHMAP_VAR;
1828 }
1829
1830 static void hdmi_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
1831                                         unsigned int *chmap, int channels)
1832 {
1833         int count = 0;
1834         int c;
1835
1836         for (c = 7; c >= 0; c--) {
1837                 int spk = cap->speakers[c];
1838                 if (!spk)
1839                         continue;
1840
1841                 chmap[count++] = spk_to_chmap(spk);
1842         }
1843
1844         WARN_ON(count != channels);
1845 }
1846
1847 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1848                               unsigned int size, unsigned int __user *tlv)
1849 {
1850         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1851         struct hda_codec *codec = info->private_data;
1852         struct hdmi_spec *spec = codec->spec;
1853         unsigned int __user *dst;
1854         int chs, count = 0;
1855
1856         if (size < 8)
1857                 return -ENOMEM;
1858         if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1859                 return -EFAULT;
1860         size -= 8;
1861         dst = tlv + 2;
1862         for (chs = 2; chs <= spec->channels_max; chs++) {
1863                 int i;
1864                 struct cea_channel_speaker_allocation *cap;
1865                 cap = channel_allocations;
1866                 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1867                         int chs_bytes = chs * 4;
1868                         int type = spec->ops.chmap_cea_alloc_validate_get_type(cap, chs);
1869                         unsigned int tlv_chmap[8];
1870
1871                         if (type < 0)
1872                                 continue;
1873                         if (size < 8)
1874                                 return -ENOMEM;
1875                         if (put_user(type, dst) ||
1876                             put_user(chs_bytes, dst + 1))
1877                                 return -EFAULT;
1878                         dst += 2;
1879                         size -= 8;
1880                         count += 8;
1881                         if (size < chs_bytes)
1882                                 return -ENOMEM;
1883                         size -= chs_bytes;
1884                         count += chs_bytes;
1885                         spec->ops.cea_alloc_to_tlv_chmap(cap, tlv_chmap, chs);
1886                         if (copy_to_user(dst, tlv_chmap, chs_bytes))
1887                                 return -EFAULT;
1888                         dst += chs;
1889                 }
1890         }
1891         if (put_user(count, tlv + 1))
1892                 return -EFAULT;
1893         return 0;
1894 }
1895
1896 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1897                               struct snd_ctl_elem_value *ucontrol)
1898 {
1899         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1900         struct hda_codec *codec = info->private_data;
1901         struct hdmi_spec *spec = codec->spec;
1902         int pin_idx = kcontrol->private_value;
1903         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1904         int i;
1905
1906         for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1907                 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1908         return 0;
1909 }
1910
1911 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1912                               struct snd_ctl_elem_value *ucontrol)
1913 {
1914         struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1915         struct hda_codec *codec = info->private_data;
1916         struct hdmi_spec *spec = codec->spec;
1917         int pin_idx = kcontrol->private_value;
1918         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1919         unsigned int ctl_idx;
1920         struct snd_pcm_substream *substream;
1921         unsigned char chmap[8];
1922         int i, err, ca, prepared = 0;
1923
1924         ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1925         substream = snd_pcm_chmap_substream(info, ctl_idx);
1926         if (!substream || !substream->runtime)
1927                 return 0; /* just for avoiding error from alsactl restore */
1928         switch (substream->runtime->status->state) {
1929         case SNDRV_PCM_STATE_OPEN:
1930         case SNDRV_PCM_STATE_SETUP:
1931                 break;
1932         case SNDRV_PCM_STATE_PREPARED:
1933                 prepared = 1;
1934                 break;
1935         default:
1936                 return -EBUSY;
1937         }
1938         memset(chmap, 0, sizeof(chmap));
1939         for (i = 0; i < ARRAY_SIZE(chmap); i++)
1940                 chmap[i] = ucontrol->value.integer.value[i];
1941         if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1942                 return 0;
1943         ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1944         if (ca < 0)
1945                 return -EINVAL;
1946         if (spec->ops.chmap_validate) {
1947                 err = spec->ops.chmap_validate(ca, ARRAY_SIZE(chmap), chmap);
1948                 if (err)
1949                         return err;
1950         }
1951         mutex_lock(&per_pin->lock);
1952         per_pin->chmap_set = true;
1953         memcpy(per_pin->chmap, chmap, sizeof(chmap));
1954         if (prepared)
1955                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1956         mutex_unlock(&per_pin->lock);
1957
1958         return 0;
1959 }
1960
1961 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1962 {
1963         struct hdmi_spec *spec = codec->spec;
1964         int pin_idx;
1965
1966         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1967                 struct hda_pcm *info;
1968                 struct hda_pcm_stream *pstr;
1969                 struct hdmi_spec_per_pin *per_pin;
1970
1971                 per_pin = get_pin(spec, pin_idx);
1972                 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1973                 info = snd_array_new(&spec->pcm_rec);
1974                 if (!info)
1975                         return -ENOMEM;
1976                 info->name = per_pin->pcm_name;
1977                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1978                 info->own_chmap = true;
1979
1980                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1981                 pstr->substreams = 1;
1982                 pstr->ops = generic_ops;
1983                 /* other pstr fields are set in open */
1984         }
1985
1986         codec->num_pcms = spec->num_pins;
1987         codec->pcm_info = spec->pcm_rec.list;
1988
1989         return 0;
1990 }
1991
1992 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1993 {
1994         char hdmi_str[32] = "HDMI/DP";
1995         struct hdmi_spec *spec = codec->spec;
1996         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1997         int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1998
1999         if (pcmdev > 0)
2000                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
2001         if (!is_jack_detectable(codec, per_pin->pin_nid))
2002                 strncat(hdmi_str, " Phantom",
2003                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
2004
2005         return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
2006 }
2007
2008 static int generic_hdmi_build_controls(struct hda_codec *codec)
2009 {
2010         struct hdmi_spec *spec = codec->spec;
2011         int err;
2012         int pin_idx;
2013
2014         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2015                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2016
2017                 err = generic_hdmi_build_jack(codec, pin_idx);
2018                 if (err < 0)
2019                         return err;
2020
2021                 err = snd_hda_create_dig_out_ctls(codec,
2022                                                   per_pin->pin_nid,
2023                                                   per_pin->mux_nids[0],
2024                                                   HDA_PCM_TYPE_HDMI);
2025                 if (err < 0)
2026                         return err;
2027                 snd_hda_spdif_ctls_unassign(codec, pin_idx);
2028
2029                 /* add control for ELD Bytes */
2030                 err = hdmi_create_eld_ctl(codec, pin_idx,
2031                                           get_pcm_rec(spec, pin_idx)->device);
2032
2033                 if (err < 0)
2034                         return err;
2035
2036                 hdmi_present_sense(per_pin, 0);
2037         }
2038
2039         /* add channel maps */
2040         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2041                 struct snd_pcm_chmap *chmap;
2042                 struct snd_kcontrol *kctl;
2043                 int i;
2044
2045                 if (!codec->pcm_info[pin_idx].pcm)
2046                         break;
2047                 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
2048                                              SNDRV_PCM_STREAM_PLAYBACK,
2049                                              NULL, 0, pin_idx, &chmap);
2050                 if (err < 0)
2051                         return err;
2052                 /* override handlers */
2053                 chmap->private_data = codec;
2054                 kctl = chmap->kctl;
2055                 for (i = 0; i < kctl->count; i++)
2056                         kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
2057                 kctl->info = hdmi_chmap_ctl_info;
2058                 kctl->get = hdmi_chmap_ctl_get;
2059                 kctl->put = hdmi_chmap_ctl_put;
2060                 kctl->tlv.c = hdmi_chmap_ctl_tlv;
2061         }
2062
2063         return 0;
2064 }
2065
2066 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2067 {
2068         struct hdmi_spec *spec = codec->spec;
2069         int pin_idx;
2070
2071         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2072                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2073
2074                 per_pin->codec = codec;
2075                 mutex_init(&per_pin->lock);
2076                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2077                 eld_proc_new(per_pin, pin_idx);
2078         }
2079         return 0;
2080 }
2081
2082 static int generic_hdmi_init(struct hda_codec *codec)
2083 {
2084         struct hdmi_spec *spec = codec->spec;
2085         int pin_idx;
2086
2087         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2088                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2089                 hda_nid_t pin_nid = per_pin->pin_nid;
2090
2091                 hdmi_init_pin(codec, pin_nid);
2092                 snd_hda_jack_detect_enable_callback(codec, pin_nid, pin_nid,
2093                         codec->jackpoll_interval > 0 ? jack_callback : NULL);
2094         }
2095         return 0;
2096 }
2097
2098 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2099 {
2100         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2101         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2102         snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
2103 }
2104
2105 static void hdmi_array_free(struct hdmi_spec *spec)
2106 {
2107         snd_array_free(&spec->pins);
2108         snd_array_free(&spec->cvts);
2109         snd_array_free(&spec->pcm_rec);
2110 }
2111
2112 static void generic_hdmi_free(struct hda_codec *codec)
2113 {
2114         struct hdmi_spec *spec = codec->spec;
2115         int pin_idx;
2116
2117         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2118                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2119
2120                 cancel_delayed_work(&per_pin->work);
2121                 eld_proc_free(per_pin);
2122         }
2123
2124         flush_workqueue(codec->bus->workq);
2125         hdmi_array_free(spec);
2126         kfree(spec);
2127 }
2128
2129 #ifdef CONFIG_PM
2130 static int generic_hdmi_resume(struct hda_codec *codec)
2131 {
2132         struct hdmi_spec *spec = codec->spec;
2133         int pin_idx;
2134
2135         generic_hdmi_init(codec);
2136         snd_hda_codec_resume_amp(codec);
2137         snd_hda_codec_resume_cache(codec);
2138
2139         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2140                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2141                 hdmi_present_sense(per_pin, 1);
2142         }
2143         return 0;
2144 }
2145 #endif
2146
2147 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2148         .init                   = generic_hdmi_init,
2149         .free                   = generic_hdmi_free,
2150         .build_pcms             = generic_hdmi_build_pcms,
2151         .build_controls         = generic_hdmi_build_controls,
2152         .unsol_event            = hdmi_unsol_event,
2153 #ifdef CONFIG_PM
2154         .resume                 = generic_hdmi_resume,
2155 #endif
2156 };
2157
2158 static const struct hdmi_ops generic_standard_hdmi_ops = {
2159         .pin_get_eld                            = snd_hdmi_get_eld,
2160         .pin_get_slot_channel                   = hdmi_pin_get_slot_channel,
2161         .pin_set_slot_channel                   = hdmi_pin_set_slot_channel,
2162         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2163         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2164         .setup_stream                           = hdmi_setup_stream,
2165         .chmap_cea_alloc_validate_get_type      = hdmi_chmap_cea_alloc_validate_get_type,
2166         .cea_alloc_to_tlv_chmap                 = hdmi_cea_alloc_to_tlv_chmap,
2167 };
2168
2169
2170 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2171                                              hda_nid_t nid)
2172 {
2173         struct hdmi_spec *spec = codec->spec;
2174         hda_nid_t conns[4];
2175         int nconns;
2176
2177         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2178         if (nconns == spec->num_cvts &&
2179             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2180                 return;
2181
2182         /* override pins connection list */
2183         snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
2184         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2185 }
2186
2187 #define INTEL_VENDOR_NID 0x08
2188 #define INTEL_GET_VENDOR_VERB 0xf81
2189 #define INTEL_SET_VENDOR_VERB 0x781
2190 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2191 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2192
2193 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2194                                           bool update_tree)
2195 {
2196         unsigned int vendor_param;
2197
2198         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2199                                 INTEL_GET_VENDOR_VERB, 0);
2200         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2201                 return;
2202
2203         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2204         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2205                                 INTEL_SET_VENDOR_VERB, vendor_param);
2206         if (vendor_param == -1)
2207                 return;
2208
2209         if (update_tree)
2210                 snd_hda_codec_update_widgets(codec);
2211 }
2212
2213 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2214 {
2215         unsigned int vendor_param;
2216
2217         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2218                                 INTEL_GET_VENDOR_VERB, 0);
2219         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2220                 return;
2221
2222         /* enable DP1.2 mode */
2223         vendor_param |= INTEL_EN_DP12;
2224         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2225                                 INTEL_SET_VENDOR_VERB, vendor_param);
2226 }
2227
2228 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2229  * Otherwise you may get severe h/w communication errors.
2230  */
2231 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2232                                 unsigned int power_state)
2233 {
2234         if (power_state == AC_PWRST_D0) {
2235                 intel_haswell_enable_all_pins(codec, false);
2236                 intel_haswell_fixup_enable_dp12(codec);
2237         }
2238
2239         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2240         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2241 }
2242
2243 static int patch_generic_hdmi(struct hda_codec *codec)
2244 {
2245         struct hdmi_spec *spec;
2246
2247         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2248         if (spec == NULL)
2249                 return -ENOMEM;
2250
2251         spec->ops = generic_standard_hdmi_ops;
2252         codec->spec = spec;
2253         hdmi_array_init(spec, 4);
2254
2255         if (is_haswell_plus(codec)) {
2256                 intel_haswell_enable_all_pins(codec, true);
2257                 intel_haswell_fixup_enable_dp12(codec);
2258         }
2259
2260         if (is_haswell(codec) || is_valleyview(codec)) {
2261                 codec->depop_delay = 0;
2262         }
2263
2264         if (hdmi_parse_codec(codec) < 0) {
2265                 codec->spec = NULL;
2266                 kfree(spec);
2267                 return -EINVAL;
2268         }
2269         codec->patch_ops = generic_hdmi_patch_ops;
2270         if (is_haswell_plus(codec)) {
2271                 codec->patch_ops.set_power_state = haswell_set_power_state;
2272                 codec->dp_mst = true;
2273         }
2274
2275         generic_hdmi_init_per_pins(codec);
2276
2277         init_channel_allocations();
2278
2279         return 0;
2280 }
2281
2282 /*
2283  * Shared non-generic implementations
2284  */
2285
2286 static int simple_playback_build_pcms(struct hda_codec *codec)
2287 {
2288         struct hdmi_spec *spec = codec->spec;
2289         struct hda_pcm *info;
2290         unsigned int chans;
2291         struct hda_pcm_stream *pstr;
2292         struct hdmi_spec_per_cvt *per_cvt;
2293
2294         per_cvt = get_cvt(spec, 0);
2295         chans = get_wcaps(codec, per_cvt->cvt_nid);
2296         chans = get_wcaps_channels(chans);
2297
2298         info = snd_array_new(&spec->pcm_rec);
2299         if (!info)
2300                 return -ENOMEM;
2301         info->name = get_pin(spec, 0)->pcm_name;
2302         sprintf(info->name, "HDMI 0");
2303         info->pcm_type = HDA_PCM_TYPE_HDMI;
2304         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2305         *pstr = spec->pcm_playback;
2306         pstr->nid = per_cvt->cvt_nid;
2307         if (pstr->channels_max <= 2 && chans && chans <= 16)
2308                 pstr->channels_max = chans;
2309
2310         codec->num_pcms = 1;
2311         codec->pcm_info = info;
2312
2313         return 0;
2314 }
2315
2316 /* unsolicited event for jack sensing */
2317 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2318                                     unsigned int res)
2319 {
2320         snd_hda_jack_set_dirty_all(codec);
2321         snd_hda_jack_report_sync(codec);
2322 }
2323
2324 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2325  * as long as spec->pins[] is set correctly
2326  */
2327 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2328
2329 static int simple_playback_build_controls(struct hda_codec *codec)
2330 {
2331         struct hdmi_spec *spec = codec->spec;
2332         struct hdmi_spec_per_cvt *per_cvt;
2333         int err;
2334
2335         per_cvt = get_cvt(spec, 0);
2336         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2337                                           per_cvt->cvt_nid,
2338                                           HDA_PCM_TYPE_HDMI);
2339         if (err < 0)
2340                 return err;
2341         return simple_hdmi_build_jack(codec, 0);
2342 }
2343
2344 static int simple_playback_init(struct hda_codec *codec)
2345 {
2346         struct hdmi_spec *spec = codec->spec;
2347         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2348         hda_nid_t pin = per_pin->pin_nid;
2349
2350         snd_hda_codec_write(codec, pin, 0,
2351                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2352         /* some codecs require to unmute the pin */
2353         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2354                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2355                                     AMP_OUT_UNMUTE);
2356         snd_hda_jack_detect_enable(codec, pin, pin);
2357         return 0;
2358 }
2359
2360 static void simple_playback_free(struct hda_codec *codec)
2361 {
2362         struct hdmi_spec *spec = codec->spec;
2363
2364         hdmi_array_free(spec);
2365         kfree(spec);
2366 }
2367
2368 /*
2369  * Nvidia specific implementations
2370  */
2371
2372 #define Nv_VERB_SET_Channel_Allocation          0xF79
2373 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2374 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2375 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2376
2377 #define nvhdmi_master_con_nid_7x        0x04
2378 #define nvhdmi_master_pin_nid_7x        0x05
2379
2380 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2381         /*front, rear, clfe, rear_surr */
2382         0x6, 0x8, 0xa, 0xc,
2383 };
2384
2385 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2386         /* set audio protect on */
2387         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2388         /* enable digital output on pin widget */
2389         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2390         {} /* terminator */
2391 };
2392
2393 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2394         /* set audio protect on */
2395         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2396         /* enable digital output on pin widget */
2397         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2398         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2399         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2400         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2401         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2402         {} /* terminator */
2403 };
2404
2405 #ifdef LIMITED_RATE_FMT_SUPPORT
2406 /* support only the safe format and rate */
2407 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2408 #define SUPPORTED_MAXBPS        16
2409 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2410 #else
2411 /* support all rates and formats */
2412 #define SUPPORTED_RATES \
2413         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2414         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2415          SNDRV_PCM_RATE_192000)
2416 #define SUPPORTED_MAXBPS        24
2417 #define SUPPORTED_FORMATS \
2418         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2419 #endif
2420
2421 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2422 {
2423         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2424         return 0;
2425 }
2426
2427 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2428 {
2429         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2430         return 0;
2431 }
2432
2433 static unsigned int channels_2_6_8[] = {
2434         2, 6, 8
2435 };
2436
2437 static unsigned int channels_2_8[] = {
2438         2, 8
2439 };
2440
2441 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2442         .count = ARRAY_SIZE(channels_2_6_8),
2443         .list = channels_2_6_8,
2444         .mask = 0,
2445 };
2446
2447 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2448         .count = ARRAY_SIZE(channels_2_8),
2449         .list = channels_2_8,
2450         .mask = 0,
2451 };
2452
2453 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2454                                     struct hda_codec *codec,
2455                                     struct snd_pcm_substream *substream)
2456 {
2457         struct hdmi_spec *spec = codec->spec;
2458         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2459
2460         switch (codec->preset->id) {
2461         case 0x10de0002:
2462         case 0x10de0003:
2463         case 0x10de0005:
2464         case 0x10de0006:
2465                 hw_constraints_channels = &hw_constraints_2_8_channels;
2466                 break;
2467         case 0x10de0007:
2468                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2469                 break;
2470         default:
2471                 break;
2472         }
2473
2474         if (hw_constraints_channels != NULL) {
2475                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2476                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2477                                 hw_constraints_channels);
2478         } else {
2479                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2480                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2481         }
2482
2483         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2484 }
2485
2486 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2487                                      struct hda_codec *codec,
2488                                      struct snd_pcm_substream *substream)
2489 {
2490         struct hdmi_spec *spec = codec->spec;
2491         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2492 }
2493
2494 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2495                                        struct hda_codec *codec,
2496                                        unsigned int stream_tag,
2497                                        unsigned int format,
2498                                        struct snd_pcm_substream *substream)
2499 {
2500         struct hdmi_spec *spec = codec->spec;
2501         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2502                                              stream_tag, format, substream);
2503 }
2504
2505 static const struct hda_pcm_stream simple_pcm_playback = {
2506         .substreams = 1,
2507         .channels_min = 2,
2508         .channels_max = 2,
2509         .ops = {
2510                 .open = simple_playback_pcm_open,
2511                 .close = simple_playback_pcm_close,
2512                 .prepare = simple_playback_pcm_prepare
2513         },
2514 };
2515
2516 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2517         .build_controls = simple_playback_build_controls,
2518         .build_pcms = simple_playback_build_pcms,
2519         .init = simple_playback_init,
2520         .free = simple_playback_free,
2521         .unsol_event = simple_hdmi_unsol_event,
2522 };
2523
2524 static int patch_simple_hdmi(struct hda_codec *codec,
2525                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2526 {
2527         struct hdmi_spec *spec;
2528         struct hdmi_spec_per_cvt *per_cvt;
2529         struct hdmi_spec_per_pin *per_pin;
2530
2531         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2532         if (!spec)
2533                 return -ENOMEM;
2534
2535         codec->spec = spec;
2536         hdmi_array_init(spec, 1);
2537
2538         spec->multiout.num_dacs = 0;  /* no analog */
2539         spec->multiout.max_channels = 2;
2540         spec->multiout.dig_out_nid = cvt_nid;
2541         spec->num_cvts = 1;
2542         spec->num_pins = 1;
2543         per_pin = snd_array_new(&spec->pins);
2544         per_cvt = snd_array_new(&spec->cvts);
2545         if (!per_pin || !per_cvt) {
2546                 simple_playback_free(codec);
2547                 return -ENOMEM;
2548         }
2549         per_cvt->cvt_nid = cvt_nid;
2550         per_pin->pin_nid = pin_nid;
2551         spec->pcm_playback = simple_pcm_playback;
2552
2553         codec->patch_ops = simple_hdmi_patch_ops;
2554
2555         return 0;
2556 }
2557
2558 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2559                                                     int channels)
2560 {
2561         unsigned int chanmask;
2562         int chan = channels ? (channels - 1) : 1;
2563
2564         switch (channels) {
2565         default:
2566         case 0:
2567         case 2:
2568                 chanmask = 0x00;
2569                 break;
2570         case 4:
2571                 chanmask = 0x08;
2572                 break;
2573         case 6:
2574                 chanmask = 0x0b;
2575                 break;
2576         case 8:
2577                 chanmask = 0x13;
2578                 break;
2579         }
2580
2581         /* Set the audio infoframe channel allocation and checksum fields.  The
2582          * channel count is computed implicitly by the hardware. */
2583         snd_hda_codec_write(codec, 0x1, 0,
2584                         Nv_VERB_SET_Channel_Allocation, chanmask);
2585
2586         snd_hda_codec_write(codec, 0x1, 0,
2587                         Nv_VERB_SET_Info_Frame_Checksum,
2588                         (0x71 - chan - chanmask));
2589 }
2590
2591 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2592                                    struct hda_codec *codec,
2593                                    struct snd_pcm_substream *substream)
2594 {
2595         struct hdmi_spec *spec = codec->spec;
2596         int i;
2597
2598         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2599                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2600         for (i = 0; i < 4; i++) {
2601                 /* set the stream id */
2602                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2603                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2604                 /* set the stream format */
2605                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2606                                 AC_VERB_SET_STREAM_FORMAT, 0);
2607         }
2608
2609         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2610          * streams are disabled. */
2611         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2612
2613         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2614 }
2615
2616 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2617                                      struct hda_codec *codec,
2618                                      unsigned int stream_tag,
2619                                      unsigned int format,
2620                                      struct snd_pcm_substream *substream)
2621 {
2622         int chs;
2623         unsigned int dataDCC2, channel_id;
2624         int i;
2625         struct hdmi_spec *spec = codec->spec;
2626         struct hda_spdif_out *spdif;
2627         struct hdmi_spec_per_cvt *per_cvt;
2628
2629         mutex_lock(&codec->spdif_mutex);
2630         per_cvt = get_cvt(spec, 0);
2631         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2632
2633         chs = substream->runtime->channels;
2634
2635         dataDCC2 = 0x2;
2636
2637         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2638         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2639                 snd_hda_codec_write(codec,
2640                                 nvhdmi_master_con_nid_7x,
2641                                 0,
2642                                 AC_VERB_SET_DIGI_CONVERT_1,
2643                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2644
2645         /* set the stream id */
2646         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2647                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2648
2649         /* set the stream format */
2650         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2651                         AC_VERB_SET_STREAM_FORMAT, format);
2652
2653         /* turn on again (if needed) */
2654         /* enable and set the channel status audio/data flag */
2655         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2656                 snd_hda_codec_write(codec,
2657                                 nvhdmi_master_con_nid_7x,
2658                                 0,
2659                                 AC_VERB_SET_DIGI_CONVERT_1,
2660                                 spdif->ctls & 0xff);
2661                 snd_hda_codec_write(codec,
2662                                 nvhdmi_master_con_nid_7x,
2663                                 0,
2664                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2665         }
2666
2667         for (i = 0; i < 4; i++) {
2668                 if (chs == 2)
2669                         channel_id = 0;
2670                 else
2671                         channel_id = i * 2;
2672
2673                 /* turn off SPDIF once;
2674                  *otherwise the IEC958 bits won't be updated
2675                  */
2676                 if (codec->spdif_status_reset &&
2677                 (spdif->ctls & AC_DIG1_ENABLE))
2678                         snd_hda_codec_write(codec,
2679                                 nvhdmi_con_nids_7x[i],
2680                                 0,
2681                                 AC_VERB_SET_DIGI_CONVERT_1,
2682                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2683                 /* set the stream id */
2684                 snd_hda_codec_write(codec,
2685                                 nvhdmi_con_nids_7x[i],
2686                                 0,
2687                                 AC_VERB_SET_CHANNEL_STREAMID,
2688                                 (stream_tag << 4) | channel_id);
2689                 /* set the stream format */
2690                 snd_hda_codec_write(codec,
2691                                 nvhdmi_con_nids_7x[i],
2692                                 0,
2693                                 AC_VERB_SET_STREAM_FORMAT,
2694                                 format);
2695                 /* turn on again (if needed) */
2696                 /* enable and set the channel status audio/data flag */
2697                 if (codec->spdif_status_reset &&
2698                 (spdif->ctls & AC_DIG1_ENABLE)) {
2699                         snd_hda_codec_write(codec,
2700                                         nvhdmi_con_nids_7x[i],
2701                                         0,
2702                                         AC_VERB_SET_DIGI_CONVERT_1,
2703                                         spdif->ctls & 0xff);
2704                         snd_hda_codec_write(codec,
2705                                         nvhdmi_con_nids_7x[i],
2706                                         0,
2707                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2708                 }
2709         }
2710
2711         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2712
2713         mutex_unlock(&codec->spdif_mutex);
2714         return 0;
2715 }
2716
2717 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2718         .substreams = 1,
2719         .channels_min = 2,
2720         .channels_max = 8,
2721         .nid = nvhdmi_master_con_nid_7x,
2722         .rates = SUPPORTED_RATES,
2723         .maxbps = SUPPORTED_MAXBPS,
2724         .formats = SUPPORTED_FORMATS,
2725         .ops = {
2726                 .open = simple_playback_pcm_open,
2727                 .close = nvhdmi_8ch_7x_pcm_close,
2728                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2729         },
2730 };
2731
2732 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2733 {
2734         struct hdmi_spec *spec;
2735         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2736                                     nvhdmi_master_pin_nid_7x);
2737         if (err < 0)
2738                 return err;
2739
2740         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2741         /* override the PCM rates, etc, as the codec doesn't give full list */
2742         spec = codec->spec;
2743         spec->pcm_playback.rates = SUPPORTED_RATES;
2744         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2745         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2746         return 0;
2747 }
2748
2749 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2750 {
2751         struct hdmi_spec *spec = codec->spec;
2752         int err = simple_playback_build_pcms(codec);
2753         if (!err) {
2754                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2755                 info->own_chmap = true;
2756         }
2757         return err;
2758 }
2759
2760 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2761 {
2762         struct hdmi_spec *spec = codec->spec;
2763         struct hda_pcm *info;
2764         struct snd_pcm_chmap *chmap;
2765         int err;
2766
2767         err = simple_playback_build_controls(codec);
2768         if (err < 0)
2769                 return err;
2770
2771         /* add channel maps */
2772         info = get_pcm_rec(spec, 0);
2773         err = snd_pcm_add_chmap_ctls(info->pcm,
2774                                      SNDRV_PCM_STREAM_PLAYBACK,
2775                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2776         if (err < 0)
2777                 return err;
2778         switch (codec->preset->id) {
2779         case 0x10de0002:
2780         case 0x10de0003:
2781         case 0x10de0005:
2782         case 0x10de0006:
2783                 chmap->channel_mask = (1U << 2) | (1U << 8);
2784                 break;
2785         case 0x10de0007:
2786                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2787         }
2788         return 0;
2789 }
2790
2791 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2792 {
2793         struct hdmi_spec *spec;
2794         int err = patch_nvhdmi_2ch(codec);
2795         if (err < 0)
2796                 return err;
2797         spec = codec->spec;
2798         spec->multiout.max_channels = 8;
2799         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2800         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2801         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2802         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2803
2804         /* Initialize the audio infoframe channel mask and checksum to something
2805          * valid */
2806         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2807
2808         return 0;
2809 }
2810
2811 /*
2812  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2813  * - 0x10de0015
2814  * - 0x10de0040
2815  */
2816 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
2817                                                     int channels)
2818 {
2819         if (cap->ca_index == 0x00 && channels == 2)
2820                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2821
2822         return hdmi_chmap_cea_alloc_validate_get_type(cap, channels);
2823 }
2824
2825 static int nvhdmi_chmap_validate(int ca, int chs, unsigned char *map)
2826 {
2827         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2828                 return -EINVAL;
2829
2830         return 0;
2831 }
2832
2833 static int patch_nvhdmi(struct hda_codec *codec)
2834 {
2835         struct hdmi_spec *spec;
2836         int err;
2837
2838         err = patch_generic_hdmi(codec);
2839         if (err)
2840                 return err;
2841
2842         spec = codec->spec;
2843
2844         spec->ops.chmap_cea_alloc_validate_get_type =
2845                 nvhdmi_chmap_cea_alloc_validate_get_type;
2846         spec->ops.chmap_validate = nvhdmi_chmap_validate;
2847
2848         return 0;
2849 }
2850
2851 /*
2852  * ATI/AMD-specific implementations
2853  */
2854
2855 #define is_amdhdmi_rev3_or_later(codec) \
2856         ((codec)->vendor_id == 0x1002aa01 && ((codec)->revision_id & 0xff00) >= 0x0300)
2857 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
2858
2859 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
2860 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
2861 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
2862 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
2863 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
2864 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
2865 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
2866 #define ATI_VERB_SET_HBR_CONTROL        0x77c
2867 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
2868 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
2869 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
2870 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
2871 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
2872 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
2873 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
2874 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
2875 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
2876 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
2877 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
2878 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
2879 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
2880 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
2881 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
2882 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
2883 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
2884
2885 /* AMD specific HDA cvt verbs */
2886 #define ATI_VERB_SET_RAMP_RATE          0x770
2887 #define ATI_VERB_GET_RAMP_RATE          0xf70
2888
2889 #define ATI_OUT_ENABLE 0x1
2890
2891 #define ATI_MULTICHANNEL_MODE_PAIRED    0
2892 #define ATI_MULTICHANNEL_MODE_SINGLE    1
2893
2894 #define ATI_HBR_CAPABLE 0x01
2895 #define ATI_HBR_ENABLE 0x10
2896
2897 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
2898                            unsigned char *buf, int *eld_size)
2899 {
2900         /* call hda_eld.c ATI/AMD-specific function */
2901         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
2902                                     is_amdhdmi_rev3_or_later(codec));
2903 }
2904
2905 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
2906                                         int active_channels, int conn_type)
2907 {
2908         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
2909 }
2910
2911 static int atihdmi_paired_swap_fc_lfe(int pos)
2912 {
2913         /*
2914          * ATI/AMD have automatic FC/LFE swap built-in
2915          * when in pairwise mapping mode.
2916          */
2917
2918         switch (pos) {
2919                 /* see channel_allocations[].speakers[] */
2920                 case 2: return 3;
2921                 case 3: return 2;
2922                 default: break;
2923         }
2924
2925         return pos;
2926 }
2927
2928 static int atihdmi_paired_chmap_validate(int ca, int chs, unsigned char *map)
2929 {
2930         struct cea_channel_speaker_allocation *cap;
2931         int i, j;
2932
2933         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
2934
2935         cap = &channel_allocations[get_channel_allocation_order(ca)];
2936         for (i = 0; i < chs; ++i) {
2937                 int mask = to_spk_mask(map[i]);
2938                 bool ok = false;
2939                 bool companion_ok = false;
2940
2941                 if (!mask)
2942                         continue;
2943
2944                 for (j = 0 + i % 2; j < 8; j += 2) {
2945                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
2946                         if (cap->speakers[chan_idx] == mask) {
2947                                 /* channel is in a supported position */
2948                                 ok = true;
2949
2950                                 if (i % 2 == 0 && i + 1 < chs) {
2951                                         /* even channel, check the odd companion */
2952                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
2953                                         int comp_mask_req = to_spk_mask(map[i+1]);
2954                                         int comp_mask_act = cap->speakers[comp_chan_idx];
2955
2956                                         if (comp_mask_req == comp_mask_act)
2957                                                 companion_ok = true;
2958                                         else
2959                                                 return -EINVAL;
2960                                 }
2961                                 break;
2962                         }
2963                 }
2964
2965                 if (!ok)
2966                         return -EINVAL;
2967
2968                 if (companion_ok)
2969                         i++; /* companion channel already checked */
2970         }
2971
2972         return 0;
2973 }
2974
2975 static int atihdmi_pin_set_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
2976                                         int hdmi_slot, int stream_channel)
2977 {
2978         int verb;
2979         int ati_channel_setup = 0;
2980
2981         if (hdmi_slot > 7)
2982                 return -EINVAL;
2983
2984         if (!has_amd_full_remap_support(codec)) {
2985                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
2986
2987                 /* In case this is an odd slot but without stream channel, do not
2988                  * disable the slot since the corresponding even slot could have a
2989                  * channel. In case neither have a channel, the slot pair will be
2990                  * disabled when this function is called for the even slot. */
2991                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
2992                         return 0;
2993
2994                 hdmi_slot -= hdmi_slot % 2;
2995
2996                 if (stream_channel != 0xf)
2997                         stream_channel -= stream_channel % 2;
2998         }
2999
3000         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3001
3002         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3003
3004         if (stream_channel != 0xf)
3005                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3006
3007         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3008 }
3009
3010 static int atihdmi_pin_get_slot_channel(struct hda_codec *codec, hda_nid_t pin_nid,
3011                                         int asp_slot)
3012 {
3013         bool was_odd = false;
3014         int ati_asp_slot = asp_slot;
3015         int verb;
3016         int ati_channel_setup;
3017
3018         if (asp_slot > 7)
3019                 return -EINVAL;
3020
3021         if (!has_amd_full_remap_support(codec)) {
3022                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3023                 if (ati_asp_slot % 2 != 0) {
3024                         ati_asp_slot -= 1;
3025                         was_odd = true;
3026                 }
3027         }
3028
3029         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3030
3031         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3032
3033         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3034                 return 0xf;
3035
3036         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3037 }
3038
3039 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(struct cea_channel_speaker_allocation *cap,
3040                                                             int channels)
3041 {
3042         int c;
3043
3044         /*
3045          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3046          * we need to take that into account (a single channel may take 2
3047          * channel slots if we need to carry a silent channel next to it).
3048          * On Rev3+ AMD codecs this function is not used.
3049          */
3050         int chanpairs = 0;
3051
3052         /* We only produce even-numbered channel count TLVs */
3053         if ((channels % 2) != 0)
3054                 return -1;
3055
3056         for (c = 0; c < 7; c += 2) {
3057                 if (cap->speakers[c] || cap->speakers[c+1])
3058                         chanpairs++;
3059         }
3060
3061         if (chanpairs * 2 != channels)
3062                 return -1;
3063
3064         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3065 }
3066
3067 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct cea_channel_speaker_allocation *cap,
3068                                                   unsigned int *chmap, int channels)
3069 {
3070         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3071         int count = 0;
3072         int c;
3073
3074         for (c = 7; c >= 0; c--) {
3075                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3076                 int spk = cap->speakers[chan];
3077                 if (!spk) {
3078                         /* add N/A channel if the companion channel is occupied */
3079                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3080                                 chmap[count++] = SNDRV_CHMAP_NA;
3081
3082                         continue;
3083                 }
3084
3085                 chmap[count++] = spk_to_chmap(spk);
3086         }
3087
3088         WARN_ON(count != channels);
3089 }
3090
3091 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3092                                  bool hbr)
3093 {
3094         int hbr_ctl, hbr_ctl_new;
3095
3096         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3097         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3098                 if (hbr)
3099                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3100                 else
3101                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3102
3103                 snd_printdd("atihdmi_pin_hbr_setup: "
3104                                 "NID=0x%x, %shbr-ctl=0x%x\n",
3105                                 pin_nid,
3106                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3107                                 hbr_ctl_new);
3108
3109                 if (hbr_ctl != hbr_ctl_new)
3110                         snd_hda_codec_write(codec, pin_nid, 0,
3111                                                 ATI_VERB_SET_HBR_CONTROL,
3112                                                 hbr_ctl_new);
3113
3114         } else if (hbr)
3115                 return -EINVAL;
3116
3117         return 0;
3118 }
3119
3120 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3121                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3122 {
3123
3124         if (is_amdhdmi_rev3_or_later(codec)) {
3125                 int ramp_rate = 180; /* default as per AMD spec */
3126                 /* disable ramp-up/down for non-pcm as per AMD spec */
3127                 if (format & AC_FMT_TYPE_NON_PCM)
3128                         ramp_rate = 0;
3129
3130                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3131         }
3132
3133         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3134 }
3135
3136
3137 static int atihdmi_init(struct hda_codec *codec)
3138 {
3139         struct hdmi_spec *spec = codec->spec;
3140         int pin_idx, err;
3141
3142         err = generic_hdmi_init(codec);
3143
3144         if (err)
3145                 return err;
3146
3147         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3148                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3149
3150                 /* make sure downmix information in infoframe is zero */
3151                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3152
3153                 /* enable channel-wise remap mode if supported */
3154                 if (has_amd_full_remap_support(codec))
3155                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3156                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3157                                             ATI_MULTICHANNEL_MODE_SINGLE);
3158         }
3159
3160         return 0;
3161 }
3162
3163 static int patch_atihdmi(struct hda_codec *codec)
3164 {
3165         struct hdmi_spec *spec;
3166         struct hdmi_spec_per_cvt *per_cvt;
3167         int err, cvt_idx;
3168
3169         err = patch_generic_hdmi(codec);
3170
3171         if (err)
3172                 return err;
3173
3174         codec->patch_ops.init = atihdmi_init;
3175
3176         spec = codec->spec;
3177
3178         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3179         spec->ops.pin_get_slot_channel = atihdmi_pin_get_slot_channel;
3180         spec->ops.pin_set_slot_channel = atihdmi_pin_set_slot_channel;
3181         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3182         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3183         spec->ops.setup_stream = atihdmi_setup_stream;
3184
3185         if (!has_amd_full_remap_support(codec)) {
3186                 /* override to ATI/AMD-specific versions with pairwise mapping */
3187                 spec->ops.chmap_cea_alloc_validate_get_type =
3188                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3189                 spec->ops.cea_alloc_to_tlv_chmap = atihdmi_paired_cea_alloc_to_tlv_chmap;
3190                 spec->ops.chmap_validate = atihdmi_paired_chmap_validate;
3191         }
3192
3193         /* ATI/AMD converters do not advertise all of their capabilities */
3194         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3195                 per_cvt = get_cvt(spec, cvt_idx);
3196                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3197                 per_cvt->rates |= SUPPORTED_RATES;
3198                 per_cvt->formats |= SUPPORTED_FORMATS;
3199                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3200         }
3201
3202         spec->channels_max = max(spec->channels_max, 8u);
3203
3204         return 0;
3205 }
3206
3207 /* VIA HDMI Implementation */
3208 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3209 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3210
3211 static int patch_via_hdmi(struct hda_codec *codec)
3212 {
3213         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3214 }
3215
3216 /*
3217  * called from hda_codec.c for generic HDMI support
3218  */
3219 int snd_hda_parse_hdmi_codec(struct hda_codec *codec)
3220 {
3221         return patch_generic_hdmi(codec);
3222 }
3223 EXPORT_SYMBOL_GPL(snd_hda_parse_hdmi_codec);
3224
3225 /*
3226  * patch entries
3227  */
3228 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
3229 { .id = 0x1002793c, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3230 { .id = 0x10027919, .name = "RS600 HDMI",       .patch = patch_atihdmi },
3231 { .id = 0x1002791a, .name = "RS690/780 HDMI",   .patch = patch_atihdmi },
3232 { .id = 0x1002aa01, .name = "R6xx HDMI",        .patch = patch_atihdmi },
3233 { .id = 0x10951390, .name = "SiI1390 HDMI",     .patch = patch_generic_hdmi },
3234 { .id = 0x10951392, .name = "SiI1392 HDMI",     .patch = patch_generic_hdmi },
3235 { .id = 0x17e80047, .name = "Chrontel HDMI",    .patch = patch_generic_hdmi },
3236 { .id = 0x10de0002, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3237 { .id = 0x10de0003, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3238 { .id = 0x10de0005, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3239 { .id = 0x10de0006, .name = "MCP77/78 HDMI",    .patch = patch_nvhdmi_8ch_7x },
3240 { .id = 0x10de0007, .name = "MCP79/7A HDMI",    .patch = patch_nvhdmi_8ch_7x },
3241 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP",   .patch = patch_nvhdmi },
3242 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP",   .patch = patch_nvhdmi },
3243 { .id = 0x10de000c, .name = "MCP89 HDMI",       .patch = patch_nvhdmi },
3244 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP",   .patch = patch_nvhdmi },
3245 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP",   .patch = patch_nvhdmi },
3246 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP",   .patch = patch_nvhdmi },
3247 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP",   .patch = patch_nvhdmi },
3248 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP",   .patch = patch_nvhdmi },
3249 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP",   .patch = patch_nvhdmi },
3250 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP",   .patch = patch_nvhdmi },
3251 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP",   .patch = patch_nvhdmi },
3252 /* 17 is known to be absent */
3253 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP",   .patch = patch_nvhdmi },
3254 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP",   .patch = patch_nvhdmi },
3255 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP",   .patch = patch_nvhdmi },
3256 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP",   .patch = patch_nvhdmi },
3257 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP",   .patch = patch_nvhdmi },
3258 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP",   .patch = patch_nvhdmi },
3259 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP",   .patch = patch_nvhdmi },
3260 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP",   .patch = patch_nvhdmi },
3261 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP",   .patch = patch_nvhdmi },
3262 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP",   .patch = patch_nvhdmi },
3263 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP",   .patch = patch_nvhdmi },
3264 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP",   .patch = patch_nvhdmi },
3265 { .id = 0x10de0067, .name = "MCP67 HDMI",       .patch = patch_nvhdmi_2ch },
3266 { .id = 0x10de8001, .name = "MCP73 HDMI",       .patch = patch_nvhdmi_2ch },
3267 { .id = 0x11069f80, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3268 { .id = 0x11069f81, .name = "VX900 HDMI/DP",    .patch = patch_via_hdmi },
3269 { .id = 0x11069f84, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3270 { .id = 0x11069f85, .name = "VX11 HDMI/DP",     .patch = patch_generic_hdmi },
3271 { .id = 0x80860054, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3272 { .id = 0x80862801, .name = "Bearlake HDMI",    .patch = patch_generic_hdmi },
3273 { .id = 0x80862802, .name = "Cantiga HDMI",     .patch = patch_generic_hdmi },
3274 { .id = 0x80862803, .name = "Eaglelake HDMI",   .patch = patch_generic_hdmi },
3275 { .id = 0x80862804, .name = "IbexPeak HDMI",    .patch = patch_generic_hdmi },
3276 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
3277 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
3278 { .id = 0x80862807, .name = "Haswell HDMI",     .patch = patch_generic_hdmi },
3279 { .id = 0x80862808, .name = "Broadwell HDMI",   .patch = patch_generic_hdmi },
3280 { .id = 0x80862880, .name = "CedarTrail HDMI",  .patch = patch_generic_hdmi },
3281 { .id = 0x80862882, .name = "Valleyview2 HDMI", .patch = patch_generic_hdmi },
3282 { .id = 0x808629fb, .name = "Crestline HDMI",   .patch = patch_generic_hdmi },
3283 {} /* terminator */
3284 };
3285
3286 MODULE_ALIAS("snd-hda-codec-id:1002793c");
3287 MODULE_ALIAS("snd-hda-codec-id:10027919");
3288 MODULE_ALIAS("snd-hda-codec-id:1002791a");
3289 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
3290 MODULE_ALIAS("snd-hda-codec-id:10951390");
3291 MODULE_ALIAS("snd-hda-codec-id:10951392");
3292 MODULE_ALIAS("snd-hda-codec-id:10de0002");
3293 MODULE_ALIAS("snd-hda-codec-id:10de0003");
3294 MODULE_ALIAS("snd-hda-codec-id:10de0005");
3295 MODULE_ALIAS("snd-hda-codec-id:10de0006");
3296 MODULE_ALIAS("snd-hda-codec-id:10de0007");
3297 MODULE_ALIAS("snd-hda-codec-id:10de000a");
3298 MODULE_ALIAS("snd-hda-codec-id:10de000b");
3299 MODULE_ALIAS("snd-hda-codec-id:10de000c");
3300 MODULE_ALIAS("snd-hda-codec-id:10de000d");
3301 MODULE_ALIAS("snd-hda-codec-id:10de0010");
3302 MODULE_ALIAS("snd-hda-codec-id:10de0011");
3303 MODULE_ALIAS("snd-hda-codec-id:10de0012");
3304 MODULE_ALIAS("snd-hda-codec-id:10de0013");
3305 MODULE_ALIAS("snd-hda-codec-id:10de0014");
3306 MODULE_ALIAS("snd-hda-codec-id:10de0015");
3307 MODULE_ALIAS("snd-hda-codec-id:10de0016");
3308 MODULE_ALIAS("snd-hda-codec-id:10de0018");
3309 MODULE_ALIAS("snd-hda-codec-id:10de0019");
3310 MODULE_ALIAS("snd-hda-codec-id:10de001a");
3311 MODULE_ALIAS("snd-hda-codec-id:10de001b");
3312 MODULE_ALIAS("snd-hda-codec-id:10de001c");
3313 MODULE_ALIAS("snd-hda-codec-id:10de0040");
3314 MODULE_ALIAS("snd-hda-codec-id:10de0041");
3315 MODULE_ALIAS("snd-hda-codec-id:10de0042");
3316 MODULE_ALIAS("snd-hda-codec-id:10de0043");
3317 MODULE_ALIAS("snd-hda-codec-id:10de0044");
3318 MODULE_ALIAS("snd-hda-codec-id:10de0051");
3319 MODULE_ALIAS("snd-hda-codec-id:10de0060");
3320 MODULE_ALIAS("snd-hda-codec-id:10de0067");
3321 MODULE_ALIAS("snd-hda-codec-id:10de8001");
3322 MODULE_ALIAS("snd-hda-codec-id:11069f80");
3323 MODULE_ALIAS("snd-hda-codec-id:11069f81");
3324 MODULE_ALIAS("snd-hda-codec-id:11069f84");
3325 MODULE_ALIAS("snd-hda-codec-id:11069f85");
3326 MODULE_ALIAS("snd-hda-codec-id:17e80047");
3327 MODULE_ALIAS("snd-hda-codec-id:80860054");
3328 MODULE_ALIAS("snd-hda-codec-id:80862801");
3329 MODULE_ALIAS("snd-hda-codec-id:80862802");
3330 MODULE_ALIAS("snd-hda-codec-id:80862803");
3331 MODULE_ALIAS("snd-hda-codec-id:80862804");
3332 MODULE_ALIAS("snd-hda-codec-id:80862805");
3333 MODULE_ALIAS("snd-hda-codec-id:80862806");
3334 MODULE_ALIAS("snd-hda-codec-id:80862807");
3335 MODULE_ALIAS("snd-hda-codec-id:80862808");
3336 MODULE_ALIAS("snd-hda-codec-id:80862880");
3337 MODULE_ALIAS("snd-hda-codec-id:80862882");
3338 MODULE_ALIAS("snd-hda-codec-id:808629fb");
3339
3340 MODULE_LICENSE("GPL");
3341 MODULE_DESCRIPTION("HDMI HD-audio codec");
3342 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3343 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3344 MODULE_ALIAS("snd-hda-codec-atihdmi");
3345
3346 static struct hda_codec_preset_list intel_list = {
3347         .preset = snd_hda_preset_hdmi,
3348         .owner = THIS_MODULE,
3349 };
3350
3351 static int __init patch_hdmi_init(void)
3352 {
3353         return snd_hda_add_codec_preset(&intel_list);
3354 }
3355
3356 static void __exit patch_hdmi_exit(void)
3357 {
3358         snd_hda_delete_codec_preset(&intel_list);
3359 }
3360
3361 module_init(patch_hdmi_init)
3362 module_exit(patch_hdmi_exit)