1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ALSA driver for RME Digi9652 audio interfaces
5 * Copyright (c) 1999 IEM - Winfried Ritsch
6 * Copyright (c) 1999-2001 Paul Davis
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/pci.h>
13 #include <linux/module.h>
15 #include <linux/nospec.h>
17 #include <sound/core.h>
18 #include <sound/control.h>
19 #include <sound/pcm.h>
20 #include <sound/info.h>
21 #include <sound/asoundef.h>
22 #include <sound/initval.h>
24 #include <asm/current.h>
26 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
27 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
28 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
29 static bool precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */
31 module_param_array(index, int, NULL, 0444);
32 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
33 module_param_array(id, charp, NULL, 0444);
34 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
35 module_param_array(enable, bool, NULL, 0444);
36 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
37 module_param_array(precise_ptr, bool, NULL, 0444);
38 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
39 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
40 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
41 MODULE_LICENSE("GPL");
42 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
43 "{RME,Hammerfall-Light}}");
45 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
46 capture, one for playback. Both the ADAT and S/PDIF channels appear
47 to the host CPU in the same block of memory. There is no functional
48 difference between them in terms of access.
50 The Hammerfall Light is identical to the Hammerfall, except that it
51 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
54 #define RME9652_NCHANNELS 26
55 #define RME9636_NCHANNELS 18
57 /* Preferred sync source choices - used by "sync_pref" control switch */
59 #define RME9652_SYNC_FROM_SPDIF 0
60 #define RME9652_SYNC_FROM_ADAT1 1
61 #define RME9652_SYNC_FROM_ADAT2 2
62 #define RME9652_SYNC_FROM_ADAT3 3
64 /* Possible sources of S/PDIF input */
66 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
67 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
68 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
70 /* ------------- Status-Register bits --------------------- */
72 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
73 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
74 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
75 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
76 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
77 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
78 /* bits 6-15 encode h/w buffer pointer position */
79 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
80 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
81 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
82 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
83 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
84 #define RME9652_tc_out (1<<21) /* time-code out bit */
85 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
86 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
87 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
88 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
89 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
90 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
91 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
93 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
94 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
95 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
96 #define rme9652_decode_spdif_rate(x) ((x)>>22)
98 /* Bit 6..15 : h/w buffer pointer */
100 #define RME9652_buf_pos 0x000FFC0
102 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
103 Rev G EEPROMS and Rev 1.5 cards or later.
106 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
108 /* amount of io space we remap for register access. i'm not sure we
109 even need this much, but 1K is nice round number :)
112 #define RME9652_IO_EXTENT 1024
114 #define RME9652_init_buffer 0
115 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
116 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
117 #define RME9652_control_register 64
118 #define RME9652_irq_clear 96
119 #define RME9652_time_code 100 /* useful if used with alesis adat */
120 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
122 /* Read-only registers */
124 /* Writing to any of the register locations writes to the status
125 register. We'll use the first location as our point of access.
128 #define RME9652_status_register 0
130 /* --------- Control-Register Bits ---------------- */
133 #define RME9652_start_bit (1<<0) /* start record/play */
134 /* bits 1-3 encode buffersize/latency */
135 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
136 #define RME9652_IE (1<<5) /* Interrupt Enable */
137 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
138 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
139 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
140 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
141 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
142 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
143 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
144 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
145 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
146 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
147 #define RME9652_SyncPref_ADAT2 (1<<16)
148 #define RME9652_SyncPref_ADAT3 (1<<17)
149 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
150 #define RME9652_SPDIF_SELECT (1<<19)
151 #define RME9652_SPDIF_CLOCK (1<<20)
152 #define RME9652_SPDIF_WRITE (1<<21)
153 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
155 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
157 #define RME9652_latency 0x0e
158 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
159 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
160 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
161 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
162 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
163 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
165 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
166 #define RME9652_SyncPref_ADAT1 0
167 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
169 /* the size of a substream (1 mono data stream) */
171 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
172 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
174 /* the size of the area we need to allocate for DMA transfers. the
175 size is the same regardless of the number of channels - the
176 9636 still uses the same memory area.
178 Note that we allocate 1 more channel than is apparently needed
179 because the h/w seems to write 1 byte beyond the end of the last
183 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
184 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
192 void __iomem *iobase;
196 u32 control_register; /* cached value */
197 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
200 u32 creg_spdif_stream;
202 char *card_name; /* hammerfall or hammerfall light names */
204 size_t hw_offsetmask; /* &-with status register to get real hw_offset */
205 size_t prev_hw_offset; /* previous hw offset */
206 size_t max_jitter; /* maximum jitter in frames for
208 size_t period_bytes; /* guess what this is */
210 unsigned char ds_channels;
211 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */
213 struct snd_dma_buffer playback_dma_buf;
214 struct snd_dma_buffer capture_dma_buf;
216 unsigned char *capture_buffer; /* suitably aligned address */
217 unsigned char *playback_buffer; /* suitably aligned address */
222 struct snd_pcm_substream *capture_substream;
223 struct snd_pcm_substream *playback_substream;
226 int passthru; /* non-zero if doing pass-thru */
227 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
229 int last_spdif_sample_rate; /* so that we can catch externally ... */
230 int last_adat_sample_rate; /* ... induced rate changes */
234 struct snd_card *card;
237 struct snd_kcontrol *spdif_ctl;
241 /* These tables map the ALSA channels 1..N to the channels that we
242 need to use in order to find the relevant channel buffer. RME
243 refer to this kind of mapping as between "the ADAT channel and
244 the DMA channel." We index it using the logical audio channel,
245 and the value is the DMA channel (i.e. channel buffer number)
246 where the data for that channel can be read/written from/to.
249 static char channel_map_9652_ss[26] = {
250 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
251 18, 19, 20, 21, 22, 23, 24, 25
254 static char channel_map_9636_ss[26] = {
255 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
256 /* channels 16 and 17 are S/PDIF */
258 /* channels 18-25 don't exist */
259 -1, -1, -1, -1, -1, -1, -1, -1
262 static char channel_map_9652_ds[26] = {
263 /* ADAT channels are remapped */
264 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
265 /* channels 12 and 13 are S/PDIF */
267 /* others don't exist */
268 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
271 static char channel_map_9636_ds[26] = {
272 /* ADAT channels are remapped */
273 1, 3, 5, 7, 9, 11, 13, 15,
274 /* channels 8 and 9 are S/PDIF */
276 /* others don't exist */
277 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
280 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
282 return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, size, dmab);
285 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
288 snd_dma_free_pages(dmab);
292 static const struct pci_device_id snd_rme9652_ids[] = {
296 .subvendor = PCI_ANY_ID,
297 .subdevice = PCI_ANY_ID,
298 }, /* RME Digi9652 */
302 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
304 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
306 writel(val, rme9652->iobase + reg);
309 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
311 return readl(rme9652->iobase + reg);
314 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
319 spin_lock_irqsave(&rme9652->lock, flags);
320 if ((rme9652->playback_pid != rme9652->capture_pid) &&
321 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
324 spin_unlock_irqrestore(&rme9652->lock, flags);
328 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
330 if (rme9652_running_double_speed(rme9652)) {
331 return (rme9652_read(rme9652, RME9652_status_register) &
332 RME9652_fs48) ? 96000 : 88200;
334 return (rme9652_read(rme9652, RME9652_status_register) &
335 RME9652_fs48) ? 48000 : 44100;
339 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
343 i = rme9652->control_register & RME9652_latency;
344 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
345 rme9652->hw_offsetmask =
346 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
347 rme9652->max_jitter = 80;
350 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
353 unsigned int offset, frag;
354 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
355 snd_pcm_sframes_t delta;
357 status = rme9652_read(rme9652, RME9652_status_register);
358 if (!rme9652->precise_ptr)
359 return (status & RME9652_buffer_id) ? period_size : 0;
360 offset = status & RME9652_buf_pos;
362 /* The hardware may give a backward movement for up to 80 frames
363 Martin Kirst <martin.kirst@freenet.de> knows the details.
366 delta = rme9652->prev_hw_offset - offset;
368 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
369 offset = rme9652->prev_hw_offset;
371 rme9652->prev_hw_offset = offset;
372 offset &= rme9652->hw_offsetmask;
374 frag = status & RME9652_buffer_id;
376 if (offset < period_size) {
377 if (offset > rme9652->max_jitter) {
379 dev_err(rme9652->card->dev,
380 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
384 offset -= rme9652->max_jitter;
386 offset += period_size * 2;
388 if (offset > period_size + rme9652->max_jitter) {
390 dev_err(rme9652->card->dev,
391 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
395 offset -= rme9652->max_jitter;
401 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
405 /* reset the FIFO pointer to zero. We do this by writing to 8
406 registers, each of which is a 32bit wide register, and set
407 them all to zero. Note that s->iobase is a pointer to
408 int32, not pointer to char.
411 for (i = 0; i < 8; i++) {
412 rme9652_write(rme9652, i * 4, 0);
415 rme9652->prev_hw_offset = 0;
418 static inline void rme9652_start(struct snd_rme9652 *s)
420 s->control_register |= (RME9652_IE | RME9652_start_bit);
421 rme9652_write(s, RME9652_control_register, s->control_register);
424 static inline void rme9652_stop(struct snd_rme9652 *s)
426 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
427 rme9652_write(s, RME9652_control_register, s->control_register);
430 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
436 spin_lock_irq(&s->lock);
438 if ((restart = s->running)) {
449 s->control_register &= ~RME9652_latency;
450 s->control_register |= rme9652_encode_latency(n);
452 rme9652_write(s, RME9652_control_register, s->control_register);
454 rme9652_compute_period_size(s);
459 spin_unlock_irq(&s->lock);
464 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
467 int reject_if_open = 0;
470 if (!snd_rme9652_use_is_exclusive (rme9652)) {
474 /* Changing from a "single speed" to a "double speed" rate is
475 not allowed if any substreams are open. This is because
476 such a change causes a shift in the location of
477 the DMA buffers and a reduction in the number of available
480 Note that a similar but essentially insoluble problem
481 exists for externally-driven rate changes. All we can do
482 is to flag rate changes in the read/write routines.
485 spin_lock_irq(&rme9652->lock);
486 xrate = rme9652_adat_sample_rate(rme9652);
511 rate = RME9652_DS | RME9652_freq;
514 spin_unlock_irq(&rme9652->lock);
518 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
519 spin_unlock_irq(&rme9652->lock);
523 if ((restart = rme9652->running)) {
524 rme9652_stop(rme9652);
526 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
527 rme9652->control_register |= rate;
528 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
531 rme9652_start(rme9652);
534 if (rate & RME9652_DS) {
535 if (rme9652->ss_channels == RME9652_NCHANNELS) {
536 rme9652->channel_map = channel_map_9652_ds;
538 rme9652->channel_map = channel_map_9636_ds;
541 if (rme9652->ss_channels == RME9652_NCHANNELS) {
542 rme9652->channel_map = channel_map_9652_ss;
544 rme9652->channel_map = channel_map_9636_ss;
548 spin_unlock_irq(&rme9652->lock);
552 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
556 rme9652->passthru = 0;
560 /* set thru for all channels */
563 for (i = 0; i < RME9652_NCHANNELS; i++) {
564 rme9652->thru_bits |= (1 << i);
565 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
568 for (i = 0; i < RME9652_NCHANNELS; i++) {
569 rme9652->thru_bits &= ~(1 << i);
570 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
577 mapped_channel = rme9652->channel_map[channel];
580 rme9652->thru_bits |= (1 << mapped_channel);
582 rme9652->thru_bits &= ~(1 << mapped_channel);
585 rme9652_write(rme9652,
586 RME9652_thru_base + mapped_channel * 4,
591 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
594 rme9652_set_thru(rme9652, -1, 1);
596 /* we don't want interrupts, so do a
597 custom version of rme9652_start().
600 rme9652->control_register =
602 rme9652_encode_latency(7) |
605 rme9652_reset_hw_pointer(rme9652);
607 rme9652_write(rme9652, RME9652_control_register,
608 rme9652->control_register);
609 rme9652->passthru = 1;
611 rme9652_set_thru(rme9652, -1, 0);
612 rme9652_stop(rme9652);
613 rme9652->passthru = 0;
619 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
622 rme9652->control_register |= mask;
624 rme9652->control_register &= ~mask;
626 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
629 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
634 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
636 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
638 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
640 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
641 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
645 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
653 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
654 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
655 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
657 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
663 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
665 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
666 rme9652_spdif_write_byte (rme9652, 0x20);
667 rme9652_spdif_write_byte (rme9652, address);
668 rme9652_spdif_write_byte (rme9652, data);
669 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
673 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
677 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
678 rme9652_spdif_write_byte (rme9652, 0x20);
679 rme9652_spdif_write_byte (rme9652, address);
680 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
681 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
683 rme9652_spdif_write_byte (rme9652, 0x21);
684 ret = rme9652_spdif_read_byte (rme9652);
685 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
690 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
692 /* XXX what unsets this ? */
694 rme9652->control_register |= RME9652_SPDIF_RESET;
696 rme9652_write_spdif_codec (rme9652, 4, 0x40);
697 rme9652_write_spdif_codec (rme9652, 17, 0x13);
698 rme9652_write_spdif_codec (rme9652, 6, 0x02);
701 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
703 unsigned int rate_bits;
705 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
706 return -1; /* error condition */
709 if (s->hw_rev == 15) {
713 x = rme9652_spdif_read_codec (s, 30);
720 if (y > 30400 && y < 33600) ret = 32000;
721 else if (y > 41900 && y < 46000) ret = 44100;
722 else if (y > 46000 && y < 50400) ret = 48000;
723 else if (y > 60800 && y < 67200) ret = 64000;
724 else if (y > 83700 && y < 92000) ret = 88200;
725 else if (y > 92000 && y < 100000) ret = 96000;
730 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
732 switch (rme9652_decode_spdif_rate(rate_bits)) {
758 dev_err(s->card->dev,
759 "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
760 s->card_name, rate_bits);
766 /*-----------------------------------------------------------------------------
768 ----------------------------------------------------------------------------*/
770 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
773 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
774 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
775 if (val & RME9652_PRO)
776 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
778 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
782 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
784 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
785 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
786 if (val & RME9652_PRO)
787 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
789 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
792 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
794 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
799 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
801 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
803 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
807 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
809 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
813 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
814 spin_lock_irq(&rme9652->lock);
815 change = val != rme9652->creg_spdif;
816 rme9652->creg_spdif = val;
817 spin_unlock_irq(&rme9652->lock);
821 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
823 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
828 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
830 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
832 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
836 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
838 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
842 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
843 spin_lock_irq(&rme9652->lock);
844 change = val != rme9652->creg_spdif_stream;
845 rme9652->creg_spdif_stream = val;
846 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
847 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
848 spin_unlock_irq(&rme9652->lock);
852 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
854 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
859 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
861 ucontrol->value.iec958.status[0] = kcontrol->private_value;
865 #define RME9652_ADAT1_IN(xname, xindex) \
866 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
867 .info = snd_rme9652_info_adat1_in, \
868 .get = snd_rme9652_get_adat1_in, \
869 .put = snd_rme9652_put_adat1_in }
871 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
873 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
878 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
883 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
885 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
888 /* XXX do we actually need to stop the card when we do this ? */
890 if ((restart = rme9652->running)) {
891 rme9652_stop(rme9652);
894 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
897 rme9652_start(rme9652);
903 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
905 static const char * const texts[2] = {"ADAT1", "Internal"};
907 return snd_ctl_enum_info(uinfo, 1, 2, texts);
910 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
912 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
914 spin_lock_irq(&rme9652->lock);
915 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
916 spin_unlock_irq(&rme9652->lock);
920 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
922 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
926 if (!snd_rme9652_use_is_exclusive(rme9652))
928 val = ucontrol->value.enumerated.item[0] % 2;
929 spin_lock_irq(&rme9652->lock);
930 change = val != rme9652_adat1_in(rme9652);
932 rme9652_set_adat1_input(rme9652, val);
933 spin_unlock_irq(&rme9652->lock);
937 #define RME9652_SPDIF_IN(xname, xindex) \
938 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
939 .info = snd_rme9652_info_spdif_in, \
940 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
942 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
944 return rme9652_decode_spdif_in(rme9652->control_register &
948 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
952 rme9652->control_register &= ~RME9652_inp;
953 rme9652->control_register |= rme9652_encode_spdif_in(in);
955 if ((restart = rme9652->running)) {
956 rme9652_stop(rme9652);
959 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
962 rme9652_start(rme9652);
968 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
970 static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
972 return snd_ctl_enum_info(uinfo, 1, 3, texts);
975 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
977 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
979 spin_lock_irq(&rme9652->lock);
980 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
981 spin_unlock_irq(&rme9652->lock);
985 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
987 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
991 if (!snd_rme9652_use_is_exclusive(rme9652))
993 val = ucontrol->value.enumerated.item[0] % 3;
994 spin_lock_irq(&rme9652->lock);
995 change = val != rme9652_spdif_in(rme9652);
997 rme9652_set_spdif_input(rme9652, val);
998 spin_unlock_irq(&rme9652->lock);
1002 #define RME9652_SPDIF_OUT(xname, xindex) \
1003 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1004 .info = snd_rme9652_info_spdif_out, \
1005 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1007 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1009 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1012 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1017 rme9652->control_register |= RME9652_opt_out;
1019 rme9652->control_register &= ~RME9652_opt_out;
1022 if ((restart = rme9652->running)) {
1023 rme9652_stop(rme9652);
1026 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1029 rme9652_start(rme9652);
1035 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1037 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1039 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1041 spin_lock_irq(&rme9652->lock);
1042 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1043 spin_unlock_irq(&rme9652->lock);
1047 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1049 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1053 if (!snd_rme9652_use_is_exclusive(rme9652))
1055 val = ucontrol->value.integer.value[0] & 1;
1056 spin_lock_irq(&rme9652->lock);
1057 change = (int)val != rme9652_spdif_out(rme9652);
1058 rme9652_set_spdif_output(rme9652, val);
1059 spin_unlock_irq(&rme9652->lock);
1063 #define RME9652_SYNC_MODE(xname, xindex) \
1064 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1065 .info = snd_rme9652_info_sync_mode, \
1066 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1068 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1070 if (rme9652->control_register & RME9652_wsel) {
1072 } else if (rme9652->control_register & RME9652_Master) {
1079 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1085 rme9652->control_register &=
1086 ~(RME9652_Master | RME9652_wsel);
1089 rme9652->control_register =
1090 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1093 rme9652->control_register |=
1094 (RME9652_Master | RME9652_wsel);
1098 if ((restart = rme9652->running)) {
1099 rme9652_stop(rme9652);
1102 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1105 rme9652_start(rme9652);
1111 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1113 static const char * const texts[3] = {
1114 "AutoSync", "Master", "Word Clock"
1117 return snd_ctl_enum_info(uinfo, 1, 3, texts);
1120 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1122 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1124 spin_lock_irq(&rme9652->lock);
1125 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1126 spin_unlock_irq(&rme9652->lock);
1130 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1132 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1136 val = ucontrol->value.enumerated.item[0] % 3;
1137 spin_lock_irq(&rme9652->lock);
1138 change = (int)val != rme9652_sync_mode(rme9652);
1139 rme9652_set_sync_mode(rme9652, val);
1140 spin_unlock_irq(&rme9652->lock);
1144 #define RME9652_SYNC_PREF(xname, xindex) \
1145 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1146 .info = snd_rme9652_info_sync_pref, \
1147 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1149 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1151 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1152 case RME9652_SyncPref_ADAT1:
1153 return RME9652_SYNC_FROM_ADAT1;
1154 case RME9652_SyncPref_ADAT2:
1155 return RME9652_SYNC_FROM_ADAT2;
1156 case RME9652_SyncPref_ADAT3:
1157 return RME9652_SYNC_FROM_ADAT3;
1158 case RME9652_SyncPref_SPDIF:
1159 return RME9652_SYNC_FROM_SPDIF;
1165 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1169 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1171 case RME9652_SYNC_FROM_ADAT1:
1172 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1174 case RME9652_SYNC_FROM_ADAT2:
1175 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1177 case RME9652_SYNC_FROM_ADAT3:
1178 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1180 case RME9652_SYNC_FROM_SPDIF:
1181 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1185 if ((restart = rme9652->running)) {
1186 rme9652_stop(rme9652);
1189 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1192 rme9652_start(rme9652);
1198 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1200 static const char * const texts[4] = {
1201 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1203 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1205 return snd_ctl_enum_info(uinfo, 1,
1206 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1210 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1212 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1214 spin_lock_irq(&rme9652->lock);
1215 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1216 spin_unlock_irq(&rme9652->lock);
1220 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1222 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1226 if (!snd_rme9652_use_is_exclusive(rme9652))
1228 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1229 val = ucontrol->value.enumerated.item[0] % max;
1230 spin_lock_irq(&rme9652->lock);
1231 change = (int)val != rme9652_sync_pref(rme9652);
1232 rme9652_set_sync_pref(rme9652, val);
1233 spin_unlock_irq(&rme9652->lock);
1237 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1239 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1240 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1241 uinfo->count = rme9652->ss_channels;
1242 uinfo->value.integer.min = 0;
1243 uinfo->value.integer.max = 1;
1247 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1249 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1251 u32 thru_bits = rme9652->thru_bits;
1253 for (k = 0; k < rme9652->ss_channels; ++k) {
1254 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1259 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1261 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1266 if (!snd_rme9652_use_is_exclusive(rme9652))
1269 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1270 if (ucontrol->value.integer.value[chn])
1271 thru_bits |= 1 << chn;
1274 spin_lock_irq(&rme9652->lock);
1275 change = thru_bits ^ rme9652->thru_bits;
1277 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1278 if (!(change & (1 << chn)))
1280 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1283 spin_unlock_irq(&rme9652->lock);
1287 #define RME9652_PASSTHRU(xname, xindex) \
1288 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1289 .info = snd_rme9652_info_passthru, \
1290 .put = snd_rme9652_put_passthru, \
1291 .get = snd_rme9652_get_passthru }
1293 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1295 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1297 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1299 spin_lock_irq(&rme9652->lock);
1300 ucontrol->value.integer.value[0] = rme9652->passthru;
1301 spin_unlock_irq(&rme9652->lock);
1305 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1307 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1312 if (!snd_rme9652_use_is_exclusive(rme9652))
1315 val = ucontrol->value.integer.value[0] & 1;
1316 spin_lock_irq(&rme9652->lock);
1317 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1319 err = rme9652_set_passthru(rme9652, val);
1320 spin_unlock_irq(&rme9652->lock);
1321 return err ? err : change;
1324 /* Read-only switches */
1326 #define RME9652_SPDIF_RATE(xname, xindex) \
1327 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1328 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1329 .info = snd_rme9652_info_spdif_rate, \
1330 .get = snd_rme9652_get_spdif_rate }
1332 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1334 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1336 uinfo->value.integer.min = 0;
1337 uinfo->value.integer.max = 96000;
1341 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1343 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1345 spin_lock_irq(&rme9652->lock);
1346 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1347 spin_unlock_irq(&rme9652->lock);
1351 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1352 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1353 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1354 .info = snd_rme9652_info_adat_sync, \
1355 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1357 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1359 static const char * const texts[4] = {
1360 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1363 return snd_ctl_enum_info(uinfo, 1, 4, texts);
1366 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1368 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1369 unsigned int mask1, mask2, val;
1371 switch (kcontrol->private_value) {
1372 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1373 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1374 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1375 default: return -EINVAL;
1377 val = rme9652_read(rme9652, RME9652_status_register);
1378 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1379 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1383 #define RME9652_TC_VALID(xname, xindex) \
1384 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1385 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1386 .info = snd_rme9652_info_tc_valid, \
1387 .get = snd_rme9652_get_tc_valid }
1389 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1391 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1393 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1395 ucontrol->value.integer.value[0] =
1396 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1400 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1402 /* FIXME: this routine needs a port to the new control API --jk */
1404 static int snd_rme9652_get_tc_value(void *private_data,
1405 snd_kswitch_t *kswitch,
1406 snd_switch_t *uswitch)
1408 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1412 uswitch->type = SNDRV_SW_TYPE_DWORD;
1414 if ((rme9652_read(s, RME9652_status_register) &
1415 RME9652_tc_valid) == 0) {
1416 uswitch->value.data32[0] = 0;
1420 /* timecode request */
1422 rme9652_write(s, RME9652_time_code, 0);
1424 /* XXX bug alert: loop-based timing !!!! */
1426 for (i = 0; i < 50; i++) {
1427 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1431 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1437 for (i = 0; i < 32; i++) {
1440 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1441 value |= 0x80000000;
1444 if (value > 2 * 60 * 48000) {
1445 value -= 2 * 60 * 48000;
1450 uswitch->value.data32[0] = value;
1455 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1457 static const struct snd_kcontrol_new snd_rme9652_controls[] = {
1459 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1460 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1461 .info = snd_rme9652_control_spdif_info,
1462 .get = snd_rme9652_control_spdif_get,
1463 .put = snd_rme9652_control_spdif_put,
1466 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1467 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1468 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1469 .info = snd_rme9652_control_spdif_stream_info,
1470 .get = snd_rme9652_control_spdif_stream_get,
1471 .put = snd_rme9652_control_spdif_stream_put,
1474 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1475 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1476 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1477 .info = snd_rme9652_control_spdif_mask_info,
1478 .get = snd_rme9652_control_spdif_mask_get,
1479 .private_value = IEC958_AES0_NONAUDIO |
1480 IEC958_AES0_PROFESSIONAL |
1481 IEC958_AES0_CON_EMPHASIS,
1484 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1485 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1486 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1487 .info = snd_rme9652_control_spdif_mask_info,
1488 .get = snd_rme9652_control_spdif_mask_get,
1489 .private_value = IEC958_AES0_NONAUDIO |
1490 IEC958_AES0_PROFESSIONAL |
1491 IEC958_AES0_PRO_EMPHASIS,
1493 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1494 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1495 RME9652_SYNC_MODE("Sync Mode", 0),
1496 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1498 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1499 .name = "Channels Thru",
1501 .info = snd_rme9652_info_thru,
1502 .get = snd_rme9652_get_thru,
1503 .put = snd_rme9652_put_thru,
1505 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1506 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1507 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1508 RME9652_TC_VALID("Timecode Valid", 0),
1509 RME9652_PASSTHRU("Passthru", 0)
1512 static const struct snd_kcontrol_new snd_rme9652_adat3_check =
1513 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1515 static const struct snd_kcontrol_new snd_rme9652_adat1_input =
1516 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1518 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1522 struct snd_kcontrol *kctl;
1524 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1525 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1527 if (idx == 1) /* IEC958 (S/PDIF) Stream */
1528 rme9652->spdif_ctl = kctl;
1531 if (rme9652->ss_channels == RME9652_NCHANNELS)
1532 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1535 if (rme9652->hw_rev >= 15)
1536 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1542 /*------------------------------------------------------------
1544 ------------------------------------------------------------*/
1547 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1549 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1550 u32 thru_bits = rme9652->thru_bits;
1551 int show_auto_sync_source = 0;
1553 unsigned int status;
1556 status = rme9652_read(rme9652, RME9652_status_register);
1558 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1559 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1560 rme9652->capture_buffer, rme9652->playback_buffer);
1561 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1562 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1563 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1565 snd_iprintf(buffer, "\n");
1567 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1570 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1571 x, (unsigned long) rme9652->period_bytes);
1572 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1573 rme9652_hw_pointer(rme9652));
1574 snd_iprintf(buffer, "Passthru: %s\n",
1575 rme9652->passthru ? "yes" : "no");
1577 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1578 snd_iprintf(buffer, "Clock mode: autosync\n");
1579 show_auto_sync_source = 1;
1580 } else if (rme9652->control_register & RME9652_wsel) {
1581 if (status & RME9652_wsel_rd) {
1582 snd_iprintf(buffer, "Clock mode: word clock\n");
1584 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1587 snd_iprintf(buffer, "Clock mode: master\n");
1590 if (show_auto_sync_source) {
1591 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1592 case RME9652_SyncPref_ADAT1:
1593 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1595 case RME9652_SyncPref_ADAT2:
1596 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1598 case RME9652_SyncPref_ADAT3:
1599 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1601 case RME9652_SyncPref_SPDIF:
1602 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1605 snd_iprintf(buffer, "Pref. sync source: ???\n");
1609 if (rme9652->hw_rev >= 15)
1610 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1611 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1612 "Internal" : "ADAT1 optical");
1614 snd_iprintf(buffer, "\n");
1616 switch (rme9652_decode_spdif_in(rme9652->control_register &
1618 case RME9652_SPDIFIN_OPTICAL:
1619 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1621 case RME9652_SPDIFIN_COAXIAL:
1622 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1624 case RME9652_SPDIFIN_INTERN:
1625 snd_iprintf(buffer, "IEC958 input: Internal\n");
1628 snd_iprintf(buffer, "IEC958 input: ???\n");
1632 if (rme9652->control_register & RME9652_opt_out) {
1633 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1635 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1638 if (rme9652->control_register & RME9652_PRO) {
1639 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1641 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1644 if (rme9652->control_register & RME9652_EMP) {
1645 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1647 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1650 if (rme9652->control_register & RME9652_Dolby) {
1651 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1653 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1656 i = rme9652_spdif_sample_rate(rme9652);
1660 "IEC958 sample rate: error flag set\n");
1661 } else if (i == 0) {
1662 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1664 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1667 snd_iprintf(buffer, "\n");
1669 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1670 rme9652_adat_sample_rate(rme9652));
1674 x = status & RME9652_sync_0;
1675 if (status & RME9652_lock_0) {
1676 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1678 snd_iprintf(buffer, "ADAT1: No Lock\n");
1681 x = status & RME9652_sync_1;
1682 if (status & RME9652_lock_1) {
1683 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1685 snd_iprintf(buffer, "ADAT2: No Lock\n");
1688 x = status & RME9652_sync_2;
1689 if (status & RME9652_lock_2) {
1690 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1692 snd_iprintf(buffer, "ADAT3: No Lock\n");
1695 snd_iprintf(buffer, "\n");
1697 snd_iprintf(buffer, "Timecode signal: %s\n",
1698 (status & RME9652_tc_valid) ? "yes" : "no");
1702 snd_iprintf(buffer, "Punch Status:\n\n");
1704 for (i = 0; i < rme9652->ss_channels; i++) {
1705 if (thru_bits & (1 << i)) {
1706 snd_iprintf(buffer, "%2d: on ", i + 1);
1708 snd_iprintf(buffer, "%2d: off ", i + 1);
1711 if (((i + 1) % 8) == 0) {
1712 snd_iprintf(buffer, "\n");
1716 snd_iprintf(buffer, "\n");
1719 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1721 snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1722 snd_rme9652_proc_read);
1725 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1727 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1728 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1731 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1733 if (rme9652->irq >= 0)
1734 rme9652_stop(rme9652);
1735 snd_rme9652_free_buffers(rme9652);
1737 if (rme9652->irq >= 0)
1738 free_irq(rme9652->irq, (void *)rme9652);
1739 iounmap(rme9652->iobase);
1741 pci_release_regions(rme9652->pci);
1743 pci_disable_device(rme9652->pci);
1747 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1749 unsigned long pb_bus, cb_bus;
1751 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1752 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1753 if (rme9652->capture_dma_buf.area)
1754 snd_dma_free_pages(&rme9652->capture_dma_buf);
1755 dev_err(rme9652->card->dev,
1756 "%s: no buffers available\n", rme9652->card_name);
1760 /* Align to bus-space 64K boundary */
1762 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1763 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1765 /* Tell the card where it is */
1767 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1768 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1770 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1771 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1776 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1780 /* ASSUMPTION: rme9652->lock is either held, or
1781 there is no need to hold it (e.g. during module
1787 SPDIF Input via Coax
1789 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1790 which implies 2 4096 sample, 32Kbyte periods).
1792 if rev 1.5, initialize the S/PDIF receiver.
1796 rme9652->control_register =
1797 RME9652_inp_0 | rme9652_encode_latency(7);
1799 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1801 rme9652_reset_hw_pointer(rme9652);
1802 rme9652_compute_period_size(rme9652);
1804 /* default: thru off for all channels */
1806 for (k = 0; k < RME9652_NCHANNELS; ++k)
1807 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1809 rme9652->thru_bits = 0;
1810 rme9652->passthru = 0;
1812 /* set a default rate so that the channel map is set up */
1814 rme9652_set_rate(rme9652, 48000);
1817 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1819 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1821 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1825 rme9652_write(rme9652, RME9652_irq_clear, 0);
1827 if (rme9652->capture_substream) {
1828 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1831 if (rme9652->playback_substream) {
1832 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1837 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1839 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1840 return rme9652_hw_pointer(rme9652);
1843 static char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1850 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1853 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1857 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1858 return rme9652->capture_buffer +
1859 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1861 return rme9652->playback_buffer +
1862 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1866 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1867 int channel, unsigned long pos,
1868 void __user *src, unsigned long count)
1870 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1873 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1876 channel_buf = rme9652_channel_buffer_location (rme9652,
1877 substream->pstr->stream,
1879 if (snd_BUG_ON(!channel_buf))
1881 if (copy_from_user(channel_buf + pos, src, count))
1886 static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1887 int channel, unsigned long pos,
1888 void *src, unsigned long count)
1890 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1893 channel_buf = rme9652_channel_buffer_location(rme9652,
1894 substream->pstr->stream,
1896 if (snd_BUG_ON(!channel_buf))
1898 memcpy(channel_buf + pos, src, count);
1902 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1903 int channel, unsigned long pos,
1904 void __user *dst, unsigned long count)
1906 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1909 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1912 channel_buf = rme9652_channel_buffer_location (rme9652,
1913 substream->pstr->stream,
1915 if (snd_BUG_ON(!channel_buf))
1917 if (copy_to_user(dst, channel_buf + pos, count))
1922 static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1923 int channel, unsigned long pos,
1924 void *dst, unsigned long count)
1926 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1929 channel_buf = rme9652_channel_buffer_location(rme9652,
1930 substream->pstr->stream,
1932 if (snd_BUG_ON(!channel_buf))
1934 memcpy(dst, channel_buf + pos, count);
1938 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1939 int channel, unsigned long pos,
1940 unsigned long count)
1942 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1945 channel_buf = rme9652_channel_buffer_location (rme9652,
1946 substream->pstr->stream,
1948 if (snd_BUG_ON(!channel_buf))
1950 memset(channel_buf + pos, 0, count);
1954 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1956 struct snd_pcm_runtime *runtime = substream->runtime;
1957 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1958 struct snd_pcm_substream *other;
1959 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1960 other = rme9652->capture_substream;
1962 other = rme9652->playback_substream;
1963 if (rme9652->running)
1964 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1966 runtime->status->hw_ptr = 0;
1968 struct snd_pcm_substream *s;
1969 struct snd_pcm_runtime *oruntime = other->runtime;
1970 snd_pcm_group_for_each_entry(s, substream) {
1972 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1980 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1981 struct snd_pcm_hw_params *params)
1983 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1988 spin_lock_irq(&rme9652->lock);
1990 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1991 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1992 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1993 this_pid = rme9652->playback_pid;
1994 other_pid = rme9652->capture_pid;
1996 this_pid = rme9652->capture_pid;
1997 other_pid = rme9652->playback_pid;
2000 if ((other_pid > 0) && (this_pid != other_pid)) {
2002 /* The other stream is open, and not by the same
2003 task as this one. Make sure that the parameters
2004 that matter are the same.
2007 if ((int)params_rate(params) !=
2008 rme9652_adat_sample_rate(rme9652)) {
2009 spin_unlock_irq(&rme9652->lock);
2010 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2014 if (params_period_size(params) != rme9652->period_bytes / 4) {
2015 spin_unlock_irq(&rme9652->lock);
2016 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2022 spin_unlock_irq(&rme9652->lock);
2026 spin_unlock_irq(&rme9652->lock);
2029 /* how to make sure that the rate matches an externally-set one ?
2032 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2033 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2037 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2038 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2045 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2046 struct snd_pcm_channel_info *info)
2048 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2051 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2054 chn = rme9652->channel_map[array_index_nospec(info->channel,
2055 RME9652_NCHANNELS)];
2059 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2065 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2066 unsigned int cmd, void *arg)
2069 case SNDRV_PCM_IOCTL1_RESET:
2071 return snd_rme9652_reset(substream);
2073 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2075 struct snd_pcm_channel_info *info = arg;
2076 return snd_rme9652_channel_info(substream, info);
2082 return snd_pcm_lib_ioctl(substream, cmd, arg);
2085 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2087 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2090 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2093 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2094 struct snd_pcm_substream *other;
2096 spin_lock(&rme9652->lock);
2097 running = rme9652->running;
2099 case SNDRV_PCM_TRIGGER_START:
2100 running |= 1 << substream->stream;
2102 case SNDRV_PCM_TRIGGER_STOP:
2103 running &= ~(1 << substream->stream);
2107 spin_unlock(&rme9652->lock);
2110 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2111 other = rme9652->capture_substream;
2113 other = rme9652->playback_substream;
2116 struct snd_pcm_substream *s;
2117 snd_pcm_group_for_each_entry(s, substream) {
2119 snd_pcm_trigger_done(s, substream);
2120 if (cmd == SNDRV_PCM_TRIGGER_START)
2121 running |= 1 << s->stream;
2123 running &= ~(1 << s->stream);
2127 if (cmd == SNDRV_PCM_TRIGGER_START) {
2128 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2129 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2130 rme9652_silence_playback(rme9652);
2133 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2134 rme9652_silence_playback(rme9652);
2137 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2138 rme9652_silence_playback(rme9652);
2141 snd_pcm_trigger_done(substream, substream);
2142 if (!rme9652->running && running)
2143 rme9652_start(rme9652);
2144 else if (rme9652->running && !running)
2145 rme9652_stop(rme9652);
2146 rme9652->running = running;
2147 spin_unlock(&rme9652->lock);
2152 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2154 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2155 unsigned long flags;
2157 spin_lock_irqsave(&rme9652->lock, flags);
2158 if (!rme9652->running)
2159 rme9652_reset_hw_pointer(rme9652);
2160 spin_unlock_irqrestore(&rme9652->lock, flags);
2164 static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2166 .info = (SNDRV_PCM_INFO_MMAP |
2167 SNDRV_PCM_INFO_MMAP_VALID |
2168 SNDRV_PCM_INFO_NONINTERLEAVED |
2169 SNDRV_PCM_INFO_SYNC_START |
2170 SNDRV_PCM_INFO_DOUBLE),
2171 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2172 .rates = (SNDRV_PCM_RATE_44100 |
2173 SNDRV_PCM_RATE_48000 |
2174 SNDRV_PCM_RATE_88200 |
2175 SNDRV_PCM_RATE_96000),
2180 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2181 .period_bytes_min = (64 * 4) * 10,
2182 .period_bytes_max = (8192 * 4) * 26,
2188 static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2190 .info = (SNDRV_PCM_INFO_MMAP |
2191 SNDRV_PCM_INFO_MMAP_VALID |
2192 SNDRV_PCM_INFO_NONINTERLEAVED |
2193 SNDRV_PCM_INFO_SYNC_START),
2194 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2195 .rates = (SNDRV_PCM_RATE_44100 |
2196 SNDRV_PCM_RATE_48000 |
2197 SNDRV_PCM_RATE_88200 |
2198 SNDRV_PCM_RATE_96000),
2203 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2204 .period_bytes_min = (64 * 4) * 10,
2205 .period_bytes_max = (8192 * 4) * 26,
2211 static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2213 static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2214 .count = ARRAY_SIZE(period_sizes),
2215 .list = period_sizes,
2219 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2220 struct snd_pcm_hw_rule *rule)
2222 struct snd_rme9652 *rme9652 = rule->private;
2223 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2224 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2225 return snd_interval_list(c, 2, list, 0);
2228 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2229 struct snd_pcm_hw_rule *rule)
2231 struct snd_rme9652 *rme9652 = rule->private;
2232 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2233 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2234 if (r->min > 48000) {
2235 struct snd_interval t = {
2236 .min = rme9652->ds_channels,
2237 .max = rme9652->ds_channels,
2240 return snd_interval_refine(c, &t);
2241 } else if (r->max < 88200) {
2242 struct snd_interval t = {
2243 .min = rme9652->ss_channels,
2244 .max = rme9652->ss_channels,
2247 return snd_interval_refine(c, &t);
2252 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2253 struct snd_pcm_hw_rule *rule)
2255 struct snd_rme9652 *rme9652 = rule->private;
2256 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2257 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2258 if (c->min >= rme9652->ss_channels) {
2259 struct snd_interval t = {
2264 return snd_interval_refine(r, &t);
2265 } else if (c->max <= rme9652->ds_channels) {
2266 struct snd_interval t = {
2271 return snd_interval_refine(r, &t);
2276 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2278 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2279 struct snd_pcm_runtime *runtime = substream->runtime;
2281 spin_lock_irq(&rme9652->lock);
2283 snd_pcm_set_sync(substream);
2285 runtime->hw = snd_rme9652_playback_subinfo;
2286 runtime->dma_area = rme9652->playback_buffer;
2287 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2289 if (rme9652->capture_substream == NULL) {
2290 rme9652_stop(rme9652);
2291 rme9652_set_thru(rme9652, -1, 0);
2294 rme9652->playback_pid = current->pid;
2295 rme9652->playback_substream = substream;
2297 spin_unlock_irq(&rme9652->lock);
2299 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2300 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2301 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2302 snd_rme9652_hw_rule_channels, rme9652,
2303 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2304 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2305 snd_rme9652_hw_rule_channels_rate, rme9652,
2306 SNDRV_PCM_HW_PARAM_RATE, -1);
2307 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2308 snd_rme9652_hw_rule_rate_channels, rme9652,
2309 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2311 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2312 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2313 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2314 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2318 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2320 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2322 spin_lock_irq(&rme9652->lock);
2324 rme9652->playback_pid = -1;
2325 rme9652->playback_substream = NULL;
2327 spin_unlock_irq(&rme9652->lock);
2329 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2330 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2331 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2336 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2338 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2339 struct snd_pcm_runtime *runtime = substream->runtime;
2341 spin_lock_irq(&rme9652->lock);
2343 snd_pcm_set_sync(substream);
2345 runtime->hw = snd_rme9652_capture_subinfo;
2346 runtime->dma_area = rme9652->capture_buffer;
2347 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2349 if (rme9652->playback_substream == NULL) {
2350 rme9652_stop(rme9652);
2351 rme9652_set_thru(rme9652, -1, 0);
2354 rme9652->capture_pid = current->pid;
2355 rme9652->capture_substream = substream;
2357 spin_unlock_irq(&rme9652->lock);
2359 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2360 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2361 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2362 snd_rme9652_hw_rule_channels, rme9652,
2363 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2364 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2365 snd_rme9652_hw_rule_channels_rate, rme9652,
2366 SNDRV_PCM_HW_PARAM_RATE, -1);
2367 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2368 snd_rme9652_hw_rule_rate_channels, rme9652,
2369 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2373 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2375 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2377 spin_lock_irq(&rme9652->lock);
2379 rme9652->capture_pid = -1;
2380 rme9652->capture_substream = NULL;
2382 spin_unlock_irq(&rme9652->lock);
2386 static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2387 .open = snd_rme9652_playback_open,
2388 .close = snd_rme9652_playback_release,
2389 .ioctl = snd_rme9652_ioctl,
2390 .hw_params = snd_rme9652_hw_params,
2391 .prepare = snd_rme9652_prepare,
2392 .trigger = snd_rme9652_trigger,
2393 .pointer = snd_rme9652_hw_pointer,
2394 .copy_user = snd_rme9652_playback_copy,
2395 .copy_kernel = snd_rme9652_playback_copy_kernel,
2396 .fill_silence = snd_rme9652_hw_silence,
2399 static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2400 .open = snd_rme9652_capture_open,
2401 .close = snd_rme9652_capture_release,
2402 .ioctl = snd_rme9652_ioctl,
2403 .hw_params = snd_rme9652_hw_params,
2404 .prepare = snd_rme9652_prepare,
2405 .trigger = snd_rme9652_trigger,
2406 .pointer = snd_rme9652_hw_pointer,
2407 .copy_user = snd_rme9652_capture_copy,
2408 .copy_kernel = snd_rme9652_capture_copy_kernel,
2411 static int snd_rme9652_create_pcm(struct snd_card *card,
2412 struct snd_rme9652 *rme9652)
2414 struct snd_pcm *pcm;
2417 if ((err = snd_pcm_new(card,
2419 0, 1, 1, &pcm)) < 0) {
2424 pcm->private_data = rme9652;
2425 strcpy(pcm->name, rme9652->card_name);
2427 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2428 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2430 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2435 static int snd_rme9652_create(struct snd_card *card,
2436 struct snd_rme9652 *rme9652,
2439 struct pci_dev *pci = rme9652->pci;
2445 rme9652->card = card;
2447 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2449 switch (rev & 0xff) {
2461 if ((err = pci_enable_device(pci)) < 0)
2464 spin_lock_init(&rme9652->lock);
2466 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2468 rme9652->port = pci_resource_start(pci, 0);
2469 rme9652->iobase = ioremap_nocache(rme9652->port, RME9652_IO_EXTENT);
2470 if (rme9652->iobase == NULL) {
2471 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2472 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2476 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2477 KBUILD_MODNAME, rme9652)) {
2478 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2481 rme9652->irq = pci->irq;
2482 card->sync_irq = rme9652->irq;
2483 rme9652->precise_ptr = precise_ptr;
2485 /* Determine the h/w rev level of the card. This seems like
2486 a particularly kludgy way to encode it, but its what RME
2487 chose to do, so we follow them ...
2490 status = rme9652_read(rme9652, RME9652_status_register);
2491 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2492 rme9652->hw_rev = 15;
2494 rme9652->hw_rev = 11;
2497 /* Differentiate between the standard Hammerfall, and the
2498 "Light", which does not have the expansion board. This
2499 method comes from information received from Mathhias
2500 Clausen at RME. Display the EEPROM and h/w revID where
2505 case 8: /* original eprom */
2506 strcpy(card->driver, "RME9636");
2507 if (rme9652->hw_rev == 15) {
2508 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2510 rme9652->card_name = "RME Digi9636";
2512 rme9652->ss_channels = RME9636_NCHANNELS;
2514 case 9: /* W36_G EPROM */
2515 strcpy(card->driver, "RME9636");
2516 rme9652->card_name = "RME Digi9636 (Rev G)";
2517 rme9652->ss_channels = RME9636_NCHANNELS;
2519 case 4: /* W52_G EPROM */
2520 strcpy(card->driver, "RME9652");
2521 rme9652->card_name = "RME Digi9652 (Rev G)";
2522 rme9652->ss_channels = RME9652_NCHANNELS;
2524 case 3: /* original eprom */
2525 strcpy(card->driver, "RME9652");
2526 if (rme9652->hw_rev == 15) {
2527 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2529 rme9652->card_name = "RME Digi9652";
2531 rme9652->ss_channels = RME9652_NCHANNELS;
2535 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2537 pci_set_master(rme9652->pci);
2539 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2543 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2547 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2551 snd_rme9652_proc_init(rme9652);
2553 rme9652->last_spdif_sample_rate = -1;
2554 rme9652->last_adat_sample_rate = -1;
2555 rme9652->playback_pid = -1;
2556 rme9652->capture_pid = -1;
2557 rme9652->capture_substream = NULL;
2558 rme9652->playback_substream = NULL;
2560 snd_rme9652_set_defaults(rme9652);
2562 if (rme9652->hw_rev == 15) {
2563 rme9652_initialize_spdif_receiver (rme9652);
2569 static void snd_rme9652_card_free(struct snd_card *card)
2571 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2574 snd_rme9652_free(rme9652);
2577 static int snd_rme9652_probe(struct pci_dev *pci,
2578 const struct pci_device_id *pci_id)
2581 struct snd_rme9652 *rme9652;
2582 struct snd_card *card;
2585 if (dev >= SNDRV_CARDS)
2592 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2593 sizeof(struct snd_rme9652), &card);
2598 rme9652 = (struct snd_rme9652 *) card->private_data;
2599 card->private_free = snd_rme9652_card_free;
2602 err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2606 strcpy(card->shortname, rme9652->card_name);
2608 sprintf(card->longname, "%s at 0x%lx, irq %d",
2609 card->shortname, rme9652->port, rme9652->irq);
2610 err = snd_card_register(card);
2613 snd_card_free(card);
2616 pci_set_drvdata(pci, card);
2621 static void snd_rme9652_remove(struct pci_dev *pci)
2623 snd_card_free(pci_get_drvdata(pci));
2626 static struct pci_driver rme9652_driver = {
2627 .name = KBUILD_MODNAME,
2628 .id_table = snd_rme9652_ids,
2629 .probe = snd_rme9652_probe,
2630 .remove = snd_rme9652_remove,
2633 module_pci_driver(rme9652_driver);