2 * skl_topology.h - Intel HDA Platform topology header file
4 * Copyright (C) 2014-15 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
21 #ifndef __SKL_TOPOLOGY_H__
22 #define __SKL_TOPOLOGY_H__
24 #include <linux/types.h>
26 #include <sound/hdaudio_ext.h>
27 #include <sound/soc.h>
29 #include "skl-tplg-interface.h"
31 #define BITS_PER_BYTE 8
32 #define MAX_TS_GROUPS 8
33 #define MAX_DMIC_TS_GROUPS 4
34 #define MAX_FIXED_DMIC_PARAMS_SIZE 727
36 /* Maximum number of coefficients up down mixer module */
37 #define UP_DOWN_MIXER_MAX_COEFF 6
39 #define MODULE_MAX_IN_PINS 8
40 #define MODULE_MAX_OUT_PINS 8
42 enum skl_channel_index {
44 SKL_CHANNEL_RIGHT = 1,
45 SKL_CHANNEL_CENTER = 2,
46 SKL_CHANNEL_LEFT_SURROUND = 3,
47 SKL_CHANNEL_CENTER_SURROUND = 3,
48 SKL_CHANNEL_RIGHT_SURROUND = 4,
50 SKL_CHANNEL_INVALID = 0xF,
75 SKL_FS_128000 = 128000,
76 SKL_FS_176400 = 176400,
77 SKL_FS_192000 = 192000,
81 enum skl_widget_type {
82 SKL_WIDGET_VMIXER = 1,
88 struct skl_audio_data_format {
89 enum skl_s_freq s_freq;
90 enum skl_bitdepth bit_depth;
92 enum skl_ch_cfg ch_cfg;
93 enum skl_interleaving interleaving;
94 u8 number_of_channels;
100 struct skl_base_cfg {
105 struct skl_audio_data_format audio_fmt;
108 struct skl_cpr_gtw_cfg {
112 /* not mandatory; required only for DMIC/I2S */
116 struct skl_i2s_config_blob {
133 struct skl_dma_control {
140 struct skl_base_cfg base_cfg;
141 struct skl_audio_data_format out_fmt;
142 u32 cpr_feature_mask;
143 struct skl_cpr_gtw_cfg gtw_cfg;
147 struct skl_src_module_cfg {
148 struct skl_base_cfg base_cfg;
149 enum skl_s_freq src_cfg;
152 struct notification_mask {
157 struct skl_up_down_mixer_cfg {
158 struct skl_base_cfg base_cfg;
159 enum skl_ch_cfg out_ch_cfg;
160 /* This should be set to 1 if user coefficients are required */
162 /* Pass the user coeff in this array */
163 s32 coeff[UP_DOWN_MIXER_MAX_COEFF];
166 struct skl_algo_cfg {
167 struct skl_base_cfg base_cfg;
171 struct skl_base_outfmt_cfg {
172 struct skl_base_cfg base_cfg;
173 struct skl_audio_data_format out_fmt;
177 SKL_DMA_HDA_HOST_OUTPUT_CLASS = 0,
178 SKL_DMA_HDA_HOST_INPUT_CLASS = 1,
179 SKL_DMA_HDA_HOST_INOUT_CLASS = 2,
180 SKL_DMA_HDA_LINK_OUTPUT_CLASS = 8,
181 SKL_DMA_HDA_LINK_INPUT_CLASS = 9,
182 SKL_DMA_HDA_LINK_INOUT_CLASS = 0xA,
183 SKL_DMA_DMIC_LINK_INPUT_CLASS = 0xB,
184 SKL_DMA_I2S_LINK_OUTPUT_CLASS = 0xC,
185 SKL_DMA_I2S_LINK_INPUT_CLASS = 0xD,
188 union skl_ssp_dma_node {
191 u8 time_slot_index:4;
196 union skl_connector_node_id {
205 struct skl_module_fmt {
211 u32 interleaving_style;
216 struct skl_module_cfg;
218 struct skl_module_inst_id {
223 enum skl_module_pin_state {
225 SKL_PIN_BIND_DONE = 1,
228 struct skl_module_pin {
229 struct skl_module_inst_id id;
232 enum skl_module_pin_state pin_state;
233 struct skl_module_cfg *tgt_mcfg;
236 struct skl_specific_cfg {
243 enum skl_pipe_state {
244 SKL_PIPE_INVALID = 0,
245 SKL_PIPE_CREATED = 1,
247 SKL_PIPE_STARTED = 3,
251 struct skl_pipe_module {
252 struct snd_soc_dapm_widget *w;
253 struct list_head node;
256 struct skl_pipe_params {
271 struct skl_pipe_params *p_params;
272 enum skl_pipe_state state;
273 struct list_head w_list;
277 enum skl_module_state {
278 SKL_MODULE_UNINIT = 0,
279 SKL_MODULE_LOADED = 1,
280 SKL_MODULE_INIT_DONE = 2,
281 SKL_MODULE_BIND_DONE = 3,
282 SKL_MODULE_UNLOADED = 4,
285 struct skl_module_cfg {
287 struct skl_module_inst_id id;
289 bool homogenous_inputs;
290 bool homogenous_outputs;
291 struct skl_module_fmt in_fmt[MODULE_MAX_IN_PINS];
292 struct skl_module_fmt out_fmt[MODULE_MAX_OUT_PINS];
311 struct skl_module_pin *m_in_pin;
312 struct skl_module_pin *m_out_pin;
313 enum skl_module_type m_type;
314 enum skl_hw_conn_type hw_conn_type;
315 enum skl_module_state m_state;
316 struct skl_pipe *pipe;
317 struct skl_specific_cfg formats_config;
320 struct skl_algo_data {
328 struct skl_pipeline {
329 struct skl_pipe *pipe;
330 struct list_head node;
333 static inline struct skl *get_skl_ctx(struct device *dev)
335 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
337 return ebus_to_skl(ebus);
340 int skl_tplg_be_update_params(struct snd_soc_dai *dai,
341 struct skl_pipe_params *params);
342 int skl_dsp_set_dma_control(struct skl_sst *ctx,
343 struct skl_module_cfg *mconfig);
344 void skl_tplg_set_be_dmic_config(struct snd_soc_dai *dai,
345 struct skl_pipe_params *params, int stream);
346 int skl_tplg_init(struct snd_soc_platform *platform,
347 struct hdac_ext_bus *ebus);
348 struct skl_module_cfg *skl_tplg_fe_get_cpr_module(
349 struct snd_soc_dai *dai, int stream);
350 int skl_tplg_update_pipe_params(struct device *dev,
351 struct skl_module_cfg *mconfig, struct skl_pipe_params *params);
353 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe);
355 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
357 int skl_pause_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
359 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
361 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
363 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
365 int skl_init_module(struct skl_sst *ctx, struct skl_module_cfg *module_config);
367 int skl_bind_modules(struct skl_sst *ctx, struct skl_module_cfg
368 *src_module, struct skl_module_cfg *dst_module);
370 int skl_unbind_modules(struct skl_sst *ctx, struct skl_module_cfg
371 *src_module, struct skl_module_cfg *dst_module);
373 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size,
374 u32 param_id, struct skl_module_cfg *mcfg);
375 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size,
376 u32 param_id, struct skl_module_cfg *mcfg);
378 struct skl_module_cfg *skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai,
380 enum skl_bitdepth skl_get_bit_depth(int params);