sound/soc/stm/stm32_sai.c

   1 /*
   2  * STM32 ALSA SoC Digital Audio Interface (SAI) driver.
   3  *
   4  * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
   5  * Author(s): Olivier Moysan <olivier.moysan@st.com> for STMicroelectronics.
   6  *
   7  * License terms: GPL V2.0.
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License version 2 as published by
  11  * the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more
  16  * details.
  17  */
  18
  19 #include <linux/bitfield.h>
  20 #include <linux/clk.h>
  21 #include <linux/delay.h>
  22 #include <linux/module.h>
  23 #include <linux/of_platform.h>
  24 #include <linux/reset.h>
  25
  26 #include <sound/dmaengine_pcm.h>
  27 #include <sound/core.h>
  28
  29 #include "stm32_sai.h"
  30
  31 static const struct stm32_sai_conf stm32_sai_conf_f4 = {
  32         .version = SAI_STM32F4,
  33         .has_spdif = false,
  34 };
  35
  36 static const struct stm32_sai_conf stm32_sai_conf_h7 = {
  37         .version = SAI_STM32H7,
  38         .has_spdif = true,
  39 };
  40
  41 static const struct of_device_id stm32_sai_ids[] = {
  42         { .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 },
  43         { .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 },
  44         {}
  45 };
  46
  47 static int stm32_sai_sync_conf_client(struct stm32_sai_data *sai, int synci)
  48 {
  49         int ret;
  50
  51         /* Enable peripheral clock to allow GCR register access */
  52         ret = clk_prepare_enable(sai->pclk);
  53         if (ret) {
  54                 dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);
  55                 return ret;
  56         }
  57
  58         writel_relaxed(FIELD_PREP(SAI_GCR_SYNCIN_MASK, (synci - 1)), sai->base);
  59
  60         clk_disable_unprepare(sai->pclk);
  61
  62         return 0;
  63 }
  64
  65 static int stm32_sai_sync_conf_provider(struct stm32_sai_data *sai, int synco)
  66 {
  67         u32 prev_synco;
  68         int ret;
  69
  70         /* Enable peripheral clock to allow GCR register access */
  71         ret = clk_prepare_enable(sai->pclk);
  72         if (ret) {
  73                 dev_err(&sai->pdev->dev, "failed to enable clock: %d\n", ret);
  74                 return ret;
  75         }
  76
  77         dev_dbg(&sai->pdev->dev, "Set %pOFn%s as synchro provider\n",
  78                 sai->pdev->dev.of_node,
  79                 synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
  80
  81         prev_synco = FIELD_GET(SAI_GCR_SYNCOUT_MASK, readl_relaxed(sai->base));
  82         if (prev_synco != STM_SAI_SYNC_OUT_NONE && synco != prev_synco) {
  83                 dev_err(&sai->pdev->dev, "%pOFn%s already set as sync provider\n",
  84                         sai->pdev->dev.of_node,
  85                         prev_synco == STM_SAI_SYNC_OUT_A ? "A" : "B");
  86                 clk_disable_unprepare(sai->pclk);
  87                 return -EINVAL;
  88         }
  89
  90         writel_relaxed(FIELD_PREP(SAI_GCR_SYNCOUT_MASK, synco), sai->base);
  91
  92         clk_disable_unprepare(sai->pclk);
  93
  94         return 0;
  95 }
  96
  97 static int stm32_sai_set_sync(struct stm32_sai_data *sai_client,
  98                               struct device_node *np_provider,
  99                               int synco, int synci)
 100 {
 101         struct platform_device *pdev = of_find_device_by_node(np_provider);
 102         struct stm32_sai_data *sai_provider;
 103         int ret;
 104
 105         if (!pdev) {
 106                 dev_err(&sai_client->pdev->dev,
 107                         "Device not found for node %pOFn\n", np_provider);
 108                 of_node_put(np_provider);
 109                 return -ENODEV;
 110         }
 111
 112         sai_provider = platform_get_drvdata(pdev);
 113         if (!sai_provider) {
 114                 dev_err(&sai_client->pdev->dev,
 115                         "SAI sync provider data not found\n");
 116                 ret = -EINVAL;
 117                 goto error;
 118         }
 119
 120         /* Configure sync client */
 121         ret = stm32_sai_sync_conf_client(sai_client, synci);
 122         if (ret < 0)
 123                 goto error;
 124
 125         /* Configure sync provider */
 126         ret = stm32_sai_sync_conf_provider(sai_provider, synco);
 127
 128 error:
 129         put_device(&pdev->dev);
 130         of_node_put(np_provider);
 131         return ret;
 132 }
 133
 134 static int stm32_sai_probe(struct platform_device *pdev)
 135 {
 136         struct stm32_sai_data *sai;
 137         struct reset_control *rst;
 138         struct resource *res;
 139         const struct of_device_id *of_id;
 140
 141         sai = devm_kzalloc(&pdev->dev, sizeof(*sai), GFP_KERNEL);
 142         if (!sai)
 143                 return -ENOMEM;
 144
 145         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 146         sai->base = devm_ioremap_resource(&pdev->dev, res);
 147         if (IS_ERR(sai->base))
 148                 return PTR_ERR(sai->base);
 149
 150         of_id = of_match_device(stm32_sai_ids, &pdev->dev);
 151         if (of_id)
 152                 sai->conf = (struct stm32_sai_conf *)of_id->data;
 153         else
 154                 return -EINVAL;
 155
 156         if (!STM_SAI_IS_F4(sai)) {
 157                 sai->pclk = devm_clk_get(&pdev->dev, "pclk");
 158                 if (IS_ERR(sai->pclk)) {
 159                         dev_err(&pdev->dev, "missing bus clock pclk\n");
 160                         return PTR_ERR(sai->pclk);
 161                 }
 162         }
 163
 164         sai->clk_x8k = devm_clk_get(&pdev->dev, "x8k");
 165         if (IS_ERR(sai->clk_x8k)) {
 166                 dev_err(&pdev->dev, "missing x8k parent clock\n");
 167                 return PTR_ERR(sai->clk_x8k);
 168         }
 169
 170         sai->clk_x11k = devm_clk_get(&pdev->dev, "x11k");
 171         if (IS_ERR(sai->clk_x11k)) {
 172                 dev_err(&pdev->dev, "missing x11k parent clock\n");
 173                 return PTR_ERR(sai->clk_x11k);
 174         }
 175
 176         /* init irqs */
 177         sai->irq = platform_get_irq(pdev, 0);
 178         if (sai->irq < 0) {
 179                 dev_err(&pdev->dev, "no irq for node %s\n", pdev->name);
 180                 return sai->irq;
 181         }
 182
 183         /* reset */
 184         rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
 185         if (!IS_ERR(rst)) {
 186                 reset_control_assert(rst);
 187                 udelay(2);
 188                 reset_control_deassert(rst);
 189         }
 190
 191         sai->pdev = pdev;
 192         sai->set_sync = &stm32_sai_set_sync;
 193         platform_set_drvdata(pdev, sai);
 194
 195         return devm_of_platform_populate(&pdev->dev);
 196 }
 197
 198 MODULE_DEVICE_TABLE(of, stm32_sai_ids);
 199
 200 static struct platform_driver stm32_sai_driver = {
 201         .driver = {
 202                 .name = "st,stm32-sai",
 203                 .of_match_table = stm32_sai_ids,
 204         },
 205         .probe = stm32_sai_probe,
 206 };
 207
 208 module_platform_driver(stm32_sai_driver);
 209
 210 MODULE_DESCRIPTION("STM32 Soc SAI Interface");
 211 MODULE_AUTHOR("Olivier Moysan <olivier.moysan@st.com>");
 212 MODULE_ALIAS("platform:st,stm32-sai");
 213 MODULE_LICENSE("GPL v2");