sound/soc/sunxi/sun4i-codec.c

   1 /*
   2  * Copyright 2014 Emilio López <emilio@elopez.com.ar>
   3  * Copyright 2014 Jon Smirl <jonsmirl@gmail.com>
   4  * Copyright 2015 Maxime Ripard <maxime.ripard@free-electrons.com>
   5  * Copyright 2015 Adam Sampson <ats@offog.org>
   6  * Copyright 2016 Chen-Yu Tsai <wens@csie.org>
   7  *
   8  * Based on the Allwinner SDK driver, released under the GPL.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or
  13  * (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  */
  20
  21 #include <linux/init.h>
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/platform_device.h>
  25 #include <linux/delay.h>
  26 #include <linux/slab.h>
  27 #include <linux/of.h>
  28 #include <linux/of_address.h>
  29 #include <linux/of_device.h>
  30 #include <linux/of_platform.h>
  31 #include <linux/clk.h>
  32 #include <linux/regmap.h>
  33 #include <linux/reset.h>
  34 #include <linux/gpio/consumer.h>
  35
  36 #include <sound/core.h>
  37 #include <sound/pcm.h>
  38 #include <sound/pcm_params.h>
  39 #include <sound/soc.h>
  40 #include <sound/tlv.h>
  41 #include <sound/initval.h>
  42 #include <sound/dmaengine_pcm.h>
  43
  44 /* Codec DAC digital controls and FIFO registers */
  45 #define SUN4I_CODEC_DAC_DPC                     (0x00)
  46 #define SUN4I_CODEC_DAC_DPC_EN_DA                       (31)
  47 #define SUN4I_CODEC_DAC_DPC_DVOL                        (12)
  48 #define SUN4I_CODEC_DAC_FIFOC                   (0x04)
  49 #define SUN4I_CODEC_DAC_FIFOC_DAC_FS                    (29)
  50 #define SUN4I_CODEC_DAC_FIFOC_FIR_VERSION               (28)
  51 #define SUN4I_CODEC_DAC_FIFOC_SEND_LASAT                (26)
  52 #define SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE              (24)
  53 #define SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT               (21)
  54 #define SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL             (8)
  55 #define SUN4I_CODEC_DAC_FIFOC_MONO_EN                   (6)
  56 #define SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS            (5)
  57 #define SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN                (4)
  58 #define SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH                (0)
  59 #define SUN4I_CODEC_DAC_FIFOS                   (0x08)
  60 #define SUN4I_CODEC_DAC_TXDATA                  (0x0c)
  61
  62 /* Codec DAC side analog signal controls */
  63 #define SUN4I_CODEC_DAC_ACTL                    (0x10)
  64 #define SUN4I_CODEC_DAC_ACTL_DACAENR                    (31)
  65 #define SUN4I_CODEC_DAC_ACTL_DACAENL                    (30)
  66 #define SUN4I_CODEC_DAC_ACTL_MIXEN                      (29)
  67 #define SUN4I_CODEC_DAC_ACTL_MICG                       (20)
  68 #define SUN4I_CODEC_DAC_ACTL_LDACLMIXS                  (15)
  69 #define SUN4I_CODEC_DAC_ACTL_RDACRMIXS                  (14)
  70 #define SUN4I_CODEC_DAC_ACTL_LDACRMIXS                  (13)
  71 #define SUN4I_CODEC_DAC_ACTL_DACPAS                     (8)
  72 #define SUN4I_CODEC_DAC_ACTL_MIXPAS                     (7)
  73 #define SUN4I_CODEC_DAC_ACTL_PA_MUTE                    (6)
  74 #define SUN4I_CODEC_DAC_ACTL_PA_VOL                     (0)
  75 #define SUN4I_CODEC_DAC_TUNE                    (0x14)
  76 #define SUN4I_CODEC_DAC_DEBUG                   (0x18)
  77
  78 /* Codec ADC digital controls and FIFO registers */
  79 #define SUN4I_CODEC_ADC_FIFOC                   (0x1c)
  80 #define SUN4I_CODEC_ADC_FIFOC_ADC_FS                    (29)
  81 #define SUN4I_CODEC_ADC_FIFOC_EN_AD                     (28)
  82 #define SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE              (24)
  83 #define SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL             (8)
  84 #define SUN4I_CODEC_ADC_FIFOC_MONO_EN                   (7)
  85 #define SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS            (6)
  86 #define SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN                (4)
  87 #define SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH                (0)
  88 #define SUN4I_CODEC_ADC_FIFOS                   (0x20)
  89 #define SUN4I_CODEC_ADC_RXDATA                  (0x24)
  90
  91 /* Codec ADC side analog signal controls */
  92 #define SUN4I_CODEC_ADC_ACTL                    (0x28)
  93 #define SUN4I_CODEC_ADC_ACTL_ADC_R_EN                   (31)
  94 #define SUN4I_CODEC_ADC_ACTL_ADC_L_EN                   (30)
  95 #define SUN4I_CODEC_ADC_ACTL_PREG1EN                    (29)
  96 #define SUN4I_CODEC_ADC_ACTL_PREG2EN                    (28)
  97 #define SUN4I_CODEC_ADC_ACTL_VMICEN                     (27)
  98 #define SUN4I_CODEC_ADC_ACTL_VADCG                      (20)
  99 #define SUN4I_CODEC_ADC_ACTL_ADCIS                      (17)
 100 #define SUN4I_CODEC_ADC_ACTL_PA_EN                      (4)
 101 #define SUN4I_CODEC_ADC_ACTL_DDE                        (3)
 102 #define SUN4I_CODEC_ADC_DEBUG                   (0x2c)
 103
 104 /* FIFO counters */
 105 #define SUN4I_CODEC_DAC_TXCNT                   (0x30)
 106 #define SUN4I_CODEC_ADC_RXCNT                   (0x34)
 107
 108 /* Calibration register (sun7i only) */
 109 #define SUN7I_CODEC_AC_DAC_CAL                  (0x38)
 110
 111 /* Microphone controls (sun7i only) */
 112 #define SUN7I_CODEC_AC_MIC_PHONE_CAL            (0x3c)
 113
 114 /*
 115  * sun6i specific registers
 116  *
 117  * sun6i shares the same digital control and FIFO registers as sun4i,
 118  * but only the DAC digital controls are at the same offset. The others
 119  * have been moved around to accommodate extra analog controls.
 120  */
 121
 122 /* Codec DAC digital controls and FIFO registers */
 123 #define SUN6I_CODEC_ADC_FIFOC                   (0x10)
 124 #define SUN6I_CODEC_ADC_FIFOC_EN_AD                     (28)
 125 #define SUN6I_CODEC_ADC_FIFOS                   (0x14)
 126 #define SUN6I_CODEC_ADC_RXDATA                  (0x18)
 127
 128 /* Output mixer and gain controls */
 129 #define SUN6I_CODEC_OM_DACA_CTRL                (0x20)
 130 #define SUN6I_CODEC_OM_DACA_CTRL_DACAREN                (31)
 131 #define SUN6I_CODEC_OM_DACA_CTRL_DACALEN                (30)
 132 #define SUN6I_CODEC_OM_DACA_CTRL_RMIXEN                 (29)
 133 #define SUN6I_CODEC_OM_DACA_CTRL_LMIXEN                 (28)
 134 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1              (23)
 135 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2              (22)
 136 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONE             (21)
 137 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_PHONEP            (20)
 138 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR           (19)
 139 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR              (18)
 140 #define SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL              (17)
 141 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1              (16)
 142 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2              (15)
 143 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONE             (14)
 144 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_PHONEN            (13)
 145 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL           (12)
 146 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL              (11)
 147 #define SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR              (10)
 148 #define SUN6I_CODEC_OM_DACA_CTRL_RHPIS                  (9)
 149 #define SUN6I_CODEC_OM_DACA_CTRL_LHPIS                  (8)
 150 #define SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE              (7)
 151 #define SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE              (6)
 152 #define SUN6I_CODEC_OM_DACA_CTRL_HPVOL                  (0)
 153 #define SUN6I_CODEC_OM_PA_CTRL                  (0x24)
 154 #define SUN6I_CODEC_OM_PA_CTRL_HPPAEN                   (31)
 155 #define SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL                (29)
 156 #define SUN6I_CODEC_OM_PA_CTRL_COMPTEN                  (28)
 157 #define SUN6I_CODEC_OM_PA_CTRL_MIC1G                    (15)
 158 #define SUN6I_CODEC_OM_PA_CTRL_MIC2G                    (12)
 159 #define SUN6I_CODEC_OM_PA_CTRL_LINEING                  (9)
 160 #define SUN6I_CODEC_OM_PA_CTRL_PHONEG                   (6)
 161 #define SUN6I_CODEC_OM_PA_CTRL_PHONEPG                  (3)
 162 #define SUN6I_CODEC_OM_PA_CTRL_PHONENG                  (0)
 163
 164 /* Microphone, line out and phone out controls */
 165 #define SUN6I_CODEC_MIC_CTRL                    (0x28)
 166 #define SUN6I_CODEC_MIC_CTRL_HBIASEN                    (31)
 167 #define SUN6I_CODEC_MIC_CTRL_MBIASEN                    (30)
 168 #define SUN6I_CODEC_MIC_CTRL_MIC1AMPEN                  (28)
 169 #define SUN6I_CODEC_MIC_CTRL_MIC1BOOST                  (25)
 170 #define SUN6I_CODEC_MIC_CTRL_MIC2AMPEN                  (24)
 171 #define SUN6I_CODEC_MIC_CTRL_MIC2BOOST                  (21)
 172 #define SUN6I_CODEC_MIC_CTRL_MIC2SLT                    (20)
 173 #define SUN6I_CODEC_MIC_CTRL_LINEOUTLEN                 (19)
 174 #define SUN6I_CODEC_MIC_CTRL_LINEOUTREN                 (18)
 175 #define SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC                (17)
 176 #define SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC                (16)
 177 #define SUN6I_CODEC_MIC_CTRL_LINEOUTVC                  (11)
 178 #define SUN6I_CODEC_MIC_CTRL_PHONEPREG                  (8)
 179
 180 /* ADC mixer controls */
 181 #define SUN6I_CODEC_ADC_ACTL                    (0x2c)
 182 #define SUN6I_CODEC_ADC_ACTL_ADCREN                     (31)
 183 #define SUN6I_CODEC_ADC_ACTL_ADCLEN                     (30)
 184 #define SUN6I_CODEC_ADC_ACTL_ADCRG                      (27)
 185 #define SUN6I_CODEC_ADC_ACTL_ADCLG                      (24)
 186 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1               (13)
 187 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2               (12)
 188 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONE              (11)
 189 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_PHONEP             (10)
 190 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR            (9)
 191 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR              (8)
 192 #define SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL              (7)
 193 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1               (6)
 194 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2               (5)
 195 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONE              (4)
 196 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_PHONEN             (3)
 197 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL            (2)
 198 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL              (1)
 199 #define SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR              (0)
 200
 201 /* Analog performance tuning controls */
 202 #define SUN6I_CODEC_ADDA_TUNE                   (0x30)
 203
 204 /* Calibration controls */
 205 #define SUN6I_CODEC_CALIBRATION                 (0x34)
 206
 207 /* FIFO counters */
 208 #define SUN6I_CODEC_DAC_TXCNT                   (0x40)
 209 #define SUN6I_CODEC_ADC_RXCNT                   (0x44)
 210
 211 /* headset jack detection and button support registers */
 212 #define SUN6I_CODEC_HMIC_CTL                    (0x50)
 213 #define SUN6I_CODEC_HMIC_DATA                   (0x54)
 214
 215 /* TODO sun6i DAP (Digital Audio Processing) bits */
 216
 217 /* FIFO counters moved on A23 */
 218 #define SUN8I_A23_CODEC_DAC_TXCNT               (0x1c)
 219 #define SUN8I_A23_CODEC_ADC_RXCNT               (0x20)
 220
 221 /* TX FIFO moved on H3 */
 222 #define SUN8I_H3_CODEC_DAC_TXDATA               (0x20)
 223 #define SUN8I_H3_CODEC_DAC_DBG                  (0x48)
 224 #define SUN8I_H3_CODEC_ADC_DBG                  (0x4c)
 225
 226 /* TODO H3 DAP (Digital Audio Processing) bits */
 227
 228 struct sun4i_codec {
 229         struct device   *dev;
 230         struct regmap   *regmap;
 231         struct clk      *clk_apb;
 232         struct clk      *clk_module;
 233         struct reset_control *rst;
 234         struct gpio_desc *gpio_pa;
 235
 236         /* ADC_FIFOC register is at different offset on different SoCs */
 237         struct regmap_field *reg_adc_fifoc;
 238
 239         struct snd_dmaengine_dai_dma_data       capture_dma_data;
 240         struct snd_dmaengine_dai_dma_data       playback_dma_data;
 241 };
 242
 243 static void sun4i_codec_start_playback(struct sun4i_codec *scodec)
 244 {
 245         /* Flush TX FIFO */
 246         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 247                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
 248                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
 249
 250         /* Enable DAC DRQ */
 251         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 252                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
 253                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN));
 254 }
 255
 256 static void sun4i_codec_stop_playback(struct sun4i_codec *scodec)
 257 {
 258         /* Disable DAC DRQ */
 259         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 260                            BIT(SUN4I_CODEC_DAC_FIFOC_DAC_DRQ_EN),
 261                            0);
 262 }
 263
 264 static void sun4i_codec_start_capture(struct sun4i_codec *scodec)
 265 {
 266         /* Enable ADC DRQ */
 267         regmap_field_update_bits(scodec->reg_adc_fifoc,
 268                                  BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN),
 269                                  BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN));
 270 }
 271
 272 static void sun4i_codec_stop_capture(struct sun4i_codec *scodec)
 273 {
 274         /* Disable ADC DRQ */
 275         regmap_field_update_bits(scodec->reg_adc_fifoc,
 276                                  BIT(SUN4I_CODEC_ADC_FIFOC_ADC_DRQ_EN), 0);
 277 }
 278
 279 static int sun4i_codec_trigger(struct snd_pcm_substream *substream, int cmd,
 280                                struct snd_soc_dai *dai)
 281 {
 282         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 283         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 284
 285         switch (cmd) {
 286         case SNDRV_PCM_TRIGGER_START:
 287         case SNDRV_PCM_TRIGGER_RESUME:
 288         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 289                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 290                         sun4i_codec_start_playback(scodec);
 291                 else
 292                         sun4i_codec_start_capture(scodec);
 293                 break;
 294
 295         case SNDRV_PCM_TRIGGER_STOP:
 296         case SNDRV_PCM_TRIGGER_SUSPEND:
 297         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 298                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 299                         sun4i_codec_stop_playback(scodec);
 300                 else
 301                         sun4i_codec_stop_capture(scodec);
 302                 break;
 303
 304         default:
 305                 return -EINVAL;
 306         }
 307
 308         return 0;
 309 }
 310
 311 static int sun4i_codec_prepare_capture(struct snd_pcm_substream *substream,
 312                                        struct snd_soc_dai *dai)
 313 {
 314         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 315         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 316
 317
 318         /* Flush RX FIFO */
 319         regmap_field_update_bits(scodec->reg_adc_fifoc,
 320                                  BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH),
 321                                  BIT(SUN4I_CODEC_ADC_FIFOC_FIFO_FLUSH));
 322
 323
 324         /* Set RX FIFO trigger level */
 325         regmap_field_update_bits(scodec->reg_adc_fifoc,
 326                                  0xf << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL,
 327                                  0x7 << SUN4I_CODEC_ADC_FIFOC_RX_TRIG_LEVEL);
 328
 329         /*
 330          * FIXME: Undocumented in the datasheet, but
 331          *        Allwinner's code mentions that it is related
 332          *        related to microphone gain
 333          */
 334         if (of_device_is_compatible(scodec->dev->of_node,
 335                                     "allwinner,sun4i-a10-codec") ||
 336             of_device_is_compatible(scodec->dev->of_node,
 337                                     "allwinner,sun7i-a20-codec")) {
 338                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_ADC_ACTL,
 339                                    0x3 << 25,
 340                                    0x1 << 25);
 341         }
 342
 343         if (of_device_is_compatible(scodec->dev->of_node,
 344                                     "allwinner,sun7i-a20-codec"))
 345                 /* FIXME: Undocumented bits */
 346                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_TUNE,
 347                                    0x3 << 8,
 348                                    0x1 << 8);
 349
 350         return 0;
 351 }
 352
 353 static int sun4i_codec_prepare_playback(struct snd_pcm_substream *substream,
 354                                         struct snd_soc_dai *dai)
 355 {
 356         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 357         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 358         u32 val;
 359
 360         /* Flush the TX FIFO */
 361         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 362                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH),
 363                            BIT(SUN4I_CODEC_DAC_FIFOC_FIFO_FLUSH));
 364
 365         /* Set TX FIFO Empty Trigger Level */
 366         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 367                            0x3f << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL,
 368                            0xf << SUN4I_CODEC_DAC_FIFOC_TX_TRIG_LEVEL);
 369
 370         if (substream->runtime->rate > 32000)
 371                 /* Use 64 bits FIR filter */
 372                 val = 0;
 373         else
 374                 /* Use 32 bits FIR filter */
 375                 val = BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION);
 376
 377         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 378                            BIT(SUN4I_CODEC_DAC_FIFOC_FIR_VERSION),
 379                            val);
 380
 381         /* Send zeros when we have an underrun */
 382         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 383                            BIT(SUN4I_CODEC_DAC_FIFOC_SEND_LASAT),
 384                            0);
 385
 386         return 0;
 387 };
 388
 389 static int sun4i_codec_prepare(struct snd_pcm_substream *substream,
 390                                struct snd_soc_dai *dai)
 391 {
 392         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 393                 return sun4i_codec_prepare_playback(substream, dai);
 394
 395         return sun4i_codec_prepare_capture(substream, dai);
 396 }
 397
 398 static unsigned long sun4i_codec_get_mod_freq(struct snd_pcm_hw_params *params)
 399 {
 400         unsigned int rate = params_rate(params);
 401
 402         switch (rate) {
 403         case 176400:
 404         case 88200:
 405         case 44100:
 406         case 33075:
 407         case 22050:
 408         case 14700:
 409         case 11025:
 410         case 7350:
 411                 return 22579200;
 412
 413         case 192000:
 414         case 96000:
 415         case 48000:
 416         case 32000:
 417         case 24000:
 418         case 16000:
 419         case 12000:
 420         case 8000:
 421                 return 24576000;
 422
 423         default:
 424                 return 0;
 425         }
 426 }
 427
 428 static int sun4i_codec_get_hw_rate(struct snd_pcm_hw_params *params)
 429 {
 430         unsigned int rate = params_rate(params);
 431
 432         switch (rate) {
 433         case 192000:
 434         case 176400:
 435                 return 6;
 436
 437         case 96000:
 438         case 88200:
 439                 return 7;
 440
 441         case 48000:
 442         case 44100:
 443                 return 0;
 444
 445         case 32000:
 446         case 33075:
 447                 return 1;
 448
 449         case 24000:
 450         case 22050:
 451                 return 2;
 452
 453         case 16000:
 454         case 14700:
 455                 return 3;
 456
 457         case 12000:
 458         case 11025:
 459                 return 4;
 460
 461         case 8000:
 462         case 7350:
 463                 return 5;
 464
 465         default:
 466                 return -EINVAL;
 467         }
 468 }
 469
 470 static int sun4i_codec_hw_params_capture(struct sun4i_codec *scodec,
 471                                          struct snd_pcm_hw_params *params,
 472                                          unsigned int hwrate)
 473 {
 474         /* Set ADC sample rate */
 475         regmap_field_update_bits(scodec->reg_adc_fifoc,
 476                                  7 << SUN4I_CODEC_ADC_FIFOC_ADC_FS,
 477                                  hwrate << SUN4I_CODEC_ADC_FIFOC_ADC_FS);
 478
 479         /* Set the number of channels we want to use */
 480         if (params_channels(params) == 1)
 481                 regmap_field_update_bits(scodec->reg_adc_fifoc,
 482                                          BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
 483                                          BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN));
 484         else
 485                 regmap_field_update_bits(scodec->reg_adc_fifoc,
 486                                          BIT(SUN4I_CODEC_ADC_FIFOC_MONO_EN),
 487                                          0);
 488
 489         /* Set the number of sample bits to either 16 or 24 bits */
 490         if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
 491                 regmap_field_update_bits(scodec->reg_adc_fifoc,
 492                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),
 493                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS));
 494
 495                 regmap_field_update_bits(scodec->reg_adc_fifoc,
 496                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),
 497                                    0);
 498
 499                 scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 500         } else {
 501                 regmap_field_update_bits(scodec->reg_adc_fifoc,
 502                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_SAMPLE_BITS),
 503                                    0);
 504
 505                 /* Fill most significant bits with valid data MSB */
 506                 regmap_field_update_bits(scodec->reg_adc_fifoc,
 507                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE),
 508                                    BIT(SUN4I_CODEC_ADC_FIFOC_RX_FIFO_MODE));
 509
 510                 scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 511         }
 512
 513         return 0;
 514 }
 515
 516 static int sun4i_codec_hw_params_playback(struct sun4i_codec *scodec,
 517                                           struct snd_pcm_hw_params *params,
 518                                           unsigned int hwrate)
 519 {
 520         u32 val;
 521
 522         /* Set DAC sample rate */
 523         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 524                            7 << SUN4I_CODEC_DAC_FIFOC_DAC_FS,
 525                            hwrate << SUN4I_CODEC_DAC_FIFOC_DAC_FS);
 526
 527         /* Set the number of channels we want to use */
 528         if (params_channels(params) == 1)
 529                 val = BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN);
 530         else
 531                 val = 0;
 532
 533         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 534                            BIT(SUN4I_CODEC_DAC_FIFOC_MONO_EN),
 535                            val);
 536
 537         /* Set the number of sample bits to either 16 or 24 bits */
 538         if (hw_param_interval(params, SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min == 32) {
 539                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 540                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
 541                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS));
 542
 543                 /* Set TX FIFO mode to padding the LSBs with 0 */
 544                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 545                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
 546                                    0);
 547
 548                 scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
 549         } else {
 550                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 551                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_SAMPLE_BITS),
 552                                    0);
 553
 554                 /* Set TX FIFO mode to repeat the MSB */
 555                 regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 556                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE),
 557                                    BIT(SUN4I_CODEC_DAC_FIFOC_TX_FIFO_MODE));
 558
 559                 scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
 560         }
 561
 562         return 0;
 563 }
 564
 565 static int sun4i_codec_hw_params(struct snd_pcm_substream *substream,
 566                                  struct snd_pcm_hw_params *params,
 567                                  struct snd_soc_dai *dai)
 568 {
 569         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 570         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 571         unsigned long clk_freq;
 572         int ret, hwrate;
 573
 574         clk_freq = sun4i_codec_get_mod_freq(params);
 575         if (!clk_freq)
 576                 return -EINVAL;
 577
 578         ret = clk_set_rate(scodec->clk_module, clk_freq);
 579         if (ret)
 580                 return ret;
 581
 582         hwrate = sun4i_codec_get_hw_rate(params);
 583         if (hwrate < 0)
 584                 return hwrate;
 585
 586         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 587                 return sun4i_codec_hw_params_playback(scodec, params,
 588                                                       hwrate);
 589
 590         return sun4i_codec_hw_params_capture(scodec, params,
 591                                              hwrate);
 592 }
 593
 594
 595 static unsigned int sun4i_codec_src_rates[] = {
 596         8000, 11025, 12000, 16000, 22050, 24000, 32000,
 597         44100, 48000, 96000, 192000
 598 };
 599
 600
 601 static struct snd_pcm_hw_constraint_list sun4i_codec_constraints = {
 602         .count  = ARRAY_SIZE(sun4i_codec_src_rates),
 603         .list   = sun4i_codec_src_rates,
 604 };
 605
 606
 607 static int sun4i_codec_startup(struct snd_pcm_substream *substream,
 608                                struct snd_soc_dai *dai)
 609 {
 610         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 611         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 612
 613         snd_pcm_hw_constraint_list(substream->runtime, 0,
 614                                 SNDRV_PCM_HW_PARAM_RATE, &sun4i_codec_constraints);
 615
 616         /*
 617          * Stop issuing DRQ when we have room for less than 16 samples
 618          * in our TX FIFO
 619          */
 620         regmap_update_bits(scodec->regmap, SUN4I_CODEC_DAC_FIFOC,
 621                            3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT,
 622                            3 << SUN4I_CODEC_DAC_FIFOC_DRQ_CLR_CNT);
 623
 624         return clk_prepare_enable(scodec->clk_module);
 625 }
 626
 627 static void sun4i_codec_shutdown(struct snd_pcm_substream *substream,
 628                                  struct snd_soc_dai *dai)
 629 {
 630         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 631         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(rtd->card);
 632
 633         clk_disable_unprepare(scodec->clk_module);
 634 }
 635
 636 static const struct snd_soc_dai_ops sun4i_codec_dai_ops = {
 637         .startup        = sun4i_codec_startup,
 638         .shutdown       = sun4i_codec_shutdown,
 639         .trigger        = sun4i_codec_trigger,
 640         .hw_params      = sun4i_codec_hw_params,
 641         .prepare        = sun4i_codec_prepare,
 642 };
 643
 644 static struct snd_soc_dai_driver sun4i_codec_dai = {
 645         .name   = "Codec",
 646         .ops    = &sun4i_codec_dai_ops,
 647         .playback = {
 648                 .stream_name    = "Codec Playback",
 649                 .channels_min   = 1,
 650                 .channels_max   = 2,
 651                 .rate_min       = 8000,
 652                 .rate_max       = 192000,
 653                 .rates          = SNDRV_PCM_RATE_CONTINUOUS,
 654                 .formats        = SNDRV_PCM_FMTBIT_S16_LE |
 655                                   SNDRV_PCM_FMTBIT_S32_LE,
 656                 .sig_bits       = 24,
 657         },
 658         .capture = {
 659                 .stream_name    = "Codec Capture",
 660                 .channels_min   = 1,
 661                 .channels_max   = 2,
 662                 .rate_min       = 8000,
 663                 .rate_max       = 48000,
 664                 .rates          = SNDRV_PCM_RATE_CONTINUOUS,
 665                 .formats        = SNDRV_PCM_FMTBIT_S16_LE |
 666                                   SNDRV_PCM_FMTBIT_S32_LE,
 667                 .sig_bits       = 24,
 668         },
 669 };
 670
 671 /*** sun4i Codec ***/
 672 static const struct snd_kcontrol_new sun4i_codec_pa_mute =
 673         SOC_DAPM_SINGLE("Switch", SUN4I_CODEC_DAC_ACTL,
 674                         SUN4I_CODEC_DAC_ACTL_PA_MUTE, 1, 0);
 675
 676 static DECLARE_TLV_DB_SCALE(sun4i_codec_pa_volume_scale, -6300, 100, 1);
 677 static DECLARE_TLV_DB_SCALE(sun4i_codec_micin_loopback_gain_scale, -450, 150,
 678                             0);
 679
 680 static const struct snd_kcontrol_new sun4i_codec_controls[] = {
 681         SOC_SINGLE_TLV("Power Amplifier Volume", SUN4I_CODEC_DAC_ACTL,
 682                        SUN4I_CODEC_DAC_ACTL_PA_VOL, 0x3F, 0,
 683                        sun4i_codec_pa_volume_scale),
 684 };
 685
 686 static const struct snd_kcontrol_new sun4i_codec_left_mixer_controls[] = {
 687         SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
 688                         SUN4I_CODEC_DAC_ACTL_LDACLMIXS, 1, 0),
 689 };
 690
 691 static const struct snd_kcontrol_new sun4i_codec_right_mixer_controls[] = {
 692         SOC_DAPM_SINGLE("Right DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
 693                         SUN4I_CODEC_DAC_ACTL_RDACRMIXS, 1, 0),
 694         SOC_DAPM_SINGLE("Left DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
 695                         SUN4I_CODEC_DAC_ACTL_LDACRMIXS, 1, 0),
 696 };
 697
 698 static const struct snd_kcontrol_new sun4i_codec_pa_mixer_controls[] = {
 699         SOC_DAPM_SINGLE("DAC Playback Switch", SUN4I_CODEC_DAC_ACTL,
 700                         SUN4I_CODEC_DAC_ACTL_DACPAS, 1, 0),
 701         SOC_DAPM_SINGLE("Mixer Playback Switch", SUN4I_CODEC_DAC_ACTL,
 702                         SUN4I_CODEC_DAC_ACTL_MIXPAS, 1, 0),
 703 };
 704
 705 static const struct snd_soc_dapm_widget sun4i_codec_codec_dapm_widgets[] = {
 706         /* Digital parts of the ADCs */
 707         SND_SOC_DAPM_SUPPLY("ADC", SUN4I_CODEC_ADC_FIFOC,
 708                             SUN4I_CODEC_ADC_FIFOC_EN_AD, 0,
 709                             NULL, 0),
 710
 711         /* Digital parts of the DACs */
 712         SND_SOC_DAPM_SUPPLY("DAC", SUN4I_CODEC_DAC_DPC,
 713                             SUN4I_CODEC_DAC_DPC_EN_DA, 0,
 714                             NULL, 0),
 715
 716         /* Analog parts of the ADCs */
 717         SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
 718                          SUN4I_CODEC_ADC_ACTL_ADC_L_EN, 0),
 719         SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN4I_CODEC_ADC_ACTL,
 720                          SUN4I_CODEC_ADC_ACTL_ADC_R_EN, 0),
 721
 722         /* Analog parts of the DACs */
 723         SND_SOC_DAPM_DAC("Left DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
 724                          SUN4I_CODEC_DAC_ACTL_DACAENL, 0),
 725         SND_SOC_DAPM_DAC("Right DAC", "Codec Playback", SUN4I_CODEC_DAC_ACTL,
 726                          SUN4I_CODEC_DAC_ACTL_DACAENR, 0),
 727
 728         /* Mixers */
 729         SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
 730                            sun4i_codec_left_mixer_controls,
 731                            ARRAY_SIZE(sun4i_codec_left_mixer_controls)),
 732         SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
 733                            sun4i_codec_right_mixer_controls,
 734                            ARRAY_SIZE(sun4i_codec_right_mixer_controls)),
 735
 736         /* Global Mixer Enable */
 737         SND_SOC_DAPM_SUPPLY("Mixer Enable", SUN4I_CODEC_DAC_ACTL,
 738                             SUN4I_CODEC_DAC_ACTL_MIXEN, 0, NULL, 0),
 739
 740         /* VMIC */
 741         SND_SOC_DAPM_SUPPLY("VMIC", SUN4I_CODEC_ADC_ACTL,
 742                             SUN4I_CODEC_ADC_ACTL_VMICEN, 0, NULL, 0),
 743
 744         /* Mic Pre-Amplifiers */
 745         SND_SOC_DAPM_PGA("MIC1 Pre-Amplifier", SUN4I_CODEC_ADC_ACTL,
 746                          SUN4I_CODEC_ADC_ACTL_PREG1EN, 0, NULL, 0),
 747         SND_SOC_DAPM_PGA("MIC2 Pre-Amplifier", SUN4I_CODEC_ADC_ACTL,
 748                          SUN4I_CODEC_ADC_ACTL_PREG2EN, 0, NULL, 0),
 749
 750         /* Power Amplifier */
 751         SND_SOC_DAPM_MIXER("Power Amplifier", SUN4I_CODEC_ADC_ACTL,
 752                            SUN4I_CODEC_ADC_ACTL_PA_EN, 0,
 753                            sun4i_codec_pa_mixer_controls,
 754                            ARRAY_SIZE(sun4i_codec_pa_mixer_controls)),
 755         SND_SOC_DAPM_SWITCH("Power Amplifier Mute", SND_SOC_NOPM, 0, 0,
 756                             &sun4i_codec_pa_mute),
 757
 758         SND_SOC_DAPM_INPUT("Mic1"),
 759         SND_SOC_DAPM_INPUT("Mic2"),
 760
 761         SND_SOC_DAPM_OUTPUT("HP Right"),
 762         SND_SOC_DAPM_OUTPUT("HP Left"),
 763 };
 764
 765 static const struct snd_soc_dapm_route sun4i_codec_codec_dapm_routes[] = {
 766         /* Left ADC / DAC Routes */
 767         { "Left ADC", NULL, "ADC" },
 768         { "Left DAC", NULL, "DAC" },
 769
 770         /* Right ADC / DAC Routes */
 771         { "Right ADC", NULL, "ADC" },
 772         { "Right DAC", NULL, "DAC" },
 773
 774         /* Right Mixer Routes */
 775         { "Right Mixer", NULL, "Mixer Enable" },
 776         { "Right Mixer", "Left DAC Playback Switch", "Left DAC" },
 777         { "Right Mixer", "Right DAC Playback Switch", "Right DAC" },
 778
 779         /* Left Mixer Routes */
 780         { "Left Mixer", NULL, "Mixer Enable" },
 781         { "Left Mixer", "Left DAC Playback Switch", "Left DAC" },
 782
 783         /* Power Amplifier Routes */
 784         { "Power Amplifier", "Mixer Playback Switch", "Left Mixer" },
 785         { "Power Amplifier", "Mixer Playback Switch", "Right Mixer" },
 786         { "Power Amplifier", "DAC Playback Switch", "Left DAC" },
 787         { "Power Amplifier", "DAC Playback Switch", "Right DAC" },
 788
 789         /* Headphone Output Routes */
 790         { "Power Amplifier Mute", "Switch", "Power Amplifier" },
 791         { "HP Right", NULL, "Power Amplifier Mute" },
 792         { "HP Left", NULL, "Power Amplifier Mute" },
 793
 794         /* Mic1 Routes */
 795         { "Left ADC", NULL, "MIC1 Pre-Amplifier" },
 796         { "Right ADC", NULL, "MIC1 Pre-Amplifier" },
 797         { "MIC1 Pre-Amplifier", NULL, "Mic1"},
 798         { "Mic1", NULL, "VMIC" },
 799
 800         /* Mic2 Routes */
 801         { "Left ADC", NULL, "MIC2 Pre-Amplifier" },
 802         { "Right ADC", NULL, "MIC2 Pre-Amplifier" },
 803         { "MIC2 Pre-Amplifier", NULL, "Mic2"},
 804         { "Mic2", NULL, "VMIC" },
 805 };
 806
 807 static const struct snd_soc_component_driver sun4i_codec_codec = {
 808         .controls               = sun4i_codec_controls,
 809         .num_controls           = ARRAY_SIZE(sun4i_codec_controls),
 810         .dapm_widgets           = sun4i_codec_codec_dapm_widgets,
 811         .num_dapm_widgets       = ARRAY_SIZE(sun4i_codec_codec_dapm_widgets),
 812         .dapm_routes            = sun4i_codec_codec_dapm_routes,
 813         .num_dapm_routes        = ARRAY_SIZE(sun4i_codec_codec_dapm_routes),
 814         .idle_bias_on           = 1,
 815         .use_pmdown_time        = 1,
 816         .endianness             = 1,
 817         .non_legacy_dai_naming  = 1,
 818 };
 819
 820 /*** sun6i Codec ***/
 821
 822 /* mixer controls */
 823 static const struct snd_kcontrol_new sun6i_codec_mixer_controls[] = {
 824         SOC_DAPM_DOUBLE("DAC Playback Switch",
 825                         SUN6I_CODEC_OM_DACA_CTRL,
 826                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACL,
 827                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACR, 1, 0),
 828         SOC_DAPM_DOUBLE("DAC Reversed Playback Switch",
 829                         SUN6I_CODEC_OM_DACA_CTRL,
 830                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_DACR,
 831                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_DACL, 1, 0),
 832         SOC_DAPM_DOUBLE("Line In Playback Switch",
 833                         SUN6I_CODEC_OM_DACA_CTRL,
 834                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_LINEINL,
 835                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_LINEINR, 1, 0),
 836         SOC_DAPM_DOUBLE("Mic1 Playback Switch",
 837                         SUN6I_CODEC_OM_DACA_CTRL,
 838                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC1,
 839                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC1, 1, 0),
 840         SOC_DAPM_DOUBLE("Mic2 Playback Switch",
 841                         SUN6I_CODEC_OM_DACA_CTRL,
 842                         SUN6I_CODEC_OM_DACA_CTRL_LMIX_MIC2,
 843                         SUN6I_CODEC_OM_DACA_CTRL_RMIX_MIC2, 1, 0),
 844 };
 845
 846 /* ADC mixer controls */
 847 static const struct snd_kcontrol_new sun6i_codec_adc_mixer_controls[] = {
 848         SOC_DAPM_DOUBLE("Mixer Capture Switch",
 849                         SUN6I_CODEC_ADC_ACTL,
 850                         SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXL,
 851                         SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXR, 1, 0),
 852         SOC_DAPM_DOUBLE("Mixer Reversed Capture Switch",
 853                         SUN6I_CODEC_ADC_ACTL,
 854                         SUN6I_CODEC_ADC_ACTL_LADCMIX_OMIXR,
 855                         SUN6I_CODEC_ADC_ACTL_RADCMIX_OMIXL, 1, 0),
 856         SOC_DAPM_DOUBLE("Line In Capture Switch",
 857                         SUN6I_CODEC_ADC_ACTL,
 858                         SUN6I_CODEC_ADC_ACTL_LADCMIX_LINEINL,
 859                         SUN6I_CODEC_ADC_ACTL_RADCMIX_LINEINR, 1, 0),
 860         SOC_DAPM_DOUBLE("Mic1 Capture Switch",
 861                         SUN6I_CODEC_ADC_ACTL,
 862                         SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC1,
 863                         SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC1, 1, 0),
 864         SOC_DAPM_DOUBLE("Mic2 Capture Switch",
 865                         SUN6I_CODEC_ADC_ACTL,
 866                         SUN6I_CODEC_ADC_ACTL_LADCMIX_MIC2,
 867                         SUN6I_CODEC_ADC_ACTL_RADCMIX_MIC2, 1, 0),
 868 };
 869
 870 /* headphone controls */
 871 static const char * const sun6i_codec_hp_src_enum_text[] = {
 872         "DAC", "Mixer",
 873 };
 874
 875 static SOC_ENUM_DOUBLE_DECL(sun6i_codec_hp_src_enum,
 876                             SUN6I_CODEC_OM_DACA_CTRL,
 877                             SUN6I_CODEC_OM_DACA_CTRL_LHPIS,
 878                             SUN6I_CODEC_OM_DACA_CTRL_RHPIS,
 879                             sun6i_codec_hp_src_enum_text);
 880
 881 static const struct snd_kcontrol_new sun6i_codec_hp_src[] = {
 882         SOC_DAPM_ENUM("Headphone Source Playback Route",
 883                       sun6i_codec_hp_src_enum),
 884 };
 885
 886 /* microphone controls */
 887 static const char * const sun6i_codec_mic2_src_enum_text[] = {
 888         "Mic2", "Mic3",
 889 };
 890
 891 static SOC_ENUM_SINGLE_DECL(sun6i_codec_mic2_src_enum,
 892                             SUN6I_CODEC_MIC_CTRL,
 893                             SUN6I_CODEC_MIC_CTRL_MIC2SLT,
 894                             sun6i_codec_mic2_src_enum_text);
 895
 896 static const struct snd_kcontrol_new sun6i_codec_mic2_src[] = {
 897         SOC_DAPM_ENUM("Mic2 Amplifier Source Route",
 898                       sun6i_codec_mic2_src_enum),
 899 };
 900
 901 /* line out controls */
 902 static const char * const sun6i_codec_lineout_src_enum_text[] = {
 903         "Stereo", "Mono Differential",
 904 };
 905
 906 static SOC_ENUM_DOUBLE_DECL(sun6i_codec_lineout_src_enum,
 907                             SUN6I_CODEC_MIC_CTRL,
 908                             SUN6I_CODEC_MIC_CTRL_LINEOUTLSRC,
 909                             SUN6I_CODEC_MIC_CTRL_LINEOUTRSRC,
 910                             sun6i_codec_lineout_src_enum_text);
 911
 912 static const struct snd_kcontrol_new sun6i_codec_lineout_src[] = {
 913         SOC_DAPM_ENUM("Line Out Source Playback Route",
 914                       sun6i_codec_lineout_src_enum),
 915 };
 916
 917 /* volume / mute controls */
 918 static const DECLARE_TLV_DB_SCALE(sun6i_codec_dvol_scale, -7308, 116, 0);
 919 static const DECLARE_TLV_DB_SCALE(sun6i_codec_hp_vol_scale, -6300, 100, 1);
 920 static const DECLARE_TLV_DB_SCALE(sun6i_codec_out_mixer_pregain_scale,
 921                                   -450, 150, 0);
 922 static const DECLARE_TLV_DB_RANGE(sun6i_codec_lineout_vol_scale,
 923         0, 1, TLV_DB_SCALE_ITEM(TLV_DB_GAIN_MUTE, 0, 1),
 924         2, 31, TLV_DB_SCALE_ITEM(-4350, 150, 0),
 925 );
 926 static const DECLARE_TLV_DB_RANGE(sun6i_codec_mic_gain_scale,
 927         0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
 928         1, 7, TLV_DB_SCALE_ITEM(2400, 300, 0),
 929 );
 930
 931 static const struct snd_kcontrol_new sun6i_codec_codec_widgets[] = {
 932         SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
 933                        SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
 934                        sun6i_codec_dvol_scale),
 935         SOC_SINGLE_TLV("Headphone Playback Volume",
 936                        SUN6I_CODEC_OM_DACA_CTRL,
 937                        SUN6I_CODEC_OM_DACA_CTRL_HPVOL, 0x3f, 0,
 938                        sun6i_codec_hp_vol_scale),
 939         SOC_SINGLE_TLV("Line Out Playback Volume",
 940                        SUN6I_CODEC_MIC_CTRL,
 941                        SUN6I_CODEC_MIC_CTRL_LINEOUTVC, 0x1f, 0,
 942                        sun6i_codec_lineout_vol_scale),
 943         SOC_DOUBLE("Headphone Playback Switch",
 944                    SUN6I_CODEC_OM_DACA_CTRL,
 945                    SUN6I_CODEC_OM_DACA_CTRL_LHPPAMUTE,
 946                    SUN6I_CODEC_OM_DACA_CTRL_RHPPAMUTE, 1, 0),
 947         SOC_DOUBLE("Line Out Playback Switch",
 948                    SUN6I_CODEC_MIC_CTRL,
 949                    SUN6I_CODEC_MIC_CTRL_LINEOUTLEN,
 950                    SUN6I_CODEC_MIC_CTRL_LINEOUTREN, 1, 0),
 951         /* Mixer pre-gains */
 952         SOC_SINGLE_TLV("Line In Playback Volume",
 953                        SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_LINEING,
 954                        0x7, 0, sun6i_codec_out_mixer_pregain_scale),
 955         SOC_SINGLE_TLV("Mic1 Playback Volume",
 956                        SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC1G,
 957                        0x7, 0, sun6i_codec_out_mixer_pregain_scale),
 958         SOC_SINGLE_TLV("Mic2 Playback Volume",
 959                        SUN6I_CODEC_OM_PA_CTRL, SUN6I_CODEC_OM_PA_CTRL_MIC2G,
 960                        0x7, 0, sun6i_codec_out_mixer_pregain_scale),
 961
 962         /* Microphone Amp boost gains */
 963         SOC_SINGLE_TLV("Mic1 Boost Volume", SUN6I_CODEC_MIC_CTRL,
 964                        SUN6I_CODEC_MIC_CTRL_MIC1BOOST, 0x7, 0,
 965                        sun6i_codec_mic_gain_scale),
 966         SOC_SINGLE_TLV("Mic2 Boost Volume", SUN6I_CODEC_MIC_CTRL,
 967                        SUN6I_CODEC_MIC_CTRL_MIC2BOOST, 0x7, 0,
 968                        sun6i_codec_mic_gain_scale),
 969         SOC_DOUBLE_TLV("ADC Capture Volume",
 970                        SUN6I_CODEC_ADC_ACTL, SUN6I_CODEC_ADC_ACTL_ADCLG,
 971                        SUN6I_CODEC_ADC_ACTL_ADCRG, 0x7, 0,
 972                        sun6i_codec_out_mixer_pregain_scale),
 973 };
 974
 975 static const struct snd_soc_dapm_widget sun6i_codec_codec_dapm_widgets[] = {
 976         /* Microphone inputs */
 977         SND_SOC_DAPM_INPUT("MIC1"),
 978         SND_SOC_DAPM_INPUT("MIC2"),
 979         SND_SOC_DAPM_INPUT("MIC3"),
 980
 981         /* Microphone Bias */
 982         SND_SOC_DAPM_SUPPLY("HBIAS", SUN6I_CODEC_MIC_CTRL,
 983                             SUN6I_CODEC_MIC_CTRL_HBIASEN, 0, NULL, 0),
 984         SND_SOC_DAPM_SUPPLY("MBIAS", SUN6I_CODEC_MIC_CTRL,
 985                             SUN6I_CODEC_MIC_CTRL_MBIASEN, 0, NULL, 0),
 986
 987         /* Mic input path */
 988         SND_SOC_DAPM_MUX("Mic2 Amplifier Source Route",
 989                          SND_SOC_NOPM, 0, 0, sun6i_codec_mic2_src),
 990         SND_SOC_DAPM_PGA("Mic1 Amplifier", SUN6I_CODEC_MIC_CTRL,
 991                          SUN6I_CODEC_MIC_CTRL_MIC1AMPEN, 0, NULL, 0),
 992         SND_SOC_DAPM_PGA("Mic2 Amplifier", SUN6I_CODEC_MIC_CTRL,
 993                          SUN6I_CODEC_MIC_CTRL_MIC2AMPEN, 0, NULL, 0),
 994
 995         /* Line In */
 996         SND_SOC_DAPM_INPUT("LINEIN"),
 997
 998         /* Digital parts of the ADCs */
 999         SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
1000                             SUN6I_CODEC_ADC_FIFOC_EN_AD, 0,
1001                             NULL, 0),
1002
1003         /* Analog parts of the ADCs */
1004         SND_SOC_DAPM_ADC("Left ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
1005                          SUN6I_CODEC_ADC_ACTL_ADCLEN, 0),
1006         SND_SOC_DAPM_ADC("Right ADC", "Codec Capture", SUN6I_CODEC_ADC_ACTL,
1007                          SUN6I_CODEC_ADC_ACTL_ADCREN, 0),
1008
1009         /* ADC Mixers */
1010         SOC_MIXER_ARRAY("Left ADC Mixer", SND_SOC_NOPM, 0, 0,
1011                         sun6i_codec_adc_mixer_controls),
1012         SOC_MIXER_ARRAY("Right ADC Mixer", SND_SOC_NOPM, 0, 0,
1013                         sun6i_codec_adc_mixer_controls),
1014
1015         /* Digital parts of the DACs */
1016         SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
1017                             SUN4I_CODEC_DAC_DPC_EN_DA, 0,
1018                             NULL, 0),
1019
1020         /* Analog parts of the DACs */
1021         SND_SOC_DAPM_DAC("Left DAC", "Codec Playback",
1022                          SUN6I_CODEC_OM_DACA_CTRL,
1023                          SUN6I_CODEC_OM_DACA_CTRL_DACALEN, 0),
1024         SND_SOC_DAPM_DAC("Right DAC", "Codec Playback",
1025                          SUN6I_CODEC_OM_DACA_CTRL,
1026                          SUN6I_CODEC_OM_DACA_CTRL_DACAREN, 0),
1027
1028         /* Mixers */
1029         SOC_MIXER_ARRAY("Left Mixer", SUN6I_CODEC_OM_DACA_CTRL,
1030                         SUN6I_CODEC_OM_DACA_CTRL_LMIXEN, 0,
1031                         sun6i_codec_mixer_controls),
1032         SOC_MIXER_ARRAY("Right Mixer", SUN6I_CODEC_OM_DACA_CTRL,
1033                         SUN6I_CODEC_OM_DACA_CTRL_RMIXEN, 0,
1034                         sun6i_codec_mixer_controls),
1035
1036         /* Headphone output path */
1037         SND_SOC_DAPM_MUX("Headphone Source Playback Route",
1038                          SND_SOC_NOPM, 0, 0, sun6i_codec_hp_src),
1039         SND_SOC_DAPM_OUT_DRV("Headphone Amp", SUN6I_CODEC_OM_PA_CTRL,
1040                              SUN6I_CODEC_OM_PA_CTRL_HPPAEN, 0, NULL, 0),
1041         SND_SOC_DAPM_SUPPLY("HPCOM Protection", SUN6I_CODEC_OM_PA_CTRL,
1042                             SUN6I_CODEC_OM_PA_CTRL_COMPTEN, 0, NULL, 0),
1043         SND_SOC_DAPM_REG(snd_soc_dapm_supply, "HPCOM", SUN6I_CODEC_OM_PA_CTRL,
1044                          SUN6I_CODEC_OM_PA_CTRL_HPCOM_CTL, 0x3, 0x3, 0),
1045         SND_SOC_DAPM_OUTPUT("HP"),
1046
1047         /* Line Out path */
1048         SND_SOC_DAPM_MUX("Line Out Source Playback Route",
1049                          SND_SOC_NOPM, 0, 0, sun6i_codec_lineout_src),
1050         SND_SOC_DAPM_OUTPUT("LINEOUT"),
1051 };
1052
1053 static const struct snd_soc_dapm_route sun6i_codec_codec_dapm_routes[] = {
1054         /* DAC Routes */
1055         { "Left DAC", NULL, "DAC Enable" },
1056         { "Right DAC", NULL, "DAC Enable" },
1057
1058         /* Microphone Routes */
1059         { "Mic1 Amplifier", NULL, "MIC1"},
1060         { "Mic2 Amplifier Source Route", "Mic2", "MIC2" },
1061         { "Mic2 Amplifier Source Route", "Mic3", "MIC3" },
1062         { "Mic2 Amplifier", NULL, "Mic2 Amplifier Source Route"},
1063
1064         /* Left Mixer Routes */
1065         { "Left Mixer", "DAC Playback Switch", "Left DAC" },
1066         { "Left Mixer", "DAC Reversed Playback Switch", "Right DAC" },
1067         { "Left Mixer", "Line In Playback Switch", "LINEIN" },
1068         { "Left Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
1069         { "Left Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
1070
1071         /* Right Mixer Routes */
1072         { "Right Mixer", "DAC Playback Switch", "Right DAC" },
1073         { "Right Mixer", "DAC Reversed Playback Switch", "Left DAC" },
1074         { "Right Mixer", "Line In Playback Switch", "LINEIN" },
1075         { "Right Mixer", "Mic1 Playback Switch", "Mic1 Amplifier" },
1076         { "Right Mixer", "Mic2 Playback Switch", "Mic2 Amplifier" },
1077
1078         /* Left ADC Mixer Routes */
1079         { "Left ADC Mixer", "Mixer Capture Switch", "Left Mixer" },
1080         { "Left ADC Mixer", "Mixer Reversed Capture Switch", "Right Mixer" },
1081         { "Left ADC Mixer", "Line In Capture Switch", "LINEIN" },
1082         { "Left ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
1083         { "Left ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
1084
1085         /* Right ADC Mixer Routes */
1086         { "Right ADC Mixer", "Mixer Capture Switch", "Right Mixer" },
1087         { "Right ADC Mixer", "Mixer Reversed Capture Switch", "Left Mixer" },
1088         { "Right ADC Mixer", "Line In Capture Switch", "LINEIN" },
1089         { "Right ADC Mixer", "Mic1 Capture Switch", "Mic1 Amplifier" },
1090         { "Right ADC Mixer", "Mic2 Capture Switch", "Mic2 Amplifier" },
1091
1092         /* Headphone Routes */
1093         { "Headphone Source Playback Route", "DAC", "Left DAC" },
1094         { "Headphone Source Playback Route", "DAC", "Right DAC" },
1095         { "Headphone Source Playback Route", "Mixer", "Left Mixer" },
1096         { "Headphone Source Playback Route", "Mixer", "Right Mixer" },
1097         { "Headphone Amp", NULL, "Headphone Source Playback Route" },
1098         { "HP", NULL, "Headphone Amp" },
1099         { "HPCOM", NULL, "HPCOM Protection" },
1100
1101         /* Line Out Routes */
1102         { "Line Out Source Playback Route", "Stereo", "Left Mixer" },
1103         { "Line Out Source Playback Route", "Stereo", "Right Mixer" },
1104         { "Line Out Source Playback Route", "Mono Differential", "Left Mixer" },
1105         { "Line Out Source Playback Route", "Mono Differential", "Right Mixer" },
1106         { "LINEOUT", NULL, "Line Out Source Playback Route" },
1107
1108         /* ADC Routes */
1109         { "Left ADC", NULL, "ADC Enable" },
1110         { "Right ADC", NULL, "ADC Enable" },
1111         { "Left ADC", NULL, "Left ADC Mixer" },
1112         { "Right ADC", NULL, "Right ADC Mixer" },
1113 };
1114
1115 static const struct snd_soc_component_driver sun6i_codec_codec = {
1116         .controls               = sun6i_codec_codec_widgets,
1117         .num_controls           = ARRAY_SIZE(sun6i_codec_codec_widgets),
1118         .dapm_widgets           = sun6i_codec_codec_dapm_widgets,
1119         .num_dapm_widgets       = ARRAY_SIZE(sun6i_codec_codec_dapm_widgets),
1120         .dapm_routes            = sun6i_codec_codec_dapm_routes,
1121         .num_dapm_routes        = ARRAY_SIZE(sun6i_codec_codec_dapm_routes),
1122         .idle_bias_on           = 1,
1123         .use_pmdown_time        = 1,
1124         .endianness             = 1,
1125         .non_legacy_dai_naming  = 1,
1126 };
1127
1128 /* sun8i A23 codec */
1129 static const struct snd_kcontrol_new sun8i_a23_codec_codec_controls[] = {
1130         SOC_SINGLE_TLV("DAC Playback Volume", SUN4I_CODEC_DAC_DPC,
1131                        SUN4I_CODEC_DAC_DPC_DVOL, 0x3f, 1,
1132                        sun6i_codec_dvol_scale),
1133 };
1134
1135 static const struct snd_soc_dapm_widget sun8i_a23_codec_codec_widgets[] = {
1136         /* Digital parts of the ADCs */
1137         SND_SOC_DAPM_SUPPLY("ADC Enable", SUN6I_CODEC_ADC_FIFOC,
1138                             SUN6I_CODEC_ADC_FIFOC_EN_AD, 0, NULL, 0),
1139         /* Digital parts of the DACs */
1140         SND_SOC_DAPM_SUPPLY("DAC Enable", SUN4I_CODEC_DAC_DPC,
1141                             SUN4I_CODEC_DAC_DPC_EN_DA, 0, NULL, 0),
1142
1143 };
1144
1145 static const struct snd_soc_component_driver sun8i_a23_codec_codec = {
1146         .controls               = sun8i_a23_codec_codec_controls,
1147         .num_controls           = ARRAY_SIZE(sun8i_a23_codec_codec_controls),
1148         .dapm_widgets           = sun8i_a23_codec_codec_widgets,
1149         .num_dapm_widgets       = ARRAY_SIZE(sun8i_a23_codec_codec_widgets),
1150         .idle_bias_on           = 1,
1151         .use_pmdown_time        = 1,
1152         .endianness             = 1,
1153         .non_legacy_dai_naming  = 1,
1154 };
1155
1156 static const struct snd_soc_component_driver sun4i_codec_component = {
1157         .name = "sun4i-codec",
1158 };
1159
1160 #define SUN4I_CODEC_RATES       SNDRV_PCM_RATE_CONTINUOUS
1161 #define SUN4I_CODEC_FORMATS     (SNDRV_PCM_FMTBIT_S16_LE | \
1162                                  SNDRV_PCM_FMTBIT_S32_LE)
1163
1164 static int sun4i_codec_dai_probe(struct snd_soc_dai *dai)
1165 {
1166         struct snd_soc_card *card = snd_soc_dai_get_drvdata(dai);
1167         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
1168
1169         snd_soc_dai_init_dma_data(dai, &scodec->playback_dma_data,
1170                                   &scodec->capture_dma_data);
1171
1172         return 0;
1173 }
1174
1175 static struct snd_soc_dai_driver dummy_cpu_dai = {
1176         .name   = "sun4i-codec-cpu-dai",
1177         .probe  = sun4i_codec_dai_probe,
1178         .playback = {
1179                 .stream_name    = "Playback",
1180                 .channels_min   = 1,
1181                 .channels_max   = 2,
1182                 .rates          = SUN4I_CODEC_RATES,
1183                 .formats        = SUN4I_CODEC_FORMATS,
1184                 .sig_bits       = 24,
1185         },
1186         .capture = {
1187                 .stream_name    = "Capture",
1188                 .channels_min   = 1,
1189                 .channels_max   = 2,
1190                 .rates          = SUN4I_CODEC_RATES,
1191                 .formats        = SUN4I_CODEC_FORMATS,
1192                 .sig_bits       = 24,
1193          },
1194 };
1195
1196 static struct snd_soc_dai_link *sun4i_codec_create_link(struct device *dev,
1197                                                         int *num_links)
1198 {
1199         struct snd_soc_dai_link *link = devm_kzalloc(dev, sizeof(*link),
1200                                                      GFP_KERNEL);
1201         if (!link)
1202                 return NULL;
1203
1204         link->name              = "cdc";
1205         link->stream_name       = "CDC PCM";
1206         link->codec_dai_name    = "Codec";
1207         link->cpu_dai_name      = dev_name(dev);
1208         link->codec_name        = dev_name(dev);
1209         link->platform_name     = dev_name(dev);
1210         link->dai_fmt           = SND_SOC_DAIFMT_I2S;
1211
1212         *num_links = 1;
1213
1214         return link;
1215 };
1216
1217 static int sun4i_codec_spk_event(struct snd_soc_dapm_widget *w,
1218                                  struct snd_kcontrol *k, int event)
1219 {
1220         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(w->dapm->card);
1221
1222         gpiod_set_value_cansleep(scodec->gpio_pa,
1223                                  !!SND_SOC_DAPM_EVENT_ON(event));
1224
1225         return 0;
1226 }
1227
1228 static const struct snd_soc_dapm_widget sun4i_codec_card_dapm_widgets[] = {
1229         SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
1230 };
1231
1232 static const struct snd_soc_dapm_route sun4i_codec_card_dapm_routes[] = {
1233         { "Speaker", NULL, "HP Right" },
1234         { "Speaker", NULL, "HP Left" },
1235 };
1236
1237 static struct snd_soc_card *sun4i_codec_create_card(struct device *dev)
1238 {
1239         struct snd_soc_card *card;
1240
1241         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1242         if (!card)
1243                 return ERR_PTR(-ENOMEM);
1244
1245         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1246         if (!card->dai_link)
1247                 return ERR_PTR(-ENOMEM);
1248
1249         card->dev               = dev;
1250         card->name              = "sun4i-codec";
1251         card->dapm_widgets      = sun4i_codec_card_dapm_widgets;
1252         card->num_dapm_widgets  = ARRAY_SIZE(sun4i_codec_card_dapm_widgets);
1253         card->dapm_routes       = sun4i_codec_card_dapm_routes;
1254         card->num_dapm_routes   = ARRAY_SIZE(sun4i_codec_card_dapm_routes);
1255
1256         return card;
1257 };
1258
1259 static const struct snd_soc_dapm_widget sun6i_codec_card_dapm_widgets[] = {
1260         SND_SOC_DAPM_HP("Headphone", NULL),
1261         SND_SOC_DAPM_LINE("Line In", NULL),
1262         SND_SOC_DAPM_LINE("Line Out", NULL),
1263         SND_SOC_DAPM_MIC("Headset Mic", NULL),
1264         SND_SOC_DAPM_MIC("Mic", NULL),
1265         SND_SOC_DAPM_SPK("Speaker", sun4i_codec_spk_event),
1266 };
1267
1268 static struct snd_soc_card *sun6i_codec_create_card(struct device *dev)
1269 {
1270         struct snd_soc_card *card;
1271         int ret;
1272
1273         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1274         if (!card)
1275                 return ERR_PTR(-ENOMEM);
1276
1277         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1278         if (!card->dai_link)
1279                 return ERR_PTR(-ENOMEM);
1280
1281         card->dev               = dev;
1282         card->name              = "A31 Audio Codec";
1283         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1284         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1285         card->fully_routed      = true;
1286
1287         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1288         if (ret)
1289                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1290
1291         return card;
1292 };
1293
1294 /* Connect digital side enables to analog side widgets */
1295 static const struct snd_soc_dapm_route sun8i_codec_card_routes[] = {
1296         /* ADC Routes */
1297         { "Left ADC", NULL, "ADC Enable" },
1298         { "Right ADC", NULL, "ADC Enable" },
1299         { "Codec Capture", NULL, "Left ADC" },
1300         { "Codec Capture", NULL, "Right ADC" },
1301
1302         /* DAC Routes */
1303         { "Left DAC", NULL, "DAC Enable" },
1304         { "Right DAC", NULL, "DAC Enable" },
1305         { "Left DAC", NULL, "Codec Playback" },
1306         { "Right DAC", NULL, "Codec Playback" },
1307 };
1308
1309 static struct snd_soc_aux_dev aux_dev = {
1310         .name = "Codec Analog Controls",
1311 };
1312
1313 static struct snd_soc_card *sun8i_a23_codec_create_card(struct device *dev)
1314 {
1315         struct snd_soc_card *card;
1316         int ret;
1317
1318         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1319         if (!card)
1320                 return ERR_PTR(-ENOMEM);
1321
1322         aux_dev.codec_of_node = of_parse_phandle(dev->of_node,
1323                                                  "allwinner,codec-analog-controls",
1324                                                  0);
1325         if (!aux_dev.codec_of_node) {
1326                 dev_err(dev, "Can't find analog controls for codec.\n");
1327                 return ERR_PTR(-EINVAL);
1328         };
1329
1330         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1331         if (!card->dai_link)
1332                 return ERR_PTR(-ENOMEM);
1333
1334         card->dev               = dev;
1335         card->name              = "A23 Audio Codec";
1336         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1337         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1338         card->dapm_routes       = sun8i_codec_card_routes;
1339         card->num_dapm_routes   = ARRAY_SIZE(sun8i_codec_card_routes);
1340         card->aux_dev           = &aux_dev;
1341         card->num_aux_devs      = 1;
1342         card->fully_routed      = true;
1343
1344         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1345         if (ret)
1346                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1347
1348         return card;
1349 };
1350
1351 static struct snd_soc_card *sun8i_h3_codec_create_card(struct device *dev)
1352 {
1353         struct snd_soc_card *card;
1354         int ret;
1355
1356         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1357         if (!card)
1358                 return ERR_PTR(-ENOMEM);
1359
1360         aux_dev.codec_of_node = of_parse_phandle(dev->of_node,
1361                                                  "allwinner,codec-analog-controls",
1362                                                  0);
1363         if (!aux_dev.codec_of_node) {
1364                 dev_err(dev, "Can't find analog controls for codec.\n");
1365                 return ERR_PTR(-EINVAL);
1366         };
1367
1368         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1369         if (!card->dai_link)
1370                 return ERR_PTR(-ENOMEM);
1371
1372         card->dev               = dev;
1373         card->name              = "H3 Audio Codec";
1374         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1375         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1376         card->dapm_routes       = sun8i_codec_card_routes;
1377         card->num_dapm_routes   = ARRAY_SIZE(sun8i_codec_card_routes);
1378         card->aux_dev           = &aux_dev;
1379         card->num_aux_devs      = 1;
1380         card->fully_routed      = true;
1381
1382         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1383         if (ret)
1384                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1385
1386         return card;
1387 };
1388
1389 static struct snd_soc_card *sun8i_v3s_codec_create_card(struct device *dev)
1390 {
1391         struct snd_soc_card *card;
1392         int ret;
1393
1394         card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
1395         if (!card)
1396                 return ERR_PTR(-ENOMEM);
1397
1398         aux_dev.codec_of_node = of_parse_phandle(dev->of_node,
1399                                                  "allwinner,codec-analog-controls",
1400                                                  0);
1401         if (!aux_dev.codec_of_node) {
1402                 dev_err(dev, "Can't find analog controls for codec.\n");
1403                 return ERR_PTR(-EINVAL);
1404         };
1405
1406         card->dai_link = sun4i_codec_create_link(dev, &card->num_links);
1407         if (!card->dai_link)
1408                 return ERR_PTR(-ENOMEM);
1409
1410         card->dev               = dev;
1411         card->name              = "V3s Audio Codec";
1412         card->dapm_widgets      = sun6i_codec_card_dapm_widgets;
1413         card->num_dapm_widgets  = ARRAY_SIZE(sun6i_codec_card_dapm_widgets);
1414         card->dapm_routes       = sun8i_codec_card_routes;
1415         card->num_dapm_routes   = ARRAY_SIZE(sun8i_codec_card_routes);
1416         card->aux_dev           = &aux_dev;
1417         card->num_aux_devs      = 1;
1418         card->fully_routed      = true;
1419
1420         ret = snd_soc_of_parse_audio_routing(card, "allwinner,audio-routing");
1421         if (ret)
1422                 dev_warn(dev, "failed to parse audio-routing: %d\n", ret);
1423
1424         return card;
1425 };
1426
1427 static const struct regmap_config sun4i_codec_regmap_config = {
1428         .reg_bits       = 32,
1429         .reg_stride     = 4,
1430         .val_bits       = 32,
1431         .max_register   = SUN4I_CODEC_ADC_RXCNT,
1432 };
1433
1434 static const struct regmap_config sun6i_codec_regmap_config = {
1435         .reg_bits       = 32,
1436         .reg_stride     = 4,
1437         .val_bits       = 32,
1438         .max_register   = SUN6I_CODEC_HMIC_DATA,
1439 };
1440
1441 static const struct regmap_config sun7i_codec_regmap_config = {
1442         .reg_bits       = 32,
1443         .reg_stride     = 4,
1444         .val_bits       = 32,
1445         .max_register   = SUN7I_CODEC_AC_MIC_PHONE_CAL,
1446 };
1447
1448 static const struct regmap_config sun8i_a23_codec_regmap_config = {
1449         .reg_bits       = 32,
1450         .reg_stride     = 4,
1451         .val_bits       = 32,
1452         .max_register   = SUN8I_A23_CODEC_ADC_RXCNT,
1453 };
1454
1455 static const struct regmap_config sun8i_h3_codec_regmap_config = {
1456         .reg_bits       = 32,
1457         .reg_stride     = 4,
1458         .val_bits       = 32,
1459         .max_register   = SUN8I_H3_CODEC_ADC_DBG,
1460 };
1461
1462 static const struct regmap_config sun8i_v3s_codec_regmap_config = {
1463         .reg_bits       = 32,
1464         .reg_stride     = 4,
1465         .val_bits       = 32,
1466         .max_register   = SUN8I_H3_CODEC_ADC_DBG,
1467 };
1468
1469 struct sun4i_codec_quirks {
1470         const struct regmap_config *regmap_config;
1471         const struct snd_soc_component_driver *codec;
1472         struct snd_soc_card * (*create_card)(struct device *dev);
1473         struct reg_field reg_adc_fifoc; /* used for regmap_field */
1474         unsigned int reg_dac_txdata;    /* TX FIFO offset for DMA config */
1475         unsigned int reg_adc_rxdata;    /* RX FIFO offset for DMA config */
1476         bool has_reset;
1477 };
1478
1479 static const struct sun4i_codec_quirks sun4i_codec_quirks = {
1480         .regmap_config  = &sun4i_codec_regmap_config,
1481         .codec          = &sun4i_codec_codec,
1482         .create_card    = sun4i_codec_create_card,
1483         .reg_adc_fifoc  = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
1484         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1485         .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
1486 };
1487
1488 static const struct sun4i_codec_quirks sun6i_a31_codec_quirks = {
1489         .regmap_config  = &sun6i_codec_regmap_config,
1490         .codec          = &sun6i_codec_codec,
1491         .create_card    = sun6i_codec_create_card,
1492         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1493         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1494         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1495         .has_reset      = true,
1496 };
1497
1498 static const struct sun4i_codec_quirks sun7i_codec_quirks = {
1499         .regmap_config  = &sun7i_codec_regmap_config,
1500         .codec          = &sun4i_codec_codec,
1501         .create_card    = sun4i_codec_create_card,
1502         .reg_adc_fifoc  = REG_FIELD(SUN4I_CODEC_ADC_FIFOC, 0, 31),
1503         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1504         .reg_adc_rxdata = SUN4I_CODEC_ADC_RXDATA,
1505 };
1506
1507 static const struct sun4i_codec_quirks sun8i_a23_codec_quirks = {
1508         .regmap_config  = &sun8i_a23_codec_regmap_config,
1509         .codec          = &sun8i_a23_codec_codec,
1510         .create_card    = sun8i_a23_codec_create_card,
1511         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1512         .reg_dac_txdata = SUN4I_CODEC_DAC_TXDATA,
1513         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1514         .has_reset      = true,
1515 };
1516
1517 static const struct sun4i_codec_quirks sun8i_h3_codec_quirks = {
1518         .regmap_config  = &sun8i_h3_codec_regmap_config,
1519         /*
1520          * TODO Share the codec structure with A23 for now.
1521          * This should be split out when adding digital audio
1522          * processing support for the H3.
1523          */
1524         .codec          = &sun8i_a23_codec_codec,
1525         .create_card    = sun8i_h3_codec_create_card,
1526         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1527         .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
1528         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1529         .has_reset      = true,
1530 };
1531
1532 static const struct sun4i_codec_quirks sun8i_v3s_codec_quirks = {
1533         .regmap_config  = &sun8i_v3s_codec_regmap_config,
1534         /*
1535          * TODO The codec structure should be split out, like
1536          * H3, when adding digital audio processing support.
1537          */
1538         .codec          = &sun8i_a23_codec_codec,
1539         .create_card    = sun8i_v3s_codec_create_card,
1540         .reg_adc_fifoc  = REG_FIELD(SUN6I_CODEC_ADC_FIFOC, 0, 31),
1541         .reg_dac_txdata = SUN8I_H3_CODEC_DAC_TXDATA,
1542         .reg_adc_rxdata = SUN6I_CODEC_ADC_RXDATA,
1543         .has_reset      = true,
1544 };
1545
1546 static const struct of_device_id sun4i_codec_of_match[] = {
1547         {
1548                 .compatible = "allwinner,sun4i-a10-codec",
1549                 .data = &sun4i_codec_quirks,
1550         },
1551         {
1552                 .compatible = "allwinner,sun6i-a31-codec",
1553                 .data = &sun6i_a31_codec_quirks,
1554         },
1555         {
1556                 .compatible = "allwinner,sun7i-a20-codec",
1557                 .data = &sun7i_codec_quirks,
1558         },
1559         {
1560                 .compatible = "allwinner,sun8i-a23-codec",
1561                 .data = &sun8i_a23_codec_quirks,
1562         },
1563         {
1564                 .compatible = "allwinner,sun8i-h3-codec",
1565                 .data = &sun8i_h3_codec_quirks,
1566         },
1567         {
1568                 .compatible = "allwinner,sun8i-v3s-codec",
1569                 .data = &sun8i_v3s_codec_quirks,
1570         },
1571         {}
1572 };
1573 MODULE_DEVICE_TABLE(of, sun4i_codec_of_match);
1574
1575 static int sun4i_codec_probe(struct platform_device *pdev)
1576 {
1577         struct snd_soc_card *card;
1578         struct sun4i_codec *scodec;
1579         const struct sun4i_codec_quirks *quirks;
1580         struct resource *res;
1581         void __iomem *base;
1582         int ret;
1583
1584         scodec = devm_kzalloc(&pdev->dev, sizeof(*scodec), GFP_KERNEL);
1585         if (!scodec)
1586                 return -ENOMEM;
1587
1588         scodec->dev = &pdev->dev;
1589
1590         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1591         base = devm_ioremap_resource(&pdev->dev, res);
1592         if (IS_ERR(base)) {
1593                 dev_err(&pdev->dev, "Failed to map the registers\n");
1594                 return PTR_ERR(base);
1595         }
1596
1597         quirks = of_device_get_match_data(&pdev->dev);
1598         if (quirks == NULL) {
1599                 dev_err(&pdev->dev, "Failed to determine the quirks to use\n");
1600                 return -ENODEV;
1601         }
1602
1603         scodec->regmap = devm_regmap_init_mmio(&pdev->dev, base,
1604                                                quirks->regmap_config);
1605         if (IS_ERR(scodec->regmap)) {
1606                 dev_err(&pdev->dev, "Failed to create our regmap\n");
1607                 return PTR_ERR(scodec->regmap);
1608         }
1609
1610         /* Get the clocks from the DT */
1611         scodec->clk_apb = devm_clk_get(&pdev->dev, "apb");
1612         if (IS_ERR(scodec->clk_apb)) {
1613                 dev_err(&pdev->dev, "Failed to get the APB clock\n");
1614                 return PTR_ERR(scodec->clk_apb);
1615         }
1616
1617         scodec->clk_module = devm_clk_get(&pdev->dev, "codec");
1618         if (IS_ERR(scodec->clk_module)) {
1619                 dev_err(&pdev->dev, "Failed to get the module clock\n");
1620                 return PTR_ERR(scodec->clk_module);
1621         }
1622
1623         if (quirks->has_reset) {
1624                 scodec->rst = devm_reset_control_get_exclusive(&pdev->dev,
1625                                                                NULL);
1626                 if (IS_ERR(scodec->rst)) {
1627                         dev_err(&pdev->dev, "Failed to get reset control\n");
1628                         return PTR_ERR(scodec->rst);
1629                 }
1630         }
1631
1632         scodec->gpio_pa = devm_gpiod_get_optional(&pdev->dev, "allwinner,pa",
1633                                                   GPIOD_OUT_LOW);
1634         if (IS_ERR(scodec->gpio_pa)) {
1635                 ret = PTR_ERR(scodec->gpio_pa);
1636                 if (ret != -EPROBE_DEFER)
1637                         dev_err(&pdev->dev, "Failed to get pa gpio: %d\n", ret);
1638                 return ret;
1639         }
1640
1641         /* reg_field setup */
1642         scodec->reg_adc_fifoc = devm_regmap_field_alloc(&pdev->dev,
1643                                                         scodec->regmap,
1644                                                         quirks->reg_adc_fifoc);
1645         if (IS_ERR(scodec->reg_adc_fifoc)) {
1646                 ret = PTR_ERR(scodec->reg_adc_fifoc);
1647                 dev_err(&pdev->dev, "Failed to create regmap fields: %d\n",
1648                         ret);
1649                 return ret;
1650         }
1651
1652         /* Enable the bus clock */
1653         if (clk_prepare_enable(scodec->clk_apb)) {
1654                 dev_err(&pdev->dev, "Failed to enable the APB clock\n");
1655                 return -EINVAL;
1656         }
1657
1658         /* Deassert the reset control */
1659         if (scodec->rst) {
1660                 ret = reset_control_deassert(scodec->rst);
1661                 if (ret) {
1662                         dev_err(&pdev->dev,
1663                                 "Failed to deassert the reset control\n");
1664                         goto err_clk_disable;
1665                 }
1666         }
1667
1668         /* DMA configuration for TX FIFO */
1669         scodec->playback_dma_data.addr = res->start + quirks->reg_dac_txdata;
1670         scodec->playback_dma_data.maxburst = 8;
1671         scodec->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
1672
1673         /* DMA configuration for RX FIFO */
1674         scodec->capture_dma_data.addr = res->start + quirks->reg_adc_rxdata;
1675         scodec->capture_dma_data.maxburst = 8;
1676         scodec->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
1677
1678         ret = devm_snd_soc_register_component(&pdev->dev, quirks->codec,
1679                                      &sun4i_codec_dai, 1);
1680         if (ret) {
1681                 dev_err(&pdev->dev, "Failed to register our codec\n");
1682                 goto err_assert_reset;
1683         }
1684
1685         ret = devm_snd_soc_register_component(&pdev->dev,
1686                                               &sun4i_codec_component,
1687                                               &dummy_cpu_dai, 1);
1688         if (ret) {
1689                 dev_err(&pdev->dev, "Failed to register our DAI\n");
1690                 goto err_assert_reset;
1691         }
1692
1693         ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
1694         if (ret) {
1695                 dev_err(&pdev->dev, "Failed to register against DMAEngine\n");
1696                 goto err_assert_reset;
1697         }
1698
1699         card = quirks->create_card(&pdev->dev);
1700         if (IS_ERR(card)) {
1701                 ret = PTR_ERR(card);
1702                 dev_err(&pdev->dev, "Failed to create our card\n");
1703                 goto err_assert_reset;
1704         }
1705
1706         snd_soc_card_set_drvdata(card, scodec);
1707
1708         ret = snd_soc_register_card(card);
1709         if (ret) {
1710                 dev_err(&pdev->dev, "Failed to register our card\n");
1711                 goto err_assert_reset;
1712         }
1713
1714         return 0;
1715
1716 err_assert_reset:
1717         if (scodec->rst)
1718                 reset_control_assert(scodec->rst);
1719 err_clk_disable:
1720         clk_disable_unprepare(scodec->clk_apb);
1721         return ret;
1722 }
1723
1724 static int sun4i_codec_remove(struct platform_device *pdev)
1725 {
1726         struct snd_soc_card *card = platform_get_drvdata(pdev);
1727         struct sun4i_codec *scodec = snd_soc_card_get_drvdata(card);
1728
1729         snd_soc_unregister_card(card);
1730         if (scodec->rst)
1731                 reset_control_assert(scodec->rst);
1732         clk_disable_unprepare(scodec->clk_apb);
1733
1734         return 0;
1735 }
1736
1737 static struct platform_driver sun4i_codec_driver = {
1738         .driver = {
1739                 .name = "sun4i-codec",
1740                 .of_match_table = sun4i_codec_of_match,
1741         },
1742         .probe = sun4i_codec_probe,
1743         .remove = sun4i_codec_remove,
1744 };
1745 module_platform_driver(sun4i_codec_driver);
1746
1747 MODULE_DESCRIPTION("Allwinner A10 codec driver");
1748 MODULE_AUTHOR("Emilio López <emilio@elopez.com.ar>");
1749 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
1750 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
1751 MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
1752 MODULE_LICENSE("GPL");