]> asedeno.scripts.mit.edu Git - linux.git/blob - tools/perf/pmu-events/arch/x86/ivytown/uncore-memory.json
Merge branches 'pm-core', 'pm-qos', 'pm-domains' and 'pm-opp'
[linux.git] / tools / perf / pmu-events / arch / x86 / ivytown / uncore-memory.json
1 [
2     {
3         "BriefDescription": "Memory page activates for reads and writes. Derived from unc_m_act_count.rd",
4         "Counter": "0,1,2,3",
5         "EventCode": "0x1",
6         "EventName": "UNC_M_ACT_COUNT.RD",
7         "PerPkg": "1",
8         "UMask": "0x1",
9         "Umask": "0x3",
10         "Unit": "iMC"
11     },
12     {
13         "BriefDescription": "Read requests to memory controller. Derived from unc_m_cas_count.rd",
14         "Counter": "0,1,2,3",
15         "EventCode": "0x4",
16         "EventName": "UNC_M_CAS_COUNT.RD",
17         "PerPkg": "1",
18         "ScaleUnit": "64Bytes",
19         "UMask": "0x3",
20         "Unit": "iMC"
21     },
22     {
23         "BriefDescription": "Write requests to memory controller. Derived from unc_m_cas_count.wr",
24         "Counter": "0,1,2,3",
25         "EventCode": "0x4",
26         "EventName": "UNC_M_CAS_COUNT.WR",
27         "PerPkg": "1",
28         "ScaleUnit": "64Bytes",
29         "UMask": "0xC",
30         "Unit": "iMC"
31     },
32     {
33         "BriefDescription": "Memory controller clock ticks. Use to generate percentages for memory controller CYCLES events. Derived from unc_m_clockticks",
34         "Counter": "0,1,2,3",
35         "EventName": "UNC_M_CLOCKTICKS",
36         "PerPkg": "1",
37         "Unit": "iMC"
38     },
39     {
40         "BriefDescription": "Cycles where DRAM ranks are in power down (CKE) mode. Derived from unc_m_power_channel_ppd",
41         "Counter": "0,1,2,3",
42         "EventCode": "0x85",
43         "EventName": "UNC_M_POWER_CHANNEL_PPD",
44         "MetricExpr": "(UNC_M_POWER_CHANNEL_PPD / UNC_M_CLOCKTICKS) * 100.",
45         "PerPkg": "1",
46         "Unit": "iMC"
47     },
48     {
49         "BriefDescription": "Cycles all ranks are in critical thermal throttle. Derived from unc_m_power_critical_throttle_cycles",
50         "Counter": "0,1,2,3",
51         "EventCode": "0x86",
52         "EventName": "UNC_M_POWER_CRITICAL_THROTTLE_CYCLES",
53         "MetricExpr": "(UNC_M_POWER_CRITICAL_THROTTLE_CYCLES / UNC_M_CLOCKTICKS) * 100.",
54         "PerPkg": "1",
55         "Unit": "iMC"
56     },
57     {
58         "BriefDescription": "Cycles Memory is in self refresh power mode. Derived from unc_m_power_self_refresh",
59         "Counter": "0,1,2,3",
60         "EventCode": "0x43",
61         "EventName": "UNC_M_POWER_SELF_REFRESH",
62         "MetricExpr": "(UNC_M_POWER_SELF_REFRESH / UNC_M_CLOCKTICKS) * 100.",
63         "PerPkg": "1",
64         "Unit": "iMC"
65     },
66     {
67         "BriefDescription": "Memory page conflicts. Derived from unc_m_pre_count.page_miss",
68         "Counter": "0,1,2,3",
69         "EventCode": "0x2",
70         "EventName": "UNC_M_PRE_COUNT.PAGE_MISS",
71         "PerPkg": "1",
72         "UMask": "0x1",
73         "Unit": "iMC"
74     }
75 ]