1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
4 * Copyright (c) 2019 Intel Corporation.
9 int isst_get_ctdp_levels(int cpu, struct isst_pkg_ctdp *pkg_dev)
14 ret = isst_send_mbox_command(cpu, CONFIG_TDP,
15 CONFIG_TDP_GET_LEVELS_INFO, 0, 0, &resp);
19 debug_printf("cpu:%d CONFIG_TDP_GET_LEVELS_INFO resp:%x\n", cpu, resp);
21 pkg_dev->version = resp & 0xff;
22 pkg_dev->levels = (resp >> 8) & 0xff;
23 pkg_dev->current_level = (resp >> 16) & 0xff;
24 pkg_dev->locked = !!(resp & BIT(24));
25 pkg_dev->enabled = !!(resp & BIT(31));
30 int isst_get_ctdp_control(int cpu, int config_index,
31 struct isst_pkg_ctdp_level_info *ctdp_level)
36 ret = isst_send_mbox_command(cpu, CONFIG_TDP,
37 CONFIG_TDP_GET_TDP_CONTROL, 0,
42 ctdp_level->fact_support = resp & BIT(0);
43 ctdp_level->pbf_support = !!(resp & BIT(1));
44 ctdp_level->fact_enabled = !!(resp & BIT(16));
45 ctdp_level->pbf_enabled = !!(resp & BIT(17));
48 "cpu:%d CONFIG_TDP_GET_TDP_CONTROL resp:%x fact_support:%d pbf_support: %d fact_enabled:%d pbf_enabled:%d\n",
49 cpu, resp, ctdp_level->fact_support, ctdp_level->pbf_support,
50 ctdp_level->fact_enabled, ctdp_level->pbf_enabled);
55 int isst_get_tdp_info(int cpu, int config_index,
56 struct isst_pkg_ctdp_level_info *ctdp_level)
61 ret = isst_send_mbox_command(cpu, CONFIG_TDP, CONFIG_TDP_GET_TDP_INFO,
62 0, config_index, &resp);
66 ctdp_level->pkg_tdp = resp & GENMASK(14, 0);
67 ctdp_level->tdp_ratio = (resp & GENMASK(23, 16)) >> 16;
70 "cpu:%d ctdp:%d CONFIG_TDP_GET_TDP_INFO resp:%x tdp_ratio:%d pkg_tdp:%d\n",
71 cpu, config_index, resp, ctdp_level->tdp_ratio,
76 int isst_get_pwr_info(int cpu, int config_index,
77 struct isst_pkg_ctdp_level_info *ctdp_level)
82 ret = isst_send_mbox_command(cpu, CONFIG_TDP, CONFIG_TDP_GET_PWR_INFO,
83 0, config_index, &resp);
87 ctdp_level->pkg_max_power = resp & GENMASK(14, 0);
88 ctdp_level->pkg_min_power = (resp & GENMASK(30, 16)) >> 16;
91 "cpu:%d ctdp:%d CONFIG_TDP_GET_PWR_INFO resp:%x pkg_max_power:%d pkg_min_power:%d\n",
92 cpu, config_index, resp, ctdp_level->pkg_max_power,
93 ctdp_level->pkg_min_power);
98 int isst_get_tjmax_info(int cpu, int config_index,
99 struct isst_pkg_ctdp_level_info *ctdp_level)
104 ret = isst_send_mbox_command(cpu, CONFIG_TDP, CONFIG_TDP_GET_TJMAX_INFO,
105 0, config_index, &resp);
109 ctdp_level->t_proc_hot = resp & GENMASK(7, 0);
112 "cpu:%d ctdp:%d CONFIG_TDP_GET_TJMAX_INFO resp:%x t_proc_hot:%d\n",
113 cpu, config_index, resp, ctdp_level->t_proc_hot);
118 int isst_get_coremask_info(int cpu, int config_index,
119 struct isst_pkg_ctdp_level_info *ctdp_level)
124 ctdp_level->cpu_count = 0;
125 for (i = 0; i < 2; ++i) {
126 unsigned long long mask;
129 ret = isst_send_mbox_command(cpu, CONFIG_TDP,
130 CONFIG_TDP_GET_CORE_MASK, 0,
131 (i << 8) | config_index, &resp);
136 "cpu:%d ctdp:%d mask:%d CONFIG_TDP_GET_CORE_MASK resp:%x\n",
137 cpu, config_index, i, resp);
139 mask = (unsigned long long)resp << (32 * i);
140 set_cpu_mask_from_punit_coremask(cpu, mask,
141 ctdp_level->core_cpumask_size,
142 ctdp_level->core_cpumask,
144 ctdp_level->cpu_count += cpu_count;
145 debug_printf("cpu:%d ctdp:%d mask:%d cpu count:%d\n", cpu,
146 config_index, i, ctdp_level->cpu_count);
152 int isst_get_get_trl(int cpu, int level, int avx_level, int *trl)
154 unsigned int req, resp;
157 req = level | (avx_level << 16);
158 ret = isst_send_mbox_command(cpu, CONFIG_TDP,
159 CONFIG_TDP_GET_TURBO_LIMIT_RATIOS, 0, req,
165 "cpu:%d CONFIG_TDP_GET_TURBO_LIMIT_RATIOS req:%x resp:%x\n",
168 trl[0] = resp & GENMASK(7, 0);
169 trl[1] = (resp & GENMASK(15, 8)) >> 8;
170 trl[2] = (resp & GENMASK(23, 16)) >> 16;
171 trl[3] = (resp & GENMASK(31, 24)) >> 24;
173 req = level | BIT(8) | (avx_level << 16);
174 ret = isst_send_mbox_command(cpu, CONFIG_TDP,
175 CONFIG_TDP_GET_TURBO_LIMIT_RATIOS, 0, req,
180 debug_printf("cpu:%d CONFIG_TDP_GET_TURBO_LIMIT req:%x resp:%x\n", cpu,
183 trl[4] = resp & GENMASK(7, 0);
184 trl[5] = (resp & GENMASK(15, 8)) >> 8;
185 trl[6] = (resp & GENMASK(23, 16)) >> 16;
186 trl[7] = (resp & GENMASK(31, 24)) >> 24;
191 int isst_get_trl_bucket_info(int cpu, unsigned long long *buckets_info)
195 debug_printf("cpu:%d bucket info via MSR\n", cpu);
199 ret = isst_send_msr_command(cpu, 0x1ae, 0, buckets_info);
203 debug_printf("cpu:%d bucket info via MSR successful 0x%llx\n", cpu,
209 int isst_set_tdp_level_msr(int cpu, int tdp_level)
211 unsigned long long level = tdp_level;
214 debug_printf("cpu: tdp_level via MSR %d\n", cpu, tdp_level);
216 if (isst_get_config_tdp_lock_status(cpu)) {
217 debug_printf("cpu: tdp_locked %d\n", cpu);
222 return -1; /* invalid value */
224 ret = isst_send_msr_command(cpu, 0x64b, 1, &level);
228 debug_printf("cpu: tdp_level via MSR successful %d\n", cpu, tdp_level);
233 int isst_set_tdp_level(int cpu, int tdp_level)
238 ret = isst_send_mbox_command(cpu, CONFIG_TDP, CONFIG_TDP_SET_LEVEL, 0,
241 return isst_set_tdp_level_msr(cpu, tdp_level);
246 int isst_get_pbf_info(int cpu, int level, struct isst_pbf_info *pbf_info)
248 unsigned int req, resp;
251 pbf_info->core_cpumask_size = alloc_cpu_set(&pbf_info->core_cpumask);
253 for (i = 0; i < 2; ++i) {
254 unsigned long long mask;
257 ret = isst_send_mbox_command(cpu, CONFIG_TDP,
258 CONFIG_TDP_PBF_GET_CORE_MASK_INFO,
259 0, (i << 8) | level, &resp);
264 "cpu:%d CONFIG_TDP_PBF_GET_CORE_MASK_INFO resp:%x\n",
267 mask = (unsigned long long)resp << (32 * i);
268 set_cpu_mask_from_punit_coremask(cpu, mask,
269 pbf_info->core_cpumask_size,
270 pbf_info->core_cpumask,
275 ret = isst_send_mbox_command(cpu, CONFIG_TDP,
276 CONFIG_TDP_PBF_GET_P1HI_P1LO_INFO, 0, req,
281 debug_printf("cpu:%d CONFIG_TDP_PBF_GET_P1HI_P1LO_INFO resp:%x\n", cpu,
284 pbf_info->p1_low = resp & 0xff;
285 pbf_info->p1_high = (resp & GENMASK(15, 8)) >> 8;
288 ret = isst_send_mbox_command(
289 cpu, CONFIG_TDP, CONFIG_TDP_PBF_GET_TDP_INFO, 0, req, &resp);
293 debug_printf("cpu:%d CONFIG_TDP_PBF_GET_TDP_INFO resp:%x\n", cpu, resp);
295 pbf_info->tdp = resp & 0xffff;
298 ret = isst_send_mbox_command(
299 cpu, CONFIG_TDP, CONFIG_TDP_PBF_GET_TJ_MAX_INFO, 0, req, &resp);
303 debug_printf("cpu:%d CONFIG_TDP_PBF_GET_TJ_MAX_INFO resp:%x\n", cpu,
305 pbf_info->t_control = (resp >> 8) & 0xff;
306 pbf_info->t_prochot = resp & 0xff;
311 void isst_get_pbf_info_complete(struct isst_pbf_info *pbf_info)
313 free_cpu_set(pbf_info->core_cpumask);
316 int isst_set_pbf_fact_status(int cpu, int pbf, int enable)
318 struct isst_pkg_ctdp pkg_dev;
319 struct isst_pkg_ctdp_level_info ctdp_level;
321 unsigned int req = 0, resp;
324 ret = isst_get_ctdp_levels(cpu, &pkg_dev);
328 current_level = pkg_dev.current_level;
330 ret = isst_get_ctdp_control(cpu, current_level, &ctdp_level);
335 if (ctdp_level.fact_enabled)
343 if (ctdp_level.pbf_enabled)
352 ret = isst_send_mbox_command(cpu, CONFIG_TDP,
353 CONFIG_TDP_SET_TDP_CONTROL, 0, req, &resp);
357 debug_printf("cpu:%d CONFIG_TDP_SET_TDP_CONTROL pbf/fact:%d req:%x\n",
363 int isst_get_fact_bucket_info(int cpu, int level,
364 struct isst_fact_bucket_info *bucket_info)
369 for (i = 0; i < 2; ++i) {
372 ret = isst_send_mbox_command(
374 CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_NUMCORES, 0,
375 (i << 8) | level, &resp);
380 "cpu:%d CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_NUMCORES index:%d level:%d resp:%x\n",
381 cpu, i, level, resp);
383 for (j = 0; j < 4; ++j) {
384 bucket_info[j + (i * 4)].high_priority_cores_count =
385 (resp >> (j * 8)) & 0xff;
389 for (k = 0; k < 3; ++k) {
390 for (i = 0; i < 2; ++i) {
393 ret = isst_send_mbox_command(
395 CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_RATIOS, 0,
396 (k << 16) | (i << 8) | level, &resp);
401 "cpu:%d CONFIG_TDP_GET_FACT_HP_TURBO_LIMIT_RATIOS index:%d level:%d avx:%d resp:%x\n",
402 cpu, i, level, k, resp);
404 for (j = 0; j < 4; ++j) {
407 bucket_info[j + (i * 4)].sse_trl =
408 (resp >> (j * 8)) & 0xff;
411 bucket_info[j + (i * 4)].avx_trl =
412 (resp >> (j * 8)) & 0xff;
415 bucket_info[j + (i * 4)].avx512_trl =
416 (resp >> (j * 8)) & 0xff;
428 int isst_get_fact_info(int cpu, int level, struct isst_fact_info *fact_info)
433 ret = isst_send_mbox_command(cpu, CONFIG_TDP,
434 CONFIG_TDP_GET_FACT_LP_CLIPPING_RATIO, 0,
439 debug_printf("cpu:%d CONFIG_TDP_GET_FACT_LP_CLIPPING_RATIO resp:%x\n",
442 fact_info->lp_clipping_ratio_license_sse = resp & 0xff;
443 fact_info->lp_clipping_ratio_license_avx2 = (resp >> 8) & 0xff;
444 fact_info->lp_clipping_ratio_license_avx512 = (resp >> 16) & 0xff;
446 ret = isst_get_fact_bucket_info(cpu, level, fact_info->bucket_info);
451 int isst_set_trl(int cpu, unsigned long long trl)
456 trl = 0xFFFFFFFFFFFFFFFFULL;
458 ret = isst_send_msr_command(cpu, 0x1AD, 1, &trl);
465 int isst_set_trl_from_current_tdp(int cpu, unsigned long long trl)
467 unsigned long long msr_trl;
473 struct isst_pkg_ctdp pkg_dev;
477 ret = isst_get_ctdp_levels(cpu, &pkg_dev);
481 ret = isst_get_get_trl(cpu, pkg_dev.current_level, 0, trl);
486 for (i = 0; i < 8; ++i) {
487 unsigned long long _trl = trl[i];
489 msr_trl |= (_trl << (i * 8));
492 ret = isst_send_msr_command(cpu, 0x1AD, 1, &msr_trl);
499 /* Return 1 if locked */
500 int isst_get_config_tdp_lock_status(int cpu)
502 unsigned long long tdp_control = 0;
505 ret = isst_send_msr_command(cpu, 0x64b, 0, &tdp_control);
509 ret = !!(tdp_control & BIT(31));
514 void isst_get_process_ctdp_complete(int cpu, struct isst_pkg_ctdp *pkg_dev)
518 if (!pkg_dev->processed)
521 for (i = 0; i < pkg_dev->levels; ++i) {
522 struct isst_pkg_ctdp_level_info *ctdp_level;
524 ctdp_level = &pkg_dev->ctdp_level[i];
525 if (ctdp_level->pbf_support)
526 free_cpu_set(ctdp_level->pbf_info.core_cpumask);
527 free_cpu_set(ctdp_level->core_cpumask);
531 int isst_get_process_ctdp(int cpu, int tdp_level, struct isst_pkg_ctdp *pkg_dev)
535 if (pkg_dev->processed)
538 ret = isst_get_ctdp_levels(cpu, pkg_dev);
542 debug_printf("cpu: %d ctdp enable:%d current level: %d levels:%d\n",
543 cpu, pkg_dev->enabled, pkg_dev->current_level,
546 for (i = 0; i <= pkg_dev->levels; ++i) {
547 struct isst_pkg_ctdp_level_info *ctdp_level;
549 if (tdp_level != 0xff && i != tdp_level)
552 debug_printf("cpu:%d Get Information for TDP level:%d\n", cpu,
554 ctdp_level = &pkg_dev->ctdp_level[i];
556 ctdp_level->processed = 1;
557 ctdp_level->level = i;
558 ctdp_level->control_cpu = cpu;
559 ctdp_level->pkg_id = get_physical_package_id(cpu);
560 ctdp_level->die_id = get_physical_die_id(cpu);
562 ret = isst_get_ctdp_control(cpu, i, ctdp_level);
566 ret = isst_get_tdp_info(cpu, i, ctdp_level);
570 ret = isst_get_pwr_info(cpu, i, ctdp_level);
574 ret = isst_get_tjmax_info(cpu, i, ctdp_level);
578 ctdp_level->core_cpumask_size =
579 alloc_cpu_set(&ctdp_level->core_cpumask);
580 ret = isst_get_coremask_info(cpu, i, ctdp_level);
584 ret = isst_get_trl_bucket_info(cpu, &ctdp_level->buckets_info);
588 ret = isst_get_get_trl(cpu, i, 0,
589 ctdp_level->trl_sse_active_cores);
593 ret = isst_get_get_trl(cpu, i, 1,
594 ctdp_level->trl_avx_active_cores);
598 ret = isst_get_get_trl(cpu, i, 2,
599 ctdp_level->trl_avx_512_active_cores);
603 if (ctdp_level->pbf_support) {
604 ret = isst_get_pbf_info(cpu, i, &ctdp_level->pbf_info);
606 ctdp_level->pbf_found = 1;
609 if (ctdp_level->fact_support) {
610 ret = isst_get_fact_info(cpu, i,
611 &ctdp_level->fact_info);
617 pkg_dev->processed = 1;
622 int isst_pm_qos_config(int cpu, int enable_clos, int priority_type)
624 unsigned int req, resp;
627 ret = isst_send_mbox_command(cpu, CONFIG_CLOS, CLOS_PM_QOS_CONFIG, 0, 0,
632 debug_printf("cpu:%d CLOS_PM_QOS_CONFIG resp:%x\n", cpu, resp);
646 ret = isst_send_mbox_command(cpu, CONFIG_CLOS, CLOS_PM_QOS_CONFIG,
647 BIT(MBOX_CMD_WRITE_BIT), req, &resp);
651 debug_printf("cpu:%d CLOS_PM_QOS_CONFIG priority type:%d req:%x\n", cpu,
657 int isst_pm_get_clos(int cpu, int clos, struct isst_clos_config *clos_config)
662 ret = isst_send_mbox_command(cpu, CONFIG_CLOS, CLOS_PM_CLOS, clos, 0,
667 clos_config->pkg_id = get_physical_package_id(cpu);
668 clos_config->die_id = get_physical_die_id(cpu);
670 clos_config->epp = resp & 0x0f;
671 clos_config->clos_prop_prio = (resp >> 4) & 0x0f;
672 clos_config->clos_min = (resp >> 8) & 0xff;
673 clos_config->clos_max = (resp >> 16) & 0xff;
674 clos_config->clos_desired = (resp >> 24) & 0xff;
679 int isst_set_clos(int cpu, int clos, struct isst_clos_config *clos_config)
681 unsigned int req, resp;
685 req = clos_config->epp & 0x0f;
686 req |= (clos_config->clos_prop_prio & 0x0f) << 4;
687 req |= (clos_config->clos_min & 0xff) << 8;
688 req |= (clos_config->clos_max & 0xff) << 16;
689 req |= (clos_config->clos_desired & 0xff) << 24;
691 param = BIT(MBOX_CMD_WRITE_BIT) | clos;
693 ret = isst_send_mbox_command(cpu, CONFIG_CLOS, CLOS_PM_CLOS, param, req,
698 debug_printf("cpu:%d CLOS_PM_CLOS param:%x req:%x\n", cpu, param, req);
703 int isst_clos_get_assoc_status(int cpu, int *clos_id)
709 core_id = find_phy_core_num(cpu);
712 ret = isst_send_mbox_command(cpu, CONFIG_CLOS, CLOS_PQR_ASSOC, param, 0,
717 debug_printf("cpu:%d CLOS_PQR_ASSOC param:%x resp:%x\n", cpu, param,
719 *clos_id = (resp >> 16) & 0x03;
724 int isst_clos_associate(int cpu, int clos_id)
726 unsigned int req, resp;
730 req = (clos_id & 0x03) << 16;
731 core_id = find_phy_core_num(cpu);
732 param = BIT(MBOX_CMD_WRITE_BIT) | core_id;
734 ret = isst_send_mbox_command(cpu, CONFIG_CLOS, CLOS_PQR_ASSOC, param,
739 debug_printf("cpu:%d CLOS_PQR_ASSOC param:%x req:%x\n", cpu, param,