2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
24 #include INTEL_FAMILY_HEADER
29 #include <sys/types.h>
32 #include <sys/select.h>
33 #include <sys/resource.h>
45 #include <linux/capability.h>
48 char *proc_stat = "/proc/stat";
51 struct timeval interval_tv = {5, 0};
52 struct timespec interval_ts = {5, 0};
53 struct timespec one_msec = {0, 1000000};
54 unsigned int num_iterations;
58 unsigned int sums_need_wide_columns;
59 unsigned int rapl_joules;
60 unsigned int summary_only;
61 unsigned int list_header_only;
62 unsigned int dump_only;
63 unsigned int do_snb_cstates;
64 unsigned int do_knl_cstates;
65 unsigned int do_slm_cstates;
66 unsigned int do_cnl_cstates;
67 unsigned int use_c1_residency_msr;
68 unsigned int has_aperf;
70 unsigned int do_irtl_snb;
71 unsigned int do_irtl_hsw;
72 unsigned int units = 1000000; /* MHz etc */
73 unsigned int genuine_intel;
74 unsigned int has_invariant_tsc;
75 unsigned int do_nhm_platform_info;
76 unsigned int no_MSR_MISC_PWR_MGMT;
77 unsigned int aperf_mperf_multiplier = 1;
80 unsigned int has_base_hz;
81 double tsc_tweak = 1.0;
82 unsigned int show_pkg_only;
83 unsigned int show_core_only;
84 char *output_buffer, *outp;
88 unsigned long long gfx_cur_rc6_ms;
89 unsigned long long cpuidle_cur_cpu_lpi_us;
90 unsigned long long cpuidle_cur_sys_lpi_us;
91 unsigned int gfx_cur_mhz;
92 unsigned int tcc_activation_temp;
93 unsigned int tcc_activation_temp_override;
94 double rapl_power_units, rapl_time_units;
95 double rapl_dram_energy_units, rapl_energy_units;
96 double rapl_joule_counter_range;
97 unsigned int do_core_perf_limit_reasons;
98 unsigned int has_automatic_cstate_conversion;
99 unsigned int do_gfx_perf_limit_reasons;
100 unsigned int do_ring_perf_limit_reasons;
101 unsigned int crystal_hz;
102 unsigned long long tsc_hz;
104 double discover_bclk(unsigned int family, unsigned int model);
105 unsigned int has_hwp; /* IA32_PM_ENABLE, IA32_HWP_CAPABILITIES */
106 /* IA32_HWP_REQUEST, IA32_HWP_STATUS */
107 unsigned int has_hwp_notify; /* IA32_HWP_INTERRUPT */
108 unsigned int has_hwp_activity_window; /* IA32_HWP_REQUEST[bits 41:32] */
109 unsigned int has_hwp_epp; /* IA32_HWP_REQUEST[bits 31:24] */
110 unsigned int has_hwp_pkg; /* IA32_HWP_REQUEST_PKG */
111 unsigned int has_misc_feature_control;
113 #define RAPL_PKG (1 << 0)
114 /* 0x610 MSR_PKG_POWER_LIMIT */
115 /* 0x611 MSR_PKG_ENERGY_STATUS */
116 #define RAPL_PKG_PERF_STATUS (1 << 1)
117 /* 0x613 MSR_PKG_PERF_STATUS */
118 #define RAPL_PKG_POWER_INFO (1 << 2)
119 /* 0x614 MSR_PKG_POWER_INFO */
121 #define RAPL_DRAM (1 << 3)
122 /* 0x618 MSR_DRAM_POWER_LIMIT */
123 /* 0x619 MSR_DRAM_ENERGY_STATUS */
124 #define RAPL_DRAM_PERF_STATUS (1 << 4)
125 /* 0x61b MSR_DRAM_PERF_STATUS */
126 #define RAPL_DRAM_POWER_INFO (1 << 5)
127 /* 0x61c MSR_DRAM_POWER_INFO */
129 #define RAPL_CORES_POWER_LIMIT (1 << 6)
130 /* 0x638 MSR_PP0_POWER_LIMIT */
131 #define RAPL_CORE_POLICY (1 << 7)
132 /* 0x63a MSR_PP0_POLICY */
134 #define RAPL_GFX (1 << 8)
135 /* 0x640 MSR_PP1_POWER_LIMIT */
136 /* 0x641 MSR_PP1_ENERGY_STATUS */
137 /* 0x642 MSR_PP1_POLICY */
139 #define RAPL_CORES_ENERGY_STATUS (1 << 9)
140 /* 0x639 MSR_PP0_ENERGY_STATUS */
141 #define RAPL_CORES (RAPL_CORES_ENERGY_STATUS | RAPL_CORES_POWER_LIMIT)
142 #define TJMAX_DEFAULT 100
144 #define MAX(a, b) ((a) > (b) ? (a) : (b))
147 * buffer size used by sscanf() for added column names
148 * Usually truncated to 7 characters, but also handles 18 columns for raw 64-bit counters
150 #define NAME_BYTES 20
151 #define PATH_BYTES 128
156 #define CPU_SUBSET_MAXCPUS 1024 /* need to use before probe... */
157 cpu_set_t *cpu_present_set, *cpu_affinity_set, *cpu_subset;
158 size_t cpu_present_setsize, cpu_affinity_setsize, cpu_subset_size;
159 #define MAX_ADDED_COUNTERS 8
160 #define MAX_ADDED_THREAD_COUNTERS 24
161 #define BITMASK_SIZE 32
164 struct timeval tv_begin;
165 struct timeval tv_end;
166 unsigned long long tsc;
167 unsigned long long aperf;
168 unsigned long long mperf;
169 unsigned long long c1;
170 unsigned long long irq_count;
171 unsigned int smi_count;
174 #define CPU_IS_FIRST_THREAD_IN_CORE 0x2
175 #define CPU_IS_FIRST_CORE_IN_PACKAGE 0x4
176 unsigned long long counter[MAX_ADDED_THREAD_COUNTERS];
177 } *thread_even, *thread_odd;
180 unsigned long long c3;
181 unsigned long long c6;
182 unsigned long long c7;
183 unsigned long long mc6_us; /* duplicate as per-core for now, even though per module */
184 unsigned int core_temp_c;
185 unsigned int core_id;
186 unsigned long long counter[MAX_ADDED_COUNTERS];
187 } *core_even, *core_odd;
190 unsigned long long pc2;
191 unsigned long long pc3;
192 unsigned long long pc6;
193 unsigned long long pc7;
194 unsigned long long pc8;
195 unsigned long long pc9;
196 unsigned long long pc10;
197 unsigned long long cpu_lpi;
198 unsigned long long sys_lpi;
199 unsigned long long pkg_wtd_core_c0;
200 unsigned long long pkg_any_core_c0;
201 unsigned long long pkg_any_gfxe_c0;
202 unsigned long long pkg_both_core_gfxe_c0;
203 long long gfx_rc6_ms;
204 unsigned int gfx_mhz;
205 unsigned int package_id;
206 unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
207 unsigned int energy_dram; /* MSR_DRAM_ENERGY_STATUS */
208 unsigned int energy_cores; /* MSR_PP0_ENERGY_STATUS */
209 unsigned int energy_gfx; /* MSR_PP1_ENERGY_STATUS */
210 unsigned int rapl_pkg_perf_status; /* MSR_PKG_PERF_STATUS */
211 unsigned int rapl_dram_perf_status; /* MSR_DRAM_PERF_STATUS */
212 unsigned int pkg_temp_c;
213 unsigned long long counter[MAX_ADDED_COUNTERS];
214 } *package_even, *package_odd;
216 #define ODD_COUNTERS thread_odd, core_odd, package_odd
217 #define EVEN_COUNTERS thread_even, core_even, package_even
219 #define GET_THREAD(thread_base, thread_no, core_no, node_no, pkg_no) \
222 topo.nodes_per_pkg * topo.cores_per_node * topo.threads_per_core) + \
223 ((node_no) * topo.cores_per_node * topo.threads_per_core) + \
224 ((core_no) * topo.threads_per_core) + \
227 #define GET_CORE(core_base, core_no, node_no, pkg_no) \
229 ((pkg_no) * topo.nodes_per_pkg * topo.cores_per_node) + \
230 ((node_no) * topo.cores_per_node) + \
234 #define GET_PKG(pkg_base, pkg_no) (pkg_base + pkg_no)
236 enum counter_scope {SCOPE_CPU, SCOPE_CORE, SCOPE_PACKAGE};
237 enum counter_type {COUNTER_ITEMS, COUNTER_CYCLES, COUNTER_SECONDS, COUNTER_USEC};
238 enum counter_format {FORMAT_RAW, FORMAT_DELTA, FORMAT_PERCENT};
241 unsigned int msr_num;
242 char name[NAME_BYTES];
243 char path[PATH_BYTES];
245 enum counter_type type;
246 enum counter_format format;
247 struct msr_counter *next;
249 #define FLAGS_HIDE (1 << 0)
250 #define FLAGS_SHOW (1 << 1)
251 #define SYSFS_PERCPU (1 << 1)
254 struct sys_counters {
255 unsigned int added_thread_counters;
256 unsigned int added_core_counters;
257 unsigned int added_package_counters;
258 struct msr_counter *tp;
259 struct msr_counter *cp;
260 struct msr_counter *pp;
263 struct system_summary {
264 struct thread_data threads;
265 struct core_data cores;
266 struct pkg_data packages;
269 struct cpu_topology {
270 int physical_package_id;
272 int physical_node_id;
273 int logical_node_id; /* 0-based count within the package */
274 int physical_core_id;
276 cpu_set_t *put_ids; /* Processing Unit/Thread IDs */
287 int threads_per_core;
290 struct timeval tv_even, tv_odd, tv_delta;
292 int *irq_column_2_cpu; /* /proc/interrupts column numbers */
293 int *irqs_per_cpu; /* indexed by cpu_num */
295 void setup_all_buffers(void);
297 int cpu_is_not_present(int cpu)
299 return !CPU_ISSET_S(cpu, cpu_present_setsize, cpu_present_set);
302 * run func(thread, core, package) in topology order
303 * skip non-present cpus
306 int for_all_cpus(int (func)(struct thread_data *, struct core_data *, struct pkg_data *),
307 struct thread_data *thread_base, struct core_data *core_base, struct pkg_data *pkg_base)
309 int retval, pkg_no, core_no, thread_no, node_no;
311 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
312 for (core_no = 0; core_no < topo.cores_per_node; ++core_no) {
313 for (node_no = 0; node_no < topo.nodes_per_pkg;
315 for (thread_no = 0; thread_no <
316 topo.threads_per_core; ++thread_no) {
317 struct thread_data *t;
321 t = GET_THREAD(thread_base, thread_no,
325 if (cpu_is_not_present(t->cpu_id))
328 c = GET_CORE(core_base, core_no,
330 p = GET_PKG(pkg_base, pkg_no);
332 retval = func(t, c, p);
342 int cpu_migrate(int cpu)
344 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
345 CPU_SET_S(cpu, cpu_affinity_setsize, cpu_affinity_set);
346 if (sched_setaffinity(0, cpu_affinity_setsize, cpu_affinity_set) == -1)
351 int get_msr_fd(int cpu)
361 sprintf(pathname, "/dev/cpu/%d/msr", cpu);
362 fd = open(pathname, O_RDONLY);
364 err(-1, "%s open failed, try chown or chmod +r /dev/cpu/*/msr, or run as root", pathname);
371 int get_msr(int cpu, off_t offset, unsigned long long *msr)
375 retval = pread(get_msr_fd(cpu), msr, sizeof(*msr), offset);
377 if (retval != sizeof *msr)
378 err(-1, "cpu%d: msr offset 0x%llx read failed", cpu, (unsigned long long)offset);
384 * Each string in this array is compared in --show and --hide cmdline.
385 * Thus, strings that are proper sub-sets must follow their more specific peers.
387 struct msr_counter bic[] = {
389 { 0x0, "Time_Of_Day_Seconds" },
395 { 0x0, "SMI", "", 32, 0, FORMAT_DELTA, NULL},
440 #define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
441 #define BIC_USEC (1ULL << 0)
442 #define BIC_TOD (1ULL << 1)
443 #define BIC_Package (1ULL << 2)
444 #define BIC_Avg_MHz (1ULL << 3)
445 #define BIC_Bzy_MHz (1ULL << 4)
446 #define BIC_TSC_MHz (1ULL << 5)
447 #define BIC_IRQ (1ULL << 6)
448 #define BIC_SMI (1ULL << 7)
449 #define BIC_Busy (1ULL << 8)
450 #define BIC_CPU_c1 (1ULL << 9)
451 #define BIC_CPU_c3 (1ULL << 10)
452 #define BIC_CPU_c6 (1ULL << 11)
453 #define BIC_CPU_c7 (1ULL << 12)
454 #define BIC_ThreadC (1ULL << 13)
455 #define BIC_CoreTmp (1ULL << 14)
456 #define BIC_CoreCnt (1ULL << 15)
457 #define BIC_PkgTmp (1ULL << 16)
458 #define BIC_GFX_rc6 (1ULL << 17)
459 #define BIC_GFXMHz (1ULL << 18)
460 #define BIC_Pkgpc2 (1ULL << 19)
461 #define BIC_Pkgpc3 (1ULL << 20)
462 #define BIC_Pkgpc6 (1ULL << 21)
463 #define BIC_Pkgpc7 (1ULL << 22)
464 #define BIC_Pkgpc8 (1ULL << 23)
465 #define BIC_Pkgpc9 (1ULL << 24)
466 #define BIC_Pkgpc10 (1ULL << 25)
467 #define BIC_CPU_LPI (1ULL << 26)
468 #define BIC_SYS_LPI (1ULL << 27)
469 #define BIC_PkgWatt (1ULL << 26)
470 #define BIC_CorWatt (1ULL << 27)
471 #define BIC_GFXWatt (1ULL << 28)
472 #define BIC_PkgCnt (1ULL << 29)
473 #define BIC_RAMWatt (1ULL << 30)
474 #define BIC_PKG__ (1ULL << 31)
475 #define BIC_RAM__ (1ULL << 32)
476 #define BIC_Pkg_J (1ULL << 33)
477 #define BIC_Cor_J (1ULL << 34)
478 #define BIC_GFX_J (1ULL << 35)
479 #define BIC_RAM_J (1ULL << 36)
480 #define BIC_Core (1ULL << 37)
481 #define BIC_CPU (1ULL << 38)
482 #define BIC_Mod_c6 (1ULL << 39)
483 #define BIC_sysfs (1ULL << 40)
484 #define BIC_Totl_c0 (1ULL << 41)
485 #define BIC_Any_c0 (1ULL << 42)
486 #define BIC_GFX_c0 (1ULL << 43)
487 #define BIC_CPUGFX (1ULL << 44)
488 #define BIC_Node (1ULL << 45)
490 #define BIC_DISABLED_BY_DEFAULT (BIC_USEC | BIC_TOD)
492 unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAULT);
493 unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs;
495 #define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
496 #define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
497 #define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
498 #define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
501 #define MAX_DEFERRED 16
502 char *deferred_skip_names[MAX_DEFERRED];
503 int deferred_skip_index;
506 * HIDE_LIST - hide this list of counters, show the rest [default]
507 * SHOW_LIST - show this list of counters, hide the rest
509 enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
514 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"
516 "Turbostat forks the specified COMMAND and prints statistics\n"
517 "when COMMAND completes.\n"
518 "If no COMMAND is specified, turbostat wakes every 5-seconds\n"
519 "to print statistics, until interrupted.\n"
520 "--add add a counter\n"
521 " eg. --add msr0x10,u64,cpu,delta,MY_TSC\n"
522 "--cpu cpu-set limit output to summary plus cpu-set:\n"
523 " {core | package | j,k,l..m,n-p }\n"
524 "--quiet skip decoding system configuration header\n"
525 "--interval sec.subsec Override default 5-second measurement interval\n"
526 "--help print this help message\n"
527 "--list list column headers only\n"
528 "--num_iterations num number of the measurement iterations\n"
529 "--out file create or truncate \"file\" for all output\n"
530 "--version print version information\n"
532 "For more help, run \"man turbostat\"\n");
537 * for all the strings in comma separate name_list,
538 * set the approprate bit in return value.
540 unsigned long long bic_lookup(char *name_list, enum show_hide_mode mode)
543 unsigned long long retval = 0;
548 comma = strchr(name_list, ',');
553 if (!strcmp(name_list, "all"))
556 for (i = 0; i < MAX_BIC; ++i) {
557 if (!strcmp(name_list, bic[i].name)) {
558 retval |= (1ULL << i);
563 if (mode == SHOW_LIST) {
564 fprintf(stderr, "Invalid counter name: %s\n", name_list);
567 deferred_skip_names[deferred_skip_index++] = name_list;
569 fprintf(stderr, "deferred \"%s\"\n", name_list);
570 if (deferred_skip_index >= MAX_DEFERRED) {
571 fprintf(stderr, "More than max %d un-recognized --skip options '%s'\n",
572 MAX_DEFERRED, name_list);
587 void print_header(char *delim)
589 struct msr_counter *mp;
592 if (DO_BIC(BIC_USEC))
593 outp += sprintf(outp, "%susec", (printed++ ? delim : ""));
595 outp += sprintf(outp, "%sTime_Of_Day_Seconds", (printed++ ? delim : ""));
596 if (DO_BIC(BIC_Package))
597 outp += sprintf(outp, "%sPackage", (printed++ ? delim : ""));
598 if (DO_BIC(BIC_Node))
599 outp += sprintf(outp, "%sNode", (printed++ ? delim : ""));
600 if (DO_BIC(BIC_Core))
601 outp += sprintf(outp, "%sCore", (printed++ ? delim : ""));
603 outp += sprintf(outp, "%sCPU", (printed++ ? delim : ""));
604 if (DO_BIC(BIC_Avg_MHz))
605 outp += sprintf(outp, "%sAvg_MHz", (printed++ ? delim : ""));
606 if (DO_BIC(BIC_Busy))
607 outp += sprintf(outp, "%sBusy%%", (printed++ ? delim : ""));
608 if (DO_BIC(BIC_Bzy_MHz))
609 outp += sprintf(outp, "%sBzy_MHz", (printed++ ? delim : ""));
610 if (DO_BIC(BIC_TSC_MHz))
611 outp += sprintf(outp, "%sTSC_MHz", (printed++ ? delim : ""));
613 if (DO_BIC(BIC_IRQ)) {
614 if (sums_need_wide_columns)
615 outp += sprintf(outp, "%s IRQ", (printed++ ? delim : ""));
617 outp += sprintf(outp, "%sIRQ", (printed++ ? delim : ""));
621 outp += sprintf(outp, "%sSMI", (printed++ ? delim : ""));
623 for (mp = sys.tp; mp; mp = mp->next) {
625 if (mp->format == FORMAT_RAW) {
627 outp += sprintf(outp, "%s%18.18s", (printed++ ? delim : ""), mp->name);
629 outp += sprintf(outp, "%s%10.10s", (printed++ ? delim : ""), mp->name);
631 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
632 outp += sprintf(outp, "%s%8s", (printed++ ? delim : ""), mp->name);
634 outp += sprintf(outp, "%s%s", (printed++ ? delim : ""), mp->name);
638 if (DO_BIC(BIC_CPU_c1))
639 outp += sprintf(outp, "%sCPU%%c1", (printed++ ? delim : ""));
640 if (DO_BIC(BIC_CPU_c3) && !do_slm_cstates && !do_knl_cstates && !do_cnl_cstates)
641 outp += sprintf(outp, "%sCPU%%c3", (printed++ ? delim : ""));
642 if (DO_BIC(BIC_CPU_c6))
643 outp += sprintf(outp, "%sCPU%%c6", (printed++ ? delim : ""));
644 if (DO_BIC(BIC_CPU_c7))
645 outp += sprintf(outp, "%sCPU%%c7", (printed++ ? delim : ""));
647 if (DO_BIC(BIC_Mod_c6))
648 outp += sprintf(outp, "%sMod%%c6", (printed++ ? delim : ""));
650 if (DO_BIC(BIC_CoreTmp))
651 outp += sprintf(outp, "%sCoreTmp", (printed++ ? delim : ""));
653 for (mp = sys.cp; mp; mp = mp->next) {
654 if (mp->format == FORMAT_RAW) {
656 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
658 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
660 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
661 outp += sprintf(outp, "%s%8s", delim, mp->name);
663 outp += sprintf(outp, "%s%s", delim, mp->name);
667 if (DO_BIC(BIC_PkgTmp))
668 outp += sprintf(outp, "%sPkgTmp", (printed++ ? delim : ""));
670 if (DO_BIC(BIC_GFX_rc6))
671 outp += sprintf(outp, "%sGFX%%rc6", (printed++ ? delim : ""));
673 if (DO_BIC(BIC_GFXMHz))
674 outp += sprintf(outp, "%sGFXMHz", (printed++ ? delim : ""));
676 if (DO_BIC(BIC_Totl_c0))
677 outp += sprintf(outp, "%sTotl%%C0", (printed++ ? delim : ""));
678 if (DO_BIC(BIC_Any_c0))
679 outp += sprintf(outp, "%sAny%%C0", (printed++ ? delim : ""));
680 if (DO_BIC(BIC_GFX_c0))
681 outp += sprintf(outp, "%sGFX%%C0", (printed++ ? delim : ""));
682 if (DO_BIC(BIC_CPUGFX))
683 outp += sprintf(outp, "%sCPUGFX%%", (printed++ ? delim : ""));
685 if (DO_BIC(BIC_Pkgpc2))
686 outp += sprintf(outp, "%sPkg%%pc2", (printed++ ? delim : ""));
687 if (DO_BIC(BIC_Pkgpc3))
688 outp += sprintf(outp, "%sPkg%%pc3", (printed++ ? delim : ""));
689 if (DO_BIC(BIC_Pkgpc6))
690 outp += sprintf(outp, "%sPkg%%pc6", (printed++ ? delim : ""));
691 if (DO_BIC(BIC_Pkgpc7))
692 outp += sprintf(outp, "%sPkg%%pc7", (printed++ ? delim : ""));
693 if (DO_BIC(BIC_Pkgpc8))
694 outp += sprintf(outp, "%sPkg%%pc8", (printed++ ? delim : ""));
695 if (DO_BIC(BIC_Pkgpc9))
696 outp += sprintf(outp, "%sPkg%%pc9", (printed++ ? delim : ""));
697 if (DO_BIC(BIC_Pkgpc10))
698 outp += sprintf(outp, "%sPk%%pc10", (printed++ ? delim : ""));
699 if (DO_BIC(BIC_CPU_LPI))
700 outp += sprintf(outp, "%sCPU%%LPI", (printed++ ? delim : ""));
701 if (DO_BIC(BIC_SYS_LPI))
702 outp += sprintf(outp, "%sSYS%%LPI", (printed++ ? delim : ""));
704 if (do_rapl && !rapl_joules) {
705 if (DO_BIC(BIC_PkgWatt))
706 outp += sprintf(outp, "%sPkgWatt", (printed++ ? delim : ""));
707 if (DO_BIC(BIC_CorWatt))
708 outp += sprintf(outp, "%sCorWatt", (printed++ ? delim : ""));
709 if (DO_BIC(BIC_GFXWatt))
710 outp += sprintf(outp, "%sGFXWatt", (printed++ ? delim : ""));
711 if (DO_BIC(BIC_RAMWatt))
712 outp += sprintf(outp, "%sRAMWatt", (printed++ ? delim : ""));
713 if (DO_BIC(BIC_PKG__))
714 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
715 if (DO_BIC(BIC_RAM__))
716 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
717 } else if (do_rapl && rapl_joules) {
718 if (DO_BIC(BIC_Pkg_J))
719 outp += sprintf(outp, "%sPkg_J", (printed++ ? delim : ""));
720 if (DO_BIC(BIC_Cor_J))
721 outp += sprintf(outp, "%sCor_J", (printed++ ? delim : ""));
722 if (DO_BIC(BIC_GFX_J))
723 outp += sprintf(outp, "%sGFX_J", (printed++ ? delim : ""));
724 if (DO_BIC(BIC_RAM_J))
725 outp += sprintf(outp, "%sRAM_J", (printed++ ? delim : ""));
726 if (DO_BIC(BIC_PKG__))
727 outp += sprintf(outp, "%sPKG_%%", (printed++ ? delim : ""));
728 if (DO_BIC(BIC_RAM__))
729 outp += sprintf(outp, "%sRAM_%%", (printed++ ? delim : ""));
731 for (mp = sys.pp; mp; mp = mp->next) {
732 if (mp->format == FORMAT_RAW) {
734 outp += sprintf(outp, "%s%18.18s", delim, mp->name);
736 outp += sprintf(outp, "%s%10.10s", delim, mp->name);
738 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
739 outp += sprintf(outp, "%s%8s", delim, mp->name);
741 outp += sprintf(outp, "%s%s", delim, mp->name);
745 outp += sprintf(outp, "\n");
748 int dump_counters(struct thread_data *t, struct core_data *c,
752 struct msr_counter *mp;
754 outp += sprintf(outp, "t %p, c %p, p %p\n", t, c, p);
757 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
758 t->cpu_id, t->flags);
759 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
760 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
761 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
762 outp += sprintf(outp, "c1: %016llX\n", t->c1);
765 outp += sprintf(outp, "IRQ: %lld\n", t->irq_count);
767 outp += sprintf(outp, "SMI: %d\n", t->smi_count);
769 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
770 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
771 i, mp->msr_num, t->counter[i]);
776 outp += sprintf(outp, "core: %d\n", c->core_id);
777 outp += sprintf(outp, "c3: %016llX\n", c->c3);
778 outp += sprintf(outp, "c6: %016llX\n", c->c6);
779 outp += sprintf(outp, "c7: %016llX\n", c->c7);
780 outp += sprintf(outp, "DTS: %dC\n", c->core_temp_c);
782 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
783 outp += sprintf(outp, "cADDED [%d] msr0x%x: %08llX\n",
784 i, mp->msr_num, c->counter[i]);
786 outp += sprintf(outp, "mc6_us: %016llX\n", c->mc6_us);
790 outp += sprintf(outp, "package: %d\n", p->package_id);
792 outp += sprintf(outp, "Weighted cores: %016llX\n", p->pkg_wtd_core_c0);
793 outp += sprintf(outp, "Any cores: %016llX\n", p->pkg_any_core_c0);
794 outp += sprintf(outp, "Any GFX: %016llX\n", p->pkg_any_gfxe_c0);
795 outp += sprintf(outp, "CPU + GFX: %016llX\n", p->pkg_both_core_gfxe_c0);
797 outp += sprintf(outp, "pc2: %016llX\n", p->pc2);
798 if (DO_BIC(BIC_Pkgpc3))
799 outp += sprintf(outp, "pc3: %016llX\n", p->pc3);
800 if (DO_BIC(BIC_Pkgpc6))
801 outp += sprintf(outp, "pc6: %016llX\n", p->pc6);
802 if (DO_BIC(BIC_Pkgpc7))
803 outp += sprintf(outp, "pc7: %016llX\n", p->pc7);
804 outp += sprintf(outp, "pc8: %016llX\n", p->pc8);
805 outp += sprintf(outp, "pc9: %016llX\n", p->pc9);
806 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
807 outp += sprintf(outp, "pc10: %016llX\n", p->pc10);
808 outp += sprintf(outp, "cpu_lpi: %016llX\n", p->cpu_lpi);
809 outp += sprintf(outp, "sys_lpi: %016llX\n", p->sys_lpi);
810 outp += sprintf(outp, "Joules PKG: %0X\n", p->energy_pkg);
811 outp += sprintf(outp, "Joules COR: %0X\n", p->energy_cores);
812 outp += sprintf(outp, "Joules GFX: %0X\n", p->energy_gfx);
813 outp += sprintf(outp, "Joules RAM: %0X\n", p->energy_dram);
814 outp += sprintf(outp, "Throttle PKG: %0X\n",
815 p->rapl_pkg_perf_status);
816 outp += sprintf(outp, "Throttle RAM: %0X\n",
817 p->rapl_dram_perf_status);
818 outp += sprintf(outp, "PTM: %dC\n", p->pkg_temp_c);
820 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
821 outp += sprintf(outp, "pADDED [%d] msr0x%x: %08llX\n",
822 i, mp->msr_num, p->counter[i]);
826 outp += sprintf(outp, "\n");
832 * column formatting convention & formats
834 int format_counters(struct thread_data *t, struct core_data *c,
837 double interval_float, tsc;
840 struct msr_counter *mp;
844 /* if showing only 1st thread in core and this isn't one, bail out */
845 if (show_core_only && !(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
848 /* if showing only 1st thread in pkg and this isn't one, bail out */
849 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
852 /*if not summary line and --cpu is used */
853 if ((t != &average.threads) &&
854 (cpu_subset && !CPU_ISSET_S(t->cpu_id, cpu_subset_size, cpu_subset)))
857 if (DO_BIC(BIC_USEC)) {
858 /* on each row, print how many usec each timestamp took to gather */
861 timersub(&t->tv_end, &t->tv_begin, &tv);
862 outp += sprintf(outp, "%5ld\t", tv.tv_sec * 1000000 + tv.tv_usec);
865 /* Time_Of_Day_Seconds: on each row, print sec.usec last timestamp taken */
867 outp += sprintf(outp, "%10ld.%06ld\t", t->tv_end.tv_sec, t->tv_end.tv_usec);
869 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
871 tsc = t->tsc * tsc_tweak;
873 /* topo columns, print blanks on 1st (average) line */
874 if (t == &average.threads) {
875 if (DO_BIC(BIC_Package))
876 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
877 if (DO_BIC(BIC_Node))
878 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
879 if (DO_BIC(BIC_Core))
880 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
882 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
884 if (DO_BIC(BIC_Package)) {
886 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->package_id);
888 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
890 if (DO_BIC(BIC_Node)) {
892 outp += sprintf(outp, "%s%d",
893 (printed++ ? delim : ""),
894 cpus[t->cpu_id].physical_node_id);
896 outp += sprintf(outp, "%s-",
897 (printed++ ? delim : ""));
899 if (DO_BIC(BIC_Core)) {
901 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_id);
903 outp += sprintf(outp, "%s-", (printed++ ? delim : ""));
906 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->cpu_id);
909 if (DO_BIC(BIC_Avg_MHz))
910 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
911 1.0 / units * t->aperf / interval_float);
913 if (DO_BIC(BIC_Busy))
914 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->mperf/tsc);
916 if (DO_BIC(BIC_Bzy_MHz)) {
918 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), base_hz / units * t->aperf / t->mperf);
920 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""),
921 tsc / units * t->aperf / t->mperf / interval_float);
924 if (DO_BIC(BIC_TSC_MHz))
925 outp += sprintf(outp, "%s%.0f", (printed++ ? delim : ""), 1.0 * t->tsc/units/interval_float);
928 if (DO_BIC(BIC_IRQ)) {
929 if (sums_need_wide_columns)
930 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->irq_count);
932 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->irq_count);
937 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), t->smi_count);
940 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
941 if (mp->format == FORMAT_RAW) {
943 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) t->counter[i]);
945 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), t->counter[i]);
946 } else if (mp->format == FORMAT_DELTA) {
947 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
948 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), t->counter[i]);
950 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), t->counter[i]);
951 } else if (mp->format == FORMAT_PERCENT) {
952 if (mp->type == COUNTER_USEC)
953 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), t->counter[i]/interval_float/10000);
955 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->counter[i]/tsc);
960 if (DO_BIC(BIC_CPU_c1))
961 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * t->c1/tsc);
964 /* print per-core data only for 1st thread in core */
965 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
968 if (DO_BIC(BIC_CPU_c3) && !do_slm_cstates && !do_knl_cstates && !do_cnl_cstates)
969 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c3/tsc);
970 if (DO_BIC(BIC_CPU_c6))
971 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c6/tsc);
972 if (DO_BIC(BIC_CPU_c7))
973 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->c7/tsc);
976 if (DO_BIC(BIC_Mod_c6))
977 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->mc6_us / tsc);
979 if (DO_BIC(BIC_CoreTmp))
980 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), c->core_temp_c);
982 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
983 if (mp->format == FORMAT_RAW) {
985 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) c->counter[i]);
987 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), c->counter[i]);
988 } else if (mp->format == FORMAT_DELTA) {
989 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
990 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), c->counter[i]);
992 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), c->counter[i]);
993 } else if (mp->format == FORMAT_PERCENT) {
994 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * c->counter[i]/tsc);
998 /* print per-package data only for 1st core in package */
999 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1003 if (DO_BIC(BIC_PkgTmp))
1004 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->pkg_temp_c);
1007 if (DO_BIC(BIC_GFX_rc6)) {
1008 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
1009 outp += sprintf(outp, "%s**.**", (printed++ ? delim : ""));
1011 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""),
1012 p->gfx_rc6_ms / 10.0 / interval_float);
1017 if (DO_BIC(BIC_GFXMHz))
1018 outp += sprintf(outp, "%s%d", (printed++ ? delim : ""), p->gfx_mhz);
1020 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
1021 if (DO_BIC(BIC_Totl_c0))
1022 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_wtd_core_c0/tsc);
1023 if (DO_BIC(BIC_Any_c0))
1024 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_core_c0/tsc);
1025 if (DO_BIC(BIC_GFX_c0))
1026 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_any_gfxe_c0/tsc);
1027 if (DO_BIC(BIC_CPUGFX))
1028 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pkg_both_core_gfxe_c0/tsc);
1030 if (DO_BIC(BIC_Pkgpc2))
1031 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc2/tsc);
1032 if (DO_BIC(BIC_Pkgpc3))
1033 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc3/tsc);
1034 if (DO_BIC(BIC_Pkgpc6))
1035 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc6/tsc);
1036 if (DO_BIC(BIC_Pkgpc7))
1037 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc7/tsc);
1038 if (DO_BIC(BIC_Pkgpc8))
1039 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc8/tsc);
1040 if (DO_BIC(BIC_Pkgpc9))
1041 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc9/tsc);
1042 if (DO_BIC(BIC_Pkgpc10))
1043 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->pc10/tsc);
1045 if (DO_BIC(BIC_CPU_LPI))
1046 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->cpu_lpi / 1000000.0 / interval_float);
1047 if (DO_BIC(BIC_SYS_LPI))
1048 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->sys_lpi / 1000000.0 / interval_float);
1051 * If measurement interval exceeds minimum RAPL Joule Counter range,
1052 * indicate that results are suspect by printing "**" in fraction place.
1054 if (interval_float < rapl_joule_counter_range)
1059 if (DO_BIC(BIC_PkgWatt))
1060 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units / interval_float);
1061 if (DO_BIC(BIC_CorWatt))
1062 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units / interval_float);
1063 if (DO_BIC(BIC_GFXWatt))
1064 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units / interval_float);
1065 if (DO_BIC(BIC_RAMWatt))
1066 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units / interval_float);
1067 if (DO_BIC(BIC_Pkg_J))
1068 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_pkg * rapl_energy_units);
1069 if (DO_BIC(BIC_Cor_J))
1070 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_cores * rapl_energy_units);
1071 if (DO_BIC(BIC_GFX_J))
1072 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_gfx * rapl_energy_units);
1073 if (DO_BIC(BIC_RAM_J))
1074 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), p->energy_dram * rapl_dram_energy_units);
1075 if (DO_BIC(BIC_PKG__))
1076 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
1077 if (DO_BIC(BIC_RAM__))
1078 outp += sprintf(outp, fmt8, (printed++ ? delim : ""), 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
1080 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1081 if (mp->format == FORMAT_RAW) {
1082 if (mp->width == 32)
1083 outp += sprintf(outp, "%s0x%08x", (printed++ ? delim : ""), (unsigned int) p->counter[i]);
1085 outp += sprintf(outp, "%s0x%016llx", (printed++ ? delim : ""), p->counter[i]);
1086 } else if (mp->format == FORMAT_DELTA) {
1087 if ((mp->type == COUNTER_ITEMS) && sums_need_wide_columns)
1088 outp += sprintf(outp, "%s%8lld", (printed++ ? delim : ""), p->counter[i]);
1090 outp += sprintf(outp, "%s%lld", (printed++ ? delim : ""), p->counter[i]);
1091 } else if (mp->format == FORMAT_PERCENT) {
1092 outp += sprintf(outp, "%s%.2f", (printed++ ? delim : ""), 100.0 * p->counter[i]/tsc);
1097 if (*(outp - 1) != '\n')
1098 outp += sprintf(outp, "\n");
1103 void flush_output_stdout(void)
1112 fputs(output_buffer, filep);
1115 outp = output_buffer;
1117 void flush_output_stderr(void)
1119 fputs(output_buffer, outf);
1121 outp = output_buffer;
1123 void format_all_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1127 if (!printed || !summary_only)
1130 if (topo.num_cpus > 1)
1131 format_counters(&average.threads, &average.cores,
1139 for_all_cpus(format_counters, t, c, p);
1142 #define DELTA_WRAP32(new, old) \
1146 old = 0x100000000 + new - old; \
1150 delta_package(struct pkg_data *new, struct pkg_data *old)
1153 struct msr_counter *mp;
1156 if (DO_BIC(BIC_Totl_c0))
1157 old->pkg_wtd_core_c0 = new->pkg_wtd_core_c0 - old->pkg_wtd_core_c0;
1158 if (DO_BIC(BIC_Any_c0))
1159 old->pkg_any_core_c0 = new->pkg_any_core_c0 - old->pkg_any_core_c0;
1160 if (DO_BIC(BIC_GFX_c0))
1161 old->pkg_any_gfxe_c0 = new->pkg_any_gfxe_c0 - old->pkg_any_gfxe_c0;
1162 if (DO_BIC(BIC_CPUGFX))
1163 old->pkg_both_core_gfxe_c0 = new->pkg_both_core_gfxe_c0 - old->pkg_both_core_gfxe_c0;
1165 old->pc2 = new->pc2 - old->pc2;
1166 if (DO_BIC(BIC_Pkgpc3))
1167 old->pc3 = new->pc3 - old->pc3;
1168 if (DO_BIC(BIC_Pkgpc6))
1169 old->pc6 = new->pc6 - old->pc6;
1170 if (DO_BIC(BIC_Pkgpc7))
1171 old->pc7 = new->pc7 - old->pc7;
1172 old->pc8 = new->pc8 - old->pc8;
1173 old->pc9 = new->pc9 - old->pc9;
1174 old->pc10 = new->pc10 - old->pc10;
1175 old->cpu_lpi = new->cpu_lpi - old->cpu_lpi;
1176 old->sys_lpi = new->sys_lpi - old->sys_lpi;
1177 old->pkg_temp_c = new->pkg_temp_c;
1179 /* flag an error when rc6 counter resets/wraps */
1180 if (old->gfx_rc6_ms > new->gfx_rc6_ms)
1181 old->gfx_rc6_ms = -1;
1183 old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
1185 old->gfx_mhz = new->gfx_mhz;
1187 DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
1188 DELTA_WRAP32(new->energy_cores, old->energy_cores);
1189 DELTA_WRAP32(new->energy_gfx, old->energy_gfx);
1190 DELTA_WRAP32(new->energy_dram, old->energy_dram);
1191 DELTA_WRAP32(new->rapl_pkg_perf_status, old->rapl_pkg_perf_status);
1192 DELTA_WRAP32(new->rapl_dram_perf_status, old->rapl_dram_perf_status);
1194 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1195 if (mp->format == FORMAT_RAW)
1196 old->counter[i] = new->counter[i];
1198 old->counter[i] = new->counter[i] - old->counter[i];
1205 delta_core(struct core_data *new, struct core_data *old)
1208 struct msr_counter *mp;
1210 old->c3 = new->c3 - old->c3;
1211 old->c6 = new->c6 - old->c6;
1212 old->c7 = new->c7 - old->c7;
1213 old->core_temp_c = new->core_temp_c;
1214 old->mc6_us = new->mc6_us - old->mc6_us;
1216 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1217 if (mp->format == FORMAT_RAW)
1218 old->counter[i] = new->counter[i];
1220 old->counter[i] = new->counter[i] - old->counter[i];
1228 delta_thread(struct thread_data *new, struct thread_data *old,
1229 struct core_data *core_delta)
1232 struct msr_counter *mp;
1235 * the timestamps from start of measurement interval are in "old"
1236 * the timestamp from end of measurement interval are in "new"
1237 * over-write old w/ new so we can print end of interval values
1240 old->tv_begin = new->tv_begin;
1241 old->tv_end = new->tv_end;
1243 old->tsc = new->tsc - old->tsc;
1245 /* check for TSC < 1 Mcycles over interval */
1246 if (old->tsc < (1000 * 1000))
1247 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1248 "You can disable all c-states by booting with \"idle=poll\"\n"
1249 "or just the deep ones with \"processor.max_cstate=1\"");
1251 old->c1 = new->c1 - old->c1;
1253 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1254 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1255 old->aperf = new->aperf - old->aperf;
1256 old->mperf = new->mperf - old->mperf;
1263 if (use_c1_residency_msr) {
1265 * Some models have a dedicated C1 residency MSR,
1266 * which should be more accurate than the derivation below.
1270 * As counter collection is not atomic,
1271 * it is possible for mperf's non-halted cycles + idle states
1272 * to exceed TSC's all cycles: show c1 = 0% in that case.
1274 if ((old->mperf + core_delta->c3 + core_delta->c6 + core_delta->c7) > (old->tsc * tsc_tweak))
1277 /* normal case, derive c1 */
1278 old->c1 = (old->tsc * tsc_tweak) - old->mperf - core_delta->c3
1279 - core_delta->c6 - core_delta->c7;
1283 if (old->mperf == 0) {
1285 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
1286 old->mperf = 1; /* divide by 0 protection */
1289 if (DO_BIC(BIC_IRQ))
1290 old->irq_count = new->irq_count - old->irq_count;
1292 if (DO_BIC(BIC_SMI))
1293 old->smi_count = new->smi_count - old->smi_count;
1295 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1296 if (mp->format == FORMAT_RAW)
1297 old->counter[i] = new->counter[i];
1299 old->counter[i] = new->counter[i] - old->counter[i];
1304 int delta_cpu(struct thread_data *t, struct core_data *c,
1305 struct pkg_data *p, struct thread_data *t2,
1306 struct core_data *c2, struct pkg_data *p2)
1310 /* calculate core delta only for 1st thread in core */
1311 if (t->flags & CPU_IS_FIRST_THREAD_IN_CORE)
1314 /* always calculate thread delta */
1315 retval = delta_thread(t, t2, c2); /* c2 is core delta */
1319 /* calculate package delta only for 1st core in package */
1320 if (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)
1321 retval = delta_package(p, p2);
1326 void clear_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1329 struct msr_counter *mp;
1331 t->tv_begin.tv_sec = 0;
1332 t->tv_begin.tv_usec = 0;
1333 t->tv_end.tv_sec = 0;
1334 t->tv_end.tv_usec = 0;
1344 /* tells format_counters to dump all fields from this set */
1345 t->flags = CPU_IS_FIRST_THREAD_IN_CORE | CPU_IS_FIRST_CORE_IN_PACKAGE;
1353 p->pkg_wtd_core_c0 = 0;
1354 p->pkg_any_core_c0 = 0;
1355 p->pkg_any_gfxe_c0 = 0;
1356 p->pkg_both_core_gfxe_c0 = 0;
1359 if (DO_BIC(BIC_Pkgpc3))
1361 if (DO_BIC(BIC_Pkgpc6))
1363 if (DO_BIC(BIC_Pkgpc7))
1373 p->energy_cores = 0;
1375 p->rapl_pkg_perf_status = 0;
1376 p->rapl_dram_perf_status = 0;
1381 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next)
1384 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next)
1387 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next)
1390 int sum_counters(struct thread_data *t, struct core_data *c,
1394 struct msr_counter *mp;
1396 /* remember first tv_begin */
1397 if (average.threads.tv_begin.tv_sec == 0)
1398 average.threads.tv_begin = t->tv_begin;
1400 /* remember last tv_end */
1401 average.threads.tv_end = t->tv_end;
1403 average.threads.tsc += t->tsc;
1404 average.threads.aperf += t->aperf;
1405 average.threads.mperf += t->mperf;
1406 average.threads.c1 += t->c1;
1408 average.threads.irq_count += t->irq_count;
1409 average.threads.smi_count += t->smi_count;
1411 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1412 if (mp->format == FORMAT_RAW)
1414 average.threads.counter[i] += t->counter[i];
1417 /* sum per-core values only for 1st thread in core */
1418 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1421 average.cores.c3 += c->c3;
1422 average.cores.c6 += c->c6;
1423 average.cores.c7 += c->c7;
1424 average.cores.mc6_us += c->mc6_us;
1426 average.cores.core_temp_c = MAX(average.cores.core_temp_c, c->core_temp_c);
1428 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1429 if (mp->format == FORMAT_RAW)
1431 average.cores.counter[i] += c->counter[i];
1434 /* sum per-pkg values only for 1st core in pkg */
1435 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1438 if (DO_BIC(BIC_Totl_c0))
1439 average.packages.pkg_wtd_core_c0 += p->pkg_wtd_core_c0;
1440 if (DO_BIC(BIC_Any_c0))
1441 average.packages.pkg_any_core_c0 += p->pkg_any_core_c0;
1442 if (DO_BIC(BIC_GFX_c0))
1443 average.packages.pkg_any_gfxe_c0 += p->pkg_any_gfxe_c0;
1444 if (DO_BIC(BIC_CPUGFX))
1445 average.packages.pkg_both_core_gfxe_c0 += p->pkg_both_core_gfxe_c0;
1447 average.packages.pc2 += p->pc2;
1448 if (DO_BIC(BIC_Pkgpc3))
1449 average.packages.pc3 += p->pc3;
1450 if (DO_BIC(BIC_Pkgpc6))
1451 average.packages.pc6 += p->pc6;
1452 if (DO_BIC(BIC_Pkgpc7))
1453 average.packages.pc7 += p->pc7;
1454 average.packages.pc8 += p->pc8;
1455 average.packages.pc9 += p->pc9;
1456 average.packages.pc10 += p->pc10;
1458 average.packages.cpu_lpi = p->cpu_lpi;
1459 average.packages.sys_lpi = p->sys_lpi;
1461 average.packages.energy_pkg += p->energy_pkg;
1462 average.packages.energy_dram += p->energy_dram;
1463 average.packages.energy_cores += p->energy_cores;
1464 average.packages.energy_gfx += p->energy_gfx;
1466 average.packages.gfx_rc6_ms = p->gfx_rc6_ms;
1467 average.packages.gfx_mhz = p->gfx_mhz;
1469 average.packages.pkg_temp_c = MAX(average.packages.pkg_temp_c, p->pkg_temp_c);
1471 average.packages.rapl_pkg_perf_status += p->rapl_pkg_perf_status;
1472 average.packages.rapl_dram_perf_status += p->rapl_dram_perf_status;
1474 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1475 if (mp->format == FORMAT_RAW)
1477 average.packages.counter[i] += p->counter[i];
1482 * sum the counters for all cpus in the system
1483 * compute the weighted average
1485 void compute_average(struct thread_data *t, struct core_data *c,
1489 struct msr_counter *mp;
1491 clear_counters(&average.threads, &average.cores, &average.packages);
1493 for_all_cpus(sum_counters, t, c, p);
1495 average.threads.tsc /= topo.num_cpus;
1496 average.threads.aperf /= topo.num_cpus;
1497 average.threads.mperf /= topo.num_cpus;
1498 average.threads.c1 /= topo.num_cpus;
1500 if (average.threads.irq_count > 9999999)
1501 sums_need_wide_columns = 1;
1503 average.cores.c3 /= topo.num_cores;
1504 average.cores.c6 /= topo.num_cores;
1505 average.cores.c7 /= topo.num_cores;
1506 average.cores.mc6_us /= topo.num_cores;
1508 if (DO_BIC(BIC_Totl_c0))
1509 average.packages.pkg_wtd_core_c0 /= topo.num_packages;
1510 if (DO_BIC(BIC_Any_c0))
1511 average.packages.pkg_any_core_c0 /= topo.num_packages;
1512 if (DO_BIC(BIC_GFX_c0))
1513 average.packages.pkg_any_gfxe_c0 /= topo.num_packages;
1514 if (DO_BIC(BIC_CPUGFX))
1515 average.packages.pkg_both_core_gfxe_c0 /= topo.num_packages;
1517 average.packages.pc2 /= topo.num_packages;
1518 if (DO_BIC(BIC_Pkgpc3))
1519 average.packages.pc3 /= topo.num_packages;
1520 if (DO_BIC(BIC_Pkgpc6))
1521 average.packages.pc6 /= topo.num_packages;
1522 if (DO_BIC(BIC_Pkgpc7))
1523 average.packages.pc7 /= topo.num_packages;
1525 average.packages.pc8 /= topo.num_packages;
1526 average.packages.pc9 /= topo.num_packages;
1527 average.packages.pc10 /= topo.num_packages;
1529 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1530 if (mp->format == FORMAT_RAW)
1532 if (mp->type == COUNTER_ITEMS) {
1533 if (average.threads.counter[i] > 9999999)
1534 sums_need_wide_columns = 1;
1537 average.threads.counter[i] /= topo.num_cpus;
1539 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1540 if (mp->format == FORMAT_RAW)
1542 if (mp->type == COUNTER_ITEMS) {
1543 if (average.cores.counter[i] > 9999999)
1544 sums_need_wide_columns = 1;
1546 average.cores.counter[i] /= topo.num_cores;
1548 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1549 if (mp->format == FORMAT_RAW)
1551 if (mp->type == COUNTER_ITEMS) {
1552 if (average.packages.counter[i] > 9999999)
1553 sums_need_wide_columns = 1;
1555 average.packages.counter[i] /= topo.num_packages;
1559 static unsigned long long rdtsc(void)
1561 unsigned int low, high;
1563 asm volatile("rdtsc" : "=a" (low), "=d" (high));
1565 return low | ((unsigned long long)high) << 32;
1569 * Open a file, and exit on failure
1571 FILE *fopen_or_die(const char *path, const char *mode)
1573 FILE *filep = fopen(path, mode);
1576 err(1, "%s: open failed", path);
1580 * snapshot_sysfs_counter()
1582 * return snapshot of given counter
1584 unsigned long long snapshot_sysfs_counter(char *path)
1588 unsigned long long counter;
1590 fp = fopen_or_die(path, "r");
1592 retval = fscanf(fp, "%lld", &counter);
1594 err(1, "snapshot_sysfs_counter(%s)", path);
1601 int get_mp(int cpu, struct msr_counter *mp, unsigned long long *counterp)
1603 if (mp->msr_num != 0) {
1604 if (get_msr(cpu, mp->msr_num, counterp))
1607 char path[128 + PATH_BYTES];
1609 if (mp->flags & SYSFS_PERCPU) {
1610 sprintf(path, "/sys/devices/system/cpu/cpu%d/%s",
1613 *counterp = snapshot_sysfs_counter(path);
1615 *counterp = snapshot_sysfs_counter(mp->path);
1625 * acquire and record local counters for that cpu
1627 int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
1629 int cpu = t->cpu_id;
1630 unsigned long long msr;
1631 int aperf_mperf_retry_count = 0;
1632 struct msr_counter *mp;
1636 gettimeofday(&t->tv_begin, (struct timezone *)NULL);
1638 if (cpu_migrate(cpu)) {
1639 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
1644 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1646 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1647 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1650 * The TSC, APERF and MPERF must be read together for
1651 * APERF/MPERF and MPERF/TSC to give accurate results.
1653 * Unfortunately, APERF and MPERF are read by
1654 * individual system call, so delays may occur
1655 * between them. If the time to read them
1656 * varies by a large amount, we re-read them.
1660 * This initial dummy APERF read has been seen to
1661 * reduce jitter in the subsequent reads.
1664 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1667 t->tsc = rdtsc(); /* re-read close to APERF */
1669 tsc_before = t->tsc;
1671 if (get_msr(cpu, MSR_IA32_APERF, &t->aperf))
1674 tsc_between = rdtsc();
1676 if (get_msr(cpu, MSR_IA32_MPERF, &t->mperf))
1679 tsc_after = rdtsc();
1681 aperf_time = tsc_between - tsc_before;
1682 mperf_time = tsc_after - tsc_between;
1685 * If the system call latency to read APERF and MPERF
1686 * differ by more than 2x, then try again.
1688 if ((aperf_time > (2 * mperf_time)) || (mperf_time > (2 * aperf_time))) {
1689 aperf_mperf_retry_count++;
1690 if (aperf_mperf_retry_count < 5)
1693 warnx("cpu%d jitter %lld %lld",
1694 cpu, aperf_time, mperf_time);
1696 aperf_mperf_retry_count = 0;
1698 t->aperf = t->aperf * aperf_mperf_multiplier;
1699 t->mperf = t->mperf * aperf_mperf_multiplier;
1702 if (DO_BIC(BIC_IRQ))
1703 t->irq_count = irqs_per_cpu[cpu];
1704 if (DO_BIC(BIC_SMI)) {
1705 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1707 t->smi_count = msr & 0xFFFFFFFF;
1709 if (DO_BIC(BIC_CPU_c1) && use_c1_residency_msr) {
1710 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1714 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1715 if (get_mp(cpu, mp, &t->counter[i]))
1719 /* collect core counters only for 1st thread in core */
1720 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1723 if (DO_BIC(BIC_CPU_c3) && !do_slm_cstates && !do_knl_cstates && !do_cnl_cstates) {
1724 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1728 if (DO_BIC(BIC_CPU_c6) && !do_knl_cstates) {
1729 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1731 } else if (do_knl_cstates) {
1732 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1736 if (DO_BIC(BIC_CPU_c7))
1737 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1740 if (DO_BIC(BIC_Mod_c6))
1741 if (get_msr(cpu, MSR_MODULE_C6_RES_MS, &c->mc6_us))
1744 if (DO_BIC(BIC_CoreTmp)) {
1745 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1747 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1750 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1751 if (get_mp(cpu, mp, &c->counter[i]))
1755 /* collect package counters only for 1st core in package */
1756 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
1759 if (DO_BIC(BIC_Totl_c0)) {
1760 if (get_msr(cpu, MSR_PKG_WEIGHTED_CORE_C0_RES, &p->pkg_wtd_core_c0))
1763 if (DO_BIC(BIC_Any_c0)) {
1764 if (get_msr(cpu, MSR_PKG_ANY_CORE_C0_RES, &p->pkg_any_core_c0))
1767 if (DO_BIC(BIC_GFX_c0)) {
1768 if (get_msr(cpu, MSR_PKG_ANY_GFXE_C0_RES, &p->pkg_any_gfxe_c0))
1771 if (DO_BIC(BIC_CPUGFX)) {
1772 if (get_msr(cpu, MSR_PKG_BOTH_CORE_GFXE_C0_RES, &p->pkg_both_core_gfxe_c0))
1775 if (DO_BIC(BIC_Pkgpc3))
1776 if (get_msr(cpu, MSR_PKG_C3_RESIDENCY, &p->pc3))
1778 if (DO_BIC(BIC_Pkgpc6)) {
1779 if (do_slm_cstates) {
1780 if (get_msr(cpu, MSR_ATOM_PKG_C6_RESIDENCY, &p->pc6))
1783 if (get_msr(cpu, MSR_PKG_C6_RESIDENCY, &p->pc6))
1788 if (DO_BIC(BIC_Pkgpc2))
1789 if (get_msr(cpu, MSR_PKG_C2_RESIDENCY, &p->pc2))
1791 if (DO_BIC(BIC_Pkgpc7))
1792 if (get_msr(cpu, MSR_PKG_C7_RESIDENCY, &p->pc7))
1794 if (DO_BIC(BIC_Pkgpc8))
1795 if (get_msr(cpu, MSR_PKG_C8_RESIDENCY, &p->pc8))
1797 if (DO_BIC(BIC_Pkgpc9))
1798 if (get_msr(cpu, MSR_PKG_C9_RESIDENCY, &p->pc9))
1800 if (DO_BIC(BIC_Pkgpc10))
1801 if (get_msr(cpu, MSR_PKG_C10_RESIDENCY, &p->pc10))
1804 if (DO_BIC(BIC_CPU_LPI))
1805 p->cpu_lpi = cpuidle_cur_cpu_lpi_us;
1806 if (DO_BIC(BIC_SYS_LPI))
1807 p->sys_lpi = cpuidle_cur_sys_lpi_us;
1809 if (do_rapl & RAPL_PKG) {
1810 if (get_msr(cpu, MSR_PKG_ENERGY_STATUS, &msr))
1812 p->energy_pkg = msr & 0xFFFFFFFF;
1814 if (do_rapl & RAPL_CORES_ENERGY_STATUS) {
1815 if (get_msr(cpu, MSR_PP0_ENERGY_STATUS, &msr))
1817 p->energy_cores = msr & 0xFFFFFFFF;
1819 if (do_rapl & RAPL_DRAM) {
1820 if (get_msr(cpu, MSR_DRAM_ENERGY_STATUS, &msr))
1822 p->energy_dram = msr & 0xFFFFFFFF;
1824 if (do_rapl & RAPL_GFX) {
1825 if (get_msr(cpu, MSR_PP1_ENERGY_STATUS, &msr))
1827 p->energy_gfx = msr & 0xFFFFFFFF;
1829 if (do_rapl & RAPL_PKG_PERF_STATUS) {
1830 if (get_msr(cpu, MSR_PKG_PERF_STATUS, &msr))
1832 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1834 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1835 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1837 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1839 if (DO_BIC(BIC_PkgTmp)) {
1840 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1842 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1845 if (DO_BIC(BIC_GFX_rc6))
1846 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1848 if (DO_BIC(BIC_GFXMHz))
1849 p->gfx_mhz = gfx_cur_mhz;
1851 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1852 if (get_mp(cpu, mp, &p->counter[i]))
1856 gettimeofday(&t->tv_end, (struct timezone *)NULL);
1862 * MSR_PKG_CST_CONFIG_CONTROL decoding for pkg_cstate_limit:
1863 * If you change the values, note they are used both in comparisons
1864 * (>= PCL__7) and to index pkg_cstate_limit_strings[].
1867 #define PCLUKN 0 /* Unknown */
1868 #define PCLRSV 1 /* Reserved */
1869 #define PCL__0 2 /* PC0 */
1870 #define PCL__1 3 /* PC1 */
1871 #define PCL__2 4 /* PC2 */
1872 #define PCL__3 5 /* PC3 */
1873 #define PCL__4 6 /* PC4 */
1874 #define PCL__6 7 /* PC6 */
1875 #define PCL_6N 8 /* PC6 No Retention */
1876 #define PCL_6R 9 /* PC6 Retention */
1877 #define PCL__7 10 /* PC7 */
1878 #define PCL_7S 11 /* PC7 Shrink */
1879 #define PCL__8 12 /* PC8 */
1880 #define PCL__9 13 /* PC9 */
1881 #define PCLUNL 14 /* Unlimited */
1883 int pkg_cstate_limit = PCLUKN;
1884 char *pkg_cstate_limit_strings[] = { "reserved", "unknown", "pc0", "pc1", "pc2",
1885 "pc3", "pc4", "pc6", "pc6n", "pc6r", "pc7", "pc7s", "pc8", "pc9", "unlimited"};
1887 int nhm_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__3, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1888 int snb_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCL__7, PCL_7S, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1889 int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S, PCL__8, PCL__9, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1890 int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7};
1891 int amt_pkg_cstate_limits[16] = {PCLUNL, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1892 int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1893 int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1894 int skx_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
1898 calculate_tsc_tweak()
1900 tsc_tweak = base_hz / tsc_hz;
1904 dump_nhm_platform_info(void)
1906 unsigned long long msr;
1909 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
1911 fprintf(outf, "cpu%d: MSR_PLATFORM_INFO: 0x%08llx\n", base_cpu, msr);
1913 ratio = (msr >> 40) & 0xFF;
1914 fprintf(outf, "%d * %.1f = %.1f MHz max efficiency frequency\n",
1915 ratio, bclk, ratio * bclk);
1917 ratio = (msr >> 8) & 0xFF;
1918 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
1919 ratio, bclk, ratio * bclk);
1921 get_msr(base_cpu, MSR_IA32_POWER_CTL, &msr);
1922 fprintf(outf, "cpu%d: MSR_IA32_POWER_CTL: 0x%08llx (C1E auto-promotion: %sabled)\n",
1923 base_cpu, msr, msr & 0x2 ? "EN" : "DIS");
1929 dump_hsw_turbo_ratio_limits(void)
1931 unsigned long long msr;
1934 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT2, &msr);
1936 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT2: 0x%08llx\n", base_cpu, msr);
1938 ratio = (msr >> 8) & 0xFF;
1940 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 18 active cores\n",
1941 ratio, bclk, ratio * bclk);
1943 ratio = (msr >> 0) & 0xFF;
1945 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 17 active cores\n",
1946 ratio, bclk, ratio * bclk);
1951 dump_ivt_turbo_ratio_limits(void)
1953 unsigned long long msr;
1956 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &msr);
1958 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, msr);
1960 ratio = (msr >> 56) & 0xFF;
1962 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 16 active cores\n",
1963 ratio, bclk, ratio * bclk);
1965 ratio = (msr >> 48) & 0xFF;
1967 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 15 active cores\n",
1968 ratio, bclk, ratio * bclk);
1970 ratio = (msr >> 40) & 0xFF;
1972 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 14 active cores\n",
1973 ratio, bclk, ratio * bclk);
1975 ratio = (msr >> 32) & 0xFF;
1977 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 13 active cores\n",
1978 ratio, bclk, ratio * bclk);
1980 ratio = (msr >> 24) & 0xFF;
1982 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 12 active cores\n",
1983 ratio, bclk, ratio * bclk);
1985 ratio = (msr >> 16) & 0xFF;
1987 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 11 active cores\n",
1988 ratio, bclk, ratio * bclk);
1990 ratio = (msr >> 8) & 0xFF;
1992 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 10 active cores\n",
1993 ratio, bclk, ratio * bclk);
1995 ratio = (msr >> 0) & 0xFF;
1997 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 9 active cores\n",
1998 ratio, bclk, ratio * bclk);
2001 int has_turbo_ratio_group_limits(int family, int model)
2008 case INTEL_FAM6_ATOM_GOLDMONT:
2009 case INTEL_FAM6_SKYLAKE_X:
2010 case INTEL_FAM6_ATOM_DENVERTON:
2017 dump_turbo_ratio_limits(int family, int model)
2019 unsigned long long msr, core_counts;
2020 unsigned int ratio, group_size;
2022 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2023 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n", base_cpu, msr);
2025 if (has_turbo_ratio_group_limits(family, model)) {
2026 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT1, &core_counts);
2027 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT1: 0x%08llx\n", base_cpu, core_counts);
2029 core_counts = 0x0807060504030201;
2032 ratio = (msr >> 56) & 0xFF;
2033 group_size = (core_counts >> 56) & 0xFF;
2035 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2036 ratio, bclk, ratio * bclk, group_size);
2038 ratio = (msr >> 48) & 0xFF;
2039 group_size = (core_counts >> 48) & 0xFF;
2041 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2042 ratio, bclk, ratio * bclk, group_size);
2044 ratio = (msr >> 40) & 0xFF;
2045 group_size = (core_counts >> 40) & 0xFF;
2047 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2048 ratio, bclk, ratio * bclk, group_size);
2050 ratio = (msr >> 32) & 0xFF;
2051 group_size = (core_counts >> 32) & 0xFF;
2053 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2054 ratio, bclk, ratio * bclk, group_size);
2056 ratio = (msr >> 24) & 0xFF;
2057 group_size = (core_counts >> 24) & 0xFF;
2059 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2060 ratio, bclk, ratio * bclk, group_size);
2062 ratio = (msr >> 16) & 0xFF;
2063 group_size = (core_counts >> 16) & 0xFF;
2065 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2066 ratio, bclk, ratio * bclk, group_size);
2068 ratio = (msr >> 8) & 0xFF;
2069 group_size = (core_counts >> 8) & 0xFF;
2071 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2072 ratio, bclk, ratio * bclk, group_size);
2074 ratio = (msr >> 0) & 0xFF;
2075 group_size = (core_counts >> 0) & 0xFF;
2077 fprintf(outf, "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2078 ratio, bclk, ratio * bclk, group_size);
2083 dump_atom_turbo_ratio_limits(void)
2085 unsigned long long msr;
2088 get_msr(base_cpu, MSR_ATOM_CORE_RATIOS, &msr);
2089 fprintf(outf, "cpu%d: MSR_ATOM_CORE_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2091 ratio = (msr >> 0) & 0x3F;
2093 fprintf(outf, "%d * %.1f = %.1f MHz minimum operating frequency\n",
2094 ratio, bclk, ratio * bclk);
2096 ratio = (msr >> 8) & 0x3F;
2098 fprintf(outf, "%d * %.1f = %.1f MHz low frequency mode (LFM)\n",
2099 ratio, bclk, ratio * bclk);
2101 ratio = (msr >> 16) & 0x3F;
2103 fprintf(outf, "%d * %.1f = %.1f MHz base frequency\n",
2104 ratio, bclk, ratio * bclk);
2106 get_msr(base_cpu, MSR_ATOM_CORE_TURBO_RATIOS, &msr);
2107 fprintf(outf, "cpu%d: MSR_ATOM_CORE_TURBO_RATIOS: 0x%08llx\n", base_cpu, msr & 0xFFFFFFFF);
2109 ratio = (msr >> 24) & 0x3F;
2111 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 4 active cores\n",
2112 ratio, bclk, ratio * bclk);
2114 ratio = (msr >> 16) & 0x3F;
2116 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 3 active cores\n",
2117 ratio, bclk, ratio * bclk);
2119 ratio = (msr >> 8) & 0x3F;
2121 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 2 active cores\n",
2122 ratio, bclk, ratio * bclk);
2124 ratio = (msr >> 0) & 0x3F;
2126 fprintf(outf, "%d * %.1f = %.1f MHz max turbo 1 active core\n",
2127 ratio, bclk, ratio * bclk);
2131 dump_knl_turbo_ratio_limits(void)
2133 const unsigned int buckets_no = 7;
2135 unsigned long long msr;
2136 int delta_cores, delta_ratio;
2138 unsigned int cores[buckets_no];
2139 unsigned int ratio[buckets_no];
2141 get_msr(base_cpu, MSR_TURBO_RATIO_LIMIT, &msr);
2143 fprintf(outf, "cpu%d: MSR_TURBO_RATIO_LIMIT: 0x%08llx\n",
2147 * Turbo encoding in KNL is as follows:
2149 * [7:1] -- Base value of number of active cores of bucket 1.
2150 * [15:8] -- Base value of freq ratio of bucket 1.
2151 * [20:16] -- +ve delta of number of active cores of bucket 2.
2152 * i.e. active cores of bucket 2 =
2153 * active cores of bucket 1 + delta
2154 * [23:21] -- Negative delta of freq ratio of bucket 2.
2155 * i.e. freq ratio of bucket 2 =
2156 * freq ratio of bucket 1 - delta
2157 * [28:24]-- +ve delta of number of active cores of bucket 3.
2158 * [31:29]-- -ve delta of freq ratio of bucket 3.
2159 * [36:32]-- +ve delta of number of active cores of bucket 4.
2160 * [39:37]-- -ve delta of freq ratio of bucket 4.
2161 * [44:40]-- +ve delta of number of active cores of bucket 5.
2162 * [47:45]-- -ve delta of freq ratio of bucket 5.
2163 * [52:48]-- +ve delta of number of active cores of bucket 6.
2164 * [55:53]-- -ve delta of freq ratio of bucket 6.
2165 * [60:56]-- +ve delta of number of active cores of bucket 7.
2166 * [63:61]-- -ve delta of freq ratio of bucket 7.
2170 cores[b_nr] = (msr & 0xFF) >> 1;
2171 ratio[b_nr] = (msr >> 8) & 0xFF;
2173 for (i = 16; i < 64; i += 8) {
2174 delta_cores = (msr >> i) & 0x1F;
2175 delta_ratio = (msr >> (i + 5)) & 0x7;
2177 cores[b_nr + 1] = cores[b_nr] + delta_cores;
2178 ratio[b_nr + 1] = ratio[b_nr] - delta_ratio;
2182 for (i = buckets_no - 1; i >= 0; i--)
2183 if (i > 0 ? ratio[i] != ratio[i - 1] : 1)
2185 "%d * %.1f = %.1f MHz max turbo %d active cores\n",
2186 ratio[i], bclk, ratio[i] * bclk, cores[i]);
2190 dump_nhm_cst_cfg(void)
2192 unsigned long long msr;
2194 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
2196 fprintf(outf, "cpu%d: MSR_PKG_CST_CONFIG_CONTROL: 0x%08llx", base_cpu, msr);
2198 fprintf(outf, " (%s%s%s%s%slocked, pkg-cstate-limit=%d (%s)",
2199 (msr & SNB_C3_AUTO_UNDEMOTE) ? "UNdemote-C3, " : "",
2200 (msr & SNB_C1_AUTO_UNDEMOTE) ? "UNdemote-C1, " : "",
2201 (msr & NHM_C3_AUTO_DEMOTE) ? "demote-C3, " : "",
2202 (msr & NHM_C1_AUTO_DEMOTE) ? "demote-C1, " : "",
2203 (msr & (1 << 15)) ? "" : "UN",
2204 (unsigned int)msr & 0xF,
2205 pkg_cstate_limit_strings[pkg_cstate_limit]);
2207 #define AUTOMATIC_CSTATE_CONVERSION (1UL << 16)
2208 if (has_automatic_cstate_conversion) {
2209 fprintf(outf, ", automatic c-state conversion=%s",
2210 (msr & AUTOMATIC_CSTATE_CONVERSION) ? "on" : "off");
2213 fprintf(outf, ")\n");
2219 dump_config_tdp(void)
2221 unsigned long long msr;
2223 get_msr(base_cpu, MSR_CONFIG_TDP_NOMINAL, &msr);
2224 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_NOMINAL: 0x%08llx", base_cpu, msr);
2225 fprintf(outf, " (base_ratio=%d)\n", (unsigned int)msr & 0xFF);
2227 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_1, &msr);
2228 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_1: 0x%08llx (", base_cpu, msr);
2230 fprintf(outf, "PKG_MIN_PWR_LVL1=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2231 fprintf(outf, "PKG_MAX_PWR_LVL1=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2232 fprintf(outf, "LVL1_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2233 fprintf(outf, "PKG_TDP_LVL1=%d", (unsigned int)(msr) & 0x7FFF);
2235 fprintf(outf, ")\n");
2237 get_msr(base_cpu, MSR_CONFIG_TDP_LEVEL_2, &msr);
2238 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_LEVEL_2: 0x%08llx (", base_cpu, msr);
2240 fprintf(outf, "PKG_MIN_PWR_LVL2=%d ", (unsigned int)(msr >> 48) & 0x7FFF);
2241 fprintf(outf, "PKG_MAX_PWR_LVL2=%d ", (unsigned int)(msr >> 32) & 0x7FFF);
2242 fprintf(outf, "LVL2_RATIO=%d ", (unsigned int)(msr >> 16) & 0xFF);
2243 fprintf(outf, "PKG_TDP_LVL2=%d", (unsigned int)(msr) & 0x7FFF);
2245 fprintf(outf, ")\n");
2247 get_msr(base_cpu, MSR_CONFIG_TDP_CONTROL, &msr);
2248 fprintf(outf, "cpu%d: MSR_CONFIG_TDP_CONTROL: 0x%08llx (", base_cpu, msr);
2250 fprintf(outf, "TDP_LEVEL=%d ", (unsigned int)(msr) & 0x3);
2251 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2252 fprintf(outf, ")\n");
2254 get_msr(base_cpu, MSR_TURBO_ACTIVATION_RATIO, &msr);
2255 fprintf(outf, "cpu%d: MSR_TURBO_ACTIVATION_RATIO: 0x%08llx (", base_cpu, msr);
2256 fprintf(outf, "MAX_NON_TURBO_RATIO=%d", (unsigned int)(msr) & 0xFF);
2257 fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
2258 fprintf(outf, ")\n");
2261 unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
2263 void print_irtl(void)
2265 unsigned long long msr;
2267 get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
2268 fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
2269 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2270 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2272 get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
2273 fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
2274 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2275 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2277 get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
2278 fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
2279 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2280 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2285 get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
2286 fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
2287 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2288 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2290 get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
2291 fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
2292 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2293 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2295 get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
2296 fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
2297 fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
2298 (msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
2301 void free_fd_percpu(void)
2305 for (i = 0; i < topo.max_cpu_num + 1; ++i) {
2306 if (fd_percpu[i] != 0)
2307 close(fd_percpu[i]);
2313 void free_all_buffers(void)
2317 CPU_FREE(cpu_present_set);
2318 cpu_present_set = NULL;
2319 cpu_present_setsize = 0;
2321 CPU_FREE(cpu_affinity_set);
2322 cpu_affinity_set = NULL;
2323 cpu_affinity_setsize = 0;
2331 package_even = NULL;
2341 free(output_buffer);
2342 output_buffer = NULL;
2347 free(irq_column_2_cpu);
2350 for (i = 0; i <= topo.max_cpu_num; ++i) {
2351 if (cpus[i].put_ids)
2352 CPU_FREE(cpus[i].put_ids);
2359 * Parse a file containing a single int.
2361 int parse_int_file(const char *fmt, ...)
2364 char path[PATH_MAX];
2368 va_start(args, fmt);
2369 vsnprintf(path, sizeof(path), fmt, args);
2371 filep = fopen_or_die(path, "r");
2372 if (fscanf(filep, "%d", &value) != 1)
2373 err(1, "%s: failed to parse number from file", path);
2379 * cpu_is_first_core_in_package(cpu)
2380 * return 1 if given CPU is 1st core in package
2382 int cpu_is_first_core_in_package(int cpu)
2384 return cpu == parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_siblings_list", cpu);
2387 int get_physical_package_id(int cpu)
2389 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/physical_package_id", cpu);
2392 int get_core_id(int cpu)
2394 return parse_int_file("/sys/devices/system/cpu/cpu%d/topology/core_id", cpu);
2397 void set_node_data(void)
2403 struct pkg_node_info {
2408 pni = calloc(topo.num_packages, sizeof(struct pkg_node_info));
2410 err(1, "calloc pkg_node_count");
2412 for (pkg = 0; pkg < topo.num_packages; pkg++)
2413 pni[pkg].min = topo.num_cpus;
2415 for (node = 0; node <= topo.max_node_num; node++) {
2416 /* find the "first" cpu in the node */
2417 sprintf(path, "/sys/bus/node/devices/node%d/cpulist", node);
2418 filep = fopen(path, "r");
2421 fscanf(filep, "%d", &cpu);
2424 pkg = cpus[cpu].physical_package_id;
2427 if (node < pni[pkg].min)
2428 pni[pkg].min = node;
2431 for (pkg = 0; pkg < topo.num_packages; pkg++)
2432 if (pni[pkg].count > topo.nodes_per_pkg)
2433 topo.nodes_per_pkg = pni[0].count;
2435 for (cpu = 0; cpu < topo.num_cpus; cpu++) {
2436 pkg = cpus[cpu].physical_package_id;
2437 node = cpus[cpu].physical_node_id;
2438 cpus[cpu].logical_node_id = node - pni[pkg].min;
2444 int get_physical_node_id(struct cpu_topology *thiscpu)
2449 int cpu = thiscpu->logical_cpu_id;
2451 for (i = 0; i <= topo.max_cpu_num; i++) {
2452 sprintf(path, "/sys/devices/system/cpu/cpu%d/node%i/cpulist",
2454 filep = fopen(path, "r");
2463 int get_thread_siblings(struct cpu_topology *thiscpu)
2465 char path[80], character;
2468 int so, shift, sib_core;
2469 int cpu = thiscpu->logical_cpu_id;
2470 int offset = topo.max_cpu_num + 1;
2474 thiscpu->put_ids = CPU_ALLOC((topo.max_cpu_num + 1));
2475 if (thiscpu->thread_id < 0)
2476 thiscpu->thread_id = thread_id++;
2477 if (!thiscpu->put_ids)
2480 size = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
2481 CPU_ZERO_S(size, thiscpu->put_ids);
2484 "/sys/devices/system/cpu/cpu%d/topology/thread_siblings", cpu);
2485 filep = fopen_or_die(path, "r");
2487 offset -= BITMASK_SIZE;
2488 fscanf(filep, "%lx%c", &map, &character);
2489 for (shift = 0; shift < BITMASK_SIZE; shift++) {
2490 if ((map >> shift) & 0x1) {
2491 so = shift + offset;
2492 sib_core = get_core_id(so);
2493 if (sib_core == thiscpu->physical_core_id) {
2494 CPU_SET_S(so, size, thiscpu->put_ids);
2496 (cpus[so].thread_id < 0))
2497 cpus[so].thread_id =
2502 } while (!strncmp(&character, ",", 1));
2505 return CPU_COUNT_S(size, thiscpu->put_ids);
2509 * run func(thread, core, package) in topology order
2510 * skip non-present cpus
2513 int for_all_cpus_2(int (func)(struct thread_data *, struct core_data *,
2514 struct pkg_data *, struct thread_data *, struct core_data *,
2515 struct pkg_data *), struct thread_data *thread_base,
2516 struct core_data *core_base, struct pkg_data *pkg_base,
2517 struct thread_data *thread_base2, struct core_data *core_base2,
2518 struct pkg_data *pkg_base2)
2520 int retval, pkg_no, node_no, core_no, thread_no;
2522 for (pkg_no = 0; pkg_no < topo.num_packages; ++pkg_no) {
2523 for (node_no = 0; node_no < topo.nodes_per_pkg; ++node_no) {
2524 for (core_no = 0; core_no < topo.cores_per_node;
2526 for (thread_no = 0; thread_no <
2527 topo.threads_per_core; ++thread_no) {
2528 struct thread_data *t, *t2;
2529 struct core_data *c, *c2;
2530 struct pkg_data *p, *p2;
2532 t = GET_THREAD(thread_base, thread_no,
2536 if (cpu_is_not_present(t->cpu_id))
2539 t2 = GET_THREAD(thread_base2, thread_no,
2543 c = GET_CORE(core_base, core_no,
2545 c2 = GET_CORE(core_base2, core_no,
2549 p = GET_PKG(pkg_base, pkg_no);
2550 p2 = GET_PKG(pkg_base2, pkg_no);
2552 retval = func(t, c, p, t2, c2, p2);
2563 * run func(cpu) on every cpu in /proc/stat
2564 * return max_cpu number
2566 int for_all_proc_cpus(int (func)(int))
2572 fp = fopen_or_die(proc_stat, "r");
2574 retval = fscanf(fp, "cpu %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n");
2576 err(1, "%s: failed to parse format", proc_stat);
2579 retval = fscanf(fp, "cpu%u %*d %*d %*d %*d %*d %*d %*d %*d %*d %*d\n", &cpu_num);
2583 retval = func(cpu_num);
2593 void re_initialize(void)
2596 setup_all_buffers();
2597 printf("turbostat: re-initialized with num_cpus %d\n", topo.num_cpus);
2600 void set_max_cpu_num(void)
2603 unsigned long dummy;
2605 topo.max_cpu_num = 0;
2606 filep = fopen_or_die(
2607 "/sys/devices/system/cpu/cpu0/topology/thread_siblings",
2609 while (fscanf(filep, "%lx,", &dummy) == 1)
2610 topo.max_cpu_num += BITMASK_SIZE;
2612 topo.max_cpu_num--; /* 0 based */
2617 * remember the last one seen, it will be the max
2619 int count_cpus(int cpu)
2624 int mark_cpu_present(int cpu)
2626 CPU_SET_S(cpu, cpu_present_setsize, cpu_present_set);
2630 int init_thread_id(int cpu)
2632 cpus[cpu].thread_id = -1;
2637 * snapshot_proc_interrupts()
2639 * read and record summary of /proc/interrupts
2641 * return 1 if config change requires a restart, else return 0
2643 int snapshot_proc_interrupts(void)
2649 fp = fopen_or_die("/proc/interrupts", "r");
2653 /* read 1st line of /proc/interrupts to get cpu* name for each column */
2654 for (column = 0; column < topo.num_cpus; ++column) {
2657 retval = fscanf(fp, " CPU%d", &cpu_number);
2661 if (cpu_number > topo.max_cpu_num) {
2662 warn("/proc/interrupts: cpu%d: > %d", cpu_number, topo.max_cpu_num);
2666 irq_column_2_cpu[column] = cpu_number;
2667 irqs_per_cpu[cpu_number] = 0;
2670 /* read /proc/interrupt count lines and sum up irqs per cpu */
2675 retval = fscanf(fp, " %s:", buf); /* flush irq# "N:" */
2679 /* read the count per cpu */
2680 for (column = 0; column < topo.num_cpus; ++column) {
2682 int cpu_number, irq_count;
2684 retval = fscanf(fp, " %d", &irq_count);
2688 cpu_number = irq_column_2_cpu[column];
2689 irqs_per_cpu[cpu_number] += irq_count;
2693 while (getc(fp) != '\n')
2694 ; /* flush interrupt description */
2700 * snapshot_gfx_rc6_ms()
2702 * record snapshot of
2703 * /sys/class/drm/card0/power/rc6_residency_ms
2705 * return 1 if config change requires a restart, else return 0
2707 int snapshot_gfx_rc6_ms(void)
2712 fp = fopen_or_die("/sys/class/drm/card0/power/rc6_residency_ms", "r");
2714 retval = fscanf(fp, "%lld", &gfx_cur_rc6_ms);
2723 * snapshot_gfx_mhz()
2725 * record snapshot of
2726 * /sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz
2728 * return 1 if config change requires a restart, else return 0
2730 int snapshot_gfx_mhz(void)
2736 fp = fopen_or_die("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", "r");
2742 retval = fscanf(fp, "%d", &gfx_cur_mhz);
2750 * snapshot_cpu_lpi()
2752 * record snapshot of
2753 * /sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us
2755 * return 1 if config change requires a restart, else return 0
2757 int snapshot_cpu_lpi_us(void)
2762 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", "r");
2764 retval = fscanf(fp, "%lld", &cpuidle_cur_cpu_lpi_us);
2773 * snapshot_sys_lpi()
2775 * record snapshot of
2776 * /sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us
2778 * return 1 if config change requires a restart, else return 0
2780 int snapshot_sys_lpi_us(void)
2785 fp = fopen_or_die("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", "r");
2787 retval = fscanf(fp, "%lld", &cpuidle_cur_sys_lpi_us);
2796 * snapshot /proc and /sys files
2798 * return 1 if configuration restart needed, else return 0
2800 int snapshot_proc_sysfs_files(void)
2802 if (DO_BIC(BIC_IRQ))
2803 if (snapshot_proc_interrupts())
2806 if (DO_BIC(BIC_GFX_rc6))
2807 snapshot_gfx_rc6_ms();
2809 if (DO_BIC(BIC_GFXMHz))
2812 if (DO_BIC(BIC_CPU_LPI))
2813 snapshot_cpu_lpi_us();
2815 if (DO_BIC(BIC_SYS_LPI))
2816 snapshot_sys_lpi_us();
2823 static void signal_handler (int signal)
2829 fprintf(stderr, " SIGINT\n");
2833 fprintf(stderr, "SIGUSR1\n");
2836 /* make sure this manually-invoked interval is at least 1ms long */
2837 nanosleep(&one_msec, NULL);
2840 void setup_signal_handler(void)
2842 struct sigaction sa;
2844 memset(&sa, 0, sizeof(sa));
2846 sa.sa_handler = &signal_handler;
2848 if (sigaction(SIGINT, &sa, NULL) < 0)
2849 err(1, "sigaction SIGINT");
2850 if (sigaction(SIGUSR1, &sa, NULL) < 0)
2851 err(1, "sigaction SIGUSR1");
2856 struct timeval select_timeout;
2861 FD_SET(0, &readfds);
2863 if (!isatty(fileno(stdin))) {
2864 nanosleep(&interval_ts, NULL);
2868 select_timeout = interval_tv;
2869 retval = select(1, &readfds, NULL, NULL, &select_timeout);
2872 switch (getc(stdin)) {
2877 /* make sure this manually-invoked interval is at least 1ms long */
2878 nanosleep(&one_msec, NULL);
2882 void turbostat_loop()
2888 setup_signal_handler();
2893 snapshot_proc_sysfs_files();
2894 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
2897 } else if (retval == -1) {
2898 if (restarted > 1) {
2906 gettimeofday(&tv_even, (struct timezone *)NULL);
2909 if (for_all_proc_cpus(cpu_is_not_present)) {
2914 if (snapshot_proc_sysfs_files())
2916 retval = for_all_cpus(get_counters, ODD_COUNTERS);
2919 } else if (retval == -1) {
2923 gettimeofday(&tv_odd, (struct timezone *)NULL);
2924 timersub(&tv_odd, &tv_even, &tv_delta);
2925 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS)) {
2929 compute_average(EVEN_COUNTERS);
2930 format_all_counters(EVEN_COUNTERS);
2931 flush_output_stdout();
2934 if (num_iterations && ++done_iters >= num_iterations)
2937 if (snapshot_proc_sysfs_files())
2939 retval = for_all_cpus(get_counters, EVEN_COUNTERS);
2942 } else if (retval == -1) {
2946 gettimeofday(&tv_even, (struct timezone *)NULL);
2947 timersub(&tv_even, &tv_odd, &tv_delta);
2948 if (for_all_cpus_2(delta_cpu, EVEN_COUNTERS, ODD_COUNTERS)) {
2952 compute_average(ODD_COUNTERS);
2953 format_all_counters(ODD_COUNTERS);
2954 flush_output_stdout();
2957 if (num_iterations && ++done_iters >= num_iterations)
2962 void check_dev_msr()
2967 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
2968 if (stat(pathname, &sb))
2969 if (system("/sbin/modprobe msr > /dev/null 2>&1"))
2970 err(-5, "no /dev/cpu/0/msr, Try \"# modprobe msr\" ");
2973 void check_permissions()
2975 struct __user_cap_header_struct cap_header_data;
2976 cap_user_header_t cap_header = &cap_header_data;
2977 struct __user_cap_data_struct cap_data_data;
2978 cap_user_data_t cap_data = &cap_data_data;
2979 extern int capget(cap_user_header_t hdrp, cap_user_data_t datap);
2983 /* check for CAP_SYS_RAWIO */
2984 cap_header->pid = getpid();
2985 cap_header->version = _LINUX_CAPABILITY_VERSION;
2986 if (capget(cap_header, cap_data) < 0)
2987 err(-6, "capget(2) failed");
2989 if ((cap_data->effective & (1 << CAP_SYS_RAWIO)) == 0) {
2991 warnx("capget(CAP_SYS_RAWIO) failed,"
2992 " try \"# setcap cap_sys_rawio=ep %s\"", progname);
2995 /* test file permissions */
2996 sprintf(pathname, "/dev/cpu/%d/msr", base_cpu);
2997 if (euidaccess(pathname, R_OK)) {
2999 warn("/dev/cpu/0/msr open failed, try chown or chmod +r /dev/cpu/*/msr");
3002 /* if all else fails, thell them to be root */
3005 warnx("... or simply run as root");
3012 * NHM adds support for additional MSRs:
3014 * MSR_SMI_COUNT 0x00000034
3016 * MSR_PLATFORM_INFO 0x000000ce
3017 * MSR_PKG_CST_CONFIG_CONTROL 0x000000e2
3019 * MSR_MISC_PWR_MGMT 0x000001aa
3021 * MSR_PKG_C3_RESIDENCY 0x000003f8
3022 * MSR_PKG_C6_RESIDENCY 0x000003f9
3023 * MSR_CORE_C3_RESIDENCY 0x000003fc
3024 * MSR_CORE_C6_RESIDENCY 0x000003fd
3027 * sets global pkg_cstate_limit to decode MSR_PKG_CST_CONFIG_CONTROL
3028 * sets has_misc_feature_control
3030 int probe_nhm_msrs(unsigned int family, unsigned int model)
3032 unsigned long long msr;
3033 unsigned int base_ratio;
3034 int *pkg_cstate_limits;
3042 bclk = discover_bclk(family, model);
3045 case INTEL_FAM6_NEHALEM_EP: /* Core i7, Xeon 5500 series - Bloomfield, Gainstown NHM-EP */
3046 case INTEL_FAM6_NEHALEM: /* Core i7 and i5 Processor - Clarksfield, Lynnfield, Jasper Forest */
3047 case 0x1F: /* Core i7 and i5 Processor - Nehalem */
3048 case INTEL_FAM6_WESTMERE: /* Westmere Client - Clarkdale, Arrandale */
3049 case INTEL_FAM6_WESTMERE_EP: /* Westmere EP - Gulftown */
3050 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
3051 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
3052 pkg_cstate_limits = nhm_pkg_cstate_limits;
3054 case INTEL_FAM6_SANDYBRIDGE: /* SNB */
3055 case INTEL_FAM6_SANDYBRIDGE_X: /* SNB Xeon */
3056 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3057 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
3058 pkg_cstate_limits = snb_pkg_cstate_limits;
3059 has_misc_feature_control = 1;
3061 case INTEL_FAM6_HASWELL_CORE: /* HSW */
3062 case INTEL_FAM6_HASWELL_X: /* HSX */
3063 case INTEL_FAM6_HASWELL_ULT: /* HSW */
3064 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3065 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3066 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3067 case INTEL_FAM6_BROADWELL_X: /* BDX */
3068 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
3069 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3070 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
3071 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
3072 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
3073 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
3074 pkg_cstate_limits = hsw_pkg_cstate_limits;
3075 has_misc_feature_control = 1;
3077 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3078 pkg_cstate_limits = skx_pkg_cstate_limits;
3079 has_misc_feature_control = 1;
3081 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
3082 no_MSR_MISC_PWR_MGMT = 1;
3083 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
3084 pkg_cstate_limits = slv_pkg_cstate_limits;
3086 case INTEL_FAM6_ATOM_AIRMONT: /* AMT */
3087 pkg_cstate_limits = amt_pkg_cstate_limits;
3088 no_MSR_MISC_PWR_MGMT = 1;
3090 case INTEL_FAM6_XEON_PHI_KNL: /* PHI */
3091 case INTEL_FAM6_XEON_PHI_KNM:
3092 pkg_cstate_limits = phi_pkg_cstate_limits;
3094 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
3095 case INTEL_FAM6_ATOM_GEMINI_LAKE:
3096 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
3097 pkg_cstate_limits = bxt_pkg_cstate_limits;
3102 get_msr(base_cpu, MSR_PKG_CST_CONFIG_CONTROL, &msr);
3103 pkg_cstate_limit = pkg_cstate_limits[msr & 0xF];
3105 get_msr(base_cpu, MSR_PLATFORM_INFO, &msr);
3106 base_ratio = (msr >> 8) & 0xFF;
3108 base_hz = base_ratio * bclk * 1000000;
3113 * SLV client has support for unique MSRs:
3115 * MSR_CC6_DEMOTION_POLICY_CONFIG
3116 * MSR_MC6_DEMOTION_POLICY_CONFIG
3119 int has_slv_msrs(unsigned int family, unsigned int model)
3125 case INTEL_FAM6_ATOM_SILVERMONT1:
3126 case INTEL_FAM6_ATOM_MERRIFIELD:
3127 case INTEL_FAM6_ATOM_MOOREFIELD:
3132 int is_dnv(unsigned int family, unsigned int model)
3139 case INTEL_FAM6_ATOM_DENVERTON:
3144 int is_bdx(unsigned int family, unsigned int model)
3151 case INTEL_FAM6_BROADWELL_X:
3152 case INTEL_FAM6_BROADWELL_XEON_D:
3157 int is_skx(unsigned int family, unsigned int model)
3164 case INTEL_FAM6_SKYLAKE_X:
3170 int has_turbo_ratio_limit(unsigned int family, unsigned int model)
3172 if (has_slv_msrs(family, model))
3176 /* Nehalem compatible, but do not include turbo-ratio limit support */
3177 case INTEL_FAM6_NEHALEM_EX: /* Nehalem-EX Xeon - Beckton */
3178 case INTEL_FAM6_WESTMERE_EX: /* Westmere-EX Xeon - Eagleton */
3179 case INTEL_FAM6_XEON_PHI_KNL: /* PHI - Knights Landing (different MSR definition) */
3180 case INTEL_FAM6_XEON_PHI_KNM:
3186 int has_atom_turbo_ratio_limit(unsigned int family, unsigned int model)
3188 if (has_slv_msrs(family, model))
3193 int has_ivt_turbo_ratio_limit(unsigned int family, unsigned int model)
3202 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
3203 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
3209 int has_hsw_turbo_ratio_limit(unsigned int family, unsigned int model)
3218 case INTEL_FAM6_HASWELL_X: /* HSW Xeon */
3225 int has_knl_turbo_ratio_limit(unsigned int family, unsigned int model)
3234 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
3235 case INTEL_FAM6_XEON_PHI_KNM:
3241 int has_glm_turbo_ratio_limit(unsigned int family, unsigned int model)
3250 case INTEL_FAM6_ATOM_GOLDMONT:
3251 case INTEL_FAM6_SKYLAKE_X:
3257 int has_config_tdp(unsigned int family, unsigned int model)
3266 case INTEL_FAM6_IVYBRIDGE: /* IVB */
3267 case INTEL_FAM6_HASWELL_CORE: /* HSW */
3268 case INTEL_FAM6_HASWELL_X: /* HSX */
3269 case INTEL_FAM6_HASWELL_ULT: /* HSW */
3270 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3271 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3272 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3273 case INTEL_FAM6_BROADWELL_X: /* BDX */
3274 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
3275 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3276 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
3277 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
3278 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
3279 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
3280 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3282 case INTEL_FAM6_XEON_PHI_KNL: /* Knights Landing */
3283 case INTEL_FAM6_XEON_PHI_KNM:
3291 dump_cstate_pstate_config_info(unsigned int family, unsigned int model)
3293 if (!do_nhm_platform_info)
3296 dump_nhm_platform_info();
3298 if (has_hsw_turbo_ratio_limit(family, model))
3299 dump_hsw_turbo_ratio_limits();
3301 if (has_ivt_turbo_ratio_limit(family, model))
3302 dump_ivt_turbo_ratio_limits();
3304 if (has_turbo_ratio_limit(family, model))
3305 dump_turbo_ratio_limits(family, model);
3307 if (has_atom_turbo_ratio_limit(family, model))
3308 dump_atom_turbo_ratio_limits();
3310 if (has_knl_turbo_ratio_limit(family, model))
3311 dump_knl_turbo_ratio_limits();
3313 if (has_config_tdp(family, model))
3320 dump_sysfs_cstate_config(void)
3329 if (!DO_BIC(BIC_sysfs))
3332 for (state = 0; state < 10; ++state) {
3334 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
3336 input = fopen(path, "r");
3339 fgets(name_buf, sizeof(name_buf), input);
3341 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
3342 sp = strchr(name_buf, '-');
3344 sp = strchrnul(name_buf, '\n');
3349 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/desc",
3351 input = fopen(path, "r");
3354 fgets(desc, sizeof(desc), input);
3356 fprintf(outf, "cpu%d: %s: %s", base_cpu, name_buf, desc);
3361 dump_sysfs_pstate_config(void)
3364 char driver_buf[64];
3365 char governor_buf[64];
3369 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_driver",
3371 input = fopen(path, "r");
3372 if (input == NULL) {
3373 fprintf(stderr, "NSFOD %s\n", path);
3376 fgets(driver_buf, sizeof(driver_buf), input);
3379 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpufreq/scaling_governor",
3381 input = fopen(path, "r");
3382 if (input == NULL) {
3383 fprintf(stderr, "NSFOD %s\n", path);
3386 fgets(governor_buf, sizeof(governor_buf), input);
3389 fprintf(outf, "cpu%d: cpufreq driver: %s", base_cpu, driver_buf);
3390 fprintf(outf, "cpu%d: cpufreq governor: %s", base_cpu, governor_buf);
3392 sprintf(path, "/sys/devices/system/cpu/cpufreq/boost");
3393 input = fopen(path, "r");
3394 if (input != NULL) {
3395 fscanf(input, "%d", &turbo);
3396 fprintf(outf, "cpufreq boost: %d\n", turbo);
3400 sprintf(path, "/sys/devices/system/cpu/intel_pstate/no_turbo");
3401 input = fopen(path, "r");
3402 if (input != NULL) {
3403 fscanf(input, "%d", &turbo);
3404 fprintf(outf, "cpufreq intel_pstate no_turbo: %d\n", turbo);
3412 * Decode the ENERGY_PERF_BIAS MSR
3414 int print_epb(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3416 unsigned long long msr;
3425 /* EPB is per-package */
3426 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3429 if (cpu_migrate(cpu)) {
3430 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3434 if (get_msr(cpu, MSR_IA32_ENERGY_PERF_BIAS, &msr))
3437 switch (msr & 0xF) {
3438 case ENERGY_PERF_BIAS_PERFORMANCE:
3439 epb_string = "performance";
3441 case ENERGY_PERF_BIAS_NORMAL:
3442 epb_string = "balanced";
3444 case ENERGY_PERF_BIAS_POWERSAVE:
3445 epb_string = "powersave";
3448 epb_string = "custom";
3451 fprintf(outf, "cpu%d: MSR_IA32_ENERGY_PERF_BIAS: 0x%08llx (%s)\n", cpu, msr, epb_string);
3457 * Decode the MSR_HWP_CAPABILITIES
3459 int print_hwp(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3461 unsigned long long msr;
3469 /* MSR_HWP_CAPABILITIES is per-package */
3470 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3473 if (cpu_migrate(cpu)) {
3474 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3478 if (get_msr(cpu, MSR_PM_ENABLE, &msr))
3481 fprintf(outf, "cpu%d: MSR_PM_ENABLE: 0x%08llx (%sHWP)\n",
3482 cpu, msr, (msr & (1 << 0)) ? "" : "No-");
3484 /* MSR_PM_ENABLE[1] == 1 if HWP is enabled and MSRs visible */
3485 if ((msr & (1 << 0)) == 0)
3488 if (get_msr(cpu, MSR_HWP_CAPABILITIES, &msr))
3491 fprintf(outf, "cpu%d: MSR_HWP_CAPABILITIES: 0x%08llx "
3492 "(high %d guar %d eff %d low %d)\n",
3494 (unsigned int)HWP_HIGHEST_PERF(msr),
3495 (unsigned int)HWP_GUARANTEED_PERF(msr),
3496 (unsigned int)HWP_MOSTEFFICIENT_PERF(msr),
3497 (unsigned int)HWP_LOWEST_PERF(msr));
3499 if (get_msr(cpu, MSR_HWP_REQUEST, &msr))
3502 fprintf(outf, "cpu%d: MSR_HWP_REQUEST: 0x%08llx "
3503 "(min %d max %d des %d epp 0x%x window 0x%x pkg 0x%x)\n",
3505 (unsigned int)(((msr) >> 0) & 0xff),
3506 (unsigned int)(((msr) >> 8) & 0xff),
3507 (unsigned int)(((msr) >> 16) & 0xff),
3508 (unsigned int)(((msr) >> 24) & 0xff),
3509 (unsigned int)(((msr) >> 32) & 0xff3),
3510 (unsigned int)(((msr) >> 42) & 0x1));
3513 if (get_msr(cpu, MSR_HWP_REQUEST_PKG, &msr))
3516 fprintf(outf, "cpu%d: MSR_HWP_REQUEST_PKG: 0x%08llx "
3517 "(min %d max %d des %d epp 0x%x window 0x%x)\n",
3519 (unsigned int)(((msr) >> 0) & 0xff),
3520 (unsigned int)(((msr) >> 8) & 0xff),
3521 (unsigned int)(((msr) >> 16) & 0xff),
3522 (unsigned int)(((msr) >> 24) & 0xff),
3523 (unsigned int)(((msr) >> 32) & 0xff3));
3525 if (has_hwp_notify) {
3526 if (get_msr(cpu, MSR_HWP_INTERRUPT, &msr))
3529 fprintf(outf, "cpu%d: MSR_HWP_INTERRUPT: 0x%08llx "
3530 "(%s_Guaranteed_Perf_Change, %s_Excursion_Min)\n",
3532 ((msr) & 0x1) ? "EN" : "Dis",
3533 ((msr) & 0x2) ? "EN" : "Dis");
3535 if (get_msr(cpu, MSR_HWP_STATUS, &msr))
3538 fprintf(outf, "cpu%d: MSR_HWP_STATUS: 0x%08llx "
3539 "(%sGuaranteed_Perf_Change, %sExcursion_Min)\n",
3541 ((msr) & 0x1) ? "" : "No-",
3542 ((msr) & 0x2) ? "" : "No-");
3548 * print_perf_limit()
3550 int print_perf_limit(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3552 unsigned long long msr;
3558 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3561 if (cpu_migrate(cpu)) {
3562 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3566 if (do_core_perf_limit_reasons) {
3567 get_msr(cpu, MSR_CORE_PERF_LIMIT_REASONS, &msr);
3568 fprintf(outf, "cpu%d: MSR_CORE_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3569 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)",
3570 (msr & 1 << 15) ? "bit15, " : "",
3571 (msr & 1 << 14) ? "bit14, " : "",
3572 (msr & 1 << 13) ? "Transitions, " : "",
3573 (msr & 1 << 12) ? "MultiCoreTurbo, " : "",
3574 (msr & 1 << 11) ? "PkgPwrL2, " : "",
3575 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3576 (msr & 1 << 9) ? "CorePwr, " : "",
3577 (msr & 1 << 8) ? "Amps, " : "",
3578 (msr & 1 << 6) ? "VR-Therm, " : "",
3579 (msr & 1 << 5) ? "Auto-HWP, " : "",
3580 (msr & 1 << 4) ? "Graphics, " : "",
3581 (msr & 1 << 2) ? "bit2, " : "",
3582 (msr & 1 << 1) ? "ThermStatus, " : "",
3583 (msr & 1 << 0) ? "PROCHOT, " : "");
3584 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s%s%s%s%s%s%s)\n",
3585 (msr & 1 << 31) ? "bit31, " : "",
3586 (msr & 1 << 30) ? "bit30, " : "",
3587 (msr & 1 << 29) ? "Transitions, " : "",
3588 (msr & 1 << 28) ? "MultiCoreTurbo, " : "",
3589 (msr & 1 << 27) ? "PkgPwrL2, " : "",
3590 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3591 (msr & 1 << 25) ? "CorePwr, " : "",
3592 (msr & 1 << 24) ? "Amps, " : "",
3593 (msr & 1 << 22) ? "VR-Therm, " : "",
3594 (msr & 1 << 21) ? "Auto-HWP, " : "",
3595 (msr & 1 << 20) ? "Graphics, " : "",
3596 (msr & 1 << 18) ? "bit18, " : "",
3597 (msr & 1 << 17) ? "ThermStatus, " : "",
3598 (msr & 1 << 16) ? "PROCHOT, " : "");
3601 if (do_gfx_perf_limit_reasons) {
3602 get_msr(cpu, MSR_GFX_PERF_LIMIT_REASONS, &msr);
3603 fprintf(outf, "cpu%d: MSR_GFX_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3604 fprintf(outf, " (Active: %s%s%s%s%s%s%s%s)",
3605 (msr & 1 << 0) ? "PROCHOT, " : "",
3606 (msr & 1 << 1) ? "ThermStatus, " : "",
3607 (msr & 1 << 4) ? "Graphics, " : "",
3608 (msr & 1 << 6) ? "VR-Therm, " : "",
3609 (msr & 1 << 8) ? "Amps, " : "",
3610 (msr & 1 << 9) ? "GFXPwr, " : "",
3611 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3612 (msr & 1 << 11) ? "PkgPwrL2, " : "");
3613 fprintf(outf, " (Logged: %s%s%s%s%s%s%s%s)\n",
3614 (msr & 1 << 16) ? "PROCHOT, " : "",
3615 (msr & 1 << 17) ? "ThermStatus, " : "",
3616 (msr & 1 << 20) ? "Graphics, " : "",
3617 (msr & 1 << 22) ? "VR-Therm, " : "",
3618 (msr & 1 << 24) ? "Amps, " : "",
3619 (msr & 1 << 25) ? "GFXPwr, " : "",
3620 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3621 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3623 if (do_ring_perf_limit_reasons) {
3624 get_msr(cpu, MSR_RING_PERF_LIMIT_REASONS, &msr);
3625 fprintf(outf, "cpu%d: MSR_RING_PERF_LIMIT_REASONS, 0x%08llx", cpu, msr);
3626 fprintf(outf, " (Active: %s%s%s%s%s%s)",
3627 (msr & 1 << 0) ? "PROCHOT, " : "",
3628 (msr & 1 << 1) ? "ThermStatus, " : "",
3629 (msr & 1 << 6) ? "VR-Therm, " : "",
3630 (msr & 1 << 8) ? "Amps, " : "",
3631 (msr & 1 << 10) ? "PkgPwrL1, " : "",
3632 (msr & 1 << 11) ? "PkgPwrL2, " : "");
3633 fprintf(outf, " (Logged: %s%s%s%s%s%s)\n",
3634 (msr & 1 << 16) ? "PROCHOT, " : "",
3635 (msr & 1 << 17) ? "ThermStatus, " : "",
3636 (msr & 1 << 22) ? "VR-Therm, " : "",
3637 (msr & 1 << 24) ? "Amps, " : "",
3638 (msr & 1 << 26) ? "PkgPwrL1, " : "",
3639 (msr & 1 << 27) ? "PkgPwrL2, " : "");
3644 #define RAPL_POWER_GRANULARITY 0x7FFF /* 15 bit power granularity */
3645 #define RAPL_TIME_GRANULARITY 0x3F /* 6 bit time granularity */
3647 double get_tdp(unsigned int model)
3649 unsigned long long msr;
3651 if (do_rapl & RAPL_PKG_POWER_INFO)
3652 if (!get_msr(base_cpu, MSR_PKG_POWER_INFO, &msr))
3653 return ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units;
3656 case INTEL_FAM6_ATOM_SILVERMONT1:
3657 case INTEL_FAM6_ATOM_SILVERMONT2:
3665 * rapl_dram_energy_units_probe()
3666 * Energy units are either hard-coded, or come from RAPL Energy Unit MSR.
3669 rapl_dram_energy_units_probe(int model, double rapl_energy_units)
3671 /* only called for genuine_intel, family 6 */
3674 case INTEL_FAM6_HASWELL_X: /* HSX */
3675 case INTEL_FAM6_BROADWELL_X: /* BDX */
3676 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
3677 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
3678 case INTEL_FAM6_XEON_PHI_KNM:
3679 return (rapl_dram_energy_units = 15.3 / 1000000);
3681 return (rapl_energy_units);
3689 * sets do_rapl, rapl_power_units, rapl_energy_units, rapl_time_units
3691 void rapl_probe(unsigned int family, unsigned int model)
3693 unsigned long long msr;
3694 unsigned int time_unit;
3704 case INTEL_FAM6_SANDYBRIDGE:
3705 case INTEL_FAM6_IVYBRIDGE:
3706 case INTEL_FAM6_HASWELL_CORE: /* HSW */
3707 case INTEL_FAM6_HASWELL_ULT: /* HSW */
3708 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3709 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
3710 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
3711 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
3713 BIC_PRESENT(BIC_Pkg_J);
3714 BIC_PRESENT(BIC_Cor_J);
3715 BIC_PRESENT(BIC_GFX_J);
3717 BIC_PRESENT(BIC_PkgWatt);
3718 BIC_PRESENT(BIC_CorWatt);
3719 BIC_PRESENT(BIC_GFXWatt);
3722 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
3723 case INTEL_FAM6_ATOM_GEMINI_LAKE:
3724 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
3726 BIC_PRESENT(BIC_Pkg_J);
3728 BIC_PRESENT(BIC_PkgWatt);
3730 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
3731 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
3732 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
3733 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
3734 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
3735 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_GFX | RAPL_PKG_POWER_INFO;
3736 BIC_PRESENT(BIC_PKG__);
3737 BIC_PRESENT(BIC_RAM__);
3739 BIC_PRESENT(BIC_Pkg_J);
3740 BIC_PRESENT(BIC_Cor_J);
3741 BIC_PRESENT(BIC_RAM_J);
3742 BIC_PRESENT(BIC_GFX_J);
3744 BIC_PRESENT(BIC_PkgWatt);
3745 BIC_PRESENT(BIC_CorWatt);
3746 BIC_PRESENT(BIC_RAMWatt);
3747 BIC_PRESENT(BIC_GFXWatt);
3750 case INTEL_FAM6_HASWELL_X: /* HSX */
3751 case INTEL_FAM6_BROADWELL_X: /* BDX */
3752 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
3753 case INTEL_FAM6_SKYLAKE_X: /* SKX */
3754 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
3755 case INTEL_FAM6_XEON_PHI_KNM:
3756 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
3757 BIC_PRESENT(BIC_PKG__);
3758 BIC_PRESENT(BIC_RAM__);
3760 BIC_PRESENT(BIC_Pkg_J);
3761 BIC_PRESENT(BIC_RAM_J);
3763 BIC_PRESENT(BIC_PkgWatt);
3764 BIC_PRESENT(BIC_RAMWatt);
3767 case INTEL_FAM6_SANDYBRIDGE_X:
3768 case INTEL_FAM6_IVYBRIDGE_X:
3769 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
3770 BIC_PRESENT(BIC_PKG__);
3771 BIC_PRESENT(BIC_RAM__);
3773 BIC_PRESENT(BIC_Pkg_J);
3774 BIC_PRESENT(BIC_Cor_J);
3775 BIC_PRESENT(BIC_RAM_J);
3777 BIC_PRESENT(BIC_PkgWatt);
3778 BIC_PRESENT(BIC_CorWatt);
3779 BIC_PRESENT(BIC_RAMWatt);
3782 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
3783 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
3784 do_rapl = RAPL_PKG | RAPL_CORES;
3786 BIC_PRESENT(BIC_Pkg_J);
3787 BIC_PRESENT(BIC_Cor_J);
3789 BIC_PRESENT(BIC_PkgWatt);
3790 BIC_PRESENT(BIC_CorWatt);
3793 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
3794 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
3795 BIC_PRESENT(BIC_PKG__);
3796 BIC_PRESENT(BIC_RAM__);
3798 BIC_PRESENT(BIC_Pkg_J);
3799 BIC_PRESENT(BIC_Cor_J);
3800 BIC_PRESENT(BIC_RAM_J);
3802 BIC_PRESENT(BIC_PkgWatt);
3803 BIC_PRESENT(BIC_CorWatt);
3804 BIC_PRESENT(BIC_RAMWatt);
3811 /* units on package 0, verify later other packages match */
3812 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
3815 rapl_power_units = 1.0 / (1 << (msr & 0xF));
3816 if (model == INTEL_FAM6_ATOM_SILVERMONT1)
3817 rapl_energy_units = 1.0 * (1 << (msr >> 8 & 0x1F)) / 1000000;
3819 rapl_energy_units = 1.0 / (1 << (msr >> 8 & 0x1F));
3821 rapl_dram_energy_units = rapl_dram_energy_units_probe(model, rapl_energy_units);
3823 time_unit = msr >> 16 & 0xF;
3827 rapl_time_units = 1.0 / (1 << (time_unit));
3829 tdp = get_tdp(model);
3831 rapl_joule_counter_range = 0xFFFFFFFF * rapl_energy_units / tdp;
3833 fprintf(outf, "RAPL: %.0f sec. Joule Counter Range, at %.0f Watts\n", rapl_joule_counter_range, tdp);
3838 void perf_limit_reasons_probe(unsigned int family, unsigned int model)
3847 case INTEL_FAM6_HASWELL_CORE: /* HSW */
3848 case INTEL_FAM6_HASWELL_ULT: /* HSW */
3849 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
3850 do_gfx_perf_limit_reasons = 1;
3851 case INTEL_FAM6_HASWELL_X: /* HSX */
3852 do_core_perf_limit_reasons = 1;
3853 do_ring_perf_limit_reasons = 1;
3859 void automatic_cstate_conversion_probe(unsigned int family, unsigned int model)
3861 if (is_skx(family, model) || is_bdx(family, model))
3862 has_automatic_cstate_conversion = 1;
3865 int print_thermal(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3867 unsigned long long msr;
3868 unsigned int dts, dts2;
3871 if (!(do_dts || do_ptm))
3876 /* DTS is per-core, no need to print for each thread */
3877 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
3880 if (cpu_migrate(cpu)) {
3881 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3885 if (do_ptm && (t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE)) {
3886 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
3889 dts = (msr >> 16) & 0x7F;
3890 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_STATUS: 0x%08llx (%d C)\n",
3891 cpu, msr, tcc_activation_temp - dts);
3893 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &msr))
3896 dts = (msr >> 16) & 0x7F;
3897 dts2 = (msr >> 8) & 0x7F;
3898 fprintf(outf, "cpu%d: MSR_IA32_PACKAGE_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
3899 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
3903 if (do_dts && debug) {
3904 unsigned int resolution;
3906 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
3909 dts = (msr >> 16) & 0x7F;
3910 resolution = (msr >> 27) & 0xF;
3911 fprintf(outf, "cpu%d: MSR_IA32_THERM_STATUS: 0x%08llx (%d C +/- %d)\n",
3912 cpu, msr, tcc_activation_temp - dts, resolution);
3914 if (get_msr(cpu, MSR_IA32_THERM_INTERRUPT, &msr))
3917 dts = (msr >> 16) & 0x7F;
3918 dts2 = (msr >> 8) & 0x7F;
3919 fprintf(outf, "cpu%d: MSR_IA32_THERM_INTERRUPT: 0x%08llx (%d C, %d C)\n",
3920 cpu, msr, tcc_activation_temp - dts, tcc_activation_temp - dts2);
3926 void print_power_limit_msr(int cpu, unsigned long long msr, char *label)
3928 fprintf(outf, "cpu%d: %s: %sabled (%f Watts, %f sec, clamp %sabled)\n",
3930 ((msr >> 15) & 1) ? "EN" : "DIS",
3931 ((msr >> 0) & 0x7FFF) * rapl_power_units,
3932 (1.0 + (((msr >> 22) & 0x3)/4.0)) * (1 << ((msr >> 17) & 0x1F)) * rapl_time_units,
3933 (((msr >> 16) & 1) ? "EN" : "DIS"));
3938 int print_rapl(struct thread_data *t, struct core_data *c, struct pkg_data *p)
3940 unsigned long long msr;
3946 /* RAPL counters are per package, so print only for 1st thread/package */
3947 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
3951 if (cpu_migrate(cpu)) {
3952 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
3956 if (get_msr(cpu, MSR_RAPL_POWER_UNIT, &msr))
3959 fprintf(outf, "cpu%d: MSR_RAPL_POWER_UNIT: 0x%08llx (%f Watts, %f Joules, %f sec.)\n", cpu, msr,
3960 rapl_power_units, rapl_energy_units, rapl_time_units);
3962 if (do_rapl & RAPL_PKG_POWER_INFO) {
3964 if (get_msr(cpu, MSR_PKG_POWER_INFO, &msr))
3968 fprintf(outf, "cpu%d: MSR_PKG_POWER_INFO: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
3970 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
3971 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
3972 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
3973 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
3976 if (do_rapl & RAPL_PKG) {
3978 if (get_msr(cpu, MSR_PKG_POWER_LIMIT, &msr))
3981 fprintf(outf, "cpu%d: MSR_PKG_POWER_LIMIT: 0x%08llx (%slocked)\n",
3982 cpu, msr, (msr >> 63) & 1 ? "" : "UN");
3984 print_power_limit_msr(cpu, msr, "PKG Limit #1");
3985 fprintf(outf, "cpu%d: PKG Limit #2: %sabled (%f Watts, %f* sec, clamp %sabled)\n",
3987 ((msr >> 47) & 1) ? "EN" : "DIS",
3988 ((msr >> 32) & 0x7FFF) * rapl_power_units,
3989 (1.0 + (((msr >> 54) & 0x3)/4.0)) * (1 << ((msr >> 49) & 0x1F)) * rapl_time_units,
3990 ((msr >> 48) & 1) ? "EN" : "DIS");
3993 if (do_rapl & RAPL_DRAM_POWER_INFO) {
3994 if (get_msr(cpu, MSR_DRAM_POWER_INFO, &msr))
3997 fprintf(outf, "cpu%d: MSR_DRAM_POWER_INFO,: 0x%08llx (%.0f W TDP, RAPL %.0f - %.0f W, %f sec.)\n",
3999 ((msr >> 0) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4000 ((msr >> 16) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4001 ((msr >> 32) & RAPL_POWER_GRANULARITY) * rapl_power_units,
4002 ((msr >> 48) & RAPL_TIME_GRANULARITY) * rapl_time_units);
4004 if (do_rapl & RAPL_DRAM) {
4005 if (get_msr(cpu, MSR_DRAM_POWER_LIMIT, &msr))
4007 fprintf(outf, "cpu%d: MSR_DRAM_POWER_LIMIT: 0x%08llx (%slocked)\n",
4008 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4010 print_power_limit_msr(cpu, msr, "DRAM Limit");
4012 if (do_rapl & RAPL_CORE_POLICY) {
4013 if (get_msr(cpu, MSR_PP0_POLICY, &msr))
4016 fprintf(outf, "cpu%d: MSR_PP0_POLICY: %lld\n", cpu, msr & 0xF);
4018 if (do_rapl & RAPL_CORES_POWER_LIMIT) {
4019 if (get_msr(cpu, MSR_PP0_POWER_LIMIT, &msr))
4021 fprintf(outf, "cpu%d: MSR_PP0_POWER_LIMIT: 0x%08llx (%slocked)\n",
4022 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4023 print_power_limit_msr(cpu, msr, "Cores Limit");
4025 if (do_rapl & RAPL_GFX) {
4026 if (get_msr(cpu, MSR_PP1_POLICY, &msr))
4029 fprintf(outf, "cpu%d: MSR_PP1_POLICY: %lld\n", cpu, msr & 0xF);
4031 if (get_msr(cpu, MSR_PP1_POWER_LIMIT, &msr))
4033 fprintf(outf, "cpu%d: MSR_PP1_POWER_LIMIT: 0x%08llx (%slocked)\n",
4034 cpu, msr, (msr >> 31) & 1 ? "" : "UN");
4035 print_power_limit_msr(cpu, msr, "GFX Limit");
4041 * SNB adds support for additional MSRs:
4043 * MSR_PKG_C7_RESIDENCY 0x000003fa
4044 * MSR_CORE_C7_RESIDENCY 0x000003fe
4045 * MSR_PKG_C2_RESIDENCY 0x0000060d
4048 int has_snb_msrs(unsigned int family, unsigned int model)
4054 case INTEL_FAM6_SANDYBRIDGE:
4055 case INTEL_FAM6_SANDYBRIDGE_X:
4056 case INTEL_FAM6_IVYBRIDGE: /* IVB */
4057 case INTEL_FAM6_IVYBRIDGE_X: /* IVB Xeon */
4058 case INTEL_FAM6_HASWELL_CORE: /* HSW */
4059 case INTEL_FAM6_HASWELL_X: /* HSW */
4060 case INTEL_FAM6_HASWELL_ULT: /* HSW */
4061 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
4062 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4063 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
4064 case INTEL_FAM6_BROADWELL_X: /* BDX */
4065 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
4066 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4067 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
4068 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
4069 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
4070 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
4071 case INTEL_FAM6_SKYLAKE_X: /* SKX */
4072 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
4073 case INTEL_FAM6_ATOM_GEMINI_LAKE:
4074 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
4081 * HSW adds support for additional MSRs:
4083 * MSR_PKG_C8_RESIDENCY 0x00000630
4084 * MSR_PKG_C9_RESIDENCY 0x00000631
4085 * MSR_PKG_C10_RESIDENCY 0x00000632
4087 * MSR_PKGC8_IRTL 0x00000633
4088 * MSR_PKGC9_IRTL 0x00000634
4089 * MSR_PKGC10_IRTL 0x00000635
4092 int has_hsw_msrs(unsigned int family, unsigned int model)
4098 case INTEL_FAM6_HASWELL_ULT: /* HSW */
4099 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
4100 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4101 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
4102 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
4103 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
4104 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
4105 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
4106 case INTEL_FAM6_ATOM_GEMINI_LAKE:
4113 * SKL adds support for additional MSRS:
4115 * MSR_PKG_WEIGHTED_CORE_C0_RES 0x00000658
4116 * MSR_PKG_ANY_CORE_C0_RES 0x00000659
4117 * MSR_PKG_ANY_GFXE_C0_RES 0x0000065A
4118 * MSR_PKG_BOTH_CORE_GFXE_C0_RES 0x0000065B
4120 int has_skl_msrs(unsigned int family, unsigned int model)
4126 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4127 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
4128 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
4129 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
4130 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
4136 int is_slm(unsigned int family, unsigned int model)
4141 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
4142 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
4148 int is_knl(unsigned int family, unsigned int model)
4153 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
4154 case INTEL_FAM6_XEON_PHI_KNM:
4160 int is_cnl(unsigned int family, unsigned int model)
4166 case INTEL_FAM6_CANNONLAKE_MOBILE: /* CNL */
4173 unsigned int get_aperf_mperf_multiplier(unsigned int family, unsigned int model)
4175 if (is_knl(family, model))
4180 #define SLM_BCLK_FREQS 5
4181 double slm_freq_table[SLM_BCLK_FREQS] = { 83.3, 100.0, 133.3, 116.7, 80.0};
4183 double slm_bclk(void)
4185 unsigned long long msr = 3;
4189 if (get_msr(base_cpu, MSR_FSB_FREQ, &msr))
4190 fprintf(outf, "SLM BCLK: unknown\n");
4193 if (i >= SLM_BCLK_FREQS) {
4194 fprintf(outf, "SLM BCLK[%d] invalid\n", i);
4197 freq = slm_freq_table[i];
4200 fprintf(outf, "SLM BCLK: %.1f Mhz\n", freq);
4205 double discover_bclk(unsigned int family, unsigned int model)
4207 if (has_snb_msrs(family, model) || is_knl(family, model))
4209 else if (is_slm(family, model))
4216 * MSR_IA32_TEMPERATURE_TARGET indicates the temperature where
4217 * the Thermal Control Circuit (TCC) activates.
4218 * This is usually equal to tjMax.
4220 * Older processors do not have this MSR, so there we guess,
4221 * but also allow cmdline over-ride with -T.
4223 * Several MSR temperature values are in units of degrees-C
4224 * below this value, including the Digital Thermal Sensor (DTS),
4225 * Package Thermal Management Sensor (PTM), and thermal event thresholds.
4227 int set_temperature_target(struct thread_data *t, struct core_data *c, struct pkg_data *p)
4229 unsigned long long msr;
4230 unsigned int target_c_local;
4233 /* tcc_activation_temp is used only for dts or ptm */
4234 if (!(do_dts || do_ptm))
4237 /* this is a per-package concept */
4238 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE) || !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
4242 if (cpu_migrate(cpu)) {
4243 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
4247 if (tcc_activation_temp_override != 0) {
4248 tcc_activation_temp = tcc_activation_temp_override;
4249 fprintf(outf, "cpu%d: Using cmdline TCC Target (%d C)\n",
4250 cpu, tcc_activation_temp);
4254 /* Temperature Target MSR is Nehalem and newer only */
4255 if (!do_nhm_platform_info)
4258 if (get_msr(base_cpu, MSR_IA32_TEMPERATURE_TARGET, &msr))
4261 target_c_local = (msr >> 16) & 0xFF;
4264 fprintf(outf, "cpu%d: MSR_IA32_TEMPERATURE_TARGET: 0x%08llx (%d C)\n",
4265 cpu, msr, target_c_local);
4267 if (!target_c_local)
4270 tcc_activation_temp = target_c_local;
4275 tcc_activation_temp = TJMAX_DEFAULT;
4276 fprintf(outf, "cpu%d: Guessing tjMax %d C, Please use -T to specify\n",
4277 cpu, tcc_activation_temp);
4282 void decode_feature_control_msr(void)
4284 unsigned long long msr;
4286 if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
4287 fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
4289 msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
4290 msr & (1 << 18) ? "SGX" : "");
4293 void decode_misc_enable_msr(void)
4295 unsigned long long msr;
4300 if (!get_msr(base_cpu, MSR_IA32_MISC_ENABLE, &msr))
4301 fprintf(outf, "cpu%d: MSR_IA32_MISC_ENABLE: 0x%08llx (%sTCC %sEIST %sMWAIT %sPREFETCH %sTURBO)\n",
4303 msr & MSR_IA32_MISC_ENABLE_TM1 ? "" : "No-",
4304 msr & MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP ? "" : "No-",
4305 msr & MSR_IA32_MISC_ENABLE_MWAIT ? "" : "No-",
4306 msr & MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE ? "No-" : "",
4307 msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ? "No-" : "");
4310 void decode_misc_feature_control(void)
4312 unsigned long long msr;
4314 if (!has_misc_feature_control)
4317 if (!get_msr(base_cpu, MSR_MISC_FEATURE_CONTROL, &msr))
4318 fprintf(outf, "cpu%d: MSR_MISC_FEATURE_CONTROL: 0x%08llx (%sL2-Prefetch %sL2-Prefetch-pair %sL1-Prefetch %sL1-IP-Prefetch)\n",
4320 msr & (0 << 0) ? "No-" : "",
4321 msr & (1 << 0) ? "No-" : "",
4322 msr & (2 << 0) ? "No-" : "",
4323 msr & (3 << 0) ? "No-" : "");
4326 * Decode MSR_MISC_PWR_MGMT
4328 * Decode the bits according to the Nehalem documentation
4329 * bit[0] seems to continue to have same meaning going forward
4332 void decode_misc_pwr_mgmt_msr(void)
4334 unsigned long long msr;
4336 if (!do_nhm_platform_info)
4339 if (no_MSR_MISC_PWR_MGMT)
4342 if (!get_msr(base_cpu, MSR_MISC_PWR_MGMT, &msr))
4343 fprintf(outf, "cpu%d: MSR_MISC_PWR_MGMT: 0x%08llx (%sable-EIST_Coordination %sable-EPB %sable-OOB)\n",
4345 msr & (1 << 0) ? "DIS" : "EN",
4346 msr & (1 << 1) ? "EN" : "DIS",
4347 msr & (1 << 8) ? "EN" : "DIS");
4350 * Decode MSR_CC6_DEMOTION_POLICY_CONFIG, MSR_MC6_DEMOTION_POLICY_CONFIG
4352 * This MSRs are present on Silvermont processors,
4353 * Intel Atom processor E3000 series (Baytrail), and friends.
4355 void decode_c6_demotion_policy_msr(void)
4357 unsigned long long msr;
4359 if (!get_msr(base_cpu, MSR_CC6_DEMOTION_POLICY_CONFIG, &msr))
4360 fprintf(outf, "cpu%d: MSR_CC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-CC6-Demotion)\n",
4361 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4363 if (!get_msr(base_cpu, MSR_MC6_DEMOTION_POLICY_CONFIG, &msr))
4364 fprintf(outf, "cpu%d: MSR_MC6_DEMOTION_POLICY_CONFIG: 0x%08llx (%sable-MC6-Demotion)\n",
4365 base_cpu, msr, msr & (1 << 0) ? "EN" : "DIS");
4368 void process_cpuid()
4370 unsigned int eax, ebx, ecx, edx, max_level, max_extended_level;
4371 unsigned int fms, family, model, stepping;
4372 unsigned int has_turbo;
4374 eax = ebx = ecx = edx = 0;
4376 __cpuid(0, max_level, ebx, ecx, edx);
4378 if (ebx == 0x756e6547 && edx == 0x49656e69 && ecx == 0x6c65746e)
4382 fprintf(outf, "CPUID(0): %.4s%.4s%.4s ",
4383 (char *)&ebx, (char *)&edx, (char *)&ecx);
4385 __cpuid(1, fms, ebx, ecx, edx);
4386 family = (fms >> 8) & 0xf;
4387 model = (fms >> 4) & 0xf;
4388 stepping = fms & 0xf;
4389 if (family == 6 || family == 0xf)
4390 model += ((fms >> 16) & 0xf) << 4;
4393 fprintf(outf, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
4394 max_level, family, model, stepping, family, model, stepping);
4395 fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s\n",
4396 ecx & (1 << 0) ? "SSE3" : "-",
4397 ecx & (1 << 3) ? "MONITOR" : "-",
4398 ecx & (1 << 6) ? "SMX" : "-",
4399 ecx & (1 << 7) ? "EIST" : "-",
4400 ecx & (1 << 8) ? "TM2" : "-",
4401 edx & (1 << 4) ? "TSC" : "-",
4402 edx & (1 << 5) ? "MSR" : "-",
4403 edx & (1 << 22) ? "ACPI-TM" : "-",
4404 edx & (1 << 29) ? "TM" : "-");
4407 if (!(edx & (1 << 5)))
4408 errx(1, "CPUID: no MSR");
4411 * check max extended function levels of CPUID.
4412 * This is needed to check for invariant TSC.
4413 * This check is valid for both Intel and AMD.
4415 ebx = ecx = edx = 0;
4416 __cpuid(0x80000000, max_extended_level, ebx, ecx, edx);
4418 if (max_extended_level >= 0x80000007) {
4421 * Non-Stop TSC is advertised by CPUID.EAX=0x80000007: EDX.bit8
4422 * this check is valid for both Intel and AMD
4424 __cpuid(0x80000007, eax, ebx, ecx, edx);
4425 has_invariant_tsc = edx & (1 << 8);
4429 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
4430 * this check is valid for both Intel and AMD
4433 __cpuid(0x6, eax, ebx, ecx, edx);
4434 has_aperf = ecx & (1 << 0);
4436 BIC_PRESENT(BIC_Avg_MHz);
4437 BIC_PRESENT(BIC_Busy);
4438 BIC_PRESENT(BIC_Bzy_MHz);
4440 do_dts = eax & (1 << 0);
4442 BIC_PRESENT(BIC_CoreTmp);
4443 has_turbo = eax & (1 << 1);
4444 do_ptm = eax & (1 << 6);
4446 BIC_PRESENT(BIC_PkgTmp);
4447 has_hwp = eax & (1 << 7);
4448 has_hwp_notify = eax & (1 << 8);
4449 has_hwp_activity_window = eax & (1 << 9);
4450 has_hwp_epp = eax & (1 << 10);
4451 has_hwp_pkg = eax & (1 << 11);
4452 has_epb = ecx & (1 << 3);
4455 fprintf(outf, "CPUID(6): %sAPERF, %sTURBO, %sDTS, %sPTM, %sHWP, "
4456 "%sHWPnotify, %sHWPwindow, %sHWPepp, %sHWPpkg, %sEPB\n",
4457 has_aperf ? "" : "No-",
4458 has_turbo ? "" : "No-",
4459 do_dts ? "" : "No-",
4460 do_ptm ? "" : "No-",
4461 has_hwp ? "" : "No-",
4462 has_hwp_notify ? "" : "No-",
4463 has_hwp_activity_window ? "" : "No-",
4464 has_hwp_epp ? "" : "No-",
4465 has_hwp_pkg ? "" : "No-",
4466 has_epb ? "" : "No-");
4469 decode_misc_enable_msr();
4472 if (max_level >= 0x7 && !quiet) {
4477 __cpuid_count(0x7, 0, eax, ebx, ecx, edx);
4479 has_sgx = ebx & (1 << 2);
4480 fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
4483 decode_feature_control_msr();
4486 if (max_level >= 0x15) {
4487 unsigned int eax_crystal;
4488 unsigned int ebx_tsc;
4491 * CPUID 15H TSC/Crystal ratio, possibly Crystal Hz
4493 eax_crystal = ebx_tsc = crystal_hz = edx = 0;
4494 __cpuid(0x15, eax_crystal, ebx_tsc, crystal_hz, edx);
4498 if (!quiet && (ebx != 0))
4499 fprintf(outf, "CPUID(0x15): eax_crystal: %d ebx_tsc: %d ecx_crystal_hz: %d\n",
4500 eax_crystal, ebx_tsc, crystal_hz);
4502 if (crystal_hz == 0)
4504 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
4505 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
4506 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
4507 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
4508 crystal_hz = 24000000; /* 24.0 MHz */
4510 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
4511 crystal_hz = 25000000; /* 25.0 MHz */
4513 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
4514 case INTEL_FAM6_ATOM_GEMINI_LAKE:
4515 crystal_hz = 19200000; /* 19.2 MHz */
4522 tsc_hz = (unsigned long long) crystal_hz * ebx_tsc / eax_crystal;
4524 fprintf(outf, "TSC: %lld MHz (%d Hz * %d / %d / 1000000)\n",
4525 tsc_hz / 1000000, crystal_hz, ebx_tsc, eax_crystal);
4529 if (max_level >= 0x16) {
4530 unsigned int base_mhz, max_mhz, bus_mhz, edx;
4533 * CPUID 16H Base MHz, Max MHz, Bus MHz
4535 base_mhz = max_mhz = bus_mhz = edx = 0;
4537 __cpuid(0x16, base_mhz, max_mhz, bus_mhz, edx);
4539 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
4540 base_mhz, max_mhz, bus_mhz);
4544 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
4546 BIC_PRESENT(BIC_IRQ);
4547 BIC_PRESENT(BIC_TSC_MHz);
4549 if (probe_nhm_msrs(family, model)) {
4550 do_nhm_platform_info = 1;
4551 BIC_PRESENT(BIC_CPU_c1);
4552 BIC_PRESENT(BIC_CPU_c3);
4553 BIC_PRESENT(BIC_CPU_c6);
4554 BIC_PRESENT(BIC_SMI);
4556 do_snb_cstates = has_snb_msrs(family, model);
4559 BIC_PRESENT(BIC_CPU_c7);
4561 do_irtl_snb = has_snb_msrs(family, model);
4562 if (do_snb_cstates && (pkg_cstate_limit >= PCL__2))
4563 BIC_PRESENT(BIC_Pkgpc2);
4564 if (pkg_cstate_limit >= PCL__3)
4565 BIC_PRESENT(BIC_Pkgpc3);
4566 if (pkg_cstate_limit >= PCL__6)
4567 BIC_PRESENT(BIC_Pkgpc6);
4568 if (do_snb_cstates && (pkg_cstate_limit >= PCL__7))
4569 BIC_PRESENT(BIC_Pkgpc7);
4570 if (has_slv_msrs(family, model)) {
4571 BIC_NOT_PRESENT(BIC_Pkgpc2);
4572 BIC_NOT_PRESENT(BIC_Pkgpc3);
4573 BIC_PRESENT(BIC_Pkgpc6);
4574 BIC_NOT_PRESENT(BIC_Pkgpc7);
4575 BIC_PRESENT(BIC_Mod_c6);
4576 use_c1_residency_msr = 1;
4578 if (is_dnv(family, model)) {
4579 BIC_PRESENT(BIC_CPU_c1);
4580 BIC_NOT_PRESENT(BIC_CPU_c3);
4581 BIC_NOT_PRESENT(BIC_Pkgpc3);
4582 BIC_NOT_PRESENT(BIC_CPU_c7);
4583 BIC_NOT_PRESENT(BIC_Pkgpc7);
4584 use_c1_residency_msr = 1;
4586 if (is_skx(family, model)) {
4587 BIC_NOT_PRESENT(BIC_CPU_c3);
4588 BIC_NOT_PRESENT(BIC_Pkgpc3);
4589 BIC_NOT_PRESENT(BIC_CPU_c7);
4590 BIC_NOT_PRESENT(BIC_Pkgpc7);
4592 if (is_bdx(family, model)) {
4593 BIC_NOT_PRESENT(BIC_CPU_c7);
4594 BIC_NOT_PRESENT(BIC_Pkgpc7);
4596 if (has_hsw_msrs(family, model)) {
4597 BIC_PRESENT(BIC_Pkgpc8);
4598 BIC_PRESENT(BIC_Pkgpc9);
4599 BIC_PRESENT(BIC_Pkgpc10);
4601 do_irtl_hsw = has_hsw_msrs(family, model);
4602 if (has_skl_msrs(family, model)) {
4603 BIC_PRESENT(BIC_Totl_c0);
4604 BIC_PRESENT(BIC_Any_c0);
4605 BIC_PRESENT(BIC_GFX_c0);
4606 BIC_PRESENT(BIC_CPUGFX);
4608 do_slm_cstates = is_slm(family, model);
4609 do_knl_cstates = is_knl(family, model);
4610 do_cnl_cstates = is_cnl(family, model);
4613 decode_misc_pwr_mgmt_msr();
4615 if (!quiet && has_slv_msrs(family, model))
4616 decode_c6_demotion_policy_msr();
4618 rapl_probe(family, model);
4619 perf_limit_reasons_probe(family, model);
4620 automatic_cstate_conversion_probe(family, model);
4623 dump_cstate_pstate_config_info(family, model);
4626 dump_sysfs_cstate_config();
4628 dump_sysfs_pstate_config();
4630 if (has_skl_msrs(family, model))
4631 calculate_tsc_tweak();
4633 if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
4634 BIC_PRESENT(BIC_GFX_rc6);
4636 if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
4637 BIC_PRESENT(BIC_GFXMHz);
4639 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_cpu_residency_us", R_OK))
4640 BIC_PRESENT(BIC_CPU_LPI);
4642 BIC_NOT_PRESENT(BIC_CPU_LPI);
4644 if (!access("/sys/devices/system/cpu/cpuidle/low_power_idle_system_residency_us", R_OK))
4645 BIC_PRESENT(BIC_SYS_LPI);
4647 BIC_NOT_PRESENT(BIC_SYS_LPI);
4650 decode_misc_feature_control();
4657 * in /dev/cpu/ return success for names that are numbers
4658 * ie. filter out ".", "..", "microcode".
4660 int dir_filter(const struct dirent *dirp)
4662 if (isdigit(dirp->d_name[0]))
4668 int open_dev_cpu_msr(int dummy1)
4673 void topology_probe()
4676 int max_core_id = 0;
4677 int max_package_id = 0;
4678 int max_siblings = 0;
4680 /* Initialize num_cpus, max_cpu_num */
4683 for_all_proc_cpus(count_cpus);
4684 if (!summary_only && topo.num_cpus > 1)
4685 BIC_PRESENT(BIC_CPU);
4688 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
4690 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
4692 err(1, "calloc cpus");
4695 * Allocate and initialize cpu_present_set
4697 cpu_present_set = CPU_ALLOC((topo.max_cpu_num + 1));
4698 if (cpu_present_set == NULL)
4699 err(3, "CPU_ALLOC");
4700 cpu_present_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4701 CPU_ZERO_S(cpu_present_setsize, cpu_present_set);
4702 for_all_proc_cpus(mark_cpu_present);
4705 * Validate that all cpus in cpu_subset are also in cpu_present_set
4707 for (i = 0; i < CPU_SUBSET_MAXCPUS; ++i) {
4708 if (CPU_ISSET_S(i, cpu_subset_size, cpu_subset))
4709 if (!CPU_ISSET_S(i, cpu_present_setsize, cpu_present_set))
4710 err(1, "cpu%d not present", i);
4714 * Allocate and initialize cpu_affinity_set
4716 cpu_affinity_set = CPU_ALLOC((topo.max_cpu_num + 1));
4717 if (cpu_affinity_set == NULL)
4718 err(3, "CPU_ALLOC");
4719 cpu_affinity_setsize = CPU_ALLOC_SIZE((topo.max_cpu_num + 1));
4720 CPU_ZERO_S(cpu_affinity_setsize, cpu_affinity_set);
4722 for_all_proc_cpus(init_thread_id);
4726 * find max_core_id, max_package_id
4728 for (i = 0; i <= topo.max_cpu_num; ++i) {
4731 if (cpu_is_not_present(i)) {
4733 fprintf(outf, "cpu%d NOT PRESENT\n", i);
4737 cpus[i].logical_cpu_id = i;
4739 /* get package information */
4740 cpus[i].physical_package_id = get_physical_package_id(i);
4741 if (cpus[i].physical_package_id > max_package_id)
4742 max_package_id = cpus[i].physical_package_id;
4744 /* get numa node information */
4745 cpus[i].physical_node_id = get_physical_node_id(&cpus[i]);
4746 if (cpus[i].physical_node_id > topo.max_node_num)
4747 topo.max_node_num = cpus[i].physical_node_id;
4749 /* get core information */
4750 cpus[i].physical_core_id = get_core_id(i);
4751 if (cpus[i].physical_core_id > max_core_id)
4752 max_core_id = cpus[i].physical_core_id;
4754 /* get thread information */
4755 siblings = get_thread_siblings(&cpus[i]);
4756 if (siblings > max_siblings)
4757 max_siblings = siblings;
4758 if (cpus[i].thread_id != -1)
4763 "cpu %d pkg %d node %d core %d thread %d\n",
4764 i, cpus[i].physical_package_id,
4765 cpus[i].physical_node_id,
4766 cpus[i].physical_core_id,
4770 topo.cores_per_node = max_core_id + 1;
4772 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
4773 max_core_id, topo.cores_per_node);
4774 if (!summary_only && topo.cores_per_node > 1)
4775 BIC_PRESENT(BIC_Core);
4777 topo.num_packages = max_package_id + 1;
4779 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
4780 max_package_id, topo.num_packages);
4781 if (!summary_only && topo.num_packages > 1)
4782 BIC_PRESENT(BIC_Package);
4786 fprintf(outf, "nodes_per_pkg %d\n", topo.nodes_per_pkg);
4787 if (!summary_only && topo.nodes_per_pkg > 1)
4788 BIC_PRESENT(BIC_Node);
4790 topo.threads_per_core = max_siblings;
4792 fprintf(outf, "max_siblings %d\n", max_siblings);
4796 allocate_counters(struct thread_data **t, struct core_data **c,
4797 struct pkg_data **p)
4800 int num_cores = topo.cores_per_node * topo.nodes_per_pkg *
4802 int num_threads = topo.threads_per_core * num_cores;
4804 *t = calloc(num_threads, sizeof(struct thread_data));
4808 for (i = 0; i < num_threads; i++)
4809 (*t)[i].cpu_id = -1;
4811 *c = calloc(num_cores, sizeof(struct core_data));
4815 for (i = 0; i < num_cores; i++)
4816 (*c)[i].core_id = -1;
4818 *p = calloc(topo.num_packages, sizeof(struct pkg_data));
4822 for (i = 0; i < topo.num_packages; i++)
4823 (*p)[i].package_id = i;
4827 err(1, "calloc counters");
4832 * set FIRST_THREAD_IN_CORE and FIRST_CORE_IN_PACKAGE
4834 void init_counter(struct thread_data *thread_base, struct core_data *core_base,
4835 struct pkg_data *pkg_base, int cpu_id)
4837 int pkg_id = cpus[cpu_id].physical_package_id;
4838 int node_id = cpus[cpu_id].logical_node_id;
4839 int core_id = cpus[cpu_id].physical_core_id;
4840 int thread_id = cpus[cpu_id].thread_id;
4841 struct thread_data *t;
4842 struct core_data *c;
4845 t = GET_THREAD(thread_base, thread_id, core_id, node_id, pkg_id);
4846 c = GET_CORE(core_base, core_id, node_id, pkg_id);
4847 p = GET_PKG(pkg_base, pkg_id);
4850 if (thread_id == 0) {
4851 t->flags |= CPU_IS_FIRST_THREAD_IN_CORE;
4852 if (cpu_is_first_core_in_package(cpu_id))
4853 t->flags |= CPU_IS_FIRST_CORE_IN_PACKAGE;
4856 c->core_id = core_id;
4857 p->package_id = pkg_id;
4861 int initialize_counters(int cpu_id)
4863 init_counter(EVEN_COUNTERS, cpu_id);
4864 init_counter(ODD_COUNTERS, cpu_id);
4868 void allocate_output_buffer()
4870 output_buffer = calloc(1, (1 + topo.num_cpus) * 1024);
4871 outp = output_buffer;
4873 err(-1, "calloc output buffer");
4875 void allocate_fd_percpu(void)
4877 fd_percpu = calloc(topo.max_cpu_num + 1, sizeof(int));
4878 if (fd_percpu == NULL)
4879 err(-1, "calloc fd_percpu");
4881 void allocate_irq_buffers(void)
4883 irq_column_2_cpu = calloc(topo.num_cpus, sizeof(int));
4884 if (irq_column_2_cpu == NULL)
4885 err(-1, "calloc %d", topo.num_cpus);
4887 irqs_per_cpu = calloc(topo.max_cpu_num + 1, sizeof(int));
4888 if (irqs_per_cpu == NULL)
4889 err(-1, "calloc %d", topo.max_cpu_num + 1);
4891 void setup_all_buffers(void)
4894 allocate_irq_buffers();
4895 allocate_fd_percpu();
4896 allocate_counters(&thread_even, &core_even, &package_even);
4897 allocate_counters(&thread_odd, &core_odd, &package_odd);
4898 allocate_output_buffer();
4899 for_all_proc_cpus(initialize_counters);
4902 void set_base_cpu(void)
4904 base_cpu = sched_getcpu();
4906 err(-ENODEV, "No valid cpus found");
4909 fprintf(outf, "base_cpu = %d\n", base_cpu);
4912 void turbostat_init()
4914 setup_all_buffers();
4917 check_permissions();
4922 for_all_cpus(print_hwp, ODD_COUNTERS);
4925 for_all_cpus(print_epb, ODD_COUNTERS);
4928 for_all_cpus(print_perf_limit, ODD_COUNTERS);
4931 for_all_cpus(print_rapl, ODD_COUNTERS);
4933 for_all_cpus(set_temperature_target, ODD_COUNTERS);
4936 for_all_cpus(print_thermal, ODD_COUNTERS);
4938 if (!quiet && do_irtl_snb)
4942 int fork_it(char **argv)
4947 snapshot_proc_sysfs_files();
4948 status = for_all_cpus(get_counters, EVEN_COUNTERS);
4951 /* clear affinity side-effect of get_counters() */
4952 sched_setaffinity(0, cpu_present_setsize, cpu_present_set);
4953 gettimeofday(&tv_even, (struct timezone *)NULL);
4958 execvp(argv[0], argv);
4959 err(errno, "exec %s", argv[0]);
4963 if (child_pid == -1)
4966 signal(SIGINT, SIG_IGN);
4967 signal(SIGQUIT, SIG_IGN);
4968 if (waitpid(child_pid, &status, 0) == -1)
4969 err(status, "waitpid");
4972 * n.b. fork_it() does not check for errors from for_all_cpus()
4973 * because re-starting is problematic when forking
4975 snapshot_proc_sysfs_files();
4976 for_all_cpus(get_counters, ODD_COUNTERS);
4977 gettimeofday(&tv_odd, (struct timezone *)NULL);
4978 timersub(&tv_odd, &tv_even, &tv_delta);
4979 if (for_all_cpus_2(delta_cpu, ODD_COUNTERS, EVEN_COUNTERS))
4980 fprintf(outf, "%s: Counter reset detected\n", progname);
4982 compute_average(EVEN_COUNTERS);
4983 format_all_counters(EVEN_COUNTERS);
4986 fprintf(outf, "%.6f sec\n", tv_delta.tv_sec + tv_delta.tv_usec/1000000.0);
4988 flush_output_stderr();
4993 int get_and_dump_counters(void)
4997 snapshot_proc_sysfs_files();
4998 status = for_all_cpus(get_counters, ODD_COUNTERS);
5002 status = for_all_cpus(dump_counters, ODD_COUNTERS);
5006 flush_output_stdout();
5011 void print_version() {
5012 fprintf(outf, "turbostat version 17.06.23"
5013 " - Len Brown <lenb@kernel.org>\n");
5016 int add_counter(unsigned int msr_num, char *path, char *name,
5017 unsigned int width, enum counter_scope scope,
5018 enum counter_type type, enum counter_format format, int flags)
5020 struct msr_counter *msrp;
5022 msrp = calloc(1, sizeof(struct msr_counter));
5028 msrp->msr_num = msr_num;
5029 strncpy(msrp->name, name, NAME_BYTES);
5031 strncpy(msrp->path, path, PATH_BYTES);
5032 msrp->width = width;
5034 msrp->format = format;
5035 msrp->flags = flags;
5040 msrp->next = sys.tp;
5042 sys.added_thread_counters++;
5043 if (sys.added_thread_counters > MAX_ADDED_THREAD_COUNTERS) {
5044 fprintf(stderr, "exceeded max %d added thread counters\n",
5045 MAX_ADDED_COUNTERS);
5051 msrp->next = sys.cp;
5053 sys.added_core_counters++;
5054 if (sys.added_core_counters > MAX_ADDED_COUNTERS) {
5055 fprintf(stderr, "exceeded max %d added core counters\n",
5056 MAX_ADDED_COUNTERS);
5062 msrp->next = sys.pp;
5064 sys.added_package_counters++;
5065 if (sys.added_package_counters > MAX_ADDED_COUNTERS) {
5066 fprintf(stderr, "exceeded max %d added package counters\n",
5067 MAX_ADDED_COUNTERS);
5076 void parse_add_command(char *add_command)
5080 char name_buffer[NAME_BYTES] = "";
5083 enum counter_scope scope = SCOPE_CPU;
5084 enum counter_type type = COUNTER_CYCLES;
5085 enum counter_format format = FORMAT_DELTA;
5087 while (add_command) {
5089 if (sscanf(add_command, "msr0x%x", &msr_num) == 1)
5092 if (sscanf(add_command, "msr%d", &msr_num) == 1)
5095 if (*add_command == '/') {
5100 if (sscanf(add_command, "u%d", &width) == 1) {
5101 if ((width == 32) || (width == 64))
5105 if (!strncmp(add_command, "cpu", strlen("cpu"))) {
5109 if (!strncmp(add_command, "core", strlen("core"))) {
5113 if (!strncmp(add_command, "package", strlen("package"))) {
5114 scope = SCOPE_PACKAGE;
5117 if (!strncmp(add_command, "cycles", strlen("cycles"))) {
5118 type = COUNTER_CYCLES;
5121 if (!strncmp(add_command, "seconds", strlen("seconds"))) {
5122 type = COUNTER_SECONDS;
5125 if (!strncmp(add_command, "usec", strlen("usec"))) {
5126 type = COUNTER_USEC;
5129 if (!strncmp(add_command, "raw", strlen("raw"))) {
5130 format = FORMAT_RAW;
5133 if (!strncmp(add_command, "delta", strlen("delta"))) {
5134 format = FORMAT_DELTA;
5137 if (!strncmp(add_command, "percent", strlen("percent"))) {
5138 format = FORMAT_PERCENT;
5142 if (sscanf(add_command, "%18s,%*s", name_buffer) == 1) { /* 18 < NAME_BYTES */
5145 eos = strchr(name_buffer, ',');
5152 add_command = strchr(add_command, ',');
5154 *add_command = '\0';
5159 if ((msr_num == 0) && (path == NULL)) {
5160 fprintf(stderr, "--add: (msrDDD | msr0xXXX | /path_to_counter ) required\n");
5164 /* generate default column header */
5165 if (*name_buffer == '\0') {
5167 sprintf(name_buffer, "M0x%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5169 sprintf(name_buffer, "M0X%x%s", msr_num, format == FORMAT_PERCENT ? "%" : "");
5172 if (add_counter(msr_num, path, name_buffer, width, scope, type, format, 0))
5181 int is_deferred_skip(char *name)
5185 for (i = 0; i < deferred_skip_index; ++i)
5186 if (!strcmp(name, deferred_skip_names[i]))
5191 void probe_sysfs(void)
5199 if (!DO_BIC(BIC_sysfs))
5202 for (state = 10; state >= 0; --state) {
5204 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5206 input = fopen(path, "r");
5209 fgets(name_buf, sizeof(name_buf), input);
5211 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5212 sp = strchr(name_buf, '-');
5214 sp = strchrnul(name_buf, '\n');
5220 sprintf(path, "cpuidle/state%d/time", state);
5222 if (is_deferred_skip(name_buf))
5225 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_USEC,
5226 FORMAT_PERCENT, SYSFS_PERCPU);
5229 for (state = 10; state >= 0; --state) {
5231 sprintf(path, "/sys/devices/system/cpu/cpu%d/cpuidle/state%d/name",
5233 input = fopen(path, "r");
5236 fgets(name_buf, sizeof(name_buf), input);
5237 /* truncate "C1-HSW\n" to "C1", or truncate "C1\n" to "C1" */
5238 sp = strchr(name_buf, '-');
5240 sp = strchrnul(name_buf, '\n');
5244 sprintf(path, "cpuidle/state%d/usage", state);
5246 if (is_deferred_skip(name_buf))
5249 add_counter(0, path, name_buf, 64, SCOPE_CPU, COUNTER_ITEMS,
5250 FORMAT_DELTA, SYSFS_PERCPU);
5257 * parse cpuset with following syntax
5258 * 1,2,4..6,8-10 and set bits in cpu_subset
5260 void parse_cpu_command(char *optarg)
5262 unsigned int start, end;
5265 if (!strcmp(optarg, "core")) {
5271 if (!strcmp(optarg, "package")) {
5277 if (show_core_only || show_pkg_only)
5280 cpu_subset = CPU_ALLOC(CPU_SUBSET_MAXCPUS);
5281 if (cpu_subset == NULL)
5282 err(3, "CPU_ALLOC");
5283 cpu_subset_size = CPU_ALLOC_SIZE(CPU_SUBSET_MAXCPUS);
5285 CPU_ZERO_S(cpu_subset_size, cpu_subset);
5289 while (next && *next) {
5291 if (*next == '-') /* no negative cpu numbers */
5294 start = strtoul(next, &next, 10);
5296 if (start >= CPU_SUBSET_MAXCPUS)
5298 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5309 next += 1; /* start range */
5310 } else if (*next == '.') {
5313 next += 1; /* start range */
5318 end = strtoul(next, &next, 10);
5322 while (++start <= end) {
5323 if (start >= CPU_SUBSET_MAXCPUS)
5325 CPU_SET_S(start, cpu_subset_size, cpu_subset);
5330 else if (*next != '\0')
5337 fprintf(stderr, "\"--cpu %s\" malformed\n", optarg);
5343 void cmdline(int argc, char **argv)
5346 int option_index = 0;
5347 static struct option long_options[] = {
5348 {"add", required_argument, 0, 'a'},
5349 {"cpu", required_argument, 0, 'c'},
5350 {"Dump", no_argument, 0, 'D'},
5351 {"debug", no_argument, 0, 'd'}, /* internal, not documented */
5352 {"enable", required_argument, 0, 'e'},
5353 {"interval", required_argument, 0, 'i'},
5354 {"num_iterations", required_argument, 0, 'n'},
5355 {"help", no_argument, 0, 'h'},
5356 {"hide", required_argument, 0, 'H'}, // meh, -h taken by --help
5357 {"Joules", no_argument, 0, 'J'},
5358 {"list", no_argument, 0, 'l'},
5359 {"out", required_argument, 0, 'o'},
5360 {"quiet", no_argument, 0, 'q'},
5361 {"show", required_argument, 0, 's'},
5362 {"Summary", no_argument, 0, 'S'},
5363 {"TCC", required_argument, 0, 'T'},
5364 {"version", no_argument, 0, 'v' },
5370 while ((opt = getopt_long_only(argc, argv, "+C:c:Dde:hi:Jn:o:qST:v",
5371 long_options, &option_index)) != -1) {
5374 parse_add_command(optarg);
5377 parse_cpu_command(optarg);
5383 /* --enable specified counter */
5384 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
5388 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
5392 * --hide: do not show those specified
5393 * multiple invocations simply clear more bits in enabled mask
5395 bic_enabled &= ~bic_lookup(optarg, HIDE_LIST);
5403 double interval = strtod(optarg, NULL);
5405 if (interval < 0.001) {
5406 fprintf(outf, "interval %f seconds is too small\n",
5411 interval_tv.tv_sec = interval_ts.tv_sec = interval;
5412 interval_tv.tv_usec = (interval - interval_tv.tv_sec) * 1000000;
5413 interval_ts.tv_nsec = (interval - interval_ts.tv_sec) * 1000000000;
5420 ENABLE_BIC(BIC_DISABLED_BY_DEFAULT);
5425 outf = fopen_or_die(optarg, "w");
5431 num_iterations = strtod(optarg, NULL);
5433 if (num_iterations <= 0) {
5434 fprintf(outf, "iterations %d should be positive number\n",
5441 * --show: show only those specified
5442 * The 1st invocation will clear and replace the enabled mask
5443 * subsequent invocations can add to it.
5446 bic_enabled = bic_lookup(optarg, SHOW_LIST);
5448 bic_enabled |= bic_lookup(optarg, SHOW_LIST);
5455 tcc_activation_temp_override = atoi(optarg);
5465 int main(int argc, char **argv)
5469 cmdline(argc, argv);
5478 /* dump counters and exit */
5480 return get_and_dump_counters();
5482 /* list header and exit */
5483 if (list_header_only) {
5485 flush_output_stdout();
5490 * if any params left, it must be a command to fork
5493 return fork_it(argv + optind);